Light-emitting device

Abstract

A light-emitting device disclosed herein comprises a plurality of light-emitting elements disposed on a common substrate, wherein each of the plurality of light-emitting elements includes a resonator including a first reflector, a second reflector, a saturable absorption layer disposed between the first reflector and the second reflector, and an active layer disposed between the first reflector and the second reflector, wherein the current density of a drive current supplied to a first light-emitting element among the plurality of light-emitting elements is greater than the current density of a drive current supplied to a second light-emitting element among the plurality of light-emitting elements, and the amount of light loss in the resonator of the first light-emitting element is greater than the amount of light loss in the resonator of the second light-emitting element.

Description

Light-emitting device

[0001] This disclosure relates to a light-emitting device.

[0002] Patent Document 1 discloses a VCSEL (Vertical Cavity Surface Emitting Laser) that includes a saturable absorption layer. The VCSEL in Patent Document 1 can generate pulsed light with a short pulse width and high peak value. Patent Document 1 also discloses a VCSEL array in which multiple VCSELs are arranged on a semiconductor substrate.

[0003] Japanese Patent Publication No. 2022-176886

[0004] In a light-emitting device with multiple VCSELs, the timing of pulsed light emission may not coincide between the VCSELs.

[0005] One aspect of this disclosure is to provide a light-emitting device in which variations in the timing of pulsed light emission are reduced.

[0006] According to one aspect of the present disclosure, a light-emitting device is provided having a plurality of light-emitting elements arranged on a common substrate, each of the plurality of light-emitting elements having a resonator including a first reflector, a second reflector, a saturable absorbing layer disposed between the first reflector and the second reflector, and an active layer disposed between the first reflector and the second reflector, wherein the current density of the drive current supplied to the first light-emitting element among the plurality of light-emitting elements is greater than the current density of the drive current supplied to the second light-emitting element among the plurality of light-emitting elements, and the amount of optical loss in the resonator of the first light-emitting element is greater than the amount of optical loss in the resonator of the second light-emitting element.

[0007] According to one aspect of the present disclosure, a light-emitting device is provided in which variations in the timing of pulsed light emission are reduced.

[0008] This is a schematic plan view of the light-emitting device according to the first embodiment. This is a schematic cross-sectional view of the light-emitting element according to the first embodiment. This is a diagram showing the calculation conditions for reflectance according to the first embodiment. This is a graph showing an example of reflectance calculation according to the first embodiment. This is a graph showing an example of the waveform of high peak value pulsed light according to the first embodiment. This is a schematic cross-sectional view of the light-emitting element according to the second embodiment. This is a graph showing an example of light extraction efficiency calculation according to the second embodiment. This is a schematic plan view of the light-emitting device according to the third embodiment. This is a schematic plan view of the light-emitting device according to the fourth embodiment. This is a schematic plan view of the light-emitting device according to the fifth embodiment. This is a schematic plan view of the light-emitting device according to the sixth embodiment. This is a schematic plan view of the light-emitting device according to the seventh embodiment. This is a schematic cross-sectional view of the light-emitting element according to the eighth embodiment. This is a graph showing an example of reflectance calculation according to the eighth embodiment. This is a graph showing an example of reflectance calculation according to a modified example of the eighth embodiment. This is a schematic cross-sectional view of the light-emitting element according to the ninth embodiment. This is a schematic cross-sectional view of the light-emitting element according to the tenth embodiment. This is a diagram showing the calculation conditions for reflectance according to the tenth embodiment. This is a graph showing an example of reflectance calculation according to the tenth embodiment. This is a schematic cross-sectional view of the light-emitting element according to the eleventh embodiment. This is a schematic plan view showing the general configuration of the light-emitting device according to the twelfth embodiment. This is a schematic cross-sectional diagram showing the schematic configuration of the light-emitting element constituting the light-emitting device according to the 12th embodiment. This is a schematic cross-sectional diagram (1) showing the schematic configuration of the light-emitting device according to the 12th embodiment. This is a schematic cross-sectional diagram (2) showing the schematic configuration of the light-emitting device according to the 12th embodiment. This is a schematic diagram showing the configuration of the anode wiring and the current path in the light-emitting device according to the 12th embodiment. This is a graph showing the current distribution in the light-emitting device according to the 12th embodiment. This is a schematic plan view showing the schematic configuration of the light-emitting device according to a reference form of the 12th embodiment. This is a schematic cross-sectional diagram (1) showing the schematic configuration of the light-emitting device according to a reference form of the 12th embodiment. This is a schematic cross-sectional diagram (2) showing the schematic configuration of the light-emitting device according to a reference form of the 12th embodiment. This is a graph showing the current distribution in the light-emitting device according to a reference form of the 12th embodiment. This is a plan view showing an example configuration of a VCSEL array according to the 13th embodiment. This is a cross-sectional view showing an example configuration of a VCSEL according to the 13th embodiment. This is a cross-sectional view showing an example configuration of a VCSEL according to the 13th embodiment.It is a diagram showing an example of the material of the semiconductor layer added to the VCSEL according to the 13th embodiment and the increase rate of the resistance value due to the addition of the semiconductor layer. It is a plan view showing a configuration example of a VCSEL array according to the comparative example of the 13th embodiment. It is a diagram showing the current distribution in each VCSEL array according to the 13th embodiment. It is a schematic cross-sectional view of a light-emitting element according to the 14th embodiment. It is a block diagram showing a schematic configuration of a distance measuring device according to the 15th embodiment. It is a block diagram showing a configuration example of a moving body according to the 16th embodiment. It is a block diagram showing a configuration example of a moving body according to the 16th embodiment.

[0009] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. The same elements or corresponding elements are denoted by common reference numerals throughout the plurality of drawings, and the description thereof may be omitted or simplified.

[0010] [First Embodiment] The light-emitting device 1 according to the first embodiment will be described. FIG. 1 is a plan schematic view of the light-emitting device 1 according to the present embodiment. The light-emitting device 1 includes a semiconductor substrate 10, a light-emitting element array 20, an anode wiring 30, and a power supply pad 40. The semiconductor substrate 10 is a compound semiconductor substrate such as a GaAs substrate, for example. The semiconductor substrate 10 is a chip processed by dicing or the like so as to be rectangular in plan view.

[0011] The light-emitting element array 20 includes a plurality of light-emitting elements formed on a common semiconductor substrate 10. Each of the plurality of light-emitting elements is a vertical cavity surface emitting laser (VCSEL) having a distributed Bragg reflector (DBR). The plurality of light-emitting elements are arranged in a two-dimensional array in a rectangular lattice over a plurality of rows and a plurality of columns. Each of the plurality of light-emitting elements has an annular anode electrode 25.

[0012] In the following description, the first direction (row direction) in which the plurality of light-emitting elements in the light-emitting element array 20 are arranged is referred to as the X direction. Also, the second direction (column direction) in which the plurality of light-emitting elements in the light-emitting element array 20 are arranged is referred to as the Y direction. Also, the direction intersecting the X direction and the Y direction is referred to as the Z direction. The X direction, the Y direction, and the Z direction are typically orthogonal to each other.

[0013] Note that in FIG. 1, an example is illustrated in which 25 light-emitting elements are arranged in 5 rows and 5 columns in the light-emitting element array 20. However, the arrangement and number of the light-emitting elements are not limited to this. For example, more than 25 light-emitting elements may be arranged in the light-emitting element array 20.

[0014] The plurality of light-emitting elements in the light-emitting element array 20 include the light-emitting elements 20A and 20B. In FIG. 1, hatching is provided inside the circle indicating the anode electrode 25 of the light-emitting element 20B, and no hatching is provided inside the circle indicating the anode electrode 25 of the light-emitting element 20A. Among the 25 light-emitting elements arranged in 5 rows and 5 columns, 1 central one is the light-emitting element 20B, and the other 24 are the light-emitting elements 20A. That is, the 24 light-emitting elements 20A are arranged so as to surround 1 light-emitting element 20B.

[0015] The anode wiring 30 is formed of a conductive material such as gold, copper, titanium, or aluminum, and is connected to the anode electrode 25 of each of the light-emitting elements 20A and 20B. The anode wiring 30 is formed on the semiconductor substrate 10 mainly in a direction parallel to the surface of the semiconductor substrate 10. Further, when the light-emitting elements 20A and 20B have a concavo-convex shape, the anode wiring 30 is further formed along the side walls of the concavo-convex portions. Examples of the case where the light-emitting elements 20A and 20B have a concavo-convex shape include a case where the shapes of the light-emitting elements 20A and 20B are mesa-shaped or trench-shaped, and the concavo-convex portions generated by the formation of the mesa or trench are not filled with a dielectric or the like. The anode wiring 30 supplies power from the power supply pad 40 to the plurality of light-emitting elements 20A and 20B.

[0016] The power supply pad 40 is made up of conductive materials such as gold, titanium, platinum, aluminum, and copper, and is placed on the semiconductor substrate 10. The power supply pad 40 is electrically connected to the anode wiring 30. The power supply pad 40 is connected to a drive unit that drives the light-emitting device 1. The power supply pad 40 supplies power input from the drive unit to the anode wiring 30. The current injected from the power supply pad 40 flows through the anode wiring 30 to the anode electrodes 25 of the light-emitting elements 20A and 20B. As a result, driving power is applied to the light-emitting elements 20A and 20B at the same time.

[0017] In a plan view, the power supply pad 40 has a rectangular shape with the inside hollowed out and is arranged to surround the light-emitting elements 20A and 20B. Since the light-emitting element 20B is positioned at the center of the 25 light-emitting elements, the distance between the light-emitting element 20A and the power supply pad 40 is shorter than the distance between the light-emitting element 20B and the power supply pad 40.

[0018] As described above, in this embodiment, the distance from the power supply pad 40 to each light-emitting element is not uniform. Therefore, a difference in the current density of the drive current may occur between the light-emitting element 20A, which is relatively close to the power supply pad 40, and the light-emitting element 20B, which is relatively far from the power supply pad 40. That is, the current density of the drive current supplied to the light-emitting element 20A is greater than the current density of the drive current supplied to the light-emitting element 20B. The time from when the injection of current into the light-emitting element begins until pulsed light is emitted varies depending on the injected current density. Therefore, in a light-emitting element array 20 as shown in Figure 1, there may be variations in the timing of pulsed light emission depending on the position of the light-emitting elements. If the timing of pulsed light emission varies, even if individual light-emitting elements emit light with a short pulse width, the pulse width of the combined emitted light from the entire light-emitting element array 20 becomes longer, which may degrade the performance of the device on which the light-emitting device 1 is mounted. An example of a device on which such a light-emitting device 1 is mounted is a distance measuring device. In a distance measuring device that measures distance based on the time of flight of light, the pulse width of the emitted light can affect the distance accuracy.

[0019] This document explains why the time from the start of current injection into the light-emitting element to the emission of pulsed light varies depending on the current density of the injected current. Because the light-emitting element of this disclosure has a large effective volume in the active layer, a predetermined time is required from the start of current injection until the carrier density in the active layer reaches the amount necessary for inductive amplification to occur. This time is shorter the higher the current density of the injected current. Furthermore, for a certain period after the start of current injection, oscillation is inhibited by the absorption of light in the saturable absorption layer. Before laser oscillation occurs, current injection into the active layer generates spontaneous emission light in the active layer. When this spontaneous emission light is absorbed by the saturable absorption layer, the absorbed light is accumulated as carriers in the saturable absorption layer. As the carriers in the saturable absorption layer increase with the absorption of spontaneous emission light, the carrier density in the saturable absorption layer reaches the transparent carrier density, at which point the saturable absorption layer stops absorbing light. As a result, the effect of inhibiting laser oscillation disappears, and the light-emitting element begins laser oscillation. Therefore, when the current density is high, the amount of spontaneously emitted light generated per unit time in the active layer is greater compared to when the current density is low. As a result, many carriers accumulate in the saturable absorption layer in a short time, and the transparent carrier density is reached more quickly. Consequently, the higher the current density of the injected current, the shorter the time it takes for laser oscillation to begin.

[0020] In this embodiment, since the anode wiring 30 is arranged over almost the entire surface of the semiconductor substrate 10 except over the light-emitting element, the current density of the drive current strongly depends on the spatial distance between the power supply pad 40 and the light-emitting element. However, in cases where the anode wiring 30 is patterned linearly (for example, in the 12th embodiment described later), the current density of the drive current does not necessarily directly depend on the spatial distance between the power supply pad 40 and the light-emitting element, depending on the wiring layout. In this case, the distance between the power supply pad 40 and the light-emitting element described above can be reinterpreted as the length of the path between the power supply pad 40 and the light-emitting element on the wiring. For example, in the 12th embodiment described later, where the anode wiring is composed of multiple layers, the current density of the drive current strongly depends not on the spatial distance between the power supply pad and the light-emitting element, but on the length of the current that passes through the anode wiring (let's call this the path length). Therefore, it is possible that the spatial distance between the power supply pad and the light-emitting element is long, but the length of the path on the wiring is short (or vice versa).

[0021] In this embodiment, a light-emitting device 1 is provided that can reduce variations in the pulse light emission timing between light-emitting elements 20A and 20B by making the structures of the light-emitting elements 20A and 20B different. Specifically, in this embodiment, the reflectivity of the reflector of the light-emitting element 20A is smaller than that of the reflector of the light-emitting element 20B. That is, the amount of light loss in the resonator of the light-emitting element 20A is larger than the amount of light loss in the resonator of the light-emitting element 20B. This compensates for variations in the pulse light emission timing due to differences in distance from the power supply pad 40. The more specific configurations of the light-emitting elements 20A and 20B and the mechanism for reducing variations in the pulse light emission timing will be described below.

[0022] The configurations of the light-emitting elements 20A and 20B will be described in detail. Figure 2 is a schematic cross-sectional view of the light-emitting elements 20A and 20B according to this embodiment. The light-emitting element 20A has a lower DBR layer (first reflector) 21, a saturable absorption layer 22, a resonator spacer 23, a reflector (second reflector) 24A, an anode electrode 25, a cathode electrode 26, and an insulating film 27. The lower DBR layer 21 is disposed on the semiconductor substrate 10. The saturable absorption layer 22 is disposed on the lower DBR layer 21. The resonator spacer 23 is disposed on the saturable absorption layer 22. The reflector 24A is disposed on the resonator spacer 23. The anode electrode 25 is disposed on the reflector 24A. The anode electrode 25 is annular in plan view. The cathode electrode 26 is disposed on the back side of the semiconductor substrate 10 (opposite side of the lower DBR layer 21 of the semiconductor substrate 10). The cathode electrode 26 is electrically connected to ground.

[0023] The lower DBR layer 21 is, for example, Al with an optical film thickness of 1 / 4λc. ０．１ GaAs layer and Al ０．９ The layer can be constructed by stacking 35 pairs of laminates with a GaAs layer, with each pair representing one laminate. Here, λc is the central wavelength of the high-reflection band of the lower DBR layer 21, which in this embodiment is, for example, 940 nm. The saturable absorption layer 22 can be constructed, for example, by a multiple quantum well containing three quantum wells, each consisting of an 8 nm thick InGaAs well layer sandwiched between 10 nm thick AlGaAs barrier layers.

[0024] The resonator spacer 23 may include a doped spacer layer 231 disposed on the saturable absorption layer 22, an undoped spacer portion 232 disposed on the doped spacer layer 231, and a doped spacer layer 233 disposed on the undoped spacer portion 232. The undoped spacer portion 232 may include an undoped spacer layer 232a disposed on the doped spacer layer 231, an active portion 232b disposed on the undoped spacer layer 232a, and an undoped spacer layer 232c disposed on the active portion 232b.

[0025] The active part 232b may include, for example, a three-layer active layer. Each of the three-layer active layers may be constituted by, for example, a multiple quantum well including four quantum wells in which an InGaAs well layer with a thickness of 8 nm is sandwiched by AlGaAs barrier layers with a thickness of 10 nm. In this case, a total of 12 layers of quantum wells are included in the resonator spacer 23. The doped spacer layer 231 may be constituted by an n-type GaAs layer, the doped spacer layer 233 may be constituted by a p-type GaAs layer, and the undoped spacer layers 232a and 232c may be constituted by undoped GaAs layers, respectively.

[0026] Thus, the resonator spacer 23 has a p-i-n junction that also exists in a normal VCSEL, and since the active part 232b is included in the i layer, it has a configuration similar to that of a normal resonator spacer. However, the number of layers of quantum wells in the resonator spacer 23 is larger compared to the number of layers of quantum wells (about three layers) in a normal VCSEL. Also, the effective resonator length in the resonator spacer 23 is 10 μm, which is longer compared to a normal VCSEL. Here, the effective resonator length is the resonator length that light feels within the resonator spacer 23.

[0027] The reflector 24A may include an upper DBR layer 241 disposed on the doped spacer layer 233 of the resonator spacer 23, a contact layer 242 disposed on the upper DBR layer 241, and an upper insulating film 243a disposed on the contact layer 242. The upper DBR layer 241 may be constituted, for example, by laminating a stack of an Al ０．１ Ga ０．９ As layer and an Al ０．９ Ga ０．１ As layer as one pair, and laminating 20 pairs of this. In the upper DBR layer 241, a constriction oxide layer 241a that is an Al ０．９８ Ga ０．０２ As layer with a thickness of 30 nm is disposed.

[0028] The constriction oxide layer 241a, for example, at the time of manufacture, Al ０．９８ Ga ０．０２The As layer can be formed by oxidizing the mesa from the side with water vapor. The oxidized constriction layer 241a has a non-oxidized portion in the central part of the mesa and an oxidized portion near the side wall of the mesa. The diameter of the non-oxidized portion in a plan view may be about 10 μm. As a result, the current injected into the light-emitting element 20A flows only through the non-oxidized portion, so that only the portion of the light-emitting element 20A that overlaps with the central part of the mesa in a plan view oscillates as a laser.

[0029] The contact layer 242 is positioned between the anode electrode 25 and the upper DBR layer 241, and has the function of improving the electrical contact between the anode electrode 25 and the upper DBR layer 241. The upper insulating film 243a is formed in a thin film form and insulates the contact layer 242 while exposing a portion of the surface of the anode electrode 25.

[0030] In this embodiment, the light-emitting device 1 is assumed to be a surface-emitting type in which the generated laser light is emitted from the side of the reflector 24A, but it is not limited to this. The light-emitting device 1 may also be a back-emitting type in which the generated laser light is emitted from the side of the semiconductor substrate 10.

[0031] In this embodiment, the configuration of a normal VCSEL is used as a base, with the following three elements added. The first of the three elements added to the VCSEL is to substantially increase the volume of the active layer. For example, a normal VCSEL is composed of three quantum wells, but in this embodiment, the volume of the active layer of the active section 232b is increased by increasing the number of quantum well layers to 12. The second is to introduce a saturable absorption layer. The third is to extend the effective resonator length of the VCSEL. The effective resonator length is the resonator length that light perceives within the resonator. More specifically, it is the average distance that light propagates from the active section 232b in the resonant direction until it is reflected by the two reflectors constituting the resonator and passes through the active layer again. By adding at least one, preferably three of these elements, it is possible to realize a VCSEL capable of generating optical pulses with high peak values ​​and short pulse widths.

[0032] Next, the light-emitting element 20B will be described. In the light-emitting element 20B, the thickness of the upper insulating film 243b differs from the thickness of the upper insulating film 243a of the light-emitting element 20A. In other respects, the configuration of the light-emitting element 20B is the same as that of the light-emitting element 20A. The differences between the light-emitting element 20B and the light-emitting element 20A will be explained in detail, and explanations of the same configuration will be omitted as appropriate.

[0033] The light-emitting element 20B includes a lower DBR layer 21, a saturable absorption layer 22, a resonator spacer 23, a reflector 24B, an anode electrode 25, a cathode electrode 26, and an insulating film 27. The reflector 24B may include an upper DBR layer 241 disposed on top of the doped spacer layer 233 of the resonator spacer 23, a contact layer 242 disposed on top of the upper DBR layer 241, and an upper insulating film 243b disposed on top of the contact layer 242.

[0034] The upper insulating film 243b is formed as a thin film and insulates the contact layer 242 while exposing a portion of the surface of the anode electrode 25. The thickness of the upper insulating film 243b in the Z direction is thinner than the thickness of the upper insulating film 243a in the Z direction. An example of a method for forming the upper insulating film 243b thinner than the upper insulating film 243a is to deposit the upper insulating films 243a and 243b together and then remove a portion of the upper insulating film 243b by etching. Another example of a method for forming the upper insulating film 243b thinner than the upper insulating film 243a is to deposit the upper insulating films 243a and 243b by a separate film deposition process and set the film deposition conditions so that the upper insulating film 243b is thinner than the upper insulating film 243a. Furthermore, a method is to deposit the upper insulating film to the required thickness for the upper insulating film 243a, then cover the portion other than the upper insulating film 243b with a predetermined material, deposit the insulating film additionally over the entire surface, and then remove the covering material. In this way, by making the thicknesses of the upper insulating films 243a and 243b different, the reflectivity of the reflectors 24A and 24B can be made different.

[0035] The relationship between the thickness of the upper insulating films 243a and 243b and the reflectance of the reflectors 24A and 24B will be explained in more detail based on the reflectance calculation results. Figure 3 is a diagram showing the reflectance calculation conditions according to this embodiment. In the reflectance calculation of this embodiment, a model in which a spacer layer SP, an upper DBR layer UDBR, and a dielectric layer DL are stacked is assumed. In this model, the reflectance of incident light LA ​​incident from the spacer layer SP side was calculated. The wavelength of this incident light LA ​​is 940 nm. The wavelength of incident light LA ​​corresponds to the wavelength of light generated in the active part 232b and resonating in the light-emitting elements 20A and 20B. The dielectric layer DL corresponds to the upper insulating films 243a and 243b.

[0036] The upper DBR layer UDBR is Al ０．１ GaAs layer and Al ０．９ The structure consists of 19 pairs of stacked GaAs layers. However, only the topmost layer of the upper DBR layer (UDBR) is replaced with a GaAs layer. The dielectric layer DL is a SiN (silicon nitride) layer, and the refractive index of SiN is 1.84. The reflectance was calculated while varying the thickness of the dielectric layer DL.

[0037] Figure 4 is a graph showing an example of reflectance calculation according to this embodiment. The vertical axis of Figure 4 shows the reflectance of the upper reflector (upper DBR layer UDBR and dielectric layer DL) under the calculation conditions of Figure 3. The horizontal axis of Figure 4 shows the film thickness of the SiN layer (dielectric layer DL).

[0038] As shown in Figure 4, the reflectance of the upper reflector changes periodically with respect to the thickness of the SiN layer. The thickness T3 in Figure 4 is a thickness that can be applied to the upper insulating film 243a of the light-emitting element 20A. The thickness T3 is 400 nm, and in this case the reflectance is approximately 98.0%. The thickness T1 in Figure 4 is a thickness that can be applied to the upper insulating film 243b of the light-emitting element 20B. The thickness T1 is 225 nm, and in this case the reflectance is approximately 99.0%. Therefore, by setting the thickness of the upper insulating film 243a of the light-emitting element 20A and the upper insulating film 243b of the light-emitting element 20B as described above, the reflectance of the reflector 24A of the light-emitting element 20A can be made smaller than the reflectance of the reflector 24B of the light-emitting element 20B. In this case, the optical loss of the resonator of the light-emitting element 20A is greater than the optical loss of the resonator of the light-emitting element 20B.

[0039] The film thickness T2 in Figure 4 is one of the film thicknesses at which the reflectivity of the upper reflector is maximized. The film thickness T2 is approximately 250 nm. The wavelength of the incident light, i.e., the resonant wavelength of the light-emitting elements 20A and 20B, is λ, and the refractive index of the dielectric layer DL is n. １ In this case, the thickness of the dielectric layer DL at which the reflectivity is maximum is λ / (2n １ It is a natural number multiple of λ / (2n). The thickness of the upper insulating film 243b of the light-emitting element 20B is greater than the thickness of the upper insulating film 243a of the light-emitting element 20A. １ By making it close to a natural number multiple of ), the reflectance of the reflector 24A of the light-emitting element 20A becomes smaller than the reflectance of the reflector 24B of the light-emitting element 20B.

[0040] Thus, in this embodiment, by making the thickness of the dielectric layers contained in the two light-emitting elements 20A and 20B different, the reflectivity of the reflector 24A of the light-emitting element 20A is made smaller than the reflectivity of the reflector 24B of the light-emitting element 20B. By setting the reflectivity in this way, the timing of pulse light emission can be adjusted. The phenomenon in which the timing of pulse light emission changes according to the reflectivity of the reflector will now be explained.

[0041] Figure 5 is a graph showing an example of the waveform of high-peak pulsed light according to this embodiment. The vertical axis of Figure 5 represents light intensity in arbitrary units, and the horizontal axis of Figure 5 represents time (seconds). Figure 5 illustrates pulsed light L1 and pulsed light L2 emitted from two light-emitting elements with different reflectivity of reflectors when the same driving voltage is applied to them at the same timing. Pulsed light L1 is light emitted from a light-emitting element having a reflector with a reflectivity of 99.1%, and pulsed light L2 is light emitted from a light-emitting element having a reflector with a reflectivity of 98.0%. As shown in Figure 5, the light-emitting device 1 according to this embodiment emits light that has a maximum peak value and a profile that converges to a stable value of a predetermined light intensity after the maximum peak value.

[0042] As shown in Figure 5, the emission timing of pulsed light L1 and pulsed light L2 are different. Specifically, the emission timing of pulsed light L2 is delayed by about 400 ps compared to the emission timing of pulsed light L1. Thus, when the timing of application of the drive voltage is the same, the smaller the reflectivity of the reflector, the later the emission timing of the pulsed light becomes. This is because the smaller the reflectivity of the reflector, the more easily light is lost within the resonator, the greater the gain required for transparency and oscillation of the saturable absorption layer, and the higher the carrier density required to produce that gain. In this way, the emission timing of the pulsed light can be adjusted by changing the reflectivity of the reflector by changing the thickness of the dielectric layer. Note that the maximum value of the light intensity of pulsed light L2 is slightly smaller than the maximum value of the light intensity of pulsed light L1. However, the maximum value of the light intensity of pulsed light L2 is more than 80% of the maximum value of the light intensity of pulsed light L1, and a sufficient magnitude is maintained.

[0043] In this embodiment, the distance between the light-emitting element 20A and the power supply pad 40 is shorter than the distance between the light-emitting element 20B and the power supply pad 40. Therefore, the current density of the drive current supplied to the light-emitting element 20A is greater than the current density of the drive current supplied to the light-emitting element 20B. This is a factor that causes the emission timing of the light-emitting element 20A to be earlier than the emission timing of the light-emitting element 20B. On the other hand, the thickness of the upper insulating films 243a and 243b is set so that the reflectance of the reflector 24A of the light-emitting element 20A is smaller than the reflectance of the reflector 24B of the light-emitting element 20B. This is a factor that causes the emission timing of the light-emitting element 20A to be later than the emission timing of the light-emitting element 20B. These two factors that determine the emission timing cancel each other out, thereby reducing the time difference between the emission timing of the light-emitting element 20A and the emission timing of the light-emitting element 20B. Therefore, according to this embodiment, a light-emitting device 1 is provided in which the variation in the emission timing of pulsed light is reduced.

[0044] In Figure 2, an example is shown where the thickness of the upper insulating film 243a of the light-emitting element 20A is greater than the thickness of the upper insulating film 243b of the light-emitting element 20B; however, the relationship between the thicknesses is not limited to this. As shown in Figure 4, the reflectance of the reflector changes periodically with respect to the thickness of the upper insulating film, so a similar effect may be obtained even when the thickness of the upper insulating film 243a of the light-emitting element 20A is thinner than the thickness of the upper insulating film 243b of the light-emitting element 20B.

[0045] In this embodiment, a mesa-shaped light-emitting element that forms a circle in plan view is illustrated as shown in Figures 1 and 2, but the shape of the light-emitting element can be changed as appropriate. For example, the light-emitting element may be elliptical in shape or polygonal in plan view. Also, although the multiple light-emitting elements are arranged in a two-dimensional array in Figure 1, they may be arranged in a one-dimensional array. Furthermore, the shape of the anode electrode 25 does not have to be annular. For example, the shape of the anode electrode 25 may have a space in part, such as a C shape. Also, although the doped spacer layers 231 and 233 described above are n-type and p-type GaAs layers, respectively, the doped spacer layers 231 and 233 may be AlGaAs layers. Furthermore, although Figure 2 shows the layers constituting the light-emitting elements 20A and 20B in direct contact, other functional layers may be provided between any two of the contacting layers in Figure 2.

[0046] Here, as a comparative example separate from this embodiment, a VCSEL with a p-i-n structure in which both the active layer and the saturable absorption layer are sandwiched between a p-type semiconductor layer and an n-type semiconductor layer can be cited. In addition to electrodes that electrically contact each of the p-type and n-type layers sandwiching the active layer, this comparative example VCSEL further has electrodes that electrically contact each of the p-type and n-type layers sandwiching the saturable absorption layer. In the comparative example, one electrode can serve as any two of the four electrodes. Therefore, the number of electrodes in the comparative example VCSEL is generally three or four.

[0047] In the comparative example VCSEL, carriers for light emission are injected into the active layer by applying a voltage in the forward direction to the p-i-n structure including the active layer. A voltage is also applied in either the forward or reverse direction to the p-i-n structure including the saturable absorption layer. In the comparative example, the oscillation timing is controlled by changing the characteristics of the saturable absorption layer, such as its absorption coefficient, by the voltage and current applied to it. When the laser is not oscillating, it is preferable that the absorption coefficient of the saturable absorption layer is designed to be sufficiently large to prevent oscillation. On the other hand, when the laser is oscillating, the absorption coefficient of the saturable absorption layer is designed to be sufficiently small. In the configuration of the comparative example, it is undesirable to set the gain and the absorption coefficient of the saturable absorption layer near the threshold for oscillation conditions, as in the VCSEL of this embodiment, so that the state transitions from a non-oscillating state to an oscillating state after a certain period of time. Therefore, in the comparative example, a method is employed to achieve a sufficiently large absorption coefficient for a non-oscillating state and a sufficiently small absorption coefficient for an oscillating state through electrical control of the saturable absorption layer. Therefore, in the comparative example, the issue of variation in the timing of pulsed light emission within the light-emitting element array is not as pronounced compared to the VCSEL configuration with two electrodes as in this embodiment.

[0048] In the two-electrode configuration of this embodiment, there is no need to configure another electrode on the light-emitting element array, resulting in a simpler configuration. This reduces the size of the light-emitting element array, simplifying the manufacturing process and reducing the number of power supplies required. On the other hand, in the two-electrode configuration of this embodiment, the saturable absorption layer cannot be electrically controlled, so the timing of pulse light generation is predominantly determined by the relationship between the gain of the active layer and the absorption coefficient of the saturable absorption layer. Therefore, the method for reducing the variation in the pulse light emission timing within the array, as in this embodiment, is particularly effective in VCSELs that do not have a function to electrically change the absorption characteristics of the saturable absorption layer and only have two electrodes for injecting current into the active layer.

[0049] [Second Embodiment] This embodiment describes a modified example in which the structure of the resonator spacer is changed from that of the first embodiment. In this embodiment, elements common to the above-described embodiment may be omitted or simplified in their description.

[0050] Figure 6 is a schematic cross-sectional view of the light-emitting elements 20A and 20B according to this embodiment. In this embodiment as well, the thickness of the upper insulating films 243a and 243b is set such that the reflectance of the reflector 24A of the light-emitting element 20A is smaller than the reflectance of the reflector 24B of the light-emitting element 20B. This is a factor that causes the emission timing of the light-emitting element 20A to be delayed compared to the emission timing of the light-emitting element 20B. This point is the same as in the first embodiment.

[0051] Therefore, in this embodiment as well, the time difference between the emission timing of the light-emitting element 20A and the emission timing of the light-emitting element 20B can be adjusted. Thus, in this embodiment as well, a light-emitting device 1 is provided in which the variation in the emission timing of pulsed light is reduced, similar to the first embodiment.

[0052] On the other hand, in this embodiment, the structure of the resonator spacer is modified compared to the first embodiment. In this embodiment, a resonator spacer 28 is provided instead of the resonator spacer 23 of the first embodiment. The resonator spacer 28 may include a doped spacer layer 281 provided on the saturable absorption layer 22, an undoped spacer portion 282 provided on the doped spacer layer 281, and a doped spacer layer 283 provided on the undoped spacer portion 282. The undoped spacer portion 282 may include an undoped spacer layer 282a provided on the doped spacer layer 281, an active portion 282b provided on the undoped spacer layer 282a, and an undoped spacer layer 282c provided on the active portion 282b.

[0053] The active portion 282b may include a single active layer at the antinode of a standing wave of light propagating through the undoped spacer portion 282. This single active layer may be composed of, for example, a multiple quantum well containing four quantum wells, each consisting of an 8 nm thick InGaAs quantum well layer sandwiched between 10 nm thick GaAs barrier layers. The doped spacer layer 281 may be composed of an n-type AlGaAs layer, the doped spacer layer 283 of a p-type AlGaAs layer, and the undoped spacer layers 282a and 282c of undoped GaAs layers.

[0054] In the first embodiment, the resonator spacer 23 has three active sections 232b, each containing four quantum wells within a non-doped spacer section 232. That is, the resonator spacer 23 contains a total of 12 quantum wells. In contrast, in this embodiment, the resonator spacer 28 has one active section 282b containing four quantum wells within a non-doped spacer section 282. Therefore, in this embodiment, the total number of quantum well layers is reduced from 12 to 4 compared to the first embodiment.

[0055] In this embodiment, in the non-doped spacer portion 282, the portion other than the InGaAs quantum well layer is made of GaAs instead of AlGaAs. Therefore, the band gap of the barrier layer can be made smaller compared to the case where AlGaAs is used for the barrier layer, and carriers can be accumulated in the GaAs layer as well, which can increase the amount of carriers that can be accumulated. Therefore, even if the number of quantum well layers is smaller than in the configuration of the first embodiment, a sufficient amount of carriers for the operation of the light-emitting elements 20A and 20B can be accumulated, so the number of quantum well layers can be reduced in this embodiment.

[0056] Next, we will explain the preferred range for the band gap difference between the barrier layer and the quantum well layer. In this embodiment, the amount of accumulated carriers is increased by configuring the system so that carriers are accumulated not only in the quantum well layer composed of InGaAs but also in the barrier layer composed of GaAs. The band gap difference between the barrier layer and the quantum well layer required to accumulate carriers in the barrier layer is 230 meV or less. We assume a case where the difference between the band gap of the ground state of the quantum well and the band gap of the barrier layer is small, and the light-emitting device is used in the normal temperature range in which semiconductor lasers are generally used, rather than near absolute zero. In this case, some of the carriers present in the quantum well layer may also exist at the same energy positions as the conduction band and valence band of the barrier layer in terms of their energy distribution. The preferred range for the band gap difference between the barrier layer and the quantum well layer to produce such a distribution is 230 meV or less. Therefore, from the viewpoint of allowing carriers to exist in the barrier layer, it is preferable that the band gap difference between the barrier layer and the quantum well layer be 230 meV or less.

[0057] On the other hand, from the perspective of avoiding light absorption by the semiconductor constituting the barrier layer, it is preferable that the band gap difference between the barrier layer and the quantum well layer is greater than or equal to a certain value. In this embodiment, since the material of the barrier layer is GaAs, an example of calculating the light extraction efficiency using the wavelength dependence of the absorption coefficient of GaAs will be described.

[0058] Figure 7 is a graph showing an example of the calculation of the light extraction efficiency according to this embodiment. The horizontal axis of Figure 7 shows the band gap difference (eV) between the barrier layer and the quantum well layer. The vertical axis of Figure 7 shows the calculation result of the normalized value of the light extraction efficiency, with the case where there is no light absorption by GaAs set to 1.

[0059] When the bandgap difference between the barrier layer and the quantum well layer is 105 meV, the light extraction efficiency decreases by 2% compared to when there is no absorption due to the bandgap. Similarly, when the bandgap differences between the barrier layer and the quantum well layer are 60 meV, 48 meV, and 44 meV, the light extraction efficiency decreases by 3%, 4%, and 5%, respectively, compared to when there is no absorption due to the bandgap. Focusing on these differences, the difference between a 2% decrease and a 3% decrease is 45 meV, which is relatively large. However, the difference between a 3% decrease and a 4% decrease is 12 meV, and the difference between a 4% decrease and a 5% decrease is 4 meV, so the difference decreases rapidly.

[0060] Incidentally, in compound semiconductors with three or more elements, the controllability of the elemental composition during crystal growth is approximately 1%, and this level of controllability is easily achievable. The change in band gap when the composition changes by 1% is 12 meV for AlGaAs systems and 14 meV for InGaAs systems. Therefore, the energy difference when these compositions change by 1% is roughly the same as the energy difference when the aforementioned light extraction efficiency changes from 3% to 4%. For this reason, considering the 1% change in composition during crystal growth from the viewpoint of maintaining the characteristic stability of the device even if fabrication errors occur during actual crystal growth, it is preferable that the band gap difference be 60 meV or more, which corresponds to the design value where the aforementioned decrease in light extraction efficiency is 3%.

[0061] Based on the above, we will consider a suitable range for the band gap difference, taking into account both the perspective of ensuring carriers are present in the barrier layer and the perspective of avoiding light absorption in the barrier layer. In order to minimize the decrease in light extraction efficiency to 2% or less, while prioritizing the avoidance of the effects of light absorption at the band edge, a band gap difference of 105 meV or more and 230 meV or less is preferable. Furthermore, if a decrease in light extraction efficiency of about 4% due to light absorption at the band edge is acceptable, then, considering the controllability during crystal growth, a band gap difference of 60 meV or more and 230 meV or less is preferable.

[0062] Furthermore, even if a compound semiconductor material different from those described above is used, if it is a direct bandgap semiconductor material, the wavelength dependence of the absorption coefficient for wavelengths below the band gap does not change significantly, and therefore the above values ​​can be applied.

[0063] In addition to the effects described above, the configuration of this embodiment, which actively accumulates carriers in the barrier layer, also has secondary effects. Two examples of these secondary effects are described below.

[0064] The first effect is that the cumulative strain of the semiconductor layer can be reduced. Assuming the oscillation wavelength is set to 940 nm, the active layer is InGaAs and the substrate is GaAs, so strain occurs in the active layer grown on the substrate due to the difference in lattice constants. Furthermore, the cumulative strain increases as the number of quantum well layers increases. Therefore, designing to reduce the number of quantum well layers by reducing the band gap of the barrier layer, as in this embodiment, has the effect of reducing cumulative strain. This is not an effect unique to the case where the oscillation wavelength is 940 nm, but an effect that can be obtained in common when the lattice constant of the constituent material of the substrate and the lattice constant of the constituent material such as the crystal grown on it are different.

[0065] The second effect is that it reduces carrier consumption due to luminescence recombination. In all semiconductors, including quantum well layers and barrier layers, when both holes and electrons are present simultaneously, carriers are consumed by luminescence recombination (spontaneous emission). In semiconductor lasers, a large amount of carrier consumption due to luminescence recombination (spontaneous emission) is undesirable because it raises the laser oscillation threshold and reduces power conversion efficiency. It is known that this luminescence recombination is proportional to the square of the carrier density. Therefore, even when accumulating the same amount of carriers, the carrier density, and thus the amount of carriers consumed by luminescence recombination, changes depending on the volume of the carrier accumulation region.

[0066] In this embodiment, when carriers are accumulated in layers with a larger band gap than the quantum well layer, the carrier density is lower due to the larger band gap, and the total thickness of the layers where carriers are accumulated increases. However, because the carrier density is lower, the consumption of carriers by luminescence recombination is reduced. Thus, in this embodiment, a larger proportion of carriers are accumulated in layers with a larger band gap than the quantum well layer, making it possible to reduce the consumption of carriers by luminescence recombination.

[0067] In this embodiment, the quantum well layer is composed of InGaAs, and the barrier layer that accumulates carriers around it is composed of GaAs. However, the effect of carrier accumulation in the barrier layer can occur even with combinations of other materials. Specifically, as described above, if the band gap difference between the quantum well layer and the barrier layer is 230 meV or less, similar effects can be obtained with other materials.

[0068] [Third Embodiment] This embodiment describes a modified example in which the arrangement of the light-emitting elements 20A and 20B and the arrangement of the power supply pad 40 are changed from the first embodiment. In this embodiment, elements common to the first embodiment may be omitted or simplified in their description.

[0069] Figure 8 is a schematic plan view of the light-emitting device 1 according to this embodiment. The plurality of light-emitting elements in the light-emitting element array 20 include light-emitting elements 20A and 20B. Of the 25 light-emitting elements arranged in 5 rows and 5 columns, the 5 elements in the central column are light-emitting elements 20B, and the remaining 20 elements are light-emitting elements 20A. That is, 10 light-emitting elements 20A and another 10 light-emitting elements 20A are arranged so as to sandwich 5 light-emitting elements 20B.

[0070] Two power supply pads 40 are arranged on the semiconductor substrate 10. The two power supply pads 40 are rectangular in shape when viewed from above and are arranged to sandwich the light-emitting elements 20A and 20B. The two power supply pads 40 are electrically connected via anode wiring 30. Since the light-emitting element 20B is arranged inside the 25 light-emitting elements, the distance between the light-emitting element 20A and the power supply pad 40 is shorter than the distance between the light-emitting element 20B and the power supply pad 40. Therefore, the current density of the drive current supplied to the light-emitting element 20A is greater than the current density of the drive current supplied to the light-emitting element 20B.

[0071] In this embodiment as well, similar to the first embodiment, the reflectivity of the reflector of the light-emitting element 20A is smaller than the reflectivity of the reflector of the light-emitting element 20B. That is, the amount of light loss in the resonator of the light-emitting element 20A is larger than the amount of light loss in the resonator of the light-emitting element 20B. As a result, the time difference between the emission timing of the light-emitting element 20A and the emission timing of the light-emitting element 20B can be reduced. Therefore, in this embodiment as well, similar to the first embodiment, a light-emitting device 1 is provided in which the variation in the emission timing of pulsed light is reduced.

[0072] [Fourth Embodiment] This embodiment describes a modified example in which the arrangement of the light-emitting elements 20A and 20B is changed compared to the first embodiment. In this embodiment, elements common to the above-described embodiments may be omitted or simplified in their description.

[0073] Figure 9 is a schematic plan view of the light-emitting device 1 according to this embodiment. The plurality of light-emitting elements in the light-emitting element array 20 include 23 light-emitting elements arranged in a triangular grid. The plurality of light-emitting elements in the light-emitting element array 20 include light-emitting elements 20A and 20B. Of the 23 light-emitting elements, the central one is a light-emitting element 20B, and the remaining 22 are light-emitting elements 20A. That is, the 22 light-emitting elements 20A are arranged to surround one light-emitting element 20B.

[0074] In a plan view, the power supply pad 40 has a rectangular shape with the inside hollowed out and is arranged to surround the light-emitting elements 20A and 20B. Since the light-emitting element 20B is positioned at the center of the 23 light-emitting elements, the distance between the light-emitting element 20A and the power supply pad 40 is shorter than the distance between the light-emitting element 20B and the power supply pad 40. Therefore, the current density of the drive current supplied to the light-emitting element 20A is greater than the current density of the drive current supplied to the light-emitting element 20B.

[0075] In this embodiment as well, similar to the first embodiment, the reflectivity of the reflector of the light-emitting element 20A is smaller than the reflectivity of the reflector of the light-emitting element 20B. That is, the amount of light loss in the resonator of the light-emitting element 20A is larger than the amount of light loss in the resonator of the light-emitting element 20B. As a result, the time difference between the emission timing of the light-emitting element 20A and the emission timing of the light-emitting element 20B can be reduced. Therefore, in this embodiment as well, similar to the first embodiment, a light-emitting device 1 is provided in which the variation in the emission timing of pulsed light is reduced.

[0076] In this embodiment, where the light-emitting elements are arranged in a triangular grid, the arrangement of the light-emitting elements 20A and 20B and the arrangement of the power supply pad 40 may be modified to be the same as in the third embodiment. The same effect can be obtained in that case as well.

[0077] [Fifth Embodiment] This embodiment describes a modified form in which a light-emitting element 20C is further added to the first embodiment. In this embodiment, elements common to the above-described embodiments may be omitted or simplified in their description.

[0078] Figure 10 is a schematic plan view of the light-emitting device 1 according to this embodiment. The plurality of light-emitting elements in the light-emitting element array 20 further include light-emitting elements 20A and 20B, as well as light-emitting element 20C. In Figure 10, the inside of the circle indicating the anode electrode 25 of the light-emitting element 20C is filled with a dot pattern. Of the 25 light-emitting elements arranged in 5 rows and 5 columns, the one in the center is a light-emitting element 20B, and the eight elements outside of the light-emitting element 20B are light-emitting elements 20C. Also, of the 25 light-emitting elements, the 16 elements outside of the light-emitting elements 20C are light-emitting elements 20A. That is, nine light-emitting elements 20C are arranged to surround one light-emitting element 20B, and sixteen light-emitting elements 20A are arranged to surround nine light-emitting elements 20A and 20B.

[0079] Thus, the light-emitting element 20C is positioned between the light-emitting element 20A and the light-emitting element 20B. Therefore, the distance between the light-emitting element 20C and the power supply pad 40 is longer than the distance between the light-emitting element 20A and the power supply pad 40, and shorter than the distance between the light-emitting element 20B and the power supply pad 40. Consequently, the current density of the drive current supplied to the light-emitting element 20C is lower than the current density of the drive current supplied to the light-emitting element 20A, and higher than the current density of the drive current supplied to the light-emitting element 20B.

[0080] The light-emitting element 20C has characteristics intermediate between those of the light-emitting element 20A and the light-emitting element 20B. Specifically, the reflectivity of the reflector of the light-emitting element 20C is greater than that of the reflector of the light-emitting element 20A, and less than that of the reflector of the light-emitting element 20B. That is, the amount of light loss in the resonator of the light-emitting element 20C is less than that of the resonator of the light-emitting element 20A, and greater than that of the resonator of the light-emitting element 20B. As a result, the difference in emission timing between the light-emitting elements 20A, 20B, and 20C can be further reduced. Therefore, in this embodiment, a light-emitting device 1 is provided in which the variation in the emission timing of pulsed light is further reduced.

[0081] [Sixth Embodiment] This embodiment describes a modified example in which a light-emitting element 20C is further added to the third embodiment. In this embodiment, elements common to the above embodiments may be omitted or simplified in their description.

[0082] Figure 11 is a schematic plan view of the light-emitting device 1 according to this embodiment. The multiple light-emitting elements in the light-emitting element array 20 further include light-emitting elements 20A and 20B, as well as light-emitting elements 20C. In Figure 11, the inside of the circle indicating the anode electrode 25 of the light-emitting element 20C is filled with a dot pattern. Of the 25 light-emitting elements arranged in 5 rows and 5 columns, the 5 in the central column are light-emitting elements 20B, the 10 in the two adjacent columns are light-emitting elements 20C, and the remaining 10 are light-emitting elements 20A. That is, the 5 light-emitting elements 20C and the other 5 light-emitting elements 20C are arranged to sandwich the 5 light-emitting elements 20B, and the 5 light-emitting elements 20A and the other 5 light-emitting elements 20A are arranged to sandwich the 5 light-emitting elements 20B and the 10 light-emitting elements 20C.

[0083] Thus, the light-emitting element 20C is positioned between the light-emitting element 20A and the light-emitting element 20B. Therefore, the distance between the light-emitting element 20C and the power supply pad 40 is longer than the distance between the light-emitting element 20A and the power supply pad 40, and shorter than the distance between the light-emitting element 20B and the power supply pad 40. Consequently, the current density of the drive current supplied to the light-emitting element 20C is lower than the current density of the drive current supplied to the light-emitting element 20A, and higher than the current density of the drive current supplied to the light-emitting element 20B.

[0084] The light-emitting element 20C has characteristics intermediate between those of the light-emitting element 20A and the light-emitting element 20B. Specifically, the reflectivity of the reflector of the light-emitting element 20C is greater than that of the reflector of the light-emitting element 20A, and less than that of the reflector of the light-emitting element 20B. That is, the amount of light loss in the resonator of the light-emitting element 20C is less than that of the resonator of the light-emitting element 20A, and greater than that of the resonator of the light-emitting element 20B. As a result, the difference in emission timing between the light-emitting elements 20A, 20B, and 20C can be further reduced. Therefore, in this embodiment as well, a light-emitting device 1 is provided in which the variation in the emission timing of pulsed light is further reduced.

[0085] [Seventh Embodiment] This embodiment describes a modified example in which a light-emitting element 20C is further added to the fourth embodiment. In this embodiment, elements common to the above embodiments may be omitted or simplified in their description.

[0086] Figure 12 is a schematic plan view of the light-emitting device 1 according to this embodiment. The plurality of light-emitting elements in the light-emitting element array 20 further include light-emitting elements 20A and 20B, as well as light-emitting element 20C. In Figure 12, the inside of the circle indicating the anode electrode 25 of the light-emitting element 20C is filled with a dot pattern. Of the 23 light-emitting elements, the one in the center is a light-emitting element 20B, the six outside of the light-emitting element 20B are light-emitting elements 20C, and the sixteen outside of the light-emitting elements 20C are light-emitting elements 20A. That is, the six light-emitting elements 20C are arranged to surround one light-emitting element 20B, and the sixteen light-emitting elements 20A are arranged to surround one light-emitting element 20B and six light-emitting elements 20C.

[0087] Thus, the light-emitting element 20C is positioned between the light-emitting element 20A and the light-emitting element 20B. Therefore, the distance between the light-emitting element 20C and the power supply pad 40 is longer than the distance between the light-emitting element 20A and the power supply pad 40, and shorter than the distance between the light-emitting element 20B and the power supply pad 40. Consequently, the current density of the drive current supplied to the light-emitting element 20C is lower than the current density of the drive current supplied to the light-emitting element 20A, and higher than the current density of the drive current supplied to the light-emitting element 20B.

[0088] The light-emitting element 20C has characteristics intermediate between those of the light-emitting element 20A and the light-emitting element 20B. Specifically, the reflectivity of the reflector of the light-emitting element 20C is greater than that of the reflector of the light-emitting element 20A, and less than that of the reflector of the light-emitting element 20B. That is, the amount of light loss in the resonator of the light-emitting element 20C is less than that of the resonator of the light-emitting element 20A, and greater than that of the resonator of the light-emitting element 20B. As a result, the difference in emission timing between the light-emitting elements 20A, 20B, and 20C can be further reduced. Therefore, in this embodiment as well, a light-emitting device 1 is provided in which the variation in the emission timing of pulsed light is further reduced.

[0089] In this embodiment, where the light-emitting elements are arranged in a triangular grid, the arrangement of the light-emitting elements 20A and 20B and the arrangement of the power supply pad 40 may be modified to be the same as in the sixth embodiment. The same effect can be obtained in that case as well.

[0090] [Eighth Embodiment] In this embodiment, a modified example is described in which the cross-sectional structure of the light-emitting elements 20A and 20B is changed so that the number of pairs of upper DBR layers is different from that of the first embodiment. In this embodiment, the explanation of elements common to the above-described embodiments may be omitted or simplified.

[0091] Figure 13 is a schematic cross-sectional view of the light-emitting elements 20A and 20B according to this embodiment. The configuration of the light-emitting element 20B in this embodiment is the same as the configuration of the light-emitting element 20A in Figure 2.

[0092] The light-emitting element 20A includes a lower DBR layer 21, a saturable absorption layer 22, a resonator spacer 23, a reflector 24C, an anode electrode 25, a cathode electrode 26, and an insulating film 27.

[0093] The reflector 24C may include an upper DBR layer 241c disposed on the doped spacer layer 233 of the resonator spacer 23, a contact layer 242 disposed on the upper DBR layer 241c, and an upper insulating film 243a disposed on the contact layer 242. The upper DBR layer 241c may be, for example, Al with an optical film thickness of 1 / 4λc. ０．１ Ga ０．９ As layer and Al ０．９ Ga ０．１The layers can be constructed by stacking multiple pairs of laminates, with each pair consisting of an As layer and an As layer. In this embodiment, the number of pairs of laminates included in the upper DBR layer 241c of the light-emitting element 20A is less than the number of pairs of laminates included in the upper DBR layer 241 of the light-emitting element 20B. An example of a method for forming fewer pairs of laminates in the upper DBR layer 241c than in the upper DBR layer 241 is to deposit the upper DBR layers 241 and 241c together and then remove a portion of the upper DBR layer 241c by etching. Another example of a method for forming fewer pairs of laminates in the upper DBR layer 241c than in the upper DBR layer 241 is to deposit the upper DBR layers 241 and 241c together and then re-deposit the upper DBR layer 241c to add another layer. In this way, by varying the number of pairs of laminates of the upper DBR layers 241 and 241c, the reflectivity of the reflectors 24A and 24C can be varied.

[0094] The relationship between the number of pairs of laminates in the upper DBR layers 241 and 241c and the reflectance of the reflectors 24A and 24C will be explained in more detail based on the reflectance calculation results. Figure 14 is a graph showing an example of reflectance calculation according to this embodiment. The vertical axis of Figure 14 shows the reflectance of the reflectors 24A and 24C (upper reflectors). The horizontal axis of Figure 14 shows the number of pairs of laminates in the upper DBR layer. As shown in Figure 14, the more pairs of laminates in the upper DBR layer there are, the higher the reflectance of the upper reflectors. In this calculation, the number of pairs of laminates in the lower DBR layer 21 (lower reflectors) is constant. Specifically, the number of pairs of laminates in the lower reflectors is 37 pairs, and the reflectance of the lower reflectors is 99.9%.

[0095] As shown in Figure 14, for example, by setting the number of pairs of laminates of the upper DBR layers 241 and 241c to 19 and 17, respectively, the reflectances of the upper DBR layers 241 and 241c can be set to 99.1% and 98.2%, respectively. Therefore, the reflectance of the reflector 24C of the light-emitting element 20A can be made smaller than the reflectance of the reflector 24A of the light-emitting element 20B. In this case, the amount of light loss of the reflector 24C of the light-emitting element 20A is greater than the amount of light loss of the reflector 24A of the light-emitting element 20B.

[0096] Therefore, the time difference between the emission timing of the light-emitting element 20A and the emission timing of the light-emitting element 20B can be reduced by a mechanism similar to that described in the first embodiment. Accordingly, according to this embodiment, a light-emitting device 1 is provided in which the variation in the emission timing of pulsed light is reduced.

[0097] In this embodiment, an example was described in which the number of pairs of laminated upper DBR layers 241 and 241c differs between the light-emitting elements 20A and 20B. However, instead, the number of pairs of laminated lower DBR layer 21 (lower reflector) may be different.

[0098] Figure 15 is a graph showing an example of reflectance calculation according to a modified example of this embodiment. The vertical axis of Figure 15 shows the reflectance of the lower DBR layer 21 (lower reflector). The horizontal axis of Figure 15 shows the number of pairs of laminates in the lower DBR layer 21. As shown in Figure 15, the reflectance of the lower DBR layer 21 also increases as the number of pairs of laminates increases. Note that in this calculation, the number of pairs of laminates in the upper DBR layers 241 and 241c is constant. Specifically, the number of pairs of laminates in the upper DBR layers 241 and 241c is 19 pairs in both cases, and the reflectance of the upper reflector is 99.1%.

[0099] As shown in Figure 15, for example, by setting the number of pairs of laminated lower DBR layers 21 of light-emitting elements 20B and 20A to 37 and 20, respectively, the reflectance can be set to 99.9% and 98.5%, respectively. Therefore, the reflectance of the lower DBR layer 21 of light-emitting element 20A can be made smaller than the reflectance of the lower DBR layer 21 of light-emitting element 20B. In this case, the amount of light loss in the lower DBR layer 21 of light-emitting element 20A is greater than the amount of light loss in the lower DBR layer 21 of light-emitting element 20B.

[0100] Even with such modifications, a light-emitting device 1 is provided in which the variation in the timing of pulsed light emission is reduced. However, if the light-emitting device 1 is a surface emission type, lowering the reflectivity of the lower DBR layer 21 may reduce the power of the emitted light, so it is desirable to have different numbers of laminated layers of the upper DBR layers 241 and 241c. For similar reasons, if the light-emitting device 1 is a back surface emission type, it may be desirable to have different numbers of laminated layers of the lower DBR layer 21 from the viewpoint of the power of the emitted light.

[0101] [Ninth Embodiment] In this embodiment, a modified example is described in which the cross-sectional structure of the light-emitting elements 20A and 20B is changed from that of the eighth embodiment by adding a dielectric DBR layer instead of changing the number of pairs of upper DBR layers. In this embodiment, elements common to the above embodiments may be omitted or simplified in their description.

[0102] Figure 16 is a schematic cross-sectional view of the light-emitting elements 20A and 20B according to this embodiment. The configuration of the light-emitting element 20A in this embodiment is the same as the configuration of the light-emitting element 20A in Figure 2.

[0103] The light-emitting element 20B includes a lower DBR layer 21, a saturable absorption layer 22, a resonator spacer 23, a reflector 24D, an anode electrode 25, a cathode electrode 26, and an insulating film 27.

[0104] The reflector 24D may include an upper DBR layer 241 disposed on the doped spacer layer 233 of the resonator spacer 23, and a contact layer 242 disposed on the upper DBR layer 241. Furthermore, the reflector 24D may include a dielectric DBR layer 244 disposed on the contact layer 242. The dielectric DBR layer 244 can be formed, for example, by depositing a dielectric layer over the entire substrate and then removing a portion of it by wet etching using an etchant with a high selectivity ratio with respect to the contact layer 242.

[0105] The dielectric DBR layer 244 contains a laminate of dielectric layers with different refractive indices, and reflects light similarly to the upper DBR layer 241. In other words, by adding the dielectric DBR layer 244, the total number of distributed Bragg mirror layers contained within the reflector 24D increases. As a result, the dielectric DBR layer 244 increases the reflectivity of the reflector 24D.

[0106] With the above configuration, similar to the eighth embodiment, the reflectance of the reflector 24A of the light-emitting element 20A can be made smaller than the reflectance of the reflector 24D of the light-emitting element 20B. In this case, the amount of light loss of the reflector 24A of the light-emitting element 20A is greater than the amount of light loss of the reflector 24D of the light-emitting element 20B.

[0107] Therefore, the time difference between the emission timing of the light-emitting element 20A and the emission timing of the light-emitting element 20B can be reduced by a mechanism similar to that described in the first embodiment. Accordingly, according to this embodiment, a light-emitting device 1 is provided in which the variation in the emission timing of pulsed light is reduced.

[0108] In this embodiment, unlike the eighth embodiment, the structure of the upper DBR layer 241 can be common between the light-emitting element 20A and the light-emitting element 20B. Therefore, this embodiment has the advantage of being able to commonize the processes related to the compound semiconductor layer that requires epitaxial growth.

[0109] In this embodiment, the dielectric DBR layer 244 is provided only on the light-emitting element 20B, but the light-emitting elements 20A and 20B may be provided with dielectric DBR layers 244 having different numbers of laminated pairs. A similar effect can be obtained by making the number of laminated pairs of the dielectric DBR layer 244 on the light-emitting element 20B greater than the number of laminated pairs of the dielectric DBR layer 244 on the light-emitting element 20A. In this embodiment, the emission portion of the light-emitting element 20B does not have an upper insulating film on top of the dielectric DBR layer 244. If the dielectric DBR layer 244 also serves as an upper insulating film, an upper insulating film is unnecessary. On the other hand, an upper insulating film 243a may be formed on the light-emitting element 20B as needed, such as for covering around the anode electrode 25.

[0110] [Tenth Embodiment] This embodiment describes a modification in which transparent conductive films of different thicknesses are added to the light-emitting elements 20A and 20B compared to the first embodiment. In this embodiment, elements common to the above-described embodiments may be omitted or simplified in their description.

[0111] Figure 17 is a schematic cross-sectional view of the light-emitting elements 20A and 20B according to this embodiment. The light-emitting element 20A has a lower DBR layer 21, a saturable absorption layer 22, a resonator spacer 23, a reflector 24E, an anode electrode 25, a cathode electrode 26, and an insulating film 27.

[0112] The reflector 24E may include an upper DBR layer 241 disposed on the doped spacer layer 233 of the resonator spacer 23, and a contact layer 242 disposed on the upper DBR layer 241. The reflector 24E may also include a transparent conductive film 245a disposed on the contact layer 242, and an upper insulating film 243a disposed on the transparent conductive film 245a. The transparent conductive film 245a is, for example, indium tin oxide (ITO).

[0113] Furthermore, the anode electrode 25 is placed on a transparent conductive film 245a. The transparent conductive film 245a allows the current injected into the anode electrode 25 to flow through the contact layer 242 to the central part of the upper DBR layer 241.

[0114] The light-emitting element 20B includes a lower DBR layer 21, a saturable absorption layer 22, a resonator spacer 23, a reflector 24F, an anode electrode 25, a cathode electrode 26, and an insulating film 27.

[0115] The reflector 24F may include an upper DBR layer 241 disposed on the doped spacer layer 233 of the resonator spacer 23, and a contact layer 242 disposed on the upper DBR layer 241. The reflector 24F may also include a transparent conductive film 245b disposed on the contact layer 242, and an upper insulating film 243a disposed on the transparent conductive film 245b.

[0116] Furthermore, the anode electrode 25 is placed on the transparent conductive film 245b. The transparent conductive film 245b allows the current injected into the anode electrode 25 to flow through the contact layer 242 to the central part of the upper DBR layer 241.

[0117] The thickness of the transparent conductive film 245a in the Z direction is thinner than the thickness of the transparent conductive film 245b in the Z direction. An example of a method for forming the transparent conductive film 245a thinner than the transparent conductive film 245b is to deposit the transparent conductive films 245a and 245b at once and then remove a portion of the transparent conductive film 245a by etching. Another example of a method for forming the transparent conductive film 245a thinner than the transparent conductive film 245b is to deposit the transparent conductive films 245a and 245b by a separate film deposition process and set the film deposition conditions so that the transparent conductive film 245a is thinner than the transparent conductive film 245b. In this way, by making the thicknesses of the transparent conductive films 245a and 245b different, the reflectivity of the reflectors 24E and 24F can be made different.

[0118] The relationship between the thickness of the transparent conductive films 245a and 245b and the reflectance of the reflectors 24E and 24F will be explained in more detail based on the reflectance calculation results. Figure 18 is a diagram showing the reflectance calculation conditions according to this embodiment. In the reflectance calculation of this embodiment, a model in which a spacer layer SP, an upper DBR layer UDBR, a transparent conductive layer TCL, and a dielectric layer DL are stacked is assumed. In this model, the reflectance of incident light LA ​​incident from the spacer layer SP side was calculated. The wavelength of this incident light LA ​​is 940 nm. The wavelength of incident light LA ​​corresponds to the wavelength of light generated in the active part 232b and resonating in the light-emitting elements 20A and 20B. The transparent conductive layer TCL corresponds to the transparent conductive films 245a and 245b. The dielectric layer DL corresponds to the upper insulating film 243a.

[0119] The upper DBR layer UDBR is Al ０．１ GaAs layer and Al ０．９ The structure consists of 19 pairs of stacked GaAs layers. However, only the top layer of the upper DBR layer (UDBR) is replaced with a GaAs layer. The dielectric layer DL is a SiN (silicon nitride) layer, and the refractive index of SiN is 1.84. The thickness of the SiN layer is half the optical wavelength of light propagating through the SiN layer. The transparent conductive layer TCL is an ITO layer, and the refractive index of ITO is 1.77. The optical absorption loss of the transparent conductive layer TCL was ignored. The reflectance was calculated while varying the thickness of the transparent conductive layer TCL.

[0120] Figure 19 is a graph showing an example of reflectance calculation according to this embodiment. The vertical axis of Figure 19 shows the reflectance of the upper reflector (upper DBR layer UDBR, transparent conductive layer TCL, and dielectric layer DL) under the calculation conditions of Figure 18. The horizontal axis of Figure 19 shows the film thickness of the ITO layer (transparent conductive layer TCL).

[0121] As shown in Figure 19, the reflectance of the upper reflector changes periodically with respect to the thickness of the ITO layer. The thickness T4 in Figure 19 is a thickness that can be applied to the transparent conductive film 245a of the light-emitting element 20A. The thickness T4 is 125 nm, and in this case the reflectance is approximately 98.0%. The thickness T5 in Figure 19 is a thickness that can be applied to the transparent conductive film 245b of the light-emitting element 20B. The thickness T5 is 250 nm, and in this case the reflectance is approximately 99.0%. Therefore, by setting the thickness of the transparent conductive film 245a of the light-emitting element 20A and the transparent conductive film 245b of the light-emitting element 20B as described above, the reflectance of the reflector 24E of the light-emitting element 20A can be made smaller than the reflectance of the reflector 24F of the light-emitting element 20B. In this case, the amount of light loss of the reflector 24E of the light-emitting element 20A is greater than the amount of light loss of the reflector 24F of the light-emitting element 20B.

[0122] The film thickness T6 in Figure 19 is one of the film thicknesses at which the reflectivity of the upper reflector is maximized. The film thickness T6 is approximately 266 nm. The wavelength of the incident light, i.e., the resonant wavelength of the light-emitting elements 20A and 20B, is λ, and the refractive index of the transparent conductive layer TCL is n. ２ In this case, the thickness of the transparent conductive layer TCL at which the reflectivity is maximized is λ / (2n ２ It is a natural number multiple of λ / (2n). The thickness of the transparent conductive film 245b of the light-emitting element 20B is greater than the thickness of the transparent conductive film 245a of the light-emitting element 20A. ２ By making it close to a natural number multiple of ), the reflectance of the reflector 24E of the light-emitting element 20A becomes smaller than the reflectance of the reflector 24F of the light-emitting element 20B.

[0123] Therefore, the time difference between the emission timing of the light-emitting element 20A and the emission timing of the light-emitting element 20B can be reduced by a mechanism similar to that described in the first embodiment. Accordingly, according to this embodiment, a light-emitting device 1 is provided in which the variation in the emission timing of pulsed light is reduced.

[0124] In Figure 17, an example is shown where the thickness of the transparent conductive film 245a of the light-emitting element 20A is thinner than the thickness of the transparent conductive film 245b of the light-emitting element 20B; however, the relationship between the thicknesses is not limited to this. As shown in Figure 19, the reflectivity of the reflector changes periodically with respect to the thickness of the transparent conductive film, so a similar effect may be obtained even when the thickness of the transparent conductive film 245a of the light-emitting element 20A is thinner than the thickness of the transparent conductive film 245b of the light-emitting element 20B.

[0125] As shown in Figure 19, the reflectivity of the reflector changes periodically with respect to the thickness of the transparent conductive film. Therefore, the film thickness of the transparent conductive films 245a and 245b that yields a predetermined reflectivity can be selected from several candidates. Generally, thicker films of the transparent conductive films 245a and 245b are desirable because they improve the uniformity of the current distribution of the driving current flowing through the transparent conductive films 245a and 245b, and improve the durability of the transparent conductive films 245a and 245b against the driving current. However, the light absorption loss of the transparent conductive films 245a and 245b may reduce the luminous efficiency of the light-emitting elements 20A and 20B. Therefore, from the viewpoint of luminous efficiency, thinner films 245a and 245b may be desirable. It is desirable to appropriately select the film thickness of the transparent conductive films 245a and 245b after considering these trade-offs.

[0126] [Eleventh Embodiment] This embodiment describes a modified example in which an optical loss layer is added to the light-emitting element 20A compared to the first embodiment. In this embodiment, elements common to the above-described embodiments may be omitted or simplified in their description.

[0127] Figure 20 is a schematic cross-sectional view of the light-emitting elements 20A and 20B according to this embodiment. The configuration of the light-emitting element 20B in this embodiment is the same as the configuration of the light-emitting element 20A in Figure 2.

[0128] The light-emitting element 20A includes a lower DBR layer 21, a saturable absorption layer 22, a resonator spacer 23, a reflector 24G, an anode electrode 25, a cathode electrode 26, and an insulating film 27.

[0129] The reflector 24G may include an upper DBR layer 241 disposed on top of the doped spacer layer 233 of the resonator spacer 23, and a contact layer 242 disposed on top of the upper DBR layer 241. Furthermore, the reflector 24D may include an optical loss layer 246 disposed on top of the contact layer 242, and an upper insulating film 243a disposed on top of the optical loss layer 246. Thus, the reflector 24G further includes the optical loss layer 246 in addition to the configuration of the reflector 24A.

[0130] The optical loss layer 246 is an optical absorption layer that causes absorption loss by, for example, absorbing a portion of the light propagating within the light-emitting element 20A. The optical loss layer 246 increases the amount of optical loss of the light-emitting element 20A. Therefore, the amount of optical loss of the light-emitting element 20A is greater than the amount of optical loss of the light-emitting element 20B.

[0131] Therefore, the time difference between the emission timing of the light-emitting element 20A and the emission timing of the light-emitting element 20B can be reduced by a mechanism similar to that described in the first embodiment. Accordingly, according to this embodiment, a light-emitting device 1 is provided in which the variation in the emission timing of pulsed light is reduced.

[0132] The optical loss layer 246 may be a scattering layer that causes scattering loss by scattering a portion of the light propagating within the light-emitting element 20A. The scattering layer is, for example, a layer having an uneven surface. Alternatively, an uneven surface may be formed on the surface of any of the layers constituting the light-emitting element 20A to make that layer function as a scattering layer. For example, an uneven surface may be formed on the surface of the upper insulating film 243a to make the surface of the upper insulating film 243a function as a scattering layer.

[0133] The position in which the optical loss layer 246 is placed is not limited to between the contact layer 242 and the upper insulating film 243a. The same effect can be obtained if the optical loss layer 246 is placed in any location within the light-emitting element 20A where light can propagate.

[0134] In this embodiment, the optical loss layer 246 is provided only on the light-emitting element 20A, but optical loss layers 246 with different loss amounts may be provided on both the light-emitting elements 20A and 20B. The same effect can be obtained by making the loss amount of the optical loss layer 246 of the light-emitting element 20A greater than the loss amount of the optical loss layer 246 of the light-emitting element 20B. For example, the above relationship in loss amounts can be achieved by making the film thickness of the optical loss layer 246 of the light-emitting element 20A greater than the film thickness of the optical loss layer 246 of the light-emitting element 20B.

[0135] The first to eleventh embodiments described above primarily show examples of controlling reflectance or loss by adjusting the structure of the upper reflector of the light-emitting elements 20A and 20B, but are not limited to this. The reflectance or loss may also be controlled by similarly adjusting the structure of the lower reflector (lower DBR layer 21) of the light-emitting elements 20A and 20B.

[0136] Furthermore, the reflectance or loss amount may be controlled by adjusting the structure of both the upper and lower reflectors of the light-emitting elements 20A and 20B. In this case, the effective reflectance of the light-emitting element 20A or 20B is defined as the product of the reflectance of the upper reflector and the reflectance of the lower reflector. By making the effective reflectance of the light-emitting element 20A smaller than the effective reflectance of the light-emitting element 20B, the amount of light loss of the light-emitting element 20A becomes larger than the amount of light loss of the light-emitting element 20B, and the same effect as in the first to eleventh embodiments can be obtained.

[0137] In the first to eleventh embodiments described above, GaAs, AlGaAs, and InGaAs were given as examples of semiconductor materials capable of crystal growth when a GaAs substrate is used as the semiconductor substrate 10. However, the semiconductor substrate 10 is not limited to a GaAs substrate. For example, an InP substrate can also be used as the semiconductor substrate 10. Examples of semiconductor materials capable of crystal growth when an InP substrate is used as the semiconductor substrate 10 include InP, InGaAs, InGaP, and InGaAsP.

[0138] The DBR layer in the light-emitting device 1 according to the first to eleventh embodiments described above does not necessarily have to be made of a semiconductor material, and may be made of a material other than a semiconductor material. In this case as well, the same effects as the above embodiments can be achieved by configuring the light-emitting device 1 to perform the same functions as the first to eleventh embodiments.

[0139] In the light-emitting device 1 according to the first to eleventh embodiments described above, the relative magnitudes of the current densities of the drive currents injected into each light-emitting element can be measured based on the amount of light emitted by each light-emitting element. More specifically, by injecting a drive current below a threshold current into each light-emitting element and obtaining an emission image of the spontaneous emission component, the relative magnitudes of the current densities of the drive currents can be measured from the difference in the amount of light emitted. Since the spontaneous emission component is approximately proportional to the amount of injected current, the relative magnitudes of the current densities of the drive currents injected into each light-emitting element can be determined by this measurement method. However, in this measurement, it is desirable to perform imaging while avoiding the resonant wavelength by using a wavelength filter. This is because in the resonant wavelength region, the amount of light emitted depends on the Q value at the resonant wavelength, and therefore, the relative magnitudes of the current densities may not be accurately obtained.

[0140] [Twelfth Embodiment] In the first to eleventh embodiments described above, a method for configuring light-emitting elements 20A and 20B was described when the current density of the drive current supplied to the light-emitting element 20A is greater than the current density of the drive current supplied to the light-emitting element 20B. The optical loss of the resonator of the light-emitting element 20A is configured to be greater than the optical loss of the resonator of the light-emitting element 20B, thereby providing a light-emitting device 1 in which variations in the timing of pulsed light emission are reduced. This method is also applicable to light-emitting devices having structures other than those described in the first to eleventh embodiments described above. In the twelfth and thirteenth embodiments below, examples of applying the above method to light-emitting devices having a structure different from that of the light-emitting devices of the first to eleventh embodiments will be described. Note that the names of the components of the light-emitting devices shown in the twelfth and thirteenth embodiments do not necessarily correspond to the names of the components of the light-emitting devices of the first to eleventh embodiments, and different reference numerals may be assigned to the same type of component. In addition, there may be overlaps between the descriptions of the light-emitting devices of the first to eleventh embodiments and the descriptions of the twelfth and thirteenth embodiments.

[0141] A light-emitting device according to the twelfth embodiment will be described with reference to Figures 21 to 26. Figure 21 is a schematic plan view showing the general configuration of the light-emitting device according to this embodiment. Figure 22 is a schematic cross-sectional view showing the general configuration of the light-emitting element constituting the light-emitting device according to this embodiment. Figures 23 and 24 are schematic cross-sectional views showing the general configuration of the light-emitting device according to this embodiment. Figure 25 is a schematic diagram showing the configuration of the anode wiring and the current path in the light-emitting device according to this embodiment. Figure 26 is a graph showing the current distribution in the light-emitting device according to this embodiment.

[0142] The light-emitting device according to this embodiment is a surface-emitting type light-emitting device in which a plurality of light-emitting elements are arranged in a two-dimensional manner. Each of the plurality of light-emitting elements is composed of a VCSEL element. Figure 21 shows a schematic plan view of the light-emitting device according to this embodiment as seen from the light-emitting surface.

[0143] As shown in Figure 21, the light-emitting device 5100 according to this embodiment includes a substrate 510, a plurality of VCSEL elements 520, a plurality of anode wirings 570, and a plurality of anode electrode pads 590. The substrate 510 may be a support substrate on which a compound semiconductor substrate 522, described later, is mounted. For the convenience of the following explanation, the surface of the substrate 510 on which the plurality of VCSEL elements 520 are arranged is assumed to be a plane parallel to the X-Y plane. Also, the direction of light emission from the plurality of VCSEL elements 520 is assumed to be the Z direction.

[0144] The VCSEL elements 520 are arranged in a matrix along the X and Y directions. Here, as an example, we assume that 40 VCSEL elements 520 are arranged in the X direction and 40 in the Y direction, for a total of 1600 VCSEL elements 520, on the substrate 510. In Figure 21, for the sake of simplifying the drawing, only a portion of these VCSEL elements 520 are shown. In the following explanation, the X direction may be referred to as the row direction and the Y direction as the column direction to represent the positional relationship of each component.

[0145] The anode wiring 570 is arranged in each row of the VCSEL element array. That is, multiple anode wirings 570 extending in the Y direction are arranged in the X direction on the substrate 510. Here, as an example, let's assume that 40 anode wirings 570, corresponding to the number of VCSEL elements arranged in the X direction, are arranged on the substrate 510. Each of the multiple anode wirings 570 connects the anodes of the 40 VCSEL elements 520 arranged in the corresponding row in parallel.

[0146] The anode electrode pad 590 is an electrode for connecting a connecting member, such as a gold (Au) wire or a metal bump, to electrically connect an external device (not shown) to the light-emitting device 5100. The anode electrode pad 590 is electrically connected to one end (upper side in Figure 21) of each of the multiple anode wirings 570. Here, as an example, 40 anode electrode pads 590 corresponding to the number of anode wirings 570 arranged in the X direction are arranged on the substrate 510. This allows the drive current supplied from the anode electrode pads 590 of each row to be supplied in parallel to the 40 VCSEL elements arranged in the corresponding row via the anode wiring 570 of the corresponding row.

[0147] Here, the region less than a predetermined distance from the anode electrode pad 590 is defined as region 5110, and the VCSEL element 520 located in region 5110 is represented as VCSEL element 520A. The region greater than or equal to the predetermined distance from the anode electrode pad 590 is defined as region 5112, and the VCSEL element 520 located in region 5112 is represented as VCSEL element 520B. For example, the line B-B' shown as a dashed line in Figure 21 is the boundary line between region 5110 and region 5112. The boundary line B-B' is located in the region between adjacent VCSEL elements 520A and VCSEL element 520B in the Y direction.

[0148] Figure 22 shows a schematic cross-sectional view of a VCSEL element 520 that constitutes the light-emitting device 5100. The VCSEL element 520 may be composed of, for example, a compound semiconductor substrate 522, a lower DBR layer 524, a saturable absorption layer 22, a resonator spacer 526 including an active layer 528, an upper DBR layer 530, and a contact layer 534, as shown in Figure 22. The lower DBR layer 524, the saturable absorption layer 22, the resonator spacer 526, the upper DBR layer 530, and the contact layer 534 are compound semiconductor epitaxial layers epitaxially grown on the compound semiconductor substrate 522 in this order. The upper DBR layer 530 may be provided with a current-constricting layer 532 to restrict the path of the current injected into the active layer 528. The inner portion surrounded by the current-constricting layer 532 becomes the light-emitting portion of the VCSEL element 520. Although Figure 22 depicts the layers constituting the VCSEL element 520 as being in direct contact, other functional layers may be provided between any of these layers.

[0149] The contact layer 534, the upper DBR layer 530, and the resonator spacer 526 are each processed into a plurality of mesa structures 536, each having a rectangular shape in plan view, thereby forming a plurality of VCSEL elements 520, each containing one mesa structure 536. The compound semiconductor substrate 522 and the lower DBR layer 524 are common components of these plurality of VCSEL elements 520. The planar shape of the VCSEL element 520 (mesa structure 536) is not particularly limited and may be a shape other than rectangular, for example, circular. In this specification, "planar view" refers to viewing the VCSEL element 520 from the direction of light emission (Z direction).

[0150] An insulating layer 542 is provided on the upper surface and side walls of the mesa structure 536, as well as on the lower DBR layer 524 that is exposed by processing the contact layer 534, the upper DBR layer 530, and the resonator spacer 526 onto the mesa structure 536. An anode wiring 570 made of a metallic material is provided on the insulating layer 542. The insulating layer 542 serves to electrically isolate the side walls and lower DBR layer 524 of the mesa structure 536 from the anode wiring 570, as well as to act as a protective film to prevent deterioration of the semiconductor surface, such as the side walls of the mesa structure 536. The insulating layer 542 is provided with an opening 544 that has a frame-like shape in plan view and reaches the mesa structure 536. As a result, the anode wiring 570 is electrically connected to the contact layer 534 through the opening 544. The anode wiring 570 is also provided with a rectangular outlet 572 that overlaps with the upper surface of the mesa structure 536 in plan view. Light generated by the VCSEL element 520 is emitted from this emission port 572. A cathode electrode 560 common to multiple VCSEL elements 520 is provided on the back side of the compound semiconductor substrate 522.

[0151] The emission wavelength of the VCSEL element 520 is not particularly limited, but in this embodiment, a VCSEL element 520 that emits light in the 940 nm band is assumed. In this case, the compound semiconductor substrate 522 may be made of, for example, an n-type GaAs substrate. The lower DBR layer 524 may be made of, for example, Al with an optical film thickness of 1 / 4λc. ０．１ Ga ０．９ As layer and Al ０．９ Ga ０．１The structure can be constructed by stacking 35 pairs of laminates with an As layer, with each pair being considered one lamination. Here, λc is the center wavelength of the high-reflection band of the lower DBR layer 524, which in this embodiment is 940 nm. The resonator spacer 526 can be constructed by a p-i-n junction consisting of an n-type layer, an undoped spacer portion, and a p-type layer. The undoped spacer portion may be provided with, for example, three active layers 528. Each of the active layers 528 may be composed of a multiple quantum well including four quantum wells, for example, an 8 nm thick InGaAs well layer sandwiched between 10 nm thick AlGaAs barrier layers. In this case, the resonator spacer 526 contains a total of 12 quantum wells. The n-type layer may be composed of an n-type GaAs layer, the p-type layer of a p-type GaAs layer, and the remaining portion of the undoped spacer portion of an undoped GaAs layer. The upper DBR layer 530 may be, for example, Al with an optical film thickness of 1 / 4λc. ０．１ GaAs layer and Al ０．９ It can be constructed by stacking 20 pairs of laminates with a GaAs layer, with each pair being considered one. The upper DBR layer 530 contains an Al layer with a thickness of 30 nm. ０．９８ Ga ０．０２ A current-constricting layer 532 is provided, in which a portion of the As layer is oxidized. The current-constricting layer 532 has a non-oxidized portion in the central part of the mesa structure 536 and an oxidized portion near the side walls of the mesa structure 536. As a result, the current injected into the VCSEL element 520 flows only through the non-oxidized portion, so that only the portion of the VCSEL element 520 that overlaps with the central part of the mesa structure 536 in a plan view oscillates. The contact layer 534 has, for example, a thickness of 50 nm and a carrier concentration of 1 × 10⁻¹⁶. １９ cm －３ It may be composed of a GaAs layer. This improves the electrical contact between the upper DBR layer 530 and the anode wiring 570.

[0152] Figure 23 is a cross-sectional view along the lines III1-III1' and III2-III2' in Figure 21. Figure 24 is a cross-sectional view along the lines IV1-IV1' and IV2-IV2' in Figure 21. The section view along the line III1-III1' in Figure 23 and the section view along the line IV1-IV1' in Figure 24 are cross-sectional views in a plane parallel to the Y-Z plane passing through the anode electrode pad 590. The section view along the line III2-III2' in Figure 23 is a cross-sectional view in a plane parallel to the Y-Z plane passing through the nozzle 572. The section view along the line IV2-IV2' in Figure 24 is a cross-sectional view in a plane parallel to the Y-Z plane passing through the portion of the opening 544 extending in the Y direction.

[0153] In this embodiment, the anode wiring 570 is composed of wiring 546 and wiring 552 which is composed of a wiring layer located above the wiring layer that constitutes wiring 546. The anode electrode pad 590 is composed of wiring 552.

[0154] An insulating layer 550 is provided in a portion of the region between wiring 546 and wiring 552. More specifically, the insulating layer 550, which is placed between the wiring layer layer constituting wiring 546 and the wiring layer layer constituting wiring 552, is provided in region 5110 but not in region 5112. In other words, there is no electrical path connecting wiring 546 and wiring 552 in the region extending from the anode electrode pad 590 to region 5110. On the other hand, in region 5112, wiring 546 and wiring 552 are directly stacked without an insulating layer in between, and are physically and electrically connected throughout the entire region 5112.

[0155] As shown in Figures 23 and 24, the end of the insulating layer 550 on the region 5112 side is located in the region between the mesa structure 536 of VCSEL element 520A and the mesa structure 536 of VCSEL element 520B. In other words, the electrical connection between the wiring 546 and the wiring 552 at the boundary 5140 between region 5110 and region 5112 is located in the region between the mesa structure 536 of VCSEL element 520A and the mesa structure 536 of VCSEL element 520B. As a result, the width in the X direction of the electrical connection between the wiring 546 and the wiring 552 at the boundary 5140 between region 5110 and region 5112 is equal to the width in the X direction of the anode wiring 570.

[0156] Wiring 546 is in contact with the anode side (contact layer 534) of both VCSEL elements 520A and 520B. However, the anode wiring 570 at the connection point with VCSEL element 520A is composed of a single-layer structure of wiring 546, whereas the anode wiring 570 at the connection point with VCSEL element 520B is composed of a stacked structure of wiring 546 and wiring 552. The same applies to other VCSEL elements 520A and 520B not shown in Figures 23 and 24.

[0157] In the configuration examples shown in Figures 23 and 24, the anode electrode pad 590 is a single-layer structure of wiring 552, but the anode electrode pad 590 does not necessarily have to be a single-layer structure of wiring 552, and may be formed from multiple electrode layers. The anode electrode pad 590 only needs to be configured to selectively supply current supplied from the outside to the wiring 552 in region 5110, and for example, an anode electrode pad 590 composed of wiring 546 may be connected to the wiring 552 in region 5110. Also, in the configuration examples shown in Figures 23 and 24, the wiring 546 does not extend to the lower layer of the anode electrode pad 590, but the wiring 546 may be configured to extend to the lower layer of the anode electrode pad 590 together with the insulating layer 550.

[0158] Figure 25 is a schematic diagram visually representing the configuration of the anode wiring 570 and the flow of current supplied from the anode electrode pad 590. The first VCSEL element 520A is from the anode electrode pad 590 side. １The second VCSEL element 520A ２ , the (n-1)th VCSEL element 520A ｎ－１ , the nth VCSEL element 520B ｎ , the (n+1)th VCSEL element 520B ｎ＋１ This indicates that the boundary 5140 between region 5110 and region 5112 is the (n-1)th VCSEL element 520A. ｎ－１ and the nth VCSEL element 520B ｎ It is assumed to be located between [the two points].

[0159] In Figure 25, resistor R1 is the wiring resistance between VCSEL elements 520 in wiring 546, and resistor R2 is the wiring resistance between VCSEL elements 520 in wiring 552. Resistor R12 is the wiring resistance between VCSEL elements 520 in the multilayer film of wiring 546 and wiring 552 (parallel resistance of resistors R1 and R2). Resistor R10 is the wiring resistance equivalent to half of resistor R1, and resistor R20 is the wiring resistance equivalent to half of resistor R2. Resistor R120 is the wiring resistance equivalent to half of resistor R12 (parallel resistance of resistors R10 and R20).

[0160] By configuring the anode electrode pad 590 and anode wiring 570 in this way, the current I supplied from the anode electrode pad 590 to the anode wiring 570 １ First, current I flows through region 5110 in the -Y direction via wiring 552. １ The current I reaches the boundary 5140 between region 5110 and region 5112. １ The current I flows through region 5110 in the Y direction, folding back via wiring 546. ２１ And the current I that flows through the laminated film of wiring 546 and wiring 552 in the -Y direction in region 5112 ２２ It splits into two. Current I flows in the Y direction through wiring 546. ２１ This is supplied to the VCSEL element 520A located in region 5110. The current I flows in the -Y direction through the laminated film of wiring 546 and wiring 552. ２２This current is supplied to the VCSEL element 520B located in region 5112. This makes it possible to supply current to all VCSEL elements 520A and 520B connected to the anode wiring 570.

[0161] Figure 26 is a graph showing the results of calculating the current values ​​flowing through each of the multiple VCSEL elements 520 connected to a common anode electrode pad 590. The horizontal axis shows the number of the VCSEL element 520 counted from the anode electrode pad 590 side, and the vertical axis shows the current value flowing through each VCSEL element 520. The solid line shows the calculation results for the light-emitting device of this embodiment (Example 11), and the dashed line shows the calculation results for the light-emitting device of a reference form described later (Reference Example 1).

[0162] In Example 11, we assume that 40 VCSEL elements 520 are connected to one anode electrode pad 590, and that a boundary 5140 is provided between the 16th VCSEL element 520 and the 17th VCSEL element 520 from the anode electrode pad 590 side. In the calculation, the spacing between the light-emitting points of the VCSEL elements 520 was set to 30 μm, the width of the non-oxidized portion of the current-constricting layer 532 of the VCSEL element 520 was set to 17.3 μm, the thickness of the wiring 546 and wiring 552 was set to 1 μm and the width to 6 μm, and the amount of current injected into the anode electrode pad 590 was set to 2.4 A.

[0163] In the light-emitting device of this embodiment, as described above, current is supplied to each VCSEL element 520 through the wiring 546 from the boundary 5140 between region 5110 and region 5112. Therefore, the current values ​​are highest at the 16th VCSEL element 520A and the 17th VCSEL element 520B, which are adjacent to the boundary 5140. The current values ​​flowing through the VCSEL elements 520 decrease as you move from the 16th VCSEL element 520A towards the 1st VCSEL element 520A, and as you move from the 17th VCSEL element 520B towards the 40th VCSEL element 520B. As a result, the current distribution in the light-emitting device of this embodiment is bell-shaped, as shown by the solid line in Figure 26. The ratio of the minimum value to the maximum value (minimum value / maximum value) among the current values ​​at the 40 light-emitting points was 0.71. Assuming that the minimum current required for the light-emitting operation of one VCSEL element 520 is 0.06A, the minimum current that needs to be injected from one anode electrode pad 590 to which 40 VCSEL elements 520 are connected is 2.8A, and the power consumption in this case is 23.5W.

[0164] In contrast, in the reference light-emitting device, the VCSEL element 520 closer to the anode electrode pad 590 has a higher current value, and the VCSEL element 520 further from the anode electrode pad 590 has a lower current value. The ratio of the minimum value to the maximum value of the current values ​​at the 40 light-emitting points was 0.24. If the minimum current value required for the light-emitting operation of one VCSEL element 520 is 0.06A, then the minimum current value that needs to be injected from one anode electrode pad 590 to which 40 VCSEL elements 520 are connected is 4.7A, and the power consumption in this case is 45.1W.

[0165] Therefore, the light-emitting device of this embodiment can suppress variations in the current values ​​supplied to multiple VCSEL elements 520 connected to a single anode electrode pad 590 and reduce power consumption compared to the light-emitting device of the reference embodiment.

[0166] Furthermore, in the light-emitting device of this embodiment, as described above, the boundary portion 5140 between region 5110 and region 5112 is provided in the region between the mesa structure 536 of VCSEL element 520A and the mesa structure 536 of VCSEL element 520B. That is, the width in the X direction of the electrical connection portion between the wiring 546 and the wiring 552 in the boundary portion 5140 is equal to the width in the X direction of the anode wiring 570. Therefore, in the light-emitting device of this embodiment, the current density at the boundary portion 5140 where the current value is maximum can be reduced compared to the case where the width in the X direction of the boundary portion 5140 is narrower than the width in the X direction of the anode wiring 570. This suppresses the deterioration of the anode wiring 570 due to electromigration and makes it possible to realize a light-emitting device with high durability.

[0167] A light-emitting device according to a reference embodiment of this model will be described with reference to Figures 27 to 30. Components similar to those in the light-emitting device according to this model will be denoted by the same reference numerals, and their descriptions will be omitted or simplified. Figure 27 is a schematic plan view showing the general configuration of the light-emitting device according to this reference embodiment. Figures 28 and 29 are schematic cross-sectional views showing the general configuration of the light-emitting device according to this reference embodiment. Figure 30 is a graph showing the current distribution in the light-emitting device according to this reference embodiment.

[0168] The light-emitting device according to this reference embodiment is a surface-emitting semiconductor light-emitting device in which a plurality of VCSEL elements 520 are arranged in a two-dimensional manner, similar to the light-emitting device according to the twelfth embodiment. Figure 27 is a schematic plan view of the light-emitting device 5100 as seen from the side of the light-emitting surface.

[0169] In other words, the light-emitting device 5100 according to this reference embodiment, as shown in Figure 27, has a substrate 510, a plurality of VCSEL elements 520, a plurality of anode wirings 570, and a plurality of anode electrode pads 590. The VCSEL elements 520 are arranged in a matrix along the X and Y directions. Here, as an example, it is assumed that 40 VCSEL elements 520 are arranged in the X direction and 40 in the Y direction, for a total of 1600 VCSEL elements 520 arranged on the substrate 510.

[0170] The anode wiring 570 is arranged in each row of the VCSEL element array. That is, multiple anode wirings 570 extending in the Y direction are arranged along the X direction on the substrate 510. Here, as an example, it is assumed that 40 anode wirings 570, corresponding to the number of VCSEL elements lined up in the X direction, are arranged on the substrate 510. The anode wiring 570 is provided with an outlet 572 for the light generated by the VCSEL element 520.

[0171] The anode electrode pad 590 is electrically connected to one end (the upper end in Figure 27) of each of the multiple anode wires 570. Here, as an example, 40 anode electrode pads 590, corresponding to the number of anode wires 570 arranged in the X direction, are arranged on the substrate 510.

[0172] Figure 28 is a cross-sectional view along lines A1-A1' and A2-A2' in Figure 27, and Figure 29 is a cross-sectional view along lines B1-B1' and B2-B2' in Figure 27. The cross-sectional view along line A1-A1' in Figure 28 and the cross-sectional view along line B1-B1' in Figure 29 are cross-sectional views in a plane parallel to the Y-Z plane passing through the anode electrode pad 590. The cross-sectional view along line A2-A2' in Figure 28 is a cross-sectional view in a plane parallel to the Y-Z plane passing through the nozzle 572. The cross-sectional view along line B2-B2' in Figure 29 is a cross-sectional view in a plane parallel to the Y-Z plane passing through the portion of the opening 544 that extends in the Y direction, which is the electrical connection point between the anode wiring 570 and the VCSEL element 520. The opening 544 may be provided in a frame-shaped region surrounding the nozzle 572.

[0173] In this reference embodiment, the layer structure of the VCSEL element 520 may be the same as in the twelfth embodiment. On the other hand, unlike the twelfth embodiment, in which the anode wiring 570 and anode electrode pad 590 are composed of two or more wiring layers, the anode wiring 570 and anode electrode pad 590 are composed of one wiring layer. The length of the electrical path connecting the anode electrode pad 590 and the VCSEL element 520 via the anode wiring 570 is longer for VCSEL elements 520 located further from the anode electrode pad 590. In this specification, even if the wiring is composed of a laminate of multiple layers, if these are directly laminated without an insulating layer in between, it will be described as one layer. On the other hand, if the wiring is composed of a laminate of multiple layers, and an insulating layer is provided between these multiple layers in at least some areas, separating the electrical paths, it will be described as two layers (or three or more layers).

[0174] Figure 30 is a graph showing the calculated current values ​​flowing through each of the multiple VCSEL elements 520 connected to a common anode electrode pad 590. The horizontal axis shows the number of the VCSEL element 520 counted from the anode electrode pad 590 side, and the vertical axis shows the current value flowing through each VCSEL element 520. In Figure 30, the solid line represents the case where the thickness of the anode wiring 570 is 1 μm in the light-emitting device of this reference embodiment (Reference Example 1), and the dashed line represents the case where the thickness of the anode wiring 570 is 2 μm in the light-emitting device of this reference embodiment (Reference Example 2). In the calculation, the spacing between the light-emitting points of the VCSEL elements 520 was set to 30 μm, the width of the non-oxidized portion of the current-constricting layer 532 of the VCSEL element 520 was set to 17.3 μm, the thickness of the wiring 546 and wiring 552 was set to 1 μm and the width to 6 μm, and the injection current amount into the anode electrode pad 590 was set to 2.4 A.

[0175] In this reference embodiment of the light-emitting device, as described above, the length of the electrical path connecting the anode electrode pad 590 and the VCSEL element 520 via the anode wiring 570 is longer for VCSEL elements 520 located further from the anode electrode pad 590. Therefore, the wiring resistance between the anode electrode pad 590 and the VCSEL element 520 is higher for VCSEL elements 520 located further from the anode electrode pad 590. As a result, the current flowing through the VCSEL elements 520 does not decrease as you move from the first VCSEL element 520 to the fortieth VCSEL element 520.

[0176] In Reference Example 1, the ratio of the minimum value to the maximum value (minimum / maximum value) of the current values ​​in the 40 VCSEL elements 520 was 0.24. Furthermore, assuming that the minimum current required for the light-emitting operation of one VCSEL element 520 is 0.06A, the minimum current required to be injected from one anode electrode pad 590 to which the 40 VCSEL elements 520 are connected was 4.7A. In this case, the power consumption was 45.1W.

[0177] In Reference Example 2, the ratio of the minimum value to the maximum value (minimum value / maximum value) among the current values ​​of the 40 VCSEL elements 520 was 0.43. Furthermore, the power consumption when the minimum current value required for the light emission operation of one VCSEL element 520 was 0.06A was 22.3W.

[0178] A method for combining the configurations of the 12th embodiment described above with the configurations of the 1st to 11th embodiments will be explained. The amount of current flowing through the light-emitting elements in regions LR1, LR2, and LR3 shown in Figures 21 and 26 will be compared. As shown in Figure 26, in the configuration of Embodiment 11, the amount of current in the light-emitting elements in regions LR1 and LR3 (element numbers 1 to 11, 24 to 40) is relatively small, while the amount of current in the light-emitting elements in region LR2 (element numbers 12 to 23) is relatively large. Therefore, when comparing the light-emitting elements in regions LR1 and LR3 with the light-emitting elements in region LR2, the pulse light emission timing from the light-emitting elements in region LR2 is earlier than the pulse light emission timing from the light-emitting elements in regions LR1 and LR3. As a result, variations in the pulse light emission timing may occur.

[0179] This variation can be reduced by applying the methods of the first to eleventh embodiments. Specifically, the configuration of the light-emitting element 20A of any of the first to eleventh embodiments is applied to the light-emitting element in region LR2, and the configuration of the light-emitting element 20B of any of the first to eleventh embodiments is applied to the light-emitting elements in regions LR1 and LR3. As a result, the amount of optical loss of the resonator of the light-emitting element in region LR2 becomes larger than the amount of optical loss of the resonators of the light-emitting elements in regions LR1 and LR3, so that the time difference between the emission timing of the light-emitting element in region LR2 and the emission timing of the light-emitting elements in regions LR1 and LR3 can be reduced. Therefore, in the configuration of the twelfth embodiment, by applying the configurations of the light-emitting elements 20A and 20B of the first to eleventh embodiments as described above, a light-emitting device 1 is provided in which the variation in the emission timing of pulsed light is reduced.

[0180] [Third Embodiment] A VCSEL array (light source device) 6100 according to the thirteenth embodiment will be described. The VCSEL array 6100 is a semiconductor laser comprising a plurality of VCSELs 61 arranged in an array, and each VCSEL 61 emits laser light. Here, "array" refers to a state in which a plurality of VCSELs 61 are arranged in two dimensions according to a predetermined pattern.

[0181] In the following explanation, the first direction (row direction) when arranging multiple VCSELs 61 in an array is referred to as the X direction. The second direction (column direction) when arranging multiple VCSELs 61 in an array is referred to as the Y direction. The direction intersecting the X and Y directions is referred to as the Z direction. The X, Y, and Z directions are typically orthogonal to each other.

[0182] The VCSEL array 6100 comprises, for example, multiple VCSELs 61 as multiple semiconductor light-emitting elements, multiple anode wirings 6101 as wiring, and multiple anode power supply pads 6102 as power supply pads, as shown in Figure 31. In Figure 31, four VCSELs 61 on one side in the Y direction and three on the other side in the Y direction are shown.

[0183] Each of the multiple VCSELs 61 is a vertical-cavity surface-emitting laser having a distributed Bragg reflector (DBR). The multiple VCSELs 61 are arranged in an array across multiple rows and columns. For example, 20 VCSELs 61 are arranged in a row along the Y direction, and 20 of these Y-direction arrays are arranged along the X direction. This results in a total of 400 (20 x 20) VCSELs 61 being arranged in an array, forming a rectangular shape when viewed from the Z direction.

[0184] Multiple anode wires 6101 are wires that connect each of the multiple VCSELs 61 to the anode power supply pad 6102. Each of the multiple anode wires 6101 extends along the Y direction and is arranged in a line along the X direction. One anode wire 6101 is electrically connected to 20 VCSELs 61 along the Y direction. In other words, the 20 VCSELs 61 along the Y direction are connected in parallel to one anode wire 6101. Twenty such anode wires 6101 are arranged in a line along the X direction. In this way, the multiple anode wires 6101 are configured as sequential anode wires. Each anode wire 6101 supplies current to the 20 VCSELs 61 connected in parallel.

[0185] The anode power supply pad 6102 is a part for connecting the Au wire (not shown). The anode power supply pad 6102 is a power supply pad for supplying power to multiple VCSELs 61 and is provided at one end of the anode wiring 6101 in the Y direction. The anode power supply pad 6102 has the role of supplying current supplied from the outside via the Au wire to the anode wiring 6101.

[0186] As described above, the VCSEL array 6100 can emit light from 400 VCSELs 61 by supplying current from an external source via Au wires to 20 anode power supply pads 6102. Furthermore, by sequentially supplying current from an external source to the 20 anode power supply pads 6102, sequential driving can be performed in which each row emits light at a different timing.

[0187] Here, the plurality of VCSEL61 according to the 13th embodiment are configured to include VCSEL61A as a semiconductor light-emitting element and VCSEL61B as a semiconductor light-emitting element. In the following description, when there is no need to particularly distinguish between VCSEL61A and VCSEL61B, they may simply be referred to as "VCSEL61".

[0188] As shown in Figure 32B, VCSEL61B comprises an n-type GaAs substrate 610 as a semiconductor substrate, a first DBR 620 as a first reflector, a semiconductor resonator spacer 630 as a first semiconductor resonator, and a second DBR 640 as a second reflector. Furthermore, VCSEL61B comprises a saturable absorption layer 22, an insulating film 650, an upper electrode 660 as a first electrode, and a back electrode 670 as a second electrode. The first DBR 620, the saturable absorption layer 22, the semiconductor resonator spacer 630, the second DBR 640, and the upper electrode 660 are stacked in this order on the first surface of the n-type GaAs substrate 610. The back electrode 670 is provided on the second surface of the n-type GaAs substrate 610, opposite to the first surface. In Figure 32B, these components of VCSEL61B are in direct contact, but other components may be provided in between. Furthermore, the above description is a structural description and does not limit the manufacturing order of each component. Figure 32B is a cross-sectional view taken along the line V2-V2 in Figure 31.

[0189] The n-type GaAs substrate 610 is a substrate made of an n-type GaAs single crystal. The n-type GaAs substrate 610 has a first surface on which various components are laminated and a second surface located on the opposite side of the first surface in the Z direction.

[0190] The first DBR620 is provided on the first surface of the n-type GaAs substrate 610. The first DBR620 is made of Al with an optical film thickness of 1 / 4λc ０．１ GaAs layer and Al ０．９ It is constructed by stacking 35 pairs of layers, with each pair consisting of a GaAs layer. Here, λc is the central wavelength of the high-reflection band of the second DBR640, for example, 940 nm.

[0191] The semiconductor resonator spacer 630 is provided on the first DBR 620 and consists of an n-type AlGaAs layer, a first active layer, and a p-type layer, starting from the first DBR 620 side. The first active layer is an undoped layer and contains three quantum well layers 631. Each of the three quantum well layers 631 consists of an 8 nm thick InGaAs well layer and a 10 nm thick AlGaAs barrier layer sandwiching it.

[0192] The second DBR640 is mounted on the semiconductor resonator spacer 630 and has an optical film thickness of 1 / 4λc Al ０．１ GaAs layer and Al ０．９ It is constructed by stacking 20 pairs of GaAs layers, with each pair forming one. A current-constricting layer 641 with a thickness of 30 nm is provided inside the second DBR 640. During the manufacturing process, this current-constricting layer 641 is partially oxidized from the mesa lateral direction (X direction, Y direction) by exposure to a water vapor atmosphere. The current-constricting layer 641 is divided into an oxidized region of a predetermined width from the mesa sidewall and a non-oxidized region near the center of the mesa. Since the current injected into VCSEL 61B flows only through the non-oxidized region, only the central part of VCSEL 61B oscillates. The upper electrode 660 is electrically in contact with the second DBR 640. The uppermost layer of the second DBR 640 is Al ０．１ A portion of the GaAs layer has a thickness of 50 nm and a carrier concentration of 1 × 10⁻¹⁶. １９ cm －３The GaAs contact layer is replaced. As a result, the second DBR640 improves the electrical contactability with the upper electrode 660. Note that the semiconductor resonator spacer 630 and the second DBR640, which are layers above the first DBR620, have a portion of their surface removed during the manufacturing process, and the remaining portion is configured in a mesa shape.

[0193] The insulating film 650 covers the mesa-shaped semiconductor resonator spacer 630 and the second DBR 640, and suppresses their deterioration.

[0194] The upper electrode 660 is mounted on the second DBR 640 and is electrically connected to the anode wiring 6101. The upper electrode 660 has an annular conductive pattern, and the central opening serves as a circular window for light extraction. The upper electrode 660 makes ohmic contact with the second DBR 640 through a portion of the insulating film 650 that has been partially removed.

[0195] The back electrode 670 is conductive and is provided on the second surface of the n-type GaAs substrate 610. The back electrode 670 is in ohmic contact with the n-type GaAs substrate 610.

[0196] In the VCSEL61B configured in this way, when current is applied to the upper electrode 660 via the anode wiring 6101, current flows through the upper electrode 660 to the semiconductor resonator spacer 630, causing light to be generated in the semiconductor resonator spacer 630. The light generated in the semiconductor resonator spacer 630 then resonates between the first DBR 620 and the second DBR 640, causing laser oscillation, and the oscillating laser light is emitted from the central opening of the upper electrode 660 along the Z direction.

[0197] Next, VCSEL61A will be described. VCSEL61A differs from VCSEL61B in that it includes a semiconductor layer 680, but otherwise has the same configuration as VCSEL61B. That is, as shown in Figure 32A, VCSEL61A comprises an n-type GaAs substrate 610, a first DBR 620, a saturable absorption layer 22, a semiconductor resonator spacer 630, a second DBR 640, an insulating film 650, an upper electrode 660, a back electrode 670, and a semiconductor layer 680. The first DBR 620, the saturable absorption layer 22, the semiconductor resonator spacer 630, the second DBR 640, the semiconductor layer 680, and the upper electrode 660 are stacked in this order on the first surface of the n-type GaAs substrate 610. The back electrode 670 is provided on the second surface of the n-type GaAs substrate 610, opposite to the first surface. Figure 32A is a cross-sectional view taken along line V1-V1 in Figure 31. The n-type GaAs substrate 610, the first DBR 620, the saturable absorption layer 22, the semiconductor resonator spacer 630, the second DBR 640, the insulating film 650, the upper electrode 660, and the back electrode 670 have the same configuration as the VCSEL 61B described above, so a detailed explanation is omitted.

[0198] The semiconductor layer 680 is intended to set the resistance value (device resistance value) between the upper electrode 660 and the back electrode 670 of VCSEL 61A to a different value from the resistance value between the upper electrode 660 and the back electrode 670 of VCSEL 61B. The semiconductor layer 680 is provided between the upper electrode 660 and the second DBR 640. In other words, the semiconductor layer 680 is stacked on the side of the second DBR 640 opposite to the semiconductor resonator spacer 630 in the Z direction. Due to the presence of the semiconductor layer 680, VCSEL 61A has a larger series resistance component between the upper electrode 660 and the second DBR 640 than VCSEL 61B. That is, the distance between the upper electrode 660 and the back electrode 670 of VCSEL 61A is longer than that of VCSEL 61B. Because this distance is longer than that of VCSEL61B, the resistance between the upper electrode 660 and the back electrode 670 is greater than that of VCSEL61B. The resistance of VCSEL61A can be changed by changing the material, composition, and film thickness of the semiconductor layer 680.

[0199] As described above, VCSEL61A has a semiconductor layer 680 between the upper electrode 660 and the second DBR 640, while VCSEL61B does not have a semiconductor layer 680 between the upper electrode 660 and the second DBR 640. In other words, the thickness of the semiconductor layer 680 in VCSEL61A is a predetermined thickness greater than 0, while the thickness of the semiconductor layer 680 in VCSEL61B is 0. As a result, the resistance values ​​between the upper electrode 660 and the back electrode 670 of VCSEL61A and VCSEL61B are different. If the first resistance value between the upper electrode 660 and the back electrode 670 of VCSEL61A is R1, and the second resistance value between the upper electrode 660 and the back electrode 670 of VCSEL61B is R2, then R1 > R2. In other words, VCSEL61A has a higher resistance value than VCSEL61B.

[0200] Figure 33 shows examples of materials for the semiconductor layer 680 and their various electrical properties. In the figure, the increase rate of device resistance indicates the increase rate of resistance for every 1 μm of thickness. The doping concentration for each material is 1 × 10⁻⁶. １７ cm －３ This is assumed. By placing a semiconductor layer 680 on top of the second DBR640, the resistance of VCSEL61A can be increased. The semiconductor layer 680 has a carrier concentration of 1 × 10⁻¹⁶ from the side closest to the second DBR640. １７ cm －３ AlInP was layered to a thickness of 0.38 μm, and on top of that, a layer with a thickness of 50 nm and a carrier concentration of 1 × 10⁻¹⁶ was applied. １９ cm －３ The structure consists of two layers, with a GaAs contact layer. The thickness of the semiconductor layer 680 is preferably selected from an integer multiple of λc / 2 in order to suppress the optical effects caused by the addition of this layer. In the 13th embodiment, the thickness of the AlInP layer is set to 403 nm, so that the optical thickness of the semiconductor layer 680 is 3 × λc / 2. With this configuration, the resistance value of VCSEL 61A can be made 1.33 times that of VCSEL 61B.

[0201] In the VCSEL array 6100, the arrangement of two types of VCSELs 61A and 61B with different resistance values ​​is designed to ensure that the current injected into each VCSEL 61A and 61B is more uniform. Here, the multiple VCSELs 61 are divided into multiple groups according to the wiring resistance between them and the anode power supply pad 6102. For example, the multiple VCSELs 61 can be divided into multiple groups according to the distance between them and the anode power supply pad 6102. The multiple groups can consist of, for example, a first group and a second group. The first group may consist of VCSELs 61 that are closer to the anode power supply pad 6102 than the second group. The second group may consist of VCSELs 61 that are further away from the anode power supply pad 6102 than the first group. Here, the VCSELs 61 included in the first group and the VCSELs 61 included in the second group have different resistance values. In other words, the VCSEL 61 in the second group has a lower resistance than the VCSEL 61 in the first group. To put it another way, the VCSEL 61 in the first group has a higher resistance than the VCSEL 61 in the second group. Thus, the VCSELs in the group that are closer to the anode power supply pad 6102 have a higher resistance. For example, the VCSELs in the group that have a lower wiring resistance to the anode power supply pad 6102 have a higher resistance. Specifically, the VCSELs in the first group that are closer to the anode power supply pad 6102 are configured as VCSEL 61A, and the VCSELs in the second group that are further from the anode power supply pad 6102 are configured as VCSEL 61B. More specifically, as shown in Figure 31, in the 20 VCSELs along the Y direction, the first group of VCSELs, from the 1st to the 6th closest to the anode power supply pad 6102, are composed of VCSEL 61A. The remaining second group of VCSELs, from the 6th to the 20th, are composed of VCSEL 61B.

[0202] Figure 34 is a plan view showing an example configuration of a VCSEL array 6900 according to a comparative example. As shown in Figure 34, the VCSEL array 6900 according to the comparative example is configured such that all VCSELs (400 in total) are made of one type of VCSEL 61B and arranged in an array. In the VCSEL array 6900 according to the comparative example, when the spacing between VCSEL 61Bs is narrowed and they are arranged at high density for reasons such as reducing chip costs, it is difficult to make the wiring for supplying power to each VCSEL 61B thicker. As a result, VCSEL 61Bs located far from the anode power supply pad 6102 and with long current paths experience a larger voltage drop due to wiring resistance compared to VCSEL 61Bs located close to the anode power supply pad 6102. Therefore, the voltage applied between the anode and cathode of the VCSEL 61B decreases, and as a result, the amount of current injected decreases. This leads to uneven current injection into each VCSEL 61B of the VCSEL array 6900, resulting in various adverse effects. For example, the power input increases in order to supply a predetermined current to the VCSEL 61B with the minimum current, and variations occur in the light intensity of each VCSEL 61B within the VCSEL array 6900. As a result, in distance measurement applications, the signal in dark areas becomes weaker, which reduces the signal-to-noise ratio in the light receiving unit, causing variations in distance measurement accuracy. In illumination applications, various adverse effects occur, such as affecting the uniformity of illumination within the surface.

[0203] In contrast, the VCSEL array 6100 according to the 13th embodiment places the first group of VCSELs 61A, which have high resistance values, closer to the anode power supply pad 6102 than the second group of VCSELs 61B, which have low resistance values. In other words, the current path from the anode power supply pad 6102 to the high-resistance VCSEL 61A is shorter than the current path from the anode power supply pad 6102 to the low-resistance VCSEL 61B. This configuration allows the resistance values ​​of each VCSEL 61A and 61B, including the resistance value of the anode wiring 6101, to be closer to each other. As a result, even if a voltage drop occurs due to wiring resistance, the current injected into each VCSEL 61A and 61B can be made more uniform, and the spread of the current distribution can be suppressed. Here, current distribution refers to the distribution of current values ​​of the current injected into each VCSEL in the VCSEL array. By suppressing the spread of the current distribution, variations in the light intensity of each VCSEL 61A and 61B are suppressed, thereby improving the uniformity of light emission in each VCSEL 61A and 61B. The uniformity of light emission from each VCSEL 61A and 61B also suppresses variations in the lifespan of each VCSEL 61A and 61B. Furthermore, by suppressing the spread of the current distribution, the power input to the VCSEL array 6100 is reduced. Thus, the effect of reducing the power input due to suppressing the spread of the current distribution is greater than the effect of increasing the power input due to increasing some resistances. Moreover, regarding the heat generation of the VCSEL array 6100, the amount of heat generated is proportional to the product of the resistance to the power of 1 and the current value to the power of 2, so from the perspective of heat generation, the effect of reducing the current value due to suppressing the spread of the current distribution is also significant.

[0204] Figure 35 shows the current distribution in each VCSEL array. In Figure 35, the vertical axis represents the current value, and the horizontal axis represents the nth VCSEL in one array (20 VCSELs 61 in one row), counting from the one closest to the anode power supply pad 6102. In Figure 35, LC2 is the current distribution of one array in the VCSEL array 6100 according to the 13th embodiment. Figure 35 also shows the current distribution LC1 of one array in the VCSEL array 6900 according to a comparative example.

[0205] In the comparative example VCSEL array 6900, the ratio of the maximum (MAX) to the minimum (MIN) current value flowing through each VCSEL 61B in one array is 0.63 (LC1 in Figure 35). Furthermore, in the VCSEL array 6900, when the minimum current value required for one VCSEL 61B is set to 0.06A, the current value required for one array, taking into account the variation in current values, is estimated to be 1.44A, and the input power is 7.29W. In contrast, in the VCSEL array 6100 according to the 13th embodiment, the ratio of the maximum to the minimum current value flowing through each VCSEL 61A, 61B in one array is 0.76 (LC2 in Figure 35). Furthermore, in the VCSEL array 6100, when the minimum current required for one VCSEL 61A, 61B is set to 0.06A, the current required for one array, taking into account the variation in current values, is estimated to be 1.33A, and the input power is 6.70W. Thus, compared to the comparative example VCSEL array 6900, the VCSEL array 6100 has a ratio of maximum to minimum current values ​​that is close to 1.0, thus suppressing the spread of the current distribution. In addition, compared to the comparative example VCSEL array 6900, the VCSEL array 6100 can reduce the current required for one array, thereby suppressing the input power.

[0206] A method for combining the configurations of the 13th embodiment described above with the configurations of the 1st to 11th embodiments will be explained. Refer to the amount of current flowing through the light-emitting elements in region LR4 shown in Figures 31 and 35. As shown in Figure 35, the amount of current in the light-emitting elements in region LR4 (the first and second VCSELs from the anode power supply pad 6102) is greater than the amount of current in the other light-emitting elements. Similarly, as shown in Figure 35, the amount of current in the light-emitting elements in region LR5 (the seventh to ninth VCSELs from the anode power supply pad 6102) is also greater than the amount of current in the other light-emitting elements. Therefore, when comparing the light-emitting elements in regions LR4 and LR5 with the other light-emitting elements, the pulse light emission timing from the light-emitting elements in regions LR4 and LR5 is earlier than the pulse light emission timing from the other light-emitting elements. As a result, variations in the pulse light emission timing may occur.

[0207] This variation can be reduced by applying the methods of the first to eleventh embodiments. Specifically, the configuration of the light-emitting element 20A of any of the first to eleventh embodiments is applied to the light-emitting elements in regions LR4 and LR5, and the configuration of the light-emitting element 20B of any of the first to eleventh embodiments is applied to the other light-emitting elements. As a result, the amount of optical loss in the resonators of the light-emitting elements in regions LR4 and LR5 becomes larger than the amount of optical loss in the resonators of the other light-emitting elements, thus reducing the time difference between the emission timing of the light-emitting elements in regions LR4 and LR5 and the emission timing of the other light-emitting elements. Therefore, in the configuration of the thirteenth embodiment, by applying the configurations of the light-emitting elements 20A and 20B of the first to eleventh embodiments as described above, a light-emitting device 1 is provided in which the variation in the emission timing of pulsed light is reduced.

[0208] [14th Embodiment] The light-emitting device of the above-described embodiment is a so-called single-junction type having one p-i-n structure in the resonator spacer. However, multiple p-i-n structures may be arranged in the resonator spacer. In this embodiment, an example of a multi-junction type light-emitting device in which multiple p-i-n structures are arranged in the resonator spacer will be described. In this embodiment, the description of elements common to the above-described embodiment may be omitted or simplified.

[0209] Figure 36 is a schematic cross-sectional view of the light-emitting elements 20A and 20B according to this embodiment. In this embodiment as well, the thickness of the upper insulating films 243a and 243b is set such that the reflectance of the reflector 24A of the light-emitting element 20A is smaller than the reflectance of the reflector 24B of the light-emitting element 20B. This is a factor that causes the emission timing of the light-emitting element 20A to act later than the emission timing of the light-emitting element 20B. This point is the same as in the first and second embodiments.

[0210] Therefore, in this embodiment as well as in the first and second embodiments, the time difference between the emission timing of the light-emitting element 20A and the emission timing of the light-emitting element 20B can be adjusted. Thus, in this embodiment as well as in the first and second embodiments, a light-emitting device 1 is provided in which the variation in the emission timing of pulsed light is reduced.

[0211] On the other hand, in this embodiment, the structure of the resonator spacer has been modified compared to the second embodiment. In this embodiment, a resonator spacer 29 is provided in place of the resonator spacer 28 of the second embodiment. The resonator spacer 29 includes two p-i-n structures, and the light-emitting device 1 of this embodiment is a two-junction type.

[0212] The resonator spacer 29 may include a doped spacer layer 281 placed on the saturable absorption layer 22, an undoped spacer portion 292 placed on the doped spacer layer 281, and a doped spacer layer 293 placed on the undoped spacer portion 292. These form a lower layer p-i-n structure. The resonator spacer 29 may also include a tunnel junction layer 294 placed on the doped spacer layer 293. The resonator spacer 29 may also include a doped spacer layer 291 placed on the tunnel junction layer 294, an undoped spacer portion 295 placed on the doped spacer layer 291, and a doped spacer layer 283 placed on the undoped spacer portion 295. These form an upper layer p-i-n structure.

[0213] The non-doped spacer portion 292 may include a non-doped spacer layer 292a disposed on the doped spacer layer 281, an active portion 292b disposed on the non-doped spacer layer 292a, and a non-doped spacer layer 292c disposed on the active portion 292b. The non-doped spacer portion 295 may include a non-doped spacer layer 295a disposed on the doped spacer layer 291, an active portion 295b disposed on the non-doped spacer layer 295a, and a non-doped spacer layer 295c disposed on the active portion 295b.

[0214] The active portion 292b may include one active layer at the antinodes of standing waves of light propagating through the undoped spacer portion 292. Similarly, the active portion 295b may include one active layer at the antinodes of standing waves of light propagating through the undoped spacer portion 295. Each of these active layers may be composed of a multiple quantum well, for example, comprising three quantum wells, each consisting of an 8 nm thick InGaAs quantum well layer sandwiched between 10 nm thick GaAs barrier layers.

[0215] The doped spacer layers 281 and 291 may be composed of n-type AlGaAs layers, the doped spacer layers 283 and 293 may be composed of p-type AlGaAs layers, and the undoped spacer layers 292a, 292c, 295a, and 295c may be composed of undoped GaAs layers. An oxidative constriction layer 293a is disposed within the doped spacer layer 293. The oxidative constriction layer 293a is made of AlGaAs with a thickness of 30 nm. ０．９８ Ga ０．０２ It can be composed of an As layer.

[0216] The tunnel junction layer 294 is 10 １９ cm －３ The tunnel junction layer 294 may include p-type and n-type layers (not shown) that are highly doped to a certain degree or more. The highly doped p-type layer is located on the side of the tunnel junction layer 294 closer to the doped spacer layer 293. The highly doped n-type layer is located on the side of the tunnel junction layer 294 further from the doped spacer layer 293, in other words, closer to the doped spacer layer 291. By highly doping the p-type and n-type layers, the tunneling probability may be improved.

[0217] As described above, the light-emitting device 1 of this embodiment includes two p-i-n structures joined by a tunnel junction layer 294 within the resonator spacer 29, and is a two-junction type. As a result, compared to a single-junction type, the number of carriers generated within the resonator spacer 29 when the same current is injected is doubled, which can increase the optical power.

[0218] Although Figure 36 shows the layers constituting the light-emitting elements 20A and 20B in direct contact, other functional layers may be provided between any two of the contacting layers in Figure 36.

[0219] In this embodiment, a two-junction type light-emitting device 1 containing two p-i-n structures is shown as an example of a multi-junction type light-emitting device 1, but the light-emitting device 1 may contain three or more p-i-n structures.

[0220] In this embodiment, a modified example is shown in which the configuration of the second embodiment is transformed into a multi-junction type, but any of the first to thirteenth embodiments can also be transformed into a multi-junction type.

[0221] In this embodiment, a configuration in which an oxidative constriction layer 293a is arranged within the doped spacer layer 293 is illustrated, but the oxidative constriction layer 293a may not be present, and in this case as well, the effect of reducing variations in the pulse light emission timing can be obtained.

[0222] [Fifth Embodiment] The fifteenth embodiment of the distance measuring device will be described with reference to Figure 37. Figure 37 is a block diagram showing the schematic configuration of the distance measuring device according to this embodiment.

[0223] The distance measuring device 700 according to this embodiment is a distance measuring device (LiDAR device) in which a surface-emitting laser array, in which light-emitting elements described in any of the first to fourteenth embodiments are arranged in an array, is applied as the light source. The distance measuring device 700 may consist of a control unit 710, a surface-emitting laser array driver 712, a surface-emitting laser array 714, a light-emitting optical system 718, a light-receiving optical system 720, an image sensor 722, and a distance data processing unit 724.

[0224] The surface-emitting laser array 714 is a semiconductor device in which light-emitting elements described in any of the first to fourteenth embodiments are arranged in an array and mounted on a package. The surface-emitting laser array driver 712 is a drive unit that receives a drive signal from the control unit 710, generates a drive current for oscillating the surface-emitting laser array 714, and outputs it to the surface-emitting laser array 714. Note that the surface-emitting laser array 714 and the surface-emitting laser array driver 712 do not necessarily have to be separate components, and the functions of the surface-emitting laser array driver 712 may be provided by the surface-emitting laser array 714.

[0225] The light-emitting optical system 718 is an optical system that emits laser light generated by the surface-emitting laser array 714 toward the range to be measured. The light-receiving optical system 720 is an optical system that guides the laser light reflected by the object to be measured 1000 to the image sensor 722. In Figure 37, the light-emitting optical system 718 and the light-receiving optical system 720 are represented by a single convex lens-shaped component, but these are not composed of only a single convex lens-shaped component, but are composed of a lens group made up of multiple lenses.

[0226] The image sensor 722 is a photoelectric conversion device in which multiple pixels, including a photoelectric conversion unit, are arranged in a two-dimensional array, and is a light receiving device that outputs an electrical signal corresponding to the incident light. The image sensor 722 may be an imaging device such as a CMOS image sensor or a SPAD image sensor. The distance data processing unit 724 functions as a distance information acquisition unit that generates and outputs information regarding the distance to the object to be measured 1000 located within the distance measurement target range, based on the signal from the image sensor 722. The distance data processing unit 724 only needs to be electrically connected to the image sensor 722, and may be located in the same package as the image sensor 722, or in a separate package from the image sensor 722.

[0227] The control unit 710 is composed of an information processing device including a microcomputer and logic circuits, and functions as a central processing device that controls the operation of the distance measuring device 700, including the operation control of each part and various calculation processing.

[0228] Next, the operation of the distance measuring device according to this embodiment will be explained using Figure 37. First, the control unit 710 outputs a drive signal to the surface-emitting laser array driver 712. The surface-emitting laser array driver 712 receives the drive signal from the control unit 710 and injects a predetermined current into the surface-emitting laser array 714. As a result, the surface-emitting laser array 714 oscillates and laser light is output from the surface-emitting laser array 714.

[0229] The laser light generated by the surface-emitting laser array 714 is emitted by the light-emitting optical system 718 toward the range to be measured. Of the laser light irradiated onto the object to be measured 1000 within the range to be measured, the laser light reflected by the object to be measured 1000 and incident on the light-receiving optical system 720 is guided by the light-receiving optical system 720 to the image sensor 722.

[0230] Each pixel of the image sensor 722 generates an electrical signal pulse corresponding to the timing of the laser beam's incidence. The electrical signal pulses generated by the image sensor 722 are input to the distance data processing unit 724.

[0231] The distance data processing unit 724 generates distance information to the object to be measured 1000 along the direction of light propagation based on the timing of receiving the electrical signal pulses output from the image sensor 722. For example, it generates distance information to the object to be measured 1000 based on the time difference between the timing of light emission from the surface-emitting laser array 714 and the timing of light reception by the image sensor 722. By calculating distance information based on the electrical signal pulses output from each pixel of the image sensor 722, three-dimensional information of the object to be measured 1000 can be obtained.

[0232] The distance measuring device 700 of this embodiment can be applied, for example, to control devices in the automotive field to prevent collisions with other vehicles, or to control devices for automatic driving that follows other vehicles. Furthermore, the distance measuring device 700 of this embodiment can be applied not only to automobiles, but also to other moving objects (mobile devices) such as ships, aircraft, or industrial robots, as well as to mobile object detection systems. The distance measuring device 700 of this embodiment can be widely applied to devices that utilize information about objects recognized three-dimensionally, including distance information. These moving objects may be configured to include the distance measuring device of this embodiment and control means for controlling the moving object based on distance information acquired by the distance measuring device.

[0233] Furthermore, the three-dimensional information, including depth, obtainable by the distance measuring device 700 of this embodiment can also be used in image capture devices, image processing devices, display devices, etc. For example, it is possible to use the three-dimensional information obtained by the distance measuring device 700 of this embodiment to display a virtual object on top of a real-world image without any sense of incongruity. In addition, by saving the three-dimensional information together with the image information, it is possible to correct the blur of the captured image after shooting.

[0234] [16th Embodiment] The mobile body according to the 16th embodiment will be described with reference to Figures 38A and 38B. Figures 38A and 38B are block diagrams showing examples of the configuration of the mobile body according to this embodiment.

[0235] Figure 38A shows an example of the configuration of equipment mounted on a vehicle as an in-vehicle camera. Equipment 80 includes a distance measuring unit 803 that measures the distance to an object to be measured, and a collision determination unit 804 that determines whether or not there is a possibility of collision based on the distance measured by the distance measuring unit 803. The distance measuring unit 803 may be configured, for example, by the distance measuring device 700 described in the 15th embodiment. Here, the distance measuring unit 803 is an example of distance information acquisition means that acquires distance information to an object to be measured. That is, distance information is information related to the distance to an object to be measured, etc.

[0236] Device 80 is connected to a vehicle information acquisition device 810 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. Device 800 is also connected to a control ECU 820, which is a control device that outputs a control signal to generate braking force on the vehicle based on the judgment result of the collision judgment unit 804. Furthermore, device 80 is also connected to a warning device 830 that issues a warning to the driver based on the judgment result of the collision judgment unit 804. For example, if the collision judgment result of the collision judgment unit 804 indicates a high probability of collision, the control ECU 820 performs vehicle control to avoid a collision or mitigate damage by applying the brakes, releasing the accelerator, or suppressing engine output. The warning device 830 warns the user by sounding an alarm, displaying warning information on a screen such as a car navigation system, or vibrating the seat belt or steering wheel. These devices of device 80 function as a mobile control unit that controls the vehicle's operations as described above.

[0237] In this embodiment, the device 80 measures the distance around the vehicle, for example, in front of or behind it. Figure 38B shows the device when measuring the distance in front of the vehicle (distance measurement range 850). The vehicle information acquisition device 810, acting as a distance measurement control means, sends an instruction to the device 80 or the distance measurement unit 803 to perform the distance measurement operation. With this configuration, the accuracy of the distance measurement can be further improved.

[0238] The above example described controlling a vehicle to avoid collisions with other vehicles, but it can also be applied to control systems that automatically follow other vehicles, or control systems that automatically stay within their lane. Furthermore, the equipment is not limited to vehicles such as automobiles, but can be applied to mobile objects (mobile devices) such as ships, aircraft, satellites, industrial robots, and consumer robots. In addition, it can be applied not only to mobile objects, but also to a wide range of devices that utilize object recognition or biometric recognition, such as intelligent transportation systems (ITS) and surveillance systems.

[0239] [Modified Embodiments] This disclosure is not limited to the embodiments described above and can be modified in various ways. For example, an example in which a part of the configuration of one embodiment is added to another embodiment, or an example in which a part of the configuration of one embodiment is replaced with a part of the configuration of another embodiment, is also an embodiment of this disclosure.

[0240] The disclosures in this specification include the complements of the concepts described herein. That is, if this specification contains a statement such as "A is B" (A = B), the specification shall be deemed to disclose or suggest that "A is not B" (A ≠ B) even if a statement such as "A is not B" is omitted. This is because the statement "A is B" presupposes that the case where "A is not B" is being considered.

[0241] This disclosure can also be implemented by supplying a program that implements one or more of the functions of the above-described embodiments to a system or device via a network or storage medium, and by having one or more processors in the computer of that system or device read and execute the program. It can also be implemented by a circuit (e.g., ASIC) that implements one or more functions.

[0242] The embodiments described above are merely examples of concrete implementations in carrying out this disclosure, and the technical scope of this disclosure should not be limited by them. In other words, this disclosure is not limited to the embodiments described above, and various modifications and alterations are possible without deviating from the spirit and scope of this disclosure. Accordingly, the following claims are attached to make the scope of this disclosure public.

[0243] This application claims priority based on Japanese Patent Application No. 2024-167704, filed on 26 September 2024, and Japanese Patent Application No. 2025-138779, filed on 22 August 2025, and all of the contents of those applications are incorporated herein by reference.

[0244] 1 Light-emitting device 10 Semiconductor substrate 20A, 20B Light-emitting element 21 Lower DBR layer 22 Saturable absorption layer 23 Resonator spacer 24A, 24B Reflector 232b Active part 243a, 243b Upper insulating film

Claims

1. A light-emitting device having a plurality of light-emitting elements arranged on a common substrate, each of the plurality of light-emitting elements having a resonator including a first reflector, a second reflector, a saturable absorbing layer disposed between the first reflector and the second reflector, and an active layer disposed between the first reflector and the second reflector, wherein the current density of the drive current supplied to the first light-emitting element among the plurality of light-emitting elements is greater than the current density of the drive current supplied to the second light-emitting element among the plurality of light-emitting elements, and the amount of optical loss in the resonator of the first light-emitting element is greater than the amount of optical loss in the resonator of the second light-emitting element.

2. The light-emitting device according to claim 1, further comprising: a power supply pad disposed on the substrate for supplying a drive current to each of the plurality of light-emitting elements; and wiring that electrically connects each of the plurality of light-emitting elements to the power supply pad, wherein, in a plan view of the substrate, the length of the path between the first light-emitting element and the power supply pad on the wiring is shorter than the length of the path between the second light-emitting element and the power supply pad on the wiring.

3. The light-emitting device according to claim 2, characterized in that the power supply pad is arranged to surround the plurality of light-emitting elements.

4. The light-emitting device according to claim 2, characterized in that it has a plurality of electrically connected power supply pads, and two of the plurality of power supply pads are arranged to sandwich the plurality of light-emitting elements.

5. The light-emitting device according to any one of claims 1 to 4, characterized in that the plurality of light-emitting elements are arranged in a two-dimensional array when viewed in plan with respect to the substrate, and the second light-emitting element is positioned closer to the center of the two-dimensional array than the first light-emitting element.

6. The light-emitting device according to claim 5, characterized in that the plurality of light-emitting elements are arranged in a rectangular grid.

7. The light-emitting device according to claim 5, characterized in that the plurality of light-emitting elements are arranged in a triangular grid.

8. The light-emitting device according to any one of claims 1 to 7, characterized in that the reflectance of the second reflector of the first light-emitting element is smaller than the reflectance of the second reflector of the second light-emitting element.

9. The light-emitting device according to any one of claims 1 to 7, characterized in that the product of the reflectance of the first reflector of the first light-emitting element and the reflectance of the second reflector of the first light-emitting element is smaller than the product of the reflectance of the first reflector of the second light-emitting element and the reflectance of the second reflector of the second light-emitting element.

10. The light-emitting device according to any one of claims 1 to 9, wherein each of the plurality of light-emitting elements has a second reflector comprising a distributed Bragg mirror and a dielectric layer, and the thickness of the dielectric layer of the second reflector of the first light-emitting element is different from the thickness of the dielectric layer of the second reflector of the second light-emitting element.

11. The refractive index of the dielectric layer is n １ When the resonant wavelength of each of the plurality of light-emitting elements is λ, the thickness of the dielectric layer of the second reflector of the second light-emitting element is λ / (2n) greater than the thickness of the dielectric layer of the second reflector of the first light-emitting element. １ The light-emitting device according to claim 10, characterized in that it is close to a natural number multiple of ).

12. The light-emitting device according to any one of claims 1 to 9, wherein the second reflector of each of the plurality of light-emitting elements includes a distributed Bragg reflector, and the number of layers constituting the distributed Bragg reflector of the second reflector of the first light-emitting element is less than the number of layers constituting the distributed Bragg reflector of the second reflector of the second light-emitting element.

13. The light-emitting device according to claim 12, characterized in that the distributed Bragg mirror of the second reflector of the second light-emitting element includes a portion made of a semiconductor and a portion made of a dielectric.

14. The light-emitting device according to any one of claims 1 to 9, wherein each of the plurality of light-emitting elements has a second reflector comprising a distributed Bragg reflector and a transparent conductive layer, and the thickness of the transparent conductive layer of the second reflector of the first light-emitting element is different from the thickness of the transparent conductive layer of the second reflector of the second light-emitting element.

15. The refractive index of the transparent conductive layer is n ２ When the resonant wavelength of each of the plurality of light-emitting elements is λ, the thickness of the transparent conductive layer of the second reflector of the second light-emitting element is λ / (2n) greater than the thickness of the transparent conductive layer of the second reflector of the first light-emitting element. ２ The light-emitting device according to claim 14, characterized in that it is close to a natural number multiple of ).

16. The light-emitting device according to any one of claims 1 to 9, characterized in that the resonator of the first light-emitting element further includes an optical loss layer.

17. The light-emitting device according to claim 16, characterized in that the optical loss layer absorbs light propagating through the resonator.

18. The light-emitting device according to claim 16, characterized in that the optical loss layer scatters light propagating through the resonator.

19. The light-emitting device according to any one of claims 1 to 18, characterized in that the current density of the drive current supplied to the third light-emitting element among the plurality of light-emitting elements is smaller than the current density of the drive current supplied to the first light-emitting element and larger than the current density of the drive current supplied to the second light-emitting element, and the amount of optical loss of the resonator of the third light-emitting element is smaller than the amount of optical loss in the resonator of the first light-emitting element and larger than the amount of optical loss in the resonator of the second light-emitting element.

20. The light-emitting device according to claim 19, characterized in that, in a plan view with respect to the substrate, the third light-emitting element is arranged between the first light-emitting element and the second light-emitting element.

21. The light-emitting device according to claim 1, further comprising: a power supply pad for supplying a drive current to each of the plurality of light-emitting elements; and wiring for electrically connecting each of the plurality of light-emitting elements to the power supply pad, wherein the plurality of light-emitting elements include light-emitting elements arranged in a first region less than a first distance from the power supply pad and light-emitting elements arranged in a second region at or above the first distance from the power supply pad, and the wiring comprises a first wiring and a second wiring, wherein the first wiring is in contact with each of the plurality of light-emitting elements, the first wiring and the second wiring are not in contact in the first region but are in contact in the second region, and the end of the portion of the first wiring and the second wiring that is in contact with each other on the first region side is located between adjacent light-emitting elements across the boundary between the first region and the second region.

22. The light-emitting device according to claim 1, further comprising a power supply pad for supplying a drive current to each of the plurality of light-emitting elements, a wiring for electrically connecting each of the plurality of light-emitting elements to the power supply pad, and wherein the plurality of light-emitting elements are divided into a plurality of groups, each having at least one of the light-emitting elements, according to the distance on the wiring from the power supply pad, and the light-emitting elements are configured to have a larger resistance value for groups with a shorter distance on the wiring from the power supply pad.

23. The light-emitting apparatus according to any one of claims 1 to 22, characterized in that the active layer includes a barrier layer and a quantum well layer, and the band gap difference between the barrier layer and the quantum well layer is 60 meV or more and 230 meV or less.

24. The light-emitting apparatus according to any one of claims 1 to 22, characterized in that the active layer includes a barrier layer and a quantum well layer, and the band gap difference between the barrier layer and the quantum well layer is 105 meV or more and 230 meV or less.

25. The light-emitting device according to any one of claims 1 to 24, characterized in that the resonator further comprises a plurality of active layers disposed between the first reflector and the second reflector, and a tunnel junction layer disposed between two of the plurality of active layers.

26. A distance measuring device comprising: a light-emitting device according to any one of claims 1 to 25; a light-receiving device that receives light emitted from the light-emitting device and reflected by an object to be measured; and a distance information acquisition unit that acquires information regarding the distance to the object to be measured based on the time difference between the timing at which light is emitted from the light-emitting device and the timing at which the light-receiving device receives the light.

27. A mobile body comprising: a distance measuring device as described in claim 26; and control means for controlling the mobile body based on distance information acquired by the distance measuring device.

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