Shift-invariant LDPC convolutional coding
Shift-invariant LDPC convolutional coding addresses inefficiencies in traditional LDPC block codes by providing a compact and efficient encoding and decoding process, enhancing wireless communication efficiency and flexibility in code construction.
Patent Information
- Application Number
- PCT/CN2024/123577
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-10-09
- Publication Date
- 2026-04-16
AI Technical Summary
Traditional LDPC block codes face inefficiencies in achieving channel capacity and high complexity in encoding and decoding processes, limiting their suitability for high parallel processing applications in wireless communication systems like 5G NR.
Implementing shift-invariant LDPC convolutional coding with a structured irregularity, which allows for compact representation and efficient encoding and decoding processes, reducing complexity and enhancing flexibility in code construction.
The shift-invariant LDPC convolutional coding reduces encoding and decoding complexity, enabling improved wireless communication efficiency and flexibility in code selection for various conditions.
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Figure CN2024123577_16042026_PF_FP_ABST
Abstract
Description
SHIFT-INVARIANT LDPC CONVOLUTIONAL CODINGTECHNICAL FIELD
[0001] The present disclosure relates generally to communication systems and, more particularly, to shift-invariant low-density parity-check (LDPC) convolutional coding in wireless communication.
[0002] INTRODUCTION
[0003] Wireless communication systems are widely deployed to provide various telecommunication services such as telephony, video, data, messaging, and broadcasts. Typical wireless communication systems may employ multiple-access technologies capable of supporting communication with multiple users by sharing available system resources. Examples of such multiple-access technologies include code division multiple access (CDMA) systems, time division multiple access (TDMA) systems, frequency division multiple access (FDMA) systems, orthogonal frequency division multiple access (OFDMA) systems, single-carrier frequency division multiple access (SC-FDMA) systems, and time division synchronous code division multiple access (TD-SCDMA) systems.
[0004] These multiple access technologies have been adopted in various telecommunication standards to provide a common protocol that enables different wireless devices to communicate on a municipal, national, regional, and even global level. An example telecommunication standard is 5G New Radio (NR) . 5G NR is part of a continuous mobile broadband evolution promulgated by Third Generation Partnership Project (3GPP) to meet new requirements associated with latency, reliability, security, scalability (e.g., with Internet of Things (IoT) ) , and other requirements. 5G NR includes services associated with enhanced mobile broadband (eMBB) , massive machine type communications (mMTC) , and ultra-reliable low latency communications (URLLC) . Some aspects of 5G NR may be based on the 4G Long Term Evolution (LTE) standard. There exists a need for further improvements in 5G NR technology. These improvements may also be applicable to other multi-access technologies and the telecommunication standards that employ these technologies.
[0005] BRIEF SUMMARY
[0006] The following presents a simplified summary of one or more aspects in order to provide a basic understanding of such aspects. This summary is not an extensive overview of all contemplated aspects. This summary neither identifies key or critical elements of all aspects nor delineates the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed description that is presented later.
[0007] In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided for wireless communication at a first device. The first device may be, for example, a user equipment (UE) . The apparatus may include at least one memory and at least one processor coupled to the at least one memory. Based at least in part on information stored in the at least one memory, the at least one processor, individually or in any combination, may be configured to encode an input signal into an encoded signal using a shift-invariant low-density parity-check (LDPC) convolutional code, where the shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph. The LDPC shift-invariant graph includes a first plurality of streams of check nodes and a second plurality of streams of variable nodes, and an LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes. The at least one processor, individually or in any combination, may be further configured to transmit, to a second device, the encoded signal. The encoded signal includes coded bits corresponding to the second plurality of streams of variable nodes.
[0008] In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided for wireless communication at a receiving device. The receiving device may be, for example, a network entity. The apparatus may include at least one memory and at least one processor coupled to the at least one memory. Based at least in part on information stored in the at least one memory, the at least one processor, individually or in any combination, may be configured to receive, from a transmitting device, an encoded signal, where the encoded signal is encoded using a shift-invariant LDPC convolutional coding, where the shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph. The LDPC shift-invariant graph includes a first plurality of streams of check nodes and a second plurality of streams of variable nodes, and the LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes. The at least one processor, individually or in any combination, may be configured to decode the encoded signal to obtain a decoded signal.
[0009] To the accomplishment of the foregoing and related ends, the one or more aspects may include the features hereinafter fully described and particularly pointed out in the claims. The following description and the drawings set forth in detail certain illustrative features of the one or more aspects. These features are indicative, however, of but a few of the various ways in which the principles of various aspects may be employed.BRIEF DESCRIPTION OF THE DRAWINGS
[0010] FIG. 1 is a diagram illustrating an example of a wireless communication system and an access network.
[0011] FIG. 2A is a diagram illustrating an example of a first frame, in accordance with various aspects of the present disclosure.
[0012] FIG. 2B is a diagram illustrating an example of downlink (DL) channels within a subframe, in accordance with various aspects of the present disclosure.
[0013] FIG. 2C is a diagram illustrating an example of a second frame, in accordance with various aspects of the present disclosure.
[0014] FIG. 2D is a diagram illustrating an example of uplink (UL) channels within a subframe, in accordance with various aspects of the present disclosure.
[0015] FIG. 3 is a diagram illustrating an example of a base station and user equipment (UE) in an access network.
[0016] FIG. 4 is a diagram illustrating the examples of base graphs for low-density parity-check (LDPC) block coding.
[0017] FIG. 5 is a diagram illustrating an example of spatially coupled LDPC block codes.
[0018] FIG. 6 is a diagram illustrating an example of an LDPC base matrix in accordance with various aspects of the present disclosure.
[0019] FIG. 7 is a diagram illustrating an LDPC base graph associated with an LDPC base matrix in accordance with various aspects of the present disclosure.
[0020] FIG. 8 is a diagram illustrating an example of an LDPC shift-invariant graph in accordance with various aspects of the present disclosure.
[0021] FIG. 9 is a diagram illustrating an example of an LDPC shift-invariant graph in accordance with various aspects of the present disclosure.
[0022] FIG. 10 is a diagram illustrating an example of a linear filter representation based on the shift-invariant LDPC convolutional coding in accordance with various aspects of the present disclosure.
[0023] FIG. 11 is a diagram illustrating an example of using a shift-window for decoding based on the shift-invariant LDPC convolutional coding in accordance with various aspects of the present disclosure.
[0024] FIG. 12 is a diagram 1200 illustrating an example of code block (CB) -based data structuring based on the shift-invariant LDPC convolutional coding in accordance with various aspects of the present disclosure.
[0025] FIG. 13 is a diagram 1300 illustrating an example of transport block (TB) -based data structuring based on the shift-invariant LDPC convolutional coding in accordance with various aspects of the present disclosure.
[0026] FIG. 14 is a diagram illustrating an example of the selection of LDPC coding strategies based on the code block size in accordance with various aspects of the present disclosure.
[0027] FIG. 15 is a diagram illustrating an example of the selection of LDPC coding strategies based on the modulation scheme employed in accordance with various aspects of the present disclosure.
[0028] FIG. 16 is a diagram illustrating an example of a tail-biting LDPC shift-invariant graph in accordance with various aspects of the present disclosure.
[0029] FIG. 17 is a call flow diagram illustrating a method of wireless communication in accordance with various aspects of the present disclosure.
[0030] FIG. 18 is a flowchart illustrating methods of wireless communication at a first device in accordance with various aspects of the present disclosure.
[0031] FIG. 19 is a flowchart illustrating methods of wireless communication at a first device in accordance with various aspects of the present disclosure.
[0032] FIG. 20 is a flowchart illustrating methods of wireless communication at a receiving device in accordance with various aspects of the present disclosure.
[0033] FIG. 21 is a flowchart illustrating methods of wireless communication at a receiving device in accordance with various aspects of the present disclosure.
[0034] FIG. 22 is a diagram illustrating an example of a hardware implementation for an example apparatus and / or UE.
[0035] FIG. 23 is a diagram illustrating an example of a hardware implementation for an example network entity.DETAILED DESCRIPTION
[0036] Low-density parity-check (LDPC) block coding may be used in the field of wireless communication. For example, LDPC has been used in many communication systems such as 5G New Radio (NR) and Wi-Fi. However, it remains uncertain whether traditional LDPC block codes, such as protograph-based quasi-cyclic LDPC codes, can achieve the full channel capacity. For example, the efficiency gap relative to optimal decoding methods like maximum a posteriori (MAP) decoding remains unclear. Additionally, spatially coupled LDPC block codes may suffer from large complexities in their description. For example, their graph representations and the connections between nodes via edges in a spatial direction may involve extensive information. This complexity reduces their suitability for high parallel processing applications, complicating both the encoding and decoding processes. Example aspects presented herein provide improved aspects for implementing an LDPC convolutional coding for wireless communication. In some examples, the LDPC convolutional coding may be applied for wireless communication systems such as 6G wireless communication, among other examples. Example aspects presented herein provide a new form of LDPC coding with a shift-invariant convolutional structure with structured irregularity. This new coding approach may be compactly described and support efficient encoding and low-complexity decoding with its threshold saturation properties.
[0037] Various aspects relate generally to wireless communication. Some aspects more specifically relate to shift-invariant LDPC convolutional coding in wireless communication. In some examples, a first device encodes an input signal into an encoded signal using a shift-invariant LDPC convolutional coding. The shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph. The LDPC shift-invariant graph includes a first plurality of streams of check nodes and a second plurality of streams of variable nodes, and the LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes. The first device further transmits the encoded signal to a second device, and the encoded signal includes coded bits corresponding to the second plurality of streams of variable nodes. In some aspects, the first device may encode the input signal into the encoded signal using the shift-invariant LDPC convolutional coding when a convolutional coding condition has been met, and the first device may encode the input signal into the encoded signal using an LDPC block code when the convolutional coding condition has not been met. In some aspects, the first device may retransmit the shift-invariant LDPC convolutional coding corresponding to one virtual CB of the multiple virtual CBs or one virtual TB of the multiple virtual TBs when a decode failure on the one virtual CB or the one virtual TB was identified.
[0038] Particular aspects of the subject matter described in this disclosure can be implemented to realize one or more of the following potential advantages. In some examples, by enabling a more compact representation of codes compared to traditional spatially coupled LDPC block codes, the described techniques reduce the complexity in the encoding and decoding processes, thereby enhancing wireless communication efficiency. In some examples, by enabling the selection of a coding scheme (e.g., LDPC block coding or LDPC convolutional coding) based on code rate and code block size, the described techniques allow for the coding scheme to be tailored to actual conditions, thereby increasing the flexibility in code construction.
[0039] The detailed description set forth below in connection with the drawings describes various configurations and does not represent the only configurations in which the concepts described herein may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of various concepts. However, these concepts may be practiced without these specific details. In some instances, well known structures and components are shown in block diagram form in order to avoid obscuring such concepts.
[0040] Several aspects of telecommunication systems are presented with reference to various apparatus and methods. These apparatus and methods are described in the following detailed description and illustrated in the accompanying drawings by various blocks, components, circuits, processes, algorithms, etc. (collectively referred to as “elements” ) . These elements may be implemented using electronic hardware, computer software, or any combination thereof. Whether such elements are implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system.
[0041] By way of example, an element, or any portion of an element, or any combination of elements may be implemented as a “processing system” that includes one or more processors. When multiple processors are implemented, the multiple processors may perform the functions individually or in combination. Examples of processors include microprocessors, microcontrollers, graphics processing units (GPUs) , central processing units (CPUs) , application processors, digital signal processors (DSPs) , reduced instruction set computing (RISC) processors, systems on a chip (SoC) , baseband processors, field programmable gate arrays (FPGAs) , programmable logic devices (PLDs) , state machines, gated logic, discrete hardware circuits, and other suitable hardware configured to perform the various functionality described throughout this disclosure. One or more processors in the processing system may execute software. Software, whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise, shall be construed broadly to mean instructions, instruction sets, code, code segments, program code, programs, subprograms, software components, applications, software applications, software packages, routines, subroutines, objects, executables, threads of execution, procedures, functions, or any combination thereof.
[0042] Accordingly, in one or more example aspects, implementations, and / or use cases, the functions described may be implemented in hardware, software, or any combination thereof. If implemented in software, the functions may be stored on or encoded as one or more instructions or code on a computer-readable medium. Computer-readable media includes computer storage media. Storage media may be any available media that can be accessed by a computer. By way of example, such computer-readable media can include a random-access memory (RAM) , a read-only memory (ROM) , an electrically erasable programmable ROM (EEPROM) , optical disk storage, magnetic disk storage, other magnetic storage devices, combinations of the types of computer- readable media, or any other medium that can be used to store computer executable code in the form of instructions or data structures that can be accessed by a computer.
[0043] While aspects, implementations, and / or use cases are described in this application by illustration to some examples, additional or different aspects, implementations and / or use cases may come about in many different arrangements and scenarios. Aspects, implementations, and / or use cases described herein may be implemented across many differing platform types, devices, systems, shapes, sizes, and packaging arrangements. For example, aspects, implementations, and / or use cases may come about via integrated chip implementations and other non-module-component based devices (e.g., end-user devices, vehicles, communication devices, computing devices, industrial equipment, retail / purchasing devices, medical devices, artificial intelligence (AI) -enabled devices, etc. ) . While some examples may or may not be specifically directed to use cases or applications, a wide assortment of applicability of described examples may occur. Aspects, implementations, and / or use cases may range a spectrum from chip-level or modular components to non-modular, non-chip-level implementations and further to aggregate, distributed, or original equipment manufacturer (OEM) devices or systems incorporating one or more techniques herein. In some practical settings, devices incorporating described aspects and features may also include additional components and features for implementation and practice of claimed and described aspect. For example, transmission and reception of wireless signals necessarily includes a number of components for analog and digital purposes (e.g., hardware components including antenna, RF-chains, power amplifiers, modulators, buffer, processor (s) , interleaver, adders / summers, etc. ) . Techniques described herein may be practiced in a wide variety of devices, chip-level components, systems, distributed arrangements, aggregated or disaggregated components, end-user devices, etc. of varying sizes, shapes, and constitution.
[0044] Deployment of communication systems, such as 5G NR systems, may be arranged in multiple manners with various components or constituent parts. In a 5G NR system, or network, a network node, a network entity, a mobility element of a network, a radio access network (RAN) node, a core network node, a network element, or a network equipment, such as a base station (BS) , or one or more units (or one or more components) performing base station functionality, may be implemented in an aggregated or disaggregated architecture. For example, a BS (such as a Node B (NB) , evolved NB (eNB) , NR BS, 5G NB, access point (AP) , a transmission reception point (TRP) , or a cell, etc. ) may be implemented as an aggregated base station (also known as a standalone BS or a monolithic BS) or a disaggregated base station.
[0045] An aggregated base station may be configured to utilize a radio protocol stack that is physically or logically integrated within a single RAN node. A disaggregated base station may be configured to utilize a protocol stack that is physically or logically distributed among two or more units (such as one or more central or centralized units (CUs) , one or more distributed units (DUs) , or one or more radio units (RUs) ) . In some aspects, a CU may be implemented within a RAN node, and one or more DUs may be co-located with the CU, or alternatively, may be geographically or virtually distributed throughout one or multiple other RAN nodes. The DUs may be implemented to communicate with one or more RUs. Each of the CU, DU and RU can be implemented as virtual units, i.e., a virtual central unit (VCU) , a virtual distributed unit (VDU) , or a virtual radio unit (VRU) .
[0046] Base station operation or network design may consider aggregation characteristics of base station functionality. For example, disaggregated base stations may be utilized in an integrated access backhaul (IAB) network, an open radio access network (O-RAN (such as the network configuration sponsored by the O-RAN Alliance) ) , or a virtualized radio access network (vRAN, also known as a cloud radio access network (C-RAN) ) . Disaggregation may include distributing functionality across two or more units at various physical locations, as well as distributing functionality for at least one unit virtually, which can enable flexibility in network design. The various units of the disaggregated base station, or disaggregated RAN architecture, can be configured for wired or wireless communication with at least one other unit.
[0047] FIG. 1 is a diagram 100 illustrating an example of a wireless communications system and an access network. The illustrated wireless communications system includes a disaggregated base station architecture. The disaggregated base station architecture may include one or more CUs 110 that can communicate directly with a core network 120 via a backhaul link, or indirectly with the core network 120 through one or more disaggregated base station units (such as a Near-Real Time (Near-RT) RAN Intelligent Controller (RIC) 125 via an E2 link, or a Non-Real Time (Non-RT) RIC 115 associated with a Service Management and Orchestration (SMO) Framework 105, or both) . A CU 110 may communicate with one or more DUs 130 via respective midhaul links, such as an F1 interface. The DUs 130 may communicate with one or more RUs 140 via respective fronthaul links. The RUs 140 may communicate with respective UEs 104 via one or more radio frequency (RF) access links. In some implementations, the UE 104 may be simultaneously served by multiple RUs 140.
[0048] Each of the units, i.e., the CUs 110, the DUs 130, the RUs 140, as well as the Near-RT RICs 125, the Non-RT RICs 115, and the SMO Framework 105, may include one or more interfaces or be coupled to one or more interfaces configured to receive or to transmit signals, data, or information (collectively, signals) via a wired or wireless transmission medium. Each of the units, or an associated processor or controller providing instructions to the communication interfaces of the units, can be configured to communicate with one or more of the other units via the transmission medium. For example, the units can include a wired interface configured to receive or to transmit signals over a wired transmission medium to one or more of the other units. Additionally, the units can include a wireless interface, which may include a receiver, a transmitter, or a transceiver (such as an RF transceiver) , configured to receive or to transmit signals, or both, over a wireless transmission medium to one or more of the other units.
[0049] In some aspects, the CU 110 may host one or more higher layer control functions. Such control functions can include radio resource control (RRC) , packet data convergence protocol (PDCP) , service data adaptation protocol (SDAP) , or the like. Each control function can be implemented with an interface configured to communicate signals with other control functions hosted by the CU 110. The CU 110 may be configured to handle user plane functionality (i.e., Central Unit –User Plane (CU-UP) ) , control plane functionality (i.e., Central Unit –Control Plane (CU-CP) ) , or a combination thereof. In some implementations, the CU 110 can be logically split into one or more CU-UP units and one or more CU-CP units. The CU-UP unit can communicate bidirectionally with the CU-CP unit via an interface, such as an E1 interface when implemented in an O-RAN configuration. The CU 110 can be implemented to communicate with the DU 130, as necessary, for network control and signaling.
[0050] The DU 130 may correspond to a logical unit that includes one or more base station functions to control the operation of one or more RUs 140. In some aspects, the DU 130 may host one or more of a radio link control (RLC) layer, a medium access control (MAC) layer, and one or more high physical (PHY) layers (such as modules for forward error correction (FEC) encoding and decoding, scrambling, modulation, demodulation, or the like) depending, at least in part, on a functional split, such as those defined by 3GPP. In some aspects, the DU 130 may further host one or more low PHY layers. Each layer (or module) can be implemented with an interface configured to communicate signals with other layers (and modules) hosted by the DU 130, or with the control functions hosted by the CU 110.
[0051] Lower-layer functionality can be implemented by one or more RUs 140. In some deployments, an RU 140, controlled by a DU 130, may correspond to a logical node that hosts RF processing functions, or low-PHY layer functions (such as performing fast Fourier transform (FFT) , inverse FFT (iFFT) , digital beamforming, physical random access channel (PRACH) extraction and filtering, or the like) , or both, based at least in part on the functional split, such as a lower layer functional split. In such an architecture, the RU (s) 140 can be implemented to handle over the air (OTA) communication with one or more UEs 104. In some implementations, real-time and non-real-time aspects of control and user plane communication with the RU (s) 140 can be controlled by the corresponding DU 130. In some scenarios, this configuration can enable the DU (s) 130 and the CU 110 to be implemented in a cloud-based RAN architecture, such as a vRAN architecture.
[0052] The SMO Framework 105 may be configured to support RAN deployment and provisioning of non-virtualized and virtualized network elements. For non-virtualized network elements, the SMO Framework 105 may be configured to support the deployment of dedicated physical resources for RAN coverage requirements that may be managed via an operations and maintenance interface (such as an O1 interface) . For virtualized network elements, the SMO Framework 105 may be configured to interact with a cloud computing platform (such as an open cloud (O-Cloud) 190) to perform network element life cycle management (such as to instantiate virtualized network elements) via a cloud computing platform interface (such as an O2 interface) . Such virtualized network elements can include, but are not limited to, CUs 110, DUs 130, RUs 140 and Near-RT RICs 125. In some implementations, the SMO Framework 105 can communicate with a hardware aspect of a 4G RAN, such as an open eNB (O-eNB) 111, via an O1 interface. Additionally, in some implementations, the SMO Framework 105 can communicate directly with one or more RUs 140 via an O1 interface. The SMO Framework 105 also may include a Non-RT RIC 115 configured to support functionality of the SMO Framework 105.
[0053] The Non-RT RIC 115 may be configured to include a logical function that enables non-real-time control and optimization of RAN elements and resources, artificial intelligence (AI) / machine learning (ML) (AI / ML) workflows including model training and updates, or policy-based guidance of applications / features in the Near-RT RIC 125. The Non-RT RIC 115 may be coupled to or communicate with (such as via an A1 interface) the Near-RT RIC 125. The Near-RT RIC 125 may be configured to include a logical function that enables near-real-time control and optimization of RAN elements and resources via data collection and actions over an interface (such as via an E2 interface) connecting one or more CUs 110, one or more DUs 130, or both, as well as an O-eNB, with the Near-RT RIC 125.
[0054] In some implementations, to generate AI / ML models to be deployed in the Near-RT RIC 125, the Non-RT RIC 115 may receive parameters or external enrichment information from external servers. Such information may be utilized by the Near-RT RIC 125 and may be received at the SMO Framework 105 or the Non-RT RIC 115 from non-network data sources or from network functions. In some examples, the Non-RT RIC 115 or the Near-RT RIC 125 may be configured to tune RAN behavior or performance. For example, the Non-RT RIC 115 may monitor long-term trends and patterns for performance and employ AI / ML models to perform corrective actions through the SMO Framework 105 (such as reconfiguration via O1) or via creation of RAN management policies (such as A1 policies) .
[0055] At least one of the CU 110, the DU 130, and the RU 140 may be referred to as a base station 102. Accordingly, a base station 102 may include one or more of the CU 110, the DU 130, and the RU 140 (each component indicated with dotted lines to signify that each component may or may not be included in the base station 102) . The base station 102 provides an access point to the core network 120 for a UE 104. The base station 102 may include macrocells (high power cellular base station) and / or small cells (low power cellular base station) . The small cells include femtocells, picocells, and microcells. A network that includes both small cell and macrocells may be known as a heterogeneous network. A heterogeneous network may also include Home Evolved Node Bs (eNBs) (HeNBs) , which may provide service to a restricted group known as a closed subscriber group (CSG) . The communication links between the RUs 140 and the UEs 104 may include uplink (UL) (also referred to as reverse link) transmissions from a UE 104 to an RU 140 and / or downlink (DL) (also referred to as forward link) transmissions from an RU 140 to a UE 104. The communication links may use multiple-input and multiple-output (MIMO) antenna technology, including spatial multiplexing, beamforming, and / or transmit diversity. The communication links may be through one or more carriers. The base station 102 / UEs 104 may use spectrum up to Y MHz (e.g., 5, 10, 15, 20, 100, 400, etc. MHz) bandwidth per carrier allocated in a carrier aggregation of up to a total of Yx MHz (x component carriers) used for transmission in each direction. The carriers may or may not be adjacent to each other. Allocation of carriers may be asymmetric with respect to DL and UL (e.g., more or fewer carriers may be allocated for DL than for UL) . The component carriers may include a primary component carrier and one or more secondary component carriers. A primary component carrier may be referred to as a primary cell (PCell) and a secondary component carrier may be referred to as a secondary cell (SCell) .
[0056] Certain UEs 104 may communicate with each other using device-to-device (D2D) communication link 158. The D2D communication link 158 may use the DL / UL wireless wide area network (WWAN) spectrum. The D2D communication link 158 may use one or more sidelink channels, such as a physical sidelink broadcast channel (PSBCH) , a physical sidelink discovery channel (PSDCH) , a physical sidelink shared channel (PSSCH) , and a physical sidelink control channel (PSCCH) . D2D communication may be through a variety of wireless D2D communications systems, such as for example, BluetoothTM (Bluetooth is a trademark of the Bluetooth Special Interest Group (SIG) ) , Wi-FiTM (Wi-Fi is a trademark of the Wi-Fi Alliance) based on the Institute of Electrical and Electronics Engineers (IEEE) 802.11 standard, LTE, or NR.
[0057] The wireless communications system may further include a Wi-Fi AP 150 in communication with UEs 104 (also referred to as Wi-Fi stations (STAs) ) via communication link 154, e.g., in a 5 GHz unlicensed frequency spectrum or the like. When communicating in an unlicensed frequency spectrum, the UEs 104 / AP 150 may perform a clear channel assessment (CCA) prior to communicating in order to determine whether the channel is available.
[0058] The electromagnetic spectrum is often subdivided, based on frequency / wavelength, into various classes, bands, channels, etc. In 5G NR, two initial operating bands have been identified as frequency range designations FR1 (410 MHz –7.125 GHz) and FR2 (24.25 GHz –52.6 GHz) . Although a portion of FR1 is greater than 6 GHz, FR1 is often referred to (interchangeably) as a “sub-6 GHz” band in various documents and articles. A similar nomenclature issue sometimes occurs with regard to FR2, which is often referred to (interchangeably) as a “millimeter wave” band in documents and articles, despite being different from the extremely high frequency (EHF) band (30 GHz –300 GHz) which is identified by the International Telecommunications Union (ITU) as a “millimeter wave” band.
[0059] The frequencies between FR1 and FR2 are often referred to as mid-band frequencies. Recent 5G NR studies have identified an operating band for these mid-band frequencies as frequency range designation FR3 (7.125 GHz –24.25 GHz) . Frequency bands falling within FR3 may inherit FR1 characteristics and / or FR2 characteristics, and thus may effectively extend features of FR1 and / or FR2 into mid-band frequencies. In addition, higher frequency bands are currently being explored to extend 5G NR operation beyond 52.6 GHz. For example, three higher operating bands have been identified as frequency range designations FR2-2 (52.6 GHz –71 GHz) , FR4 (71 GHz –114.25 GHz) , and FR5 (114.25 GHz –300 GHz) . Each of these higher frequency bands falls within the EHF band.
[0060] With the above aspects in mind, unless specifically stated otherwise, the term “sub-6 GHz” or the like if used herein may broadly represent frequencies that may be less than 6 GHz, may be within FR1, or may include mid-band frequencies. Further, unless specifically stated otherwise, the term “millimeter wave” or the like if used herein may broadly represent frequencies that may include mid-band frequencies, may be within FR2, FR4, FR2-2, and / or FR5, or may be within the EHF band.
[0061] The base station 102 and the UE 104 may each include a plurality of antennas, such as antenna elements, antenna panels, and / or antenna arrays to facilitate beamforming. The base station 102 may transmit a beamformed signal 182 to the UE 104 in one or more transmit directions. The UE 104 may receive the beamformed signal from the base station 102 in one or more receive directions. The UE 104 may also transmit a beamformed signal 184 to the base station 102 in one or more transmit directions. The base station 102 may receive the beamformed signal from the UE 104 in one or more receive directions. The base station 102 / UE 104 may perform beam training to determine the best receive and transmit directions for each of the base station 102 / UE 104. The transmit and receive directions for the base station 102 may or may not be the same. The transmit and receive directions for the UE 104 may or may not be the same.
[0062] The base station 102 may include and / or be referred to as a gNB, Node B, eNB, an access point, a base transceiver station, a radio base station, a radio transceiver, a transceiver function, a basic service set (BSS) , an extended service set (ESS) , a TRP, network node, network entity, network equipment, or some other suitable terminology. The base station 102 can be implemented as an integrated access and backhaul (IAB) node, a relay node, a sidelink node, an aggregated (monolithic) base station with a baseband unit (BBU) (including a CU and a DU) and an RU, or as a disaggregated base station including one or more of a CU, a DU, and / or an RU. The set of base stations, which may include disaggregated base stations and / or aggregated base stations, may be referred to as next generation (NG) RAN (NG-RAN) .
[0063] The core network 120 may include an Access and Mobility Management Function (AMF) 161, a Session Management Function (SMF) 162, a User Plane Function (UPF) 163, a Unified Data Management (UDM) 164, one or more location servers 168, and other functional entities. The AMF 161 is the control node that processes the signaling between the UEs 104 and the core network 120. The AMF 161 supports registration management, connection management, mobility management, and other functions. The SMF 162 supports session management and other functions. The UPF 163 supports packet routing, packet forwarding, and other functions. The UDM 164 supports the generation of authentication and key agreement (AKA) credentials, user identification handling, access authorization, and subscription management. The one or more location servers 168 are illustrated as including a Gateway Mobile Location Center (GMLC) 165 and a Location Management Function (LMF) 166. However, generally, the one or more location servers 168 may include one or more location / positioning servers, which may include one or more of the GMLC 165, the LMF 166, a position determination entity (PDE) , a serving mobile location center (SMLC) , a mobile positioning center (MPC) , or the like. The GMLC 165 and the LMF 166 support UE location services. The GMLC 165 provides an interface for clients / applications (e.g., emergency services) for accessing UE positioning information. The LMF 166 receives measurements and assistance information from the NG-RAN and the UE 104 via the AMF 161 to compute the position of the UE 104. The NG-RAN may utilize one or more positioning methods in order to determine the position of the UE 104. Positioning the UE 104 may involve signal measurements, a position estimate, and an optional velocity computation based on the measurements. The signal measurements may be made by the UE 104 and / or the base station 102 serving the UE 104. The signals measured may be based on one or more of a satellite positioning system (SPS) 170 (e.g., one or more of a Global Navigation Satellite System (GNSS) , global position system (GPS) , non-terrestrial network (NTN) , or other satellite position / location system) , LTE signals, wireless local area network (WLAN) signals, Bluetooth signals, a terrestrial beacon system (TBS) , sensor-based information (e.g., barometric pressure sensor, motion sensor) , NR enhanced cell ID (NR E-CID) methods, NR signals (e.g., multi-round trip time (Multi-RTT) , DL angle-of-departure (DL-AoD) , DL time difference of arrival (DL-TDOA) , UL time difference of arrival (UL-TDOA) , and UL angle-of-arrival (UL-AoA) positioning) , and / or other systems / signals / sensors.
[0064] Examples of UEs 104 include a cellular phone, a smart phone, a session initiation protocol (SIP) phone, a laptop, a personal digital assistant (PDA) , a satellite radio, a global positioning system, a multimedia device, a video device, a digital audio player (e.g., MP3 player) , a camera, a game console, a tablet, a smart device, a wearable device, a vehicle, an electric meter, a gas pump, a large or small kitchen appliance, a healthcare device, an implant, a sensor / actuator, a display, or any other similar functioning device. Some of the UEs 104 may be referred to as IoT devices (e.g., parking meter, gas pump, toaster, vehicles, heart monitor, etc. ) . The UE 104 may also be referred to as a station, a mobile station, a subscriber station, a mobile unit, a subscriber unit, a wireless unit, a remote unit, a mobile device, a wireless device, a wireless communications device, a remote device, a mobile subscriber station, an access terminal, a mobile terminal, a wireless terminal, a remote terminal, a handset, a user agent, a mobile client, a client, or some other suitable terminology. In some scenarios, the term UE may also apply to one or more companion devices such as in a device constellation arrangement. One or more of these devices may collectively access the network and / or individually access the network.
[0065] Referring again to FIG. 1, in certain aspects, the UE 104 may include an LDPC component 198. The LDPC component 198 may be configured to encode an input signal into an encoded signal using a shift-invariant LDPC convolutional coding, where the shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph including a first plurality of streams of check nodes and a second plurality of streams of variable nodes, where an LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes; and transmit, to a second device, the encoded signal, where the encoded signal includes coded bits corresponding to the second plurality of streams of variable nodes. In certain aspects, the base station 102 may include an LDPC component 199. The LDPC component 199 may be configured to receive, from a transmitting device, an encoded signal, where the encoded signal is encoded using a shift-invariant LDPC convolutional coding, where the shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph including a first plurality of streams of check nodes and a second plurality of streams of variable nodes, wheres an LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes; and decode the encoded signal to obtain a decoded signal. Although the following description may be focused on 5G NR, the concepts described herein may be applicable to other similar areas, such as LTE, LTE-A, CDMA, GSM, and other wireless technologies.
[0066] FIG. 2A is a diagram 200 illustrating an example of a first subframe within a 5G NR frame structure. FIG. 2B is a diagram 230 illustrating an example of DL channels within a 5G NR subframe. FIG. 2C is a diagram 250 illustrating an example of a second subframe within a 5G NR frame structure. FIG. 2D is a diagram 280 illustrating an example of UL channels within a 5G NR subframe. The 5G NR frame structure may be frequency division duplexed (FDD) in which for a particular set of subcarriers (carrier system bandwidth) , subframes within the set of subcarriers are dedicated for either DL or UL, or may be time division duplexed (TDD) in which for a particular set of subcarriers (carrier system bandwidth) , subframes within the set of subcarriers are dedicated for both DL and UL. In the examples provided by FIGs. 2A, 2C, the 5G NR frame structure is assumed to be TDD, with subframe 4 being configured with slot format 28 (with mostly DL) , where D is DL, U is UL, and F is flexible for use between DL / UL, and subframe 3 being configured with slot format 1 (with all UL) . While subframes 3, 4 are shown with slot formats 1, 28, respectively, any particular subframe may be configured with any of the various available slot formats 0-61. Slot formats 0, 1 are all DL, UL, respectively. Other slot formats 2-61 include a mix of DL, UL, and flexible symbols. UEs are configured with the slot format (dynamically through DL control information (DCI) , or semi-statically / statically through radio resource control (RRC) signaling) through a received slot format indicator (SFI) . Note that the description infra applies also to a 5G NR frame structure that is TDD.
[0067] FIGs. 2A-2D illustrate a frame structure, and the aspects of the present disclosure may be applicable to other wireless communication technologies, which may have a different frame structure and / or different channels. A frame (10 ms) may be divided into 10 equally sized subframes (1 ms) . Each subframe may include one or more time slots. Subframes may also include mini-slots, which may include 7, 4, or 2 symbols. Each slot may include 14 or 12 symbols, depending on whether the cyclic prefix (CP) is normal or extended. For normal CP, each slot may include 14 symbols, and for extended CP, each slot may include 12 symbols. The symbols on DL may be CP orthogonal frequency division multiplexing (OFDM) (CP-OFDM) symbols. The symbols on UL may be CP-OFDM symbols (for high throughput scenarios) or discrete Fourier transform (DFT) spread OFDM (DFT-s-OFDM) symbols (for power limited scenarios; limited to a single stream transmission) . The number of slots within a subframe is based on the CP and the numerology. The numerology defines the subcarrier spacing (SCS) (see Table 1) . The symbol length / duration may scale with 1 / SCS.
[0068] Table 1: Numerology, SCS, and CP
[0069] For normal CP (14 symbols / slot) , different numerologies μ 0 to 4 allow for 1, 2, 4, 8, and 16 slots, respectively, per subframe. For extended CP, the numerology 2 allows for 4 slots per subframe. Accordingly, for normal CP and numerology μ, there are 14 symbols / slot and 2μ slots / subframe. The subcarrier spacing may be equal to 2μ*15 kHz, where μ is the numerology 0 to 4. As such, the numerology μ=0 has a subcarrier spacing of 15 kHz and the numerology μ=4 has a subcarrier spacing of 240 kHz. The symbol length / duration is inversely related to the subcarrier spacing. FIGs. 2A-2D provide an example of normal CP with 14 symbols per slot and numerology μ=2 with 4 slots per subframe. The slot duration is 0.25 ms, the subcarrier spacing is 60 kHz, and the symbol duration is approximately 16.67 μs. Within a set of frames, there may be one or more different bandwidth parts (BWPs) (see FIG. 2B) that are frequency division multiplexed. Each BWP may have a particular numerology and CP (normal or extended) .
[0070] A resource grid may be used to represent the frame structure. Each time slot includes a resource block (RB) (also referred to as physical RBs (PRBs) ) that extends 12 consecutive subcarriers. The resource grid is divided into multiple resource elements (REs) . The number of bits carried by each RE depends on the modulation scheme. As illustrated in FIG. 2A, some of the REs carry reference (pilot) signals (RS) for the UE. The RS may include demodulation RS (DM-RS) (indicated as R for one particular configuration, but other DM-RS configurations are possible) and channel state information reference signals (CSI-RS) for channel estimation at the UE. The RS may also include beam measurement RS (BRS) , beam refinement RS (BRRS) , and phase tracking RS (PT-RS) .
[0071] FIG. 2B illustrates an example of various DL channels within a subframe of a frame. The physical downlink control channel (PDCCH) carries DCI within one or more control channel elements (CCEs) (e.g., 1, 2, 4, 8, or 16 CCEs) , each CCE including six RE groups (REGs) , each REG including 12 consecutive REs in an OFDM symbol of an RB. A PDCCH within one BWP may be referred to as a control resource set (CORESET) . A UE is configured to monitor PDCCH candidates in a PDCCH search space (e.g., common search space, UE-specific search space) during PDCCH monitoring occasions on the CORESET, where the PDCCH candidates have different DCI formats and different aggregation levels. Additional BWPs may be located at greater and / or lower frequencies across the channel bandwidth. A primary synchronization signal (PSS) may be within symbol 2 of particular subframes of a frame. The PSS is used by a UE 104 to determine subframe / symbol timing and a physical layer identity. A secondary synchronization signal (SSS) may be within symbol 4 of particular subframes of a frame. The SSS is used by a UE to determine a physical layer cell identity group number and radio frame timing. Based on the physical layer identity and the physical layer cell identity group number, the UE can determine a physical cell identifier (PCI) . Based on the PCI, the UE can determine the locations of the DM-RS. The physical broadcast channel (PBCH) , which carries a master information block (MIB) , may be logically grouped with the PSS and SSS to form a synchronization signal (SS) / PBCH block (also referred to as SS block (SSB) ) . The MIB provides a number of RBs in the system bandwidth and a system frame number (SFN) . The physical downlink shared channel (PDSCH) carries user data, broadcast system information not transmitted through the PBCH such as system information blocks (SIBs) , and paging messages.
[0072] As illustrated in FIG. 2C, some of the REs carry DM-RS (indicated as R for one particular configuration, but other DM-RS configurations are possible) for channel estimation at the base station. The UE may transmit DM-RS for the physical uplink control channel (PUCCH) and DM-RS for the physical uplink shared channel (PUSCH) . The PUSCH DM-RS may be transmitted in the first one or two symbols of the PUSCH. The PUCCH DM-RS may be transmitted in different configurations depending on whether short or long PUCCHs are transmitted and depending on the particular PUCCH format used. The UE may transmit sounding reference signals (SRS) . The SRS may be transmitted in the last symbol of a subframe. The SRS may have a comb structure, and a UE may transmit SRS on one of the combs. The SRS may be used by a base station for channel quality estimation to enable frequency-dependent scheduling on the UL.
[0073] FIG. 2D illustrates an example of various UL channels within a subframe of a frame. The PUCCH may be located as indicated in one configuration. The PUCCH carries uplink control information (UCI) , such as scheduling requests, a channel quality indicator (CQI) , a precoding matrix indicator (PMI) , a rank indicator (RI) , and hybrid automatic repeat request (HARQ) acknowledgment (ACK) (HARQ-ACK) feedback (i.e., one or more HARQ ACK bits indicating one or more ACK and / or negative ACK (NACK) ) . The PUSCH carries data, and may additionally be used to carry a buffer status report (BSR) , a power headroom report (PHR) , and / or UCI.
[0074] FIG. 3 is a block diagram of a base station 310 in communication with a UE 350 in an access network. In the DL, Internet protocol (IP) packets may be provided to a controller / processor 375. The controller / processor 375 implements layer 3 and layer 2 functionality. Layer 3 includes a radio resource control (RRC) layer, and layer 2 includes a service data adaptation protocol (SDAP) layer, a packet data convergence protocol (PDCP) layer, a radio link control (RLC) layer, and a medium access control (MAC) layer. The controller / processor 375 provides RRC layer functionality associated with broadcasting of system information (e.g., MIB, SIBs) , RRC connection control (e.g., RRC connection paging, RRC connection establishment, RRC connection modification, and RRC connection release) , inter radio access technology (RAT) mobility, and measurement configuration for UE measurement reporting; PDCP layer functionality associated with header compression / decompression, security (ciphering, deciphering, integrity protection, integrity verification) , and handover support functions; RLC layer functionality associated with the transfer of upper layer packet data units (PDUs) , error correction through ARQ, concatenation, segmentation, and reassembly of RLC service data units (SDUs) , re-segmentation of RLC data PDUs, and reordering of RLC data PDUs; and MAC layer functionality associated with mapping between logical channels and transport channels, multiplexing of MAC SDUs onto transport blocks (TBs) , demultiplexing of MAC SDUs from TBs, scheduling information reporting, error correction through HARQ, priority handling, and logical channel prioritization. The transmit (TX) processor 316 and the receive (RX) processor 370 implement layer 1 functionality associated with various signal processing functions. Layer 1, which includes a physical (PHY) layer, may include error detection on the transport channels, forward error correction (FEC) coding / decoding of the transport channels, interleaving, rate matching, mapping onto physical channels, modulation / demodulation of physical channels, and MIMO antenna processing. The TX processor 316 handles mapping to signal constellations based on various modulation schemes (e.g., binary phase-shift keying (BPSK) , quadrature phase-shift keying (QPSK) , M-phase-shift keying (M-PSK) , M-quadrature amplitude modulation (M-QAM) ) . The coded and modulated symbols may then be split into parallel streams. Each stream may then be mapped to an OFDM subcarrier, multiplexed with a reference signal (e.g., pilot) in the time and / or frequency domain, and then combined together using an Inverse Fast Fourier Transform (IFFT) to produce a physical channel carrying a time domain OFDM symbol stream. The OFDM stream is spatially precoded to produce multiple spatial streams. Channel estimates from a channel estimator 374 may be used to determine the coding and modulation scheme, as well as for spatial processing. The channel estimate may be derived from a reference signal and / or channel condition feedback transmitted by the UE 350. Each spatial stream may then be provided to a different antenna 320 via a separate transmitter 318Tx. Each transmitter 318Tx may modulate a radio frequency (RF) carrier with a respective spatial stream for transmission.
[0075] At the UE 350, each receiver 354Rx receives a signal through its respective antenna 352. Each receiver 354Rx recovers information modulated onto an RF carrier and provides the information to the receive (RX) processor 356. The TX processor 368 and the RX processor 356 implement layer 1 functionality associated with various signal processing functions. The RX processor 356 may perform spatial processing on the information to recover any spatial streams destined for the UE 350. If multiple spatial streams are destined for the UE 350, they may be combined by the RX processor 356 into a single OFDM symbol stream. The RX processor 356 then converts the OFDM symbol stream from the time-domain to the frequency domain using a Fast Fourier Transform (FFT) . The frequency domain signal includes a separate OFDM symbol stream for each subcarrier of the OFDM signal. The symbols on each subcarrier, and the reference signal, are recovered and demodulated by determining the most likely signal constellation points transmitted by the base station 310. These soft decisions may be based on channel estimates computed by the channel estimator 358. The soft decisions are then decoded and deinterleaved to recover the data and control signals that were originally transmitted by the base station 310 on the physical channel. The data and control signals are then provided to the controller / processor 359, which implements layer 3 and layer 2 functionality.
[0076] The controller / processor 359 can be associated with at least one memory 360 that stores program codes and data. The at least one memory 360 may be referred to as a computer-readable medium. In the UL, the controller / processor 359 provides demultiplexing between transport and logical channels, packet reassembly, deciphering, header decompression, and control signal processing to recover IP packets. The controller / processor 359 is also responsible for error detection using an ACK and / or NACK protocol to support HARQ operations.
[0077] Similar to the functionality described in connection with the DL transmission by the base station 310, the controller / processor 359 provides RRC layer functionality associated with system information (e.g., MIB, SIBs) acquisition, RRC connections, and measurement reporting; PDCP layer functionality associated with header compression / decompression, and security (ciphering, deciphering, integrity protection, integrity verification) ; RLC layer functionality associated with the transfer of upper layer PDUs, error correction through ARQ, concatenation, segmentation, and reassembly of RLC SDUs, re-segmentation of RLC data PDUs, and reordering of RLC data PDUs; and MAC layer functionality associated with mapping between logical channels and transport channels, multiplexing of MAC SDUs onto TBs, demultiplexing of MAC SDUs from TBs, scheduling information reporting, error correction through HARQ, priority handling, and logical channel prioritization.
[0078] Channel estimates derived by a channel estimator 358 from a reference signal or feedback transmitted by the base station 310 may be used by the TX processor 368 to select the appropriate coding and modulation schemes, and to facilitate spatial processing. The spatial streams generated by the TX processor 368 may be provided to different antenna 352 via separate transmitters 354Tx. Each transmitter 354Tx may modulate an RF carrier with a respective spatial stream for transmission.
[0079] The UL transmission is processed at the base station 310 in a manner similar to that described in connection with the receiver function at the UE 350. Each receiver 318Rx receives a signal through its respective antenna 320. Each receiver 318Rx recovers information modulated onto an RF carrier and provides the information to a RX processor 370.
[0080] The controller / processor 375 can be associated with at least one memory 376 that stores program codes and data. The at least one memory 376 may be referred to as a computer-readable medium. In the UL, the controller / processor 375 provides demultiplexing between transport and logical channels, packet reassembly, deciphering, header decompression, control signal processing to recover IP packets. The controller / processor 375 is also responsible for error detection using an ACK and / or NACK protocol to support HARQ operations.
[0081] At least one of the TX processor 368, the RX processor 356, and the controller / processor 359 may be configured to perform aspects in connection with the LDPC component 198 of FIG. 1.
[0082] At least one of the TX processor 316, the RX processor 370, and the controller / processor 375 may be configured to perform aspects in connection with the LDPC component 199 of FIG. 1.
[0083] The present disclosure provides methods and apparatus for implementing an LDPC convolutional coding for wireless communication, such as 6G wireless communication, among other examples. The LDPC convolutional coding is based on a commonality between spatially-coupled LDPC codes and protograph codes. Specifically, protograph codes may be used to describe spatially-coupled convolutional LDPC codes. The implementation of the LDPC convolutional coding may involve a change in the lifting design to obtain a spatially-coupled LDPC code.
[0084] LDPC block coding may be used in the field of wireless communication. However, it remains uncertain whether traditional LDPC block codes, such as protograph-based quasi-cyclic LDPC codes, can fully achieve capacity and what is their efficiency gap compared to other decoding methods, such as maximum a posteriori (MAP) decoding. Additionally, spatially coupled LDPC block codes may suffer from large complexities in their description. For example, their graph representations and the connections between nodes via edges in a spatial direction may need extensive information. This complexity reduces their suitability for high parallel processing applications, complicating both the encoding and decoding processes. Example aspects presented herein provide improvements for implementing an LDPC convolutional coding for wireless communication, such as 6G wireless communication, among other examples. Example aspects presented herein provide a new form of LDPC coding with a shift-invariant convolutional structure with structured irregularity. This new coding approach may be compactly described and support efficient encoding and low-complexity decoding with its threshold saturation properties.
[0085] LDPC block coding is a standardized component in many wireless systems, such as 5G NR and Wi-Fi. The LDPC block codes have good decoding performance and low decoding latency, and they may be designed to support high throughput and a diverse array of coding rates and block lengths. In some examples, two base graphs may be designed for LDPC, each characterizing the macroscopic structures desired for optimal code performance. FIG. 4 is a diagram 400 illustrating examples of the base graphs for LDPC block coding. In FIG. 4, the diagram 420 shows an example base graph, which shows the connections or edges (e.g., 418) between various variable nodes (e.g., 402, 404, 406, 408) and check nodes (e.g., 412, 414, 416) .
[0086] In some examples, a larger graph (e.g., the graph in diagram 440) may be created by replicating a base graph (e.g., the graph in diagram 420) Z times and connecting these Z copies, where Z is selected from a predetermined set of lifting factors. In some examples, through a process known as cyclic lifting, the larger graph (e.g., the graph in diagram 420) may go through cyclic permutations of edges, in which the edges connecting the variable nodes and the check nodes may be permuted, as shown in diagram 460.
[0087] In some examples, spatially coupled LDPC block codes may be constructed by linking (or concatenating) a series of LDPC block code graphs with proper seeding techniques at the two boundaries. FIG. 5 is a diagram 500 illustrating an example of spatially coupled LDPC block codes. As shown in FIG. 5, spatially coupled LDPC block codes may be formed by linking or concatenating multiple LDPC block code graphs (e.g., 510, 520, 530, 540, 550) at the boundaries of the LDPC block code graphs. In some examples, the spatially coupled LDPC block codes may achieve nearly-optimal performance and surpass the capabilities of the traditional uncoupled LDPC block codes. In some examples, the technique of spatial coupling may extend its usage to various other domains such as shaping, constrained satisfaction, and compressed sensing. For example, spatial coupling may be used in communication, signal processing, and in theoretical computer science, including channel and source coding, probabilistic shaping and modulation, and k-satisfiability (K-SAT) problems, etc.
[0088] Although traditional LDPC block codes, such as protograph-based quasi-cyclic LDPC codes, exhibit good performance and have low-complexity iterative decoding, it remains uncertain whether these codes can achieve the full channel capacity. For example, the efficiency gap relative to optimal decoding methods like maximum a posteriori (MAP) decoding remains unclear. Additionally, spatially coupled LDPC block codes often suffer from large complexities in their description. For example, their graph representations and the connections between nodes via edges in a spatial direction may need extensive information. This complexity reduces their suitability for high parallel processing applications, complicating both the encoding and decoding processes. Example aspects presented herein provide a new form of LDPC coding with a shift-invariant convolutional structure with structured irregularity. This new coding approach may be compactly described and support efficient encoding and low-complexity decoding with its threshold saturation properties. In some examples, this shift-invariant LDPC convolutional coding formulation may include the class of lifted LDPC block coding as a special case.
[0089] The LDPC base matrix is a component in the structure of LDPC codes. FIG. 6 is a diagram illustrating an example of an LDPC base matrix 600 in accordance with various aspects of the present disclosure. As shown in FIG. 6, an LDPC base matrix 600 may be a matrix sized nc×nv, where nc 610 represents the total number of rows (e.g., four) and nv 620 represents the total number of columns (e.g., six) , with both nc 610 and nv 620 being positive integers. The number of rows nc 610 (e.g., four) may be less than the number of columns nv 620 (e.g., six) .
[0090] Each element (or entry) in the LDPC base matrix 600, such as element 602, 604, 606, 608, may be a nonnegative integer. These integers may be selected from a set of integers from 0 to a bounded integer that is independent of the size of the LDPC base matrix 600. For example, the set of integers used in the LDPC base matrices may include {0, 1} , {0, 1, 2} , or an extended set up to a maximum value dmax (e.g., {0, 1, 2, …, dmax} ) . Each row of the LDPC base matrix 600 may be indexed consecutively from 0 to nc-1 (e.g., three) and each column of the LDPC base matrix may be indexed consecutively from 0 to nv-1 (e.g., five) . In some examples, the LDPC base matrix 600 may designate one or more columns as “state columns, ” which may be treated specially in the coding structure. For example, coded bits corresponding to the state columns may not be transmitted.
[0091] An LDPC base graph may be associated with the LDPC base matrix and serve as its graphical representation. FIG. 7 is a diagram illustrating an LDPC base graph 700 associated with the LDPC base matrix 600 in accordance with various aspects of the present disclosure. As shown in FIG. 7, the LDPC base graph may be a bipartite graph, which may include a set of variable nodes (e.g., 702, 704, 706, 708, 710, 712) , a set of check nodes (e.g., 722, 724, 726, 728) , and a set of edges (e.g., 742) that connect the variable nodes and the check nodes. The number of variable nodes (e.g., six) and the number of check nodes (e.g., four) in the LDPC base graph 700 may be the same as the number of columns (e.g., nv 620) and the number of rows (e.g., nc 610) in the corresponding LDPC base matrix 600, respectively. As used herein, a “bipartite graph” may be a graph in which the vertices in the graph can be divided into two groups, so that no two vertices within the same group are connected by an edge, and each edge in the graph may only connect vertices from different groups.
[0092] In some examples, each check node (e.g., 722, 724, 726, 728) in the LDPC base graph 700 may be labeled with an integer ranging from 0 to nc-1 (e.g., three) , each corresponding to a row in the LDPC base matrix 600. Each variable node (e.g., 702, 704, 706, 708, 710, 712) in the LDPC base graph 700 may be labeled with an integer from 0 to nv-1 (e.g., five) , each corresponding to a column in the LDPC base matrix 600. The connectivity within the LDPC base graph 700 may be represented by the non-zero entries of the LDPC base matrix 600. For example, an edge exists between a variable node i and a check node a if the entry at the intersection of row i and column a in the LDPC base matrix is non-zero. The number of edges linking the variable node i and the check node a may be represented by the numerical value of that matrix entry. For example, the element 602 in the LDPC base matrix 600 has a value of 1, indicating there is one edge 742 connection variable node 702 and check node 722 in the corresponding LDPC base graph 700. Additionally, any variable node associated with a “state column” in the base matrix may be designated as a state node within the LDPC base graph, indicating its special status and function.
[0093] In some aspects, the parameters for shift-invariant LDPC convolutional coding may include a local coupling factor, denoted as Z, which may be a positive integer. In some examples, the parameters for shift-invariant LDPC convolutional coding may further include a set of shift-invariant values S, which may be associated with the LDPC graph. Each shift-invariant value in the set of the shift-invariant values S may range from 0 to Z-1, inclusive, and each shift-invariant value in this set may be associated with a respective edge in the LDPC base graph. For example, the cardinality (e.g., the number of elements in a set) of the set of shift-invariant values S may be equal to the cardinality of the set of edges of the LDPC base graph, and there is a one-to-one mapping between the set of the shift-invariant values S and the set of edges. For each edge that connects a variable node i and a check node a within the LDPC base graph, the associated shift-invariant value may be denoted by za, i (k) , where k represents that the edge is the kth edge between the check node a and the variable node i. In some aspects, the parameters for shift-invariant LDPC convolutional coding may include a global shift size, which may be denoted as N. The global shift size N may be defined as a multiple of the local coupling factor Z with a multiplication factor L. That is, N=L×Z, where the multiplication factor L may be significantly larger than the local coupling factor Z.
[0094] In some aspects, for an LDPC base graph B, a local coupling factor Z, a set of shift-invariant values S, and a global shift size N, an LDPC shift-invariant graph associated with the collection of (B, Z, S, N) may be provided. FIG. 8 is a diagram 800 illustrating an example of an LDPC shift-invariant graph in accordance with various aspects of the present disclosure. As shown in FIG. 8, the LDPC shift-invariant graph 830 may be a bipartite graph that includes a first plurality of streams of check nodes (e.g., 822, 824) , a second plurality of streams of variable nodes (e.g., 802, 804, 806) , and a set of edges (e.g., edge 842) . As an example, the streams of check nodes may include streams 836, 838, and the streams of variable nodes may include streams 846, 848, 849. The second plurality of streams of variable nodes may be defined as:
[0095] where [nv] = {0, 1, 2, …, nv-1} . The first plurality of streams of check nodes may be defined as:
[0096] In the example LDPC shift-invariant graph 830, Z = 6, nc = 2, and nv = 3. N may be a multiplication Z. For example, N may be 36. The LDPC shift-invariant graph 830 may be based on the LDPC base graph 850. For each s∈ [nc] and s′∈ [nv] , the check node (s, t) may be connected to variable nodes (s′, t-zs, s′ (k) ) , where s’ is in the variable node set and k indicates the multiple possible edges between the check node s and the variable node s’ in the LDPC base graph 850. The LDPC base graph 850 corresponding to a check node (834) in the first plurality of streams of check nodes (e.g., stream 836) or a variable node (e.g., 802) in the second plurality of streams of variable nodes (e.g., stream 846) is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes. For example, the LDPC base graphs for check nodes 834 and 844, which differ by one in their position indices in the streams of check nodes (e.g., stream 836) , are the same. Similarly, the LDPC based graphs for variable nodes 802 and 864, which differ by two in their position indices in the streams of variable nodes (e.g., stream 846) , are the same.
[0097] In some aspects, variable nodes (s, t) , located at t<0 (corresponding to boundary 812) or t≥N (corresponding to boundary 814) , such as variable node 826, 828, may be treated as boundary variable nodes. The boundary nodes may correspond to a known fixed value, such as 0, between the transmitter and the receiver.
[0098] In some aspects, a binary shift-invariant LDPC convolutional code may be defined based on the LDPC shift-invariant graph 830. For example, for any given check node (s, t) in the LDPC shift-invariant graph 830, there is a defined collection which includes the collection of all neighboring variable nodes (s’ , t’ ) that are connected to the check node (s, t) , such that 0≤t′<N to exclude boundary variable nodes. The set of codewords of the shift-invariant LDPC convolutional coding may include all the elements of the form:
[0099] such that
[0100] In some examples, check nodes that are close to the boundary of the graph, such as check nodes 822, 832, may have a smaller number of participating code bits in their checksums, a reflection of the fewer connections due to the proximity to the edges. In some examples, if a variable node s∈ [nv] of the LDPC base graph is identified as a state node, then variable nodes (s, t) of the LDPC shift-invariant graph are state nodes (0≤t<N) , and the coded bits corresponding to the state nodes may not be transmitted, meaning the corresponding bits are punctured.
[0101] In some aspects, the design rate, denoted as R, of the shift-invariant LDPC convolutional coding may be given by:
[0102] In Equation (5) , p represents the number of state nodes among the nv variable nodes of the LDPC base graph. Equation (5) illustrates that the design rate R has rate deviation of order N-1 when compared to the design rate (nv-nc) / (nv-p) associated with the LDPC base graph.
[0103] In terms of parameter selection for LDPC shift-invariant coding, the local coupling factor, Z, may be chosen to be a large integer, and the global shift size, N, may be set as a multiple of Z (e.g., N=LZ, where L may be a large integer) . This configuration not only facilitates the effective encoding and decoding processes but also optimizes the distribution of check nodes across the LDPC shift-invariant graph. For example, one factor that may be taken into consideration when selecting the parameters for LDPC shift-invariant coding may be the seeding effect, where check nodes located near the graph’s two boundaries (e.g., t<Z and t>N) may have structured irregularity with a reduced effective degree due to the presence of boundary variable nodes, while those check nodes located closer to the center of the graph, such as check node 834 may have a higher degree of connectivity.
[0104] FIG. 9 is a diagram 900 illustrating an example of an LDPC shift-invariant graph in accordance with various aspects of the present disclosure. In FIG. 9, the example LDPC shift-invariant graph 930 is based on the LDPC base graph 950. In the example of FIG. 9, Z = 6, nc = 3, and nv = 4. N may be a multiplication Z (e.g., 24) . In FIG. 9, the LDPC shift-invariant graph 930 may include a first plurality of streams of check nodes and a second plurality of streams of variable nodes. As an example, the first plurality of streams of check nodes may include stream 936, and the second plurality of streams of variable nodes may include stream 946. The LDPC base graph 950 corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes may not depend on the position index of the check node in the first plurality of streams of check nodes or the position index of the variable node in the second plurality of streams of variable nodes. Therefore, even if two check nodes in a stream of check nodes have different positions (or position indices) in the stream of check nodes, they may correspond to the same LDPC base graph. Similarly, two variable nodes in a stream of variable nodes, despite their different positions (or position indices) in the stream of variable nodes, may correspond to the same LDPC base graph.
[0105] In some aspects, the encoding process for shift-invariant LDPC convolutional codes may employ a linear filter mechanism based on the shift-invariance property of the code. For example, the LDPC base matrix may be associated with an LDPC parity check matrix, denoted as H (D) , over which is the field of rational functions in D over In some examples, the parity check matrix H (D) may have the same dimensions of the LDPC base matrix and contain entries that are polynomials in D, with the exponents given by the shift-invariant values associated with the edges of the base graph. For example, a single edge between a variable node and a check node in the LDPC base graph may correspond to a monomial in the matrix, and multiple connections between a variable node and a check node in the LDPC base graph may result in a polynomial. For example, an example of the LDPC parity check matrix H(D) may be:
[0106] The LDPC parity check matrix H (D) may lead to the formation of an LDPC generator matrix G (D) , which is designed such that the product of H (D) and the transpose of G(D) equals zero, H (D) G (D) T≡0. In some examples, the LDPC generator matrix G(D) may represent a linear filter in the encoding process, where the number of filter taps may be efficiently minimized (or made sparse) , optimizing the encoding operation. For example, an example of the LDPC generator matrix G (D) may be:
[0107] FIG. 10 is a diagram 1000 illustrating an example of a linear filter representation based on the shift-invariant LDPC convolutional coding in accordance with various aspects of the present disclosure. In some examples, the memory of the linear filter and the constraint length of the code may be directly to the product nv×Z.
[0108] In some examples, the decoding of the shift-invariant LDPC convolutional coding may use a shift-window iterative decoding method. FIG. 11 is a diagram 1100 illustrating an example of using a shift-window for decoding based on the shift-invariant LDPC convolutional coding in accordance with various aspects of the present disclosure.
[0109] As shown in FIG. 11, a shift parameter, denoted as w, and a window size, c, may be used to implement belief-propagation iterative decoding techniques (e.g., based on sum-product or minimum sum) . This process may involve the exchange of messages exclusively within edges located inside a moving window (e.g., window 1110) . The window may cover c horizontal indices and shifts w positions to the right after each decoding round. In the example of FIG. 11, w = 3 and c = 8, so the window (e.g., window 1110) may initially cover 8 indices and, following one round of belief-propagation decoding performed according to a defined schedule for the variable and check nodes within the window, the window may move 3 positions to the right (e.g., to window 1120) . The decoding process then may continue for all edges among nodes within this newly shifted window (e.g., window 1120) . As the window moves, the bits corresponding to variable nodes that are no longer within the window may be subsequently decoded.
[0110] In some aspects, the same base graph and lifts may be utilized in LDPC block coding and LDPC convolutional coding. For example. the same base graph utilized in LDPC block coding can be effectively transformed for use in LDPC convolutional coding. This transformation ensures that the base graph for LDPC block coding is rate compatible across multiple rates for maintaining performance across different communication scenarios. In some examples, a base graph that has been designed for LDPC block coding may be adapted to include suitably designed cyclic shift values for constructing a lifted LDPC block code from the base graph. Subsequently, these cyclic shift values may be transitioned into corresponding shift-invariant values for building a shift-invariant LDPC convolutional coding.
[0111] In some aspects, the shift-invariant LDPC convolutional coding enable an approach to data structuring through the implementation of virtual or effective code blocks (CBs) or transport blocks (TBs) . FIG. 12 is a diagram 1200 illustrating an example of CB-based data structuring based on the shift-invariant LDPC convolutional coding in accordance with various aspects of the present disclosure. As shown in FIG. 12, the shift-invariant LDPC convolutional coding may be viewed as including multiple CBs, such as CB 1210, 1220, 1230. Each CB may represent a nv×Z portion (e.g., 3x6 portion) of the LDPC shift-invariant graph. When a decode failure on one CB of the multiple CBs has been identified, the shift-invariant LDPC convolutional coding corresponding to the one CB may be retransmitted.
[0112] FIG. 13 is a diagram 1300 illustrating an example of TB-based data structuring based on the shift-invariant LDPC convolutional coding in accordance with various aspects of the present disclosure. As shown in FIG. 13, the shift-invariant LDPC convolutional coding may be viewed as including multiple TBs, such as TB 1310, 1320. Each TB may include one or more CBs. When a decode failure on one TB of the multiple TBs has been identified, the shift-invariant LDPC convolutional coding corresponding to the one TB of the multiple TBs may be retransmitted.
[0113] In some aspects, when implementing LDPC coding strategies, the selection between LDPC block coding and LDPC convolutional coding may be based on the code block size and transport block size. FIG. 14 is a diagram 1400 illustrating an example of the selection of LDPC coding strategies based on the code block size in accordance with various aspects of the present disclosure. As shown in FIG. 14, when the size of a code block is below a specific threshold T, LDPC block coding (e.g., 1410) may be used due to its efficiency for smaller data segments. On the other hand, for larger code block sizes that exceed this threshold T, LDPC convolutional coding (e.g., 1420) may be used. This approach allows for handling larger blocks of data without necessitating block segmentation, thereby maintaining performance without constantly adjusting the lifting factors used in lifted LDPC block coding.
[0114] In some examples, the selection between these LDPC block coding (e.g., 1410) and the LDPC convolutional coding (e.g., 1420) may depend on the coding rate and the size of the code block. In some examples, LDPC convolutional coding may be used for managing one or more large TBs, allowing for the seamless handling of large TBs without the segmenting each TB into multiple CBs.
[0115] In some examples, the selection between LDPC block coding and LDPC convolutional coding may be based on the modulation scheme employed. FIG. 15 is a diagram 1500 illustrating an example of the selection of LDPC coding strategies based on the modulation scheme employed in accordance with various aspects of the present disclosure. As shown in FIG. 15, higher-order modulation techniques such as quadrature amplitude modulation (QAM) , may be deployed in wireless cellular systems to enhance the spectral efficiency for mobile data transmission. These advanced modulation schemes may include variations like QAM-64 1502, QAM-256 1504, QAM-1024 1506, QAM-4096 1508, and QAM-16384 1510, and the choice of a specific high-order modulation scheme may be based on the underlying channel conditions. In some examples, the modulation orders may be sufficiently high, indicating favorable channel conditions, and traditional LDPC block coding (e.g., 1530) , which segments data streams into separate chunks, might not be the most effective approach. Under such conditions, LDPC convolutional coding (e.g., 1540) may be used to allow for, for example, continuous encoding of data streams. The decision on which coding method to employ (e.g., LDPC block coding 1530 or LDPC convolutional coding 1540) may depend on the specific requirements and scenarios of the application.
[0116] In some examples, the tail-biting LDPC shift-invariant graph (e.g., a graph where the end states match the initial states) may be used for circularizing the graph structure to enhance coding performance. FIG. 16 is a diagram 1600 illustrating an example of the tail-biting LDPC shift-invariant graph in accordance with various aspects of the present disclosure. As shown in FIG. 16, the circularization of an LDPC shift-invariant graph may be achieved by adjusting the indexing of the variable nodes (s, t) at the graph’s boundaries (e.g., boundary 1612 and 1614) . For example, for variable nodes (s, t) located at the boundary where -Z≤t≤-1 (e.g., boundary 1612) , the index may be changed using the arithmetic operation t′= (t mod Z) +N. For example, variable node 1626 and variable node 1636, whose indices differ by N, may correspond to the same coded value. the This adjustment effectively “closes” the two boundaries (e.g., boundary 1612 and 1614) of the LDPC shift-invariant graph, creating a tail-biting structure. This tail-biting structure allows the graph to emulate a closed-loop graph, thereby enhancing the performance characteristics similar to those of a quasi-cyclic LDPC block code based on the same base graph and shift-invariant values. In some examples, the tail-biting structure is beneficial when the parameters Z and N are suitably large, as it leverages the advantages of having “open” boundaries and strategic seeding to boost the overall performance of the shift-invariant LDPC convolutional coding.
[0117] FIG. 17 is a call flow diagram 1700 illustrating a method of wireless communication in accordance with various aspects of this present disclosure. The method may be performed by a first device in coordination with a second device. In some examples, the first device may be UE 1702, and the second device may be base station 1704. The aspects may be performed by the UE 1702 or the base station 1704 in aggregation and / or by one or more components of a base station 1704 (e.g., a CU 110, a DU 130, and / or an RU 140) .
[0118] As shown in FIG. 17, at 1706, the UE 1702 may determine the LDPC shift-invariant graph based on the LDPC base graph, the local coupling factor, the set of shift-invariant values, and a global shift size, where the global shift size is an integer multiple of the local coupling factor. For example, referring to FIG. 8, the UE 1702 may determine the LDPC shift-invariant graph 830 based on the LDPC base graph 850, the local coupling factor (e.g., Z) , the set of shift-invariant values, and a global shift size (e.g., N) , where the global shift size (e.g., N) is an integer multiple of the local coupling factor (e.g., Z) .
[0119] At 1708, the UE 1702 may determine the shift-invariant LDPC convolutional coding based on the LDPC shift-invariant graph. The set of codewords for the shift-invariant LDPC convolutional coding for each check node may be based on a sum of code bits corresponding to connected variable nodes of the check node, and the connected variable nodes may not include boundary variable nodes. For example, referring to FIG. 8, the UE 1702 may determine the shift-invariant LDPC convolutional coding based on the LDPC shift-invariant graph 830. The set of codewords for the shift-invariant LDPC convolutional coding for each check node (e.g., check nodes 822, 824) may be based on a sum of code bits corresponding to connected variable nodes of the check node (e.g., variable nodes connected to check nodes 822, 824) and the connected variable nodes may not include boundary variable nodes, such as the variable nodes located in boundary 812 and 814 (e.g., variable node 826) . At 1710, the UE 1702 may determine a linear filter based on the shift-invariant LDPC convolutional coding. For example, referring to FIG. 10 and Equations (6) and (7) , the linear filter may be represented by the LDPC generator matrix G (D) , and
[0120] At 1712, the UE 1702 may determine whether a convolutional coding condition has been met. For example, referring to FIG. 14, in some examples, the convolutional coding condition may include a code block size is greater than a threshold size T. Referring to FIG. 15, in some examples, the convolutional coding condition may include the modulation order is greater than a threshold order (e.g., greater than or equal to QAM-1024 1506) .
[0121] At 1714, the UE 1702 may encode the input signal into the encoded signal using an LDPC block code. For example, if the convolutional coding condition has not been met (e.g., when the code block size is less than the threshold size T in FIG. 14 or when the modulation order is smaller than QAM-1024 1506) , the UE may encode the input signal using the LDPC block code instead of shift-invariant LDPC convolutional coding.
[0122] At 1716, the UE 1702 may encode an input signal into an encoded signal using a shift-invariant LDPC convolutional coding. For example, when the convolutional coding condition has been met (e.g., the code block size is greater than the threshold size T in FIG. 14) , the UE 1702 may encode an input signal into an encoded signal using a shift-invariant LDPC convolutional coding. Referring to FIG. 8, the shift-invariant LDPC convolutional coding may be associated with an LDPC shift-invariant graph 830. The LDPC shift-invariant graph 830 may include a first plurality of streams of check nodes (e.g., streams 836, 838) and a second plurality of streams of variable nodes (e.g., stream 846) . The LDPC base graph 850 corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes. For example, the LDPC base graphs for check nodes 834 and 844, which differ by one in their position indices in the streams of check nodes (e.g., stream 836) , are the same. Similarly, the LDPC based graphs for variable nodes 802 and 864, which differ by two in their position indices in the streams of variable nodes (e.g., stream 846) , are the same.
[0123] At 1718, the UE 1702 may transmit the encoded signal to the base station 1704.
[0124] At 1720, the base station 1704 may decode the encoded signal to obtain a decoded signal. In some examples, referring to FIG. 11, a shift-window iterative decoding method may be used to decode the encoded signal. The method may be based on a moving window (e.g., window 1110) , which cover c horizontal indices and shifts w positions to the right after each decoding round.
[0125] In some examples, at 1722, the UE 1702 may identify a decode failure on one virtual CB of the multiple virtual CBs or one virtual TB of the multiple virtual TBs.
[0126] In some examples, at 1724, when the decode failure has been identified (at 1722) , the UE 1702 may retransmit the shift-invariant LDPC convolutional coding corresponding to the one virtual CB or the one virtual TB. For example, referring to FIG. 12, if a decode failure on CB 1210 has been identified, the UE 1702 may retransmit the shift-invariant LDPC convolutional coding corresponding to the CB 1210.
[0127] FIG. 18 is a flowchart 1800 illustrating methods of wireless communication at a first device in accordance with various aspects of the present disclosure. The method may be performed by the first device in coordination with a second device. In some examples, the first device may be a UE, and the second device may be a network entity. The UE may be the UE 104, 350, 1702, or the apparatus 2204 in the hardware implementation of FIG. 22. The network entity may be a base station, or a component of a base station, in the access network of FIG. 1 or a core network component (e.g., base station 102, 310, 1704; or the network entity 2202 in the hardware implementation of FIG. 22) . In some other examples, the first device may be a network entity, and the second device may be a UE. By enabling a more compact representation of codes compared to traditional spatially coupled LDPC block codes, the methods reduce the complexity in the encoding and decoding processes, thereby enhancing wireless communication efficiency. Additionally, by enabling the selection of a coding scheme (e.g., LDPC block coding or LDPC convolutional coding) based on code rate and code block size, the methods allow for the coding scheme to be tailored to actual conditions, thereby increasing the flexibility in code construction.
[0128] As shown in FIG. 18, at 1802, the first device may encode an input signal into an encoded signal using a shift-invariant LDPC convolutional coding. The shift-invariant LDPC convolutional coding may be associated with an LDPC shift-invariant graph. The LDPC shift-invariant graph may include a first plurality of streams of check nodes and a second plurality of streams of variable nodes. The LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes. FIG. 8, FIG. 9, FIG. 10, FIG. 11, FIG. 12, FIG. 13, FIG. 14, FIG. 15, FIG. 16, and FIG. 17 illustrate various aspects of the steps in connection with flowchart 1800. For example, referring to FIG. 17, the first device (UE 1702) may, at 1716, encode an input signal into an encoded signal using a shift-invariant LDPC convolutional coding. Referring to FIG. 8, the shift-invariant LDPC convolutional coding may be associated with an LDPC shift-invariant graph 830. The LDPC shift-invariant graph may include a first plurality of streams of check nodes (e.g., streams 836, 838) and a second plurality of streams of variable nodes (e.g., streams 846, 848, 849) . For example, the LDPC base graphs for check nodes 834 and 844, which differ by one in their position indices in the streams of check nodes (e.g., stream 836) , are the same. Similarly, the LDPC based graphs for variable nodes 802 and 864, which differ by two in their position indices in the streams of variable nodes (e.g., stream 846) , are the same. In some examples, 1802 may be performed by the LDPC component 198.
[0129] At 1804, the first device may transmit the encoded signal to the second device. The encoded signal may include coded bits corresponding to the second plurality of streams of variable nodes. For example, referring to FIG. 17, the first device (UE 1702) may, at 1718, transmit the encoded signal to the second device (e.g., base station 1704) . The encoded signal may include coded bits corresponding to the second plurality of streams of variable nodes. In some examples, 1804 may be performed by the LDPC component 198.
[0130] FIG. 19 is a flowchart 1900 illustrating methods of wireless communication at a first device in accordance with various aspects of the present disclosure. The method may be performed by the first device in corporation with a second device. In some examples, the first device may be a UE, and the second device may be a network entity. The UE may be the UE 104, 350, 1702, or the apparatus 2204 in the hardware implementation of FIG. 22. The network entity may be a base station, or a component of a base station, in the access network of FIG. 1 or a core network component (e.g., base station 102, 310, 1704; or the network entity 2202 in the hardware implementation of FIG. 22) . In some other examples, the first device may be a network entity, and the second device may be a UE. By enabling a more compact representation of codes compared to traditional spatially coupled LDPC block codes, the methods reduce the complexity in the encoding and decoding processes, thereby enhancing wireless communication efficiency. Additionally, by enabling the selection of a coding scheme (e.g., LDPC block coding or LDPC convolutional coding) based on code rate and code block size, the methods allow for the coding scheme to be tailored to actual conditions, thereby increasing the flexibility in code construction.
[0131] As shown in FIG. 19, at 1910, the first device may encode an input signal into an encoded signal using a shift-invariant LDPC convolutional coding. The shift-invariant LDPC convolutional coding may be associated with an LDPC shift-invariant graph. The LDPC shift-invariant graph may include a first plurality of streams of check nodes and a second plurality of streams of variable nodes. The LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes. FIG. 8, FIG. 9, FIG. 10, FIG. 11, FIG. 12, FIG. 13, FIG. 14, FIG. 15, FIG. 16, and FIG. 17 illustrate various aspects of the steps in connection with flowchart 1900. For example, referring to FIG. 17, the first device (UE 1702) may, at 1716, encode an input signal into an encoded signal using a shift-invariant LDPC convolutional coding. Referring to FIG. 8, the shift-invariant LDPC convolutional coding may be associated with an LDPC shift-invariant graph 830. The LDPC shift-invariant graph may include a first plurality of streams of check nodes (e.g., streams 836, 838) and a second plurality of streams of variable nodes (e.g., streams 846, 848, 849) . For example, the LDPC base graphs for check nodes 834 and 844, which differ by one in their position indices in the streams of check nodes (e.g., stream 836) , are the same. Similarly, the LDPC based graphs for variable nodes 802 and 864, which differ by two in their position indices in the streams of variable nodes (e.g., stream 846) , are the same. In some examples, 1910 may be performed by the LDPC component 198.
[0132] In some aspects, the first cardinality of the first plurality of streams of check nodes may equal the number of check nodes in the LDPC base graph, and a second cardinality of the second plurality of streams of variable nodes may equal to the number of variable nodes in the LDPC base graph. For example, referring to FIG. 8, the first cardinality (e.g., two) of the first plurality of streams of check nodes (e.g., streams 836, 838) equals the number of check nodes (e.g., two) in the LDPC base graph 850, and the second cardinality (e.g., three) of the second plurality of streams of variable nodes (e.g., streams 846, 848, 849) equals to the number of variable nodes (e.g., three) in the LDPC base graph 850.
[0133] At 1912, the first device may transmit the encoded signal to the second device. The encoded signal may include coded bits corresponding to the second plurality of streams variable nodes. For example, referring to FIG. 17, the first device (UE 1702) may, at 1718, transmit the encoded signal to the second device (e.g., base station 1704) . The encoded signal may include coded bits corresponding to the second plurality of streams variable nodes (e.g., streams 846, 848, 849) . In some examples, 1912 may be performed by the LDPC component 198.
[0134] In some aspects, the LDPC base matrix corresponding to the LDPC base graph may have the first cardinality of rows and the second cardinality of columns. The rows may respectively correspond to the first set of check nodes, and the columns may respectively correspond to the second set of variable nodes. The row number may be less than the column number. For example, referring to FIG. 8, the LDPC base matrix corresponding to the LDPC base graph 850 may have the first cardinality (e.g., two) of rows and the second cardinality (e.g., three) of columns. The rows may respectively correspond to the first set of check nodes, and the columns may respectively correspond to the second set of variable nodes. The row number (e.g., two) may be less than the column number (e.g., three) .
[0135] In some aspects, the second set of variable nodes may include one or more state nodes, and the coded bits corresponding to the one or more state nodes may not be transmitted. For example, referring to FIG. 7, the set of variable nodes (e.g., variable nodes 702, 704, 706, 708, 710, 712) may include one or more state nodes, and the coded bits corresponding to the one or more state nodes may not be transmitted.
[0136] In some aspects, the entries of the LDPC base matrix may include non-negative integers, and an entry of the LDPC base matrix may represent the number of edges connecting a corresponding variable node and a corresponding check node in the LDPC base graph. For example, referring to FIG. 6 and FIG. 7, the entries (e.g., 602, 604, 606, 608) of the LDPC base matrix 600 may include non-negative integers, and an entry (e.g., 602) of the LDPC base matrix 600 may represent the number of edges connecting a corresponding variable node (e.g., variable node 702) and a corresponding check node (e.g., check node 722) in the LDPC base graph 700.
[0137] In some aspects, the LDPC base graph may be associated with a set of shift-invariant values, and each shift-invariant value in the set of shift-invariant values may include an integer greater than or equal to zero and less than a local coupling factor. For example, referring to FIG. 8, the LDPC base graph 850 may be associated with a set of shift-invariant values, and each shift-invariant value in the set of shift-invariant values may include an integer greater than or equal to zero and less than a local coupling factor (e.g., Z = 6) .
[0138] In some aspects, each shift-invariant value in the set of shift-invariant values may be associated with an edge of the LDPC base graph, and a third cardinality of the set of shift-invariant values may equal a fourth cardinality of a set of edges of the LDPC base graph. For example, referring to FIG. 8, each shift-invariant value in the set of shift-invariant values may be associated with an edge of the LDPC base graph 850, and a third cardinality (e.g., six) of the set of shift-invariant values may equal a fourth cardinality (e.g., six) of a set of edges of the LDPC base graph.
[0139] In some aspects, the set of shift-invariant values may have a one-to-one mapping to the set of edges of the LDPC base graph. For example, referring to FIG. 8, the set of shift-invariant values may have a one-to-one mapping to the set of edges of the LDPC base graph 850.
[0140] In some aspects, at 1902, the first device may determine the LDPC shift-invariant graph based on the LDPC base graph, the local coupling factor, the set of shift-invariant values, and a global shift size, where the global shift size is an integer multiple of the local coupling factor. For example, referring to FIG. 8 and FIG. 17, the first device (UE 1702) may, at 1706, determine the LDPC shift-invariant graph 830 based on the LDPC base graph 850, the local coupling factor (e.g., Z) , the set of shift-invariant values, and a global shift size (e.g., N) . The global shift size (e.g., N) is an integer multiple of the local coupling factor (e.g., Z) . In some aspects, 1902 may be performed by the LDPC component 198.
[0141] In some aspects, the position index of a variable node may be greater than or equal to -Z and less than N+Z, where Z is the local coupling factor, and N is the global shift size, the position index of a check node may be greater than or equal to zero and less than N+Z, the node index of the check node may be less than a number of check nodes in the first set of check nodes, and the node index of the variable node may be less than a number of variable nodes in the second set of variable nodes. For example, referring to Equation (1) , the position index t of a variable node may be greater than or equal to -Z and less than N+Z, and Z is the local coupling factor, and N is the global shift size. Referring to Equation (2) , the position index t of a check node may be greater than or equal to zero and less than N+Z. The node index s of the check node may be less than a number of check nodes (e.g., nc) in the first set of check nodes, and the node index s of the variable node may be less than a number of variable nodes (e.g., nv) in the second set of variable nodes.
[0142] In some aspects, the second plurality of streams of variable nodes may include one or more boundary variable nodes, and the boundary variable nodes may have position indices less than zero or greater than or equal to the global shift size. For example, referring to FIG. 8, the second plurality of streams of variable nodes may (e.g., streams 846, 848, 849) include one or more boundary variable nodes (e.g., variable nodes in boundary 812) , and the boundary variable nodes may have position indices less than zero or greater than or equal to the global shift size, such as the variable nodes location in the boundary 812 and 814.
[0143] In some aspects, the boundary variable nodes may correspond to a fixed coded value. For example, referring to FIG. 8, the boundary variable nodes (e.g., variable nodes located in boundary 812 and 814) may correspond to a fixed coded value.
[0144] In some aspects, two boundary variable nodes with the position indices differing by the integer multiple of the local coupling factor may correspond to the same coded value. For example, referring to FIG. 16, boundary variable node 1626 and boundary variable node 1636, whose position indices differ by N (which is an integer multiple of the local coupling factor Z) , may correspond to the same coded value.
[0145] In some aspects, each check node with a first order index may be respectively connected to the variable node with a second order index, and each check node with the first order index may have the same position index interval to a connected variable node. For example, referring to FIG. 8, a check node 822 with a first order index (e.g., order index 0 for check node in LDPC base graph 850) may be respectively connected to the variable node 852 with a second order index (e.g., order index 0 for variable node in LDPC base graph 850) , and each check node (e.g., check node 834) with the first order index (e.g., order index 0 for check node) may have the same position index interval (e.g., 4) to a connected variable node (e.g., variable node 864) .
[0146] In some aspects, at 1904, the first device may determine the shift-invariant LDPC convolutional coding based on the LDPC shift-invariant graph. A set of codewords for the shift-invariant LDPC convolutional coding for each check node may be based on the sum of code bits corresponding to connected variable nodes of the check node, and the connected variable nodes may not include boundary variable nodes. For example, referring to FIG. 17, the first device (e.g., UE 1702) may, at 1708, determine the shift-invariant LDPC convolutional coding based on the LDPC shift-invariant graph. A set of codewords for the shift-invariant LDPC convolutional coding for each check node may be based on the sum of code bits corresponding to connected variable nodes of the check node, and the connected variable nodes may not include boundary variable nodes (e.g., variable nodes located in boundary 812 or 814) . In some examples, 1904 may be performed by the LDPC component 198.
[0147] In some aspects, at 1906, the first device may determine a linear filter based on the shift-invariant LDPC convolutional coding. To encode the input signal into the encoded signal (at 1910) , the first device may encode the input signal into the encoded signal using the linear filter. For example, referring to FIG. 17, the first device (e.g., UE 1702) may, at 1710, determine a linear filter based on the shift-invariant LDPC convolutional coding. To encode the input signal into the encoded signal (at 1716) , the first device (e.g., UE 1702) may encode the input signal into the encoded signal using the linear filter. In some examples, 1906 may be performed by the LDPC component 198.
[0148] In some aspects, to determine the linear filter (at 1906) , the first device may determine an LDPC parity check matrix based on the LDPC base matrix. The LDPC parity check matrix may have the same size of the LDPC base matrix, the entries of the LDPC parity check matrix may include polynomials, and exponents of the entries of the LDPC parity check matrix may be based on the set of shift-invariant values. The first device may further determine a generator matrix based on the LDPC parity check matrix; and determine the linear filter based on the generator matrix. For example, referring to FIG. 10 and Equations (6) and (7) , to determine the linear filter, the first device may determine an LDPC parity check matrix H (D) based on the LDPC base matrix. The LDPC parity check matrix H (D) may have the same size of the LDPC base matrix. The entries of the LDPC parity check matrix H (D) may include polynomials, and exponents of the entries of the LDPC parity check matrix H (D) may be based on the set of shift-invariant values. The first device may further determine a generator matrix G (D) based on the LDPC parity check matrix, and determine the linear filter based on the generator matrix G (D) .
[0149] In some aspects, the shift-invariant LDPC convolutional coding may correspond to multiple virtual code blocks (CBs) or multiple virtual transport blocks (TBs) . For example, referring to FIG. 12 and FIG. 13, the shift-invariant LDPC convolutional coding may correspond to multiple virtual CBs (e.g. CBs 1210, 1220, 1230) or multiple virtual TBs (e.g., TBs 1310, 1320) .
[0150] In some aspects, at 1914, if there is a decode failure on one virtual CB of the multiple virtual CBs or one virtual TB of the multiple virtual TBs, the first device may retransmit the shift-invariant LDPC convolutional coding corresponding to the one virtual CB or the one virtual TB. For example, referring to FIG. 12, a decode failure may be on one virtual CB (e.g., CB 1210) of multiple virtual CBs (e.g., CBs 1210, 1220, 1230) . Referring to FIG. 13, a decode failure may be on one virtual TB (e.g., TB 1310) of multiple virtual TBs (e.g., TBs 1310, 1320) . Referring to FIG. 17, the first device (e.g., UE 1702) may, at 1724, retransmit the shift-invariant LDPC convolutional coding corresponding to the one virtual CB (e.g., CB 1210) or the one virtual TB (e.g., TB 1310) . In some examples, 1914 may be performed by the LDPC component 198.
[0151] In some aspects, the first device may, at 1908, determine whether a convolutional coding condition has been met, and the first device may encode the input signal into the encoded signal using the shift-invariant LDPC convolutional coding if the convolutional coding condition has been met. For example, referring to FIG. 17, the first device (e.g., UE 1702) may, at 1712, determine whether a convolutional coding condition has been met. The first device (e.g., UE 1702) may, at 1716, encode the input signal into the encoded signal using the shift-invariant LDPC convolutional coding if the convolutional coding condition has been met. In some aspects, 1908 may be performed by the LDPC component 198.
[0152] In some aspects, if the convolutional coding condition has not been met, the first device may, at 1916, encode the input signal into the encoded signal using an LDPC block code. For example, referring to FIG. 17, if the convolutional coding condition has not been met, the first device (e.g., UE 1702) may, at 1714, encode the input signal into the encoded signal using an LDPC block code. In some aspects, 1916 may be performed by the LDPC component 198.
[0153] In some aspects, the LDPC block code and the LDPC convolutional coding are based on a same base graph. For example, referring to FIG. 17, the LDPC block code (e.g., at 1714) and the LDPC convolutional coding (e.g., at 1716) may be based on a same base graph.
[0154] In some aspects, the convolutional coding condition (e.g., the first device determined at 1908) may include one or more of: the code block size is greater than a threshold size, or the modulation order is greater than a threshold order. For example, referring to FIG. 14 and FIG. 15, the convolutional coding condition may include one or more of:the code block size is greater than a threshold size (e.g., threshold T in FIG. 14) or the modulation order is greater than a threshold order (e.g., QAM-1024 1506 at FIG. 15) .
[0155] FIG. 20 is a flowchart 2000 illustrating methods of wireless communication at a receiving device in accordance with various aspects of the present disclosure. The method may be performed by the receiving device in coordination with a transmitting device. In some examples, the receiving device may be a network entity, and the transmitting device may be a UE. The network entity may be a base station, or a component of a base station, in the access network of FIG. 1 or a core network component (e.g., base station 102, 310, 1704; or the network entity 2202 in the hardware implementation of FIG. 22) . The UE may be the UE 104, 350, 1702, or the apparatus 2204 in the hardware implementation of FIG. 22. In some other examples, the receiving device may be a UE, and the transmitting device may be a network entity. By enabling a more compact representation of codes compared to traditional spatially coupled LDPC block codes, the methods reduce the complexity in the encoding and decoding processes, thereby enhancing wireless communication efficiency. Additionally, by enabling the selection of a coding scheme (e.g., LDPC block coding or LDPC convolutional coding) based on code rate and code block size, the methods allow for the coding scheme to be tailored to actual conditions, thereby increasing the flexibility in code construction.
[0156] As shown in FIG. 20, at 2002, the receiving device may receive, from the transmitting device, an encoded signal. The encoded signal may be encoded using a shift-invariant LDPC convolutional coding. The shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph including a first plurality of streams of check nodes and a second plurality of streams of variable nodes, where an LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes. FIG. 8, FIG. 9, FIG. 10, FIG. 11, FIG. 12, FIG. 13, FIG. 14, FIG. 15, FIG. 16, and FIG. 17 illustrate various aspects of the steps in connection with flowchart 2000. For example, referring to FIG. 17, the receiving device (e.g., base station 1704) may, at 1718, receive, from the transmitting device (e.g., UE 1702) , an encoded signal. The encoded signal may be encoded using a shift-invariant LDPC convolutional coding. Referring to FIG. 8, the shift-invariant LDPC convolutional coding may be associated with an LDPC shift-invariant graph 830. The LDPC shift-invariant graph may include a first plurality of streams of check nodes (e.g., streams 836, 838) and a second plurality of streams of variable nodes (e.g., streams 846, 848, 849) . For example, the LDPC base graphs for check nodes 834 and 844, which differ by one in their position indices in the streams of check nodes (e.g., stream 836) , are the same. Similarly, the LDPC based graphs for variable nodes 802 and 864, which differ by two in their position indices in the streams of variable nodes (e.g., stream 846) , are the same. In some aspects, 2002 may be performed by the LDPC component 199.
[0157] At 2004, the receiving device may decode the encoded signal to obtain a decoded signal. For example, referring to FIG. 17, the receiving device (e.g., base station 1704) may, at 1720, decode the encoded signal to obtain a decoded signal. In some aspects, 2004 may be performed by the LDPC component 199.
[0158] FIG. 21 is a flowchart 2100 illustrating methods of wireless communication at a receiving device in accordance with various aspects of the present disclosure. The method may be performed by the receiving device in coordination with a transmitting device. In some examples, the receiving device may be a network entity, and the transmitting device may be a UE. The network entity may be a base station, or a component of a base station, in the access network of FIG. 1 or a core network component (e.g., base station 102, 310, 1704; or the network entity 2202 in the hardware implementation of FIG. 22) . The UE may be the UE 104, 350, 1702, or the apparatus 2204 in the hardware implementation of FIG. 22. In some other examples, the receiving device may be a UE, and the transmitting device may be a network entity. By enabling a more compact representation of codes compared to traditional spatially coupled LDPC block codes, the methods reduce the complexity in the encoding and decoding processes, thereby enhancing wireless communication efficiency. Additionally, by enabling the selection of a coding scheme (e.g., LDPC block coding or LDPC convolutional coding) based on code rate and code block size, the methods allow for the coding scheme to be tailored to actual conditions, thereby increasing the flexibility in code construction.
[0159] As shown in FIG. 21, at 2102, the receiving device may receive, from the transmitting device, an encoded signal. The encoded signal may be encoded using a shift-invariant LDPC convolutional coding. The shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph including a first plurality of streams of check nodes and a second plurality of streams of variable nodes, where an LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes. FIG. 8, FIG. 9, FIG. 10, FIG. 11, FIG. 12, FIG. 13, FIG. 14, FIG. 15, FIG. 16, and FIG. 17 illustrate various aspects of the steps in connection with flowchart 2000. For example, referring to FIG. 17, the receiving device (e.g., base station 1704) may, at 1718, receive, from the transmitting device (e.g., UE 1702) , an encoded signal. The encoded signal may be encoded using a shift-invariant LDPC convolutional coding. Referring to FIG. 8, the shift-invariant LDPC convolutional coding may be associated with an LDPC shift-invariant graph 830. The LDPC shift-invariant graph may include a first plurality of streams of check nodes (e.g., streams 836, 838) and a second plurality of streams of variable nodes (e.g., streams 846, 848, 849) . For example, the LDPC base graphs for check nodes 834 and 844, which differ by one in their position indices in the streams of check nodes (e.g., stream 836) , are the same. Similarly, the LDPC based graphs for variable nodes 802 and 864, which differ by two in their position indices in the streams of variable nodes (e.g., stream 846) , are the same. In some aspects, 2102 may be performed by the LDPC component 199.
[0160] At 2104, the receiving device may decode the encoded signal to obtain a decoded signal. For example, referring to FIG. 17, the receiving device (e.g., base station 1704) may, at 1720, decode the encoded signal to obtain a decoded signal. In some aspects, 2104 may be performed by the LDPC component 199.
[0161] In some aspects, the first cardinality of the first plurality of streams of check nodes may equal the number of check nodes in the LDPC base graph, and a second cardinality of the second plurality of streams of variable nodes may equal to the number of variable nodes in the LDPC base graph. For example, referring to FIG. 8, the first cardinality (e.g., two) of the first plurality of streams of check nodes (e.g., streams 836, 838) equals the number of check nodes (e.g., two) in the LDPC base graph 850, and the second cardinality (e.g., three) of the second plurality of streams of variable nodes (e.g., streams 846, 848, 849) equals to the number of variable nodes (e.g., three) in the LDPC base graph 850.
[0162] In some aspects, at 2106, the LDPC base matrix corresponding to the LDPC base graph may have the first cardinality of rows and the second cardinality of columns. The rows may respectively correspond to the first set of check nodes, and the columns may respectively correspond to the second set of variable nodes. The row number may be less than the column number. For example, referring to FIG. 8, the LDPC base matrix corresponding to the LDPC base graph 850 may have the first cardinality (e.g., two) of rows and the second cardinality (e.g., three) of columns. The rows may respectively correspond to the first set of check nodes, and the columns may respectively correspond to the second set of variable nodes. The row number (e.g., two) may be less than the column number (e.g., three) .
[0163] In some aspects, the entries of the LDPC base matrix may include non-negative integers, and an entry of the LDPC base matrix may represent the number of edges connecting a corresponding variable node and a corresponding check node in the LDPC base graph. For example, referring to FIG. 6 and FIG. 7, the entries (e.g., 602, 604, 606, 608) of the LDPC base matrix 600 may include non-negative integers, and an entry (e.g., 602) of the LDPC base matrix 600 may represent the number of edges connecting a corresponding variable node (e.g., variable node 702) and a corresponding check node (e.g., check node 722) in the LDPC base graph 700.
[0164] In some aspects, at 2108, the LDPC base graph may be associated with a set of shift-invariant values. Each shift-invariant value in the set of shift-invariant values may include an integer greater than or equal to zero and less than a local coupling factor. For example, referring to FIG. 8, the LDPC base graph 850 may be associated with a set of shift-invariant values, and each shift-invariant value in the set of shift-invariant values may include an integer greater than or equal to zero and less than a local coupling factor (e.g., Z = 6) .
[0165] In some aspects, to decode the encoded signal to obtain the decoded signal (at 2104) , the receiving device may, at 2110, apply a moving window at a first end of the LDPC shift-invariant graph, where the moving window covers a first number of position indices in the LDPC shift-invariant graph; and, at 2112, sequentially shift the moving window a step size toward a second end of the LDPC shift-invariant graph at each time instant of a set of time instants; and, at 2114, decode coded bits corresponding to the variable nodes moving out of the moving window at each time instant of the set of time instants. For example, referring to FIG. 11 and FIG. 17, to decode the encoded signal to obtain the decoded signal (at 1720) , the receiving device (e.g., base station 1704) may apply a moving window 1110, at a first end of the LDPC shift-invariant graph, where the moving window 1110 covers a first number (e.g., eight) of position indices in the LDPC shift-invariant graph, and sequentially shift the moving window a step size (e.g., three) toward a second end of the LDPC shift-invariant graph at each time instant of a set of time instants. The receiving device (e.g., base station 1704) may decode coded bits corresponding to the variable nodes moving out of the moving window at each time instant of the set of time instants. In some aspects, 2110, 2112, and 2114 may be performed by the LDPC component 199.
[0166] FIG. 22 is a diagram 2200 illustrating an example of a hardware implementation for an apparatus 2204. The apparatus 2204 may be a UE, a component of a UE, or may implement UE functionality. In some aspects, the apparatus 2204 may include at least one cellular baseband processor (or processing circuitry) 2224 (also referred to as a modem) coupled to one or more transceivers 2222 (e.g., cellular RF transceiver) . The cellular baseband processor (s) (or processing circuitry) 2224 may include at least one on-chip memory (or memory circuitry) 2224' . In some aspects, the apparatus 2204 may further include one or more subscriber identity modules (SIM) cards 2220 and at least one application processor (or processing circuitry) 2206 coupled to a secure digital (SD) card 2208 and a screen 2210. The application processor (s) (or processing circuitry) 2206 may include on-chip memory (or memory circuitry) 2206' . In some aspects, the apparatus 2204 may further include a Bluetooth module 2212, a WLAN module 2214, an SPS module 2216 (e.g., GNSS module) , one or more sensor modules 2218 (e.g., barometric pressure sensor / altimeter; motion sensor such as inertial measurement unit (IMU) , gyroscope, and / or accelerometer (s) ; light detection and ranging (LIDAR) , radio assisted detection and ranging (RADAR) , sound navigation and ranging (SONAR) , magnetometer, audio and / or other technologies used for positioning) , additional memory modules 2226, a power supply 2230, and / or a camera 2232. The Bluetooth module 2212, the WLAN module 2214, and the SPS module 2216 may include an on-chip transceiver (TRX) (or in some cases, just a receiver (RX) ) . The Bluetooth module 2212, the WLAN module 2214, and the SPS module 2216 may include their own dedicated antennas and / or utilize the antennas 2280 for communication. The cellular baseband processor (s) (or processing circuitry) 2224 communicates through the transceiver (s) 2222 via one or more antennas 2280 with the UE 104 and / or with an RU associated with a network entity 2202. The cellular baseband processor (s) (or processing circuitry) 2224 and the application processor (s) (or processing circuitry) 2206 may each include a computer-readable medium / memory (or memory circuitry) 2224' , 2206' , respectively. The additional memory modules 2226 may also be considered a computer-readable medium / memory (or memory circuitry) . Each computer-readable medium / memory (or memory circuitry) 2224' , 2206' , 2226 may be non-transitory. The cellular baseband processor (s) (or processing circuitry) 2224 and the application processor (s) (or processing circuitry) 2206 are each responsible for general processing, including the execution of software stored on the computer-readable medium / memory (or memory circuitry) . The software, when executed by the cellular baseband processor (s) (or processing circuitry) 2224 / application processor (s) (or processing circuitry) 2206, causes the cellular baseband processor (s) (or processing circuitry) 2224 / application processor (s) (or processing circuitry) 2206 to perform the various functions described supra. The cellular baseband processor (s) (or processing circuitry) 2224 and the application processor (s) (or processing circuitry) 2206 are configured to perform the various functions described supra based at least in part of the information stored in the memory (or memory circuitry) . That is, the cellular baseband processor (s) (or processing circuitry) 2224 and the application processor (s) (or processing circuitry) 2206 may be configured to perform a first subset of the various functions described supra without information stored in the memory and may be configured to perform a second subset of the various functions described supra based on the information stored in the memory. The computer-readable medium / memory (or memory circuitry) may also be used for storing data that is manipulated by the cellular baseband processor (s) (or processing circuitry) 2224 / application processor (s) (or processing circuitry) 2206 when executing software. The cellular baseband processor (s) (or processing circuitry) 2224 / application processor (s) (or processing circuitry) 2206 may be a component of the UE 350 and may include the at least one memory 360 and / or at least one of the TX processor 368, the RX processor 356, and the controller / processor 359. In one configuration, the apparatus 2204 may be at least one processor chip (modem and / or application) and include just the cellular baseband processor (s) (or processing circuitry) 2224 and / or the application processor (s) (or processing circuitry) 2206, and in another configuration, the apparatus 2204 may be the entire UE (e.g., see UE 350 of FIG. 3) and include the additional modules of the apparatus 2204.
[0167] As discussed supra, the component 198 may be configured to encode an input signal into an encoded signal using a shift-invariant LDPC convolutional coding, where the shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph including a first plurality of streams of check nodes and a second plurality of streams of variable nodes, where an LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes; and transmit, to a second device, the encoded signal, where the encoded signal includes coded bits corresponding to the second plurality of streams of variable nodes. The component 198 may be further configured to perform any of the aspects described in connection with the flowcharts in FIG. 18 and FIG. 19, and / or performed by the UE 1702 in FIG. 17. The component 198 may be within the cellular baseband processor (s) (or processing circuitry) 2224, the application processor (s) (or processing circuitry) 2206, or both the cellular baseband processor (s) (or processing circuitry) 2224 and the application processor (s) (or processing circuitry) 2206. The component 198 may be one or more hardware components specifically configured to carry out the stated processes / algorithm, implemented by one or more processors configured to perform the stated processes / algorithm, stored within a computer-readable medium for implementation by one or more processors, or some combination thereof. When multiple processors are implemented, the multiple processors may perform the stated processes / algorithm individually or in combination. As shown, the apparatus 2204 may include a variety of components configured for various functions. In one configuration, the apparatus 2204, and in particular the cellular baseband processor (s) (or processing circuitry) 2224 and / or the application processor (s) (or processing circuitry) 2206, includes means for encoding an input signal into an encoded signal using a shift-invariant LDPC convolutional coding, where the shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph including a first plurality of streams of check nodes and a second plurality of streams of variable nodes, where an LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes; and means for transmitting, to a second device, the encoded signal, where the encoded signal includes coded bits corresponding to the second plurality of streams of variable nodes. The apparatus 2204 may further include means for performing any of the aspects described in connection with the flowcharts in FIG. 18 and FIG. 19, and / or aspects performed by the UE 1702 in FIG. 17. The means may be the component 198 of the apparatus 2204 configured to perform the functions recited by the means. As described supra, the apparatus 2204 may include the TX processor 368, the RX processor 356, and the controller / processor 359. As such, in one configuration, the means may be the TX processor 368, the RX processor 356, and / or the controller / processor 359 configured to perform the functions recited by the means.
[0168] FIG. 23 is a diagram 2300 illustrating an example of a hardware implementation for a network entity 2302. The network entity 2302 may be a BS, a component of a BS, or may implement BS functionality. The network entity 2302 may include at least one of a CU 2310, a DU 2330, or an RU 2340. For example, depending on the layer functionality handled by the component 199, the network entity 2302 may include the CU 2310; both the CU 2310 and the DU 2330; each of the CU 2310, the DU 2330, and the RU 2340; the DU 2330; both the DU 2330 and the RU 2340; or the RU 2340. The CU 2310 may include at least one CU processor (or processing circuitry) 2312. The CU processor (s) (or processing circuitry) 2312 may include on-chip memory (or memory circuitry) 2312' . In some aspects, the CU 2310 may further include additional memory modules 2314 and a communications interface 2318. The CU 2310 communicates with the DU 2330 through a midhaul link, such as an F1 interface. The DU 2330 may include at least one DU processor (or processing circuitry) 2332. The DU processor (s) (or processing circuitry) 2332 may include on-chip memory (or memory circuitry) 2332' . In some aspects, the DU 2330 may further include additional memory modules 2334 and a communications interface 2338. The DU 2330 communicates with the RU 2340 through a fronthaul link. The RU 2340 may include at least one RU processor (or processing circuitry) 2342. The RU processor (s) (or processing circuitry) 2342 may include on-chip memory (or memory circuitry) 2342' . In some aspects, the RU 2340 may further include additional memory modules 2344, one or more transceivers 2346, antennas 2380, and a communications interface 2348. The RU 2340 communicates with the UE 104. The on-chip memory (or memory circuitry) 2312' , 2332' , 2342' and the additional memory modules 2314, 2334, 2344 may each be considered a computer-readable medium / memory (or memory circuitry) . Each computer-readable medium / memory (or memory circuitry) may be non-transitory. Each of the processors (or processing circuitry) 2312, 2332, 2342 is responsible for general processing, including the execution of software stored on the computer-readable medium / memory (or memory circuitry) . The software, when executed by the corresponding processor (s) (or processing circuitry) causes the processor (s) (or processing circuitry) to perform the various functions described supra. The computer-readable medium / memory (or memory circuitry) may also be used for storing data that is manipulated by the processor (s) (or processing circuitry) when executing software.
[0169] As discussed supra, the component 199 may be configured to receive, from a transmitting device, an encoded signal, where the encoded signal is encoded using a shift-invariant LDPC convolutional coding, where the shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph including a first plurality of streams of check nodes and a second plurality of streams of variable nodes, where an LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes; and decode the encoded signal to obtain a decoded signal. The component 199 may be further configured to perform any of the aspects described in connection with the flowcharts in FIG. 20 and FIG. 21, and / or performed by the base station 1704 in FIG. 17. The component 199 may be within one or more processors (or processing circuitry) of one or more of the CU 2310, DU 2330, and the RU 2340. The component 199 may be one or more hardware components specifically configured to carry out the stated processes / algorithm, implemented by one or more processors configured to perform the stated processes / algorithm, stored within a computer-readable medium for implementation by one or more processors, or some combination thereof. When multiple processors are implemented, the multiple processors may perform the stated processes / algorithm individually or in combination. The network entity 2302 may include a variety of components configured for various functions. In one configuration, the network entity 2302 includes means for receiving, from a transmitting device, an encoded signal, where the encoded signal is encoded using a shift-invariant LDPC convolutional coding, where the shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph including a first plurality of streams of check nodes and a second plurality of streams of variable nodes, where an LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes; and means for decoding the encoded signal to obtain a decoded signal. The network entity 2302 may further include means for performing any of the aspects described in connection with the flowcharts in FIG. 20 and FIG. 21, and / or aspects performed by the base station 1704 in FIG. 17. The means may be the component 199 of the network entity 2302 configured to perform the functions recited by the means. As described supra, the network entity 2302 may include the TX processor 316, the RX processor 370, and the controller / processor 375. As such, in one configuration, the means may be the TX processor 316, the RX processor 370, and / or the controller / processor 375 configured to perform the functions recited by the means.
[0170] This disclosure provides a method for wireless communication at a UE. The method may include encoding an input signal into an encoded signal using a shift-invariant LDPC convolutional coding, where the shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph including a first plurality of streams of check nodes and a second plurality of streams of variable nodes, where an LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes; and transmitting, to a second device, the encoded signal, where the encoded signal includes coded bits corresponding to the second plurality of streams of variable nodes. By enabling a more compact representation of codes compared to traditional spatially coupled LDPC block codes, the methods reduce the complexity in the encoding and decoding processes, thereby enhancing wireless communication efficiency. Additionally, by enabling the selection of a coding scheme (e.g., LDPC block coding or LDPC convolutional coding) based on code rate and code block size, the methods allow for the coding scheme to be tailored to actual conditions, thereby increasing the flexibility in code construction.
[0171] It is understood that the specific order or hierarchy of blocks in the processes / flowcharts disclosed is an illustration of example approaches. Based upon design preferences, it is understood that the specific order or hierarchy of blocks in the processes / flowcharts may be rearranged. Further, some blocks may be combined or omitted. The accompanying method claims present elements of the various blocks in a sample order, and are not limited to the specific order or hierarchy presented.
[0172] The previous description is provided to enable any person skilled in the art to practice the various aspects described herein. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects. Thus, the claims are not limited to the aspects described herein, but are to be accorded the full scope consistent with the language claims. Reference to an element in the singular does not mean “one and only one” unless specifically so stated, but rather “one or more. ” Terms such as “if, ” “when, ” and “while” do not imply an immediate temporal relationship or reaction. That is, these phrases, e.g., “when, ” do not imply an immediate action in response to or during the occurrence of an action, but simply imply that if a condition is met then an action will occur, but without requiring a specific or immediate time constraint for the action to occur. The word “exemplary” is used herein to mean “serving as an example, instance, or illustration. ” Any aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects. Unless specifically stated otherwise, the term “some” refers to one or more. Combinations such as “at least one of A, B, or C, ” “one or more of A, B, or C, ” “at least one of A, B, and C, ” “one or more of A, B, and C, ” and “A, B, C, or any combination thereof” include any combination of A, B, and / or C, and may include multiples of A, multiples of B, or multiples of C. Specifically, combinations such as “at least one of A, B, or C, ” “one or more of A, B, or C, ” “at least one of A, B, and C, ” “one or more of A, B, and C, ” and “A, B, C, or any combination thereof” may be A only, B only, C only, A and B, A and C, B and C, or A and B and C, where any such combinations may contain one or more member or members of A, B, or C. Sets should be interpreted as a set of elements where the elements number one or more. Accordingly, for a set of X, X would include one or more elements. When at least one processor is configured to perform a set of functions, the at least one processor, individually or in any combination, is configured to perform the set of functions. Accordingly, each processor of the at least one processor may be configured to perform a particular subset of the set of functions, where the subset is the full set, a proper subset of the set, or an empty subset of the set. A processor may be referred to as processor circuitry. A memory / memory module may be referred to as memory circuitry. If a first apparatus receives data from or transmits data to a second apparatus, the data may be received / transmitted directly between the first and second apparatuses, or indirectly between the first and second apparatuses through a set of apparatuses. A device configured to “output” data or “provide” data, such as a transmission, signal, or message, may transmit the data, for example with a transceiver, or may send the data to a device that transmits the data. A device configured to “obtain” data, such as a transmission, signal, or message, may receive, for example with a transceiver, or may obtain the data from a device that receives the data. Information stored in a memory includes instructions and / or data. All structural and functional equivalents to the elements of the various aspects described throughout this disclosure that are known or later come to be known to those of ordinary skill in the art are expressly incorporated herein by reference and are encompassed by the claims. Moreover, nothing disclosed herein is dedicated to the public regardless of whether such disclosure is explicitly recited in the claims. The words “module, ” “mechanism, ” “element, ” “device, ” and the like may not be a substitute for the word “means. ” As such, no claim element is to be construed as a means plus function unless the element is expressly recited using the phrase “means for. ”
[0173] As used herein, the phrase “based on” shall not be construed as a reference to a closed set of information, one or more conditions, one or more factors, or the like. In other words, the phrase “based on A” (where “A” may be information, a condition, a factor, or the like) shall be construed as “based at least on A” unless specifically recited differently.
[0174] The following aspects are illustrative only and may be combined with other aspects or teachings described herein, without limitation.
[0175] Aspect 1 is a method of wireless communication at a first device. The method includes encoding an input signal into an encoded signal using a shift-invariant LDPC convolutional coding, wherein the shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph comprising a first plurality of streams of check nodes and a second plurality of streams of variable nodes, wherein an LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes; and transmitting, to a second device, the encoded signal, wherein the encoded signal comprises coded bits corresponding to the second plurality of streams of variable nodes.
[0176] Aspect 2 is the method of aspect 1, wherein a first cardinality of the first plurality of streams of check nodes equals a number of check nodes in the LDPC base graph, and a second cardinality of the second plurality of streams of variable nodes equals to a number of variable nodes in the LDPC base graph.
[0177] Aspect 3 is the method of aspect 2, wherein an LDPC base matrix corresponding to the LDPC base graph has the first cardinality of rows and the second cardinality of columns, wherein the rows respectively correspond to a first set of check nodes, and the columns respectively correspond to a second set of variable nodes, and wherein the first cardinality is less than the second cardinality.
[0178] Aspect 4 is the method of any of aspects 1 to 3, wherein the second set of variable nodes includes one or more state nodes, wherein the coded bits corresponding to the one or more state nodes are not transmitted.
[0179] Aspect 5 is the method of any of aspects 1 to 3, wherein entries of the LDPC base matrix include non-negative integers, and an entry of the LDPC base matrix represents a number of edges connecting a corresponding variable node and a corresponding check node in the LDPC base graph.
[0180] Aspect 6 is the method of aspect 5, wherein the LDPC base graph is associated with a set of shift-invariant values, wherein each shift-invariant value in the set of shift-invariant values includes an integer greater than or equal to zero and less than a local coupling factor.
[0181] Aspect 7 is the method of aspect 6, wherein each shift-invariant value in the set of shift-invariant values is associated with an edge of the LDPC base graph, and wherein a third cardinality of the set of shift-invariant values equals a fourth cardinality of a set of edges of the LDPC base graph.
[0182] Aspect 8 is the method of aspect 7, wherein the set of shift-invariant values has a one-to-one mapping to the set of edges of the LDPC base graph.
[0183] Aspect 9 is the method of any of aspects 6 to 8, where the method further includes determining the LDPC shift-invariant graph based on the LDPC base graph, the local coupling factor, the set of shift-invariant values, and a global shift size, wherein the global shift size is an integer multiple of the local coupling factor.
[0184] Aspect 10 is the method of aspect 9, wherein the position index of a variable node is greater than or equal to -Z and less than N+Z, wherein Z is the local coupling factor, and N is the global shift size, the position index of a check node is greater than or equal to zero and less than N+Z, the node index of the check node is less than a number of check nodes in the first set of check nodes, and the node index of the variable node is less than a number of variable nodes in the second set of variable nodes.
[0185] Aspect 11 is the method of aspect 10, wherein the second plurality of streams of variable nodes include one or more boundary variable nodes, wherein the boundary variable nodes have position indices less than zero or greater than or equal to the global shift size.
[0186] Aspect 12 is the method of aspect 11, wherein the boundary variable nodes correspond to a fixed coded value.
[0187] Aspect 13 is the method of aspect 11, wherein two boundary variable nodes with the position indices differing by the integer multiple of the local coupling factor correspond to a same coded value.
[0188] Aspect 14 is the method of any of aspects 10 to 13, wherein each check node with a first order index is respectively connected to the variable node with a second order index, wherein each check node with the first order index has a same position index interval to a connected variable node.
[0189] Aspect 15 is the method of any of aspects 10 to 14, where the method further includes determining the shift-invariant LDPC convolutional coding based on the LDPC shift-invariant graph, wherein a set of codewords for the shift-invariant LDPC convolutional coding for each check node is based on a sum of code bits corresponding to connected variable nodes of the check node, wherein the connected variable nodes do not include boundary variable nodes.
[0190] Aspect 16 is the method of any of aspects 10 to 14, where the method further includes determining a linear filter based on the shift-invariant LDPC convolutional coding, and wherein encoding the input signal into the encoded signal comprises: encoding, using the linear filter, the input signal into the encoded signal.
[0191] Aspect 17 is the method of aspect 16, wherein determining the linear filter comprises: determining an LDPC parity check matrix based on the LDPC base matrix, wherein the LDPC parity check matrix has a same size of the LDPC base matrix, and entries of the LDPC parity check matrix include polynomials, and exponents of the entries of the LDPC parity check matrix are based on the set of shift-invariant values; determining a generator matrix based on the LDPC parity check matrix; and determining the linear filter based on the generator matrix.
[0192] Aspect 18 is the method of any of aspects 10 to 17, wherein the shift-invariant LDPC convolutional coding corresponds to multiple virtual code blocks (CBs) or multiple virtual transport blocks (TBs) .
[0193] Aspect 19 is the method of aspect 18, where the method further includes retransmitting, in response to a decode failure on one virtual CB of the multiple virtual CBs or one virtual TB of the multiple virtual TBs, the shift-invariant LDPC convolutional coding corresponding to the one virtual CB or the one virtual TB.
[0194] Aspect 20 is the method of any of aspects 10 to 19, wherein encoding the input signal into the encoded signal using the LDPC convolutional coding comprises: encoding, in response to a convolutional coding condition being met, the input signal into the encoded signal using the shift-invariant LDPC convolutional coding.
[0195] Aspect 21 is the method of aspect 20, where the method further includes encoding, in response to the convolutional coding condition not being met, the input signal into the encoded signal using an LDPC block code.
[0196] Aspect 22 is the method of aspect 21, wherein the LDPC block code and the LDPC convolutional coding are based on a same base graph.
[0197] Aspect 23 is the method of aspect 21, wherein the convolutional coding condition comprises one or more of: a code block size being greater than a threshold size, or a modulation order being greater than a threshold order.
[0198] Aspect 24 is an apparatus for wireless communication at a first device, comprising: a processing system that includes processor circuitry and memory circuitry that stores code and is coupled with the processor circuitry, the processing system configured to cause the first device to perform the method of one or more of aspects 1-23.
[0199] Aspect 25 is an apparatus for wireless communication at a first device, comprising: at least one memory; and at least one processor coupled to the at least one memory and, where the at least one processor, individually or in any combination, is configured to perform the method of any of aspects 1-23.
[0200] Aspect 26 is the apparatus for wireless communication at a first device, comprising means for performing each step in the method of any of aspects 1-23.
[0201] Aspect 27 is an apparatus of any of aspects 24-26, further comprising a transceiver configured to receive or to transmit in association with the method of any of aspects 1-23.
[0202] Aspect 28 is a computer-readable medium (e.g., a non-transitory computer-readable medium) storing computer executable code at a first device, the code when executed by at least one processor causes the at least one processor to, individually or in any combination, perform the method of any of aspects 1-23.
[0203] Aspect 29 is a method of wireless communication at a receiving device. The method includes receiving, from a transmitting device, an encoded signal, wherein the encoded signal is encoded using a shift-invariant low-density parity-check (LDPC) convolutional coding, wherein the shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph comprising a first plurality of streams of check nodes and a second plurality of streams of variable nodes, wherein an LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes; and decoding the encoded signal to obtain a decoded signal.
[0204] Aspect 30 is the method of aspect 29, wherein a first cardinality of the first plurality of streams of check nodes equals a number of check nodes in the LDPC base graph, and a second cardinality of the second plurality of streams of variable nodes equals to a number of variable nodes in the LDPC base graph.
[0205] Aspect 31 is the method of aspect 30, wherein an LDPC base matrix corresponding to the LDPC base graph has the first cardinality of rows and the second cardinality of columns, wherein the rows respectively correspond to a first set of check nodes, and the columns respectively correspond to a second set of variable nodes, and wherein the first cardinality is less than the second cardinality.
[0206] Aspect 32 is the method of any of aspects 29 to 31, wherein entries of the LDPC base matrix include non-negative integers, and an entry of the LDPC base matrix represents a number of edges connecting a corresponding variable node and a corresponding check node in the LDPC base graph, and wherein the LDPC base graph is associated with a set of shift-invariant values, wherein each shift-invariant value in the set of shift-invariant values includes an integer greater than or equal to zero and less than a local coupling factor.
[0207] Aspect 33 is the method of aspect 29, wherein decoding the encoded signal to obtain the decoded signal comprises: applying a moving window at a first end of the LDPC shift-invariant graph, wherein the moving window covers a first number of position indices in the LDPC shift-invariant graph; sequentially shifting the moving window a step size toward a second end of the LDPC shift-invariant graph at each time instant of a set of time instants; and decoding coded bits corresponding to the variable nodes moving out of the moving window at each time instant of the set of time instants.
[0208] Aspect 34 is an apparatus for wireless communication at a receiving device, comprising: a processing system that includes processor circuitry and memory circuitry that stores code and is coupled with the processor circuitry, the processing system configured to cause the network entity to perform the method of one or more of aspects 29-33.
[0209] Aspect 35 is an apparatus for wireless communication at a receiving device, comprising: at least one memory; and at least one processor coupled to the at least one memory and, where the at least one processor, individually or in any combination, is configured to perform the method of any of aspects 29-33.
[0210] Aspect 36 is the apparatus for wireless communication at a receiving device, comprising means for performing each step in the method of any of aspects 29-33.
[0211] Aspect 37 is an apparatus of any of aspects 34-36, further comprising a transceiver configured to receive or to transmit in association with the method of any of aspects 29-33.
[0212] Aspect 38 is a computer-readable medium (e.g., a non-transitory computer-readable medium) storing computer executable code at a receiving device, the code when executed by at least one processor causes the at least one processor to, individually or in any combination, perform the method of any of aspects 29-33.
Claims
1.An apparatus for wireless communication at a first device, comprising:at least one memory; andat least one processor coupled to the at least one memory and, based at least in part on information stored in the at least one memory, the at least one processor, individually or in any combination, is configured to cause the first device to:encode an input signal into an encoded signal using a shift-invariant low-density parity-check (LDPC) convolutional coding, wherein the shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph comprising a first plurality of streams of check nodes and a second plurality of streams of variable nodes, wherein an LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes; andtransmit, to a second device, the encoded signal, wherein the encoded signal comprises coded bits corresponding to the second plurality of streams of variable nodes.2.The apparatus of claim 1, further comprising a transceiver coupled to the at least one processor, wherein to transmit the encoded signal, the at least one processor, individually or in any combination, is configured to cause the first device to transmit the encoded signal via the transceiver, and wherein a first cardinality of the first plurality of streams of check nodes equals a number of check nodes in the LDPC base graph, and a second cardinality of the second plurality of streams of variable nodes equals to a number of variable nodes in the LDPC base graph.3.The apparatus of claim 2, wherein an LDPC base matrix corresponding to the LDPC base graph has the first cardinality of rows and the second cardinality of columns, wherein the rows respectively correspond to a first set of check nodes, and the columns respectively correspond to a second set of variable nodes, and wherein the first cardinality is less than the second cardinality.4.The apparatus of claim 3, wherein the second set of variable nodes includes one or more state nodes, wherein the coded bits corresponding to the one or more state nodes are not transmitted.5.The apparatus of claim 3, wherein entries of the LDPC base matrix include non-negative integers, and an entry of the LDPC base matrix represents a number of edges connecting a corresponding variable node and a corresponding check node in the LDPC base graph.6.The apparatus of claim 5, wherein the LDPC base graph is associated with a set of shift-invariant values, wherein each shift-invariant value in the set of shift-invariant values includes an integer greater than or equal to zero and less than a local coupling factor.7.The apparatus of claim 6, wherein each shift-invariant value in the set of shift-invariant values is associated with an edge of the LDPC base graph, and wherein a third cardinality of the set of shift-invariant values equals a fourth cardinality of a set of edges of the LDPC base graph.8.The apparatus of claim 7, wherein the set of shift-invariant values has a one-to-one mapping to the set of edges of the LDPC base graph.9.The apparatus of claim 6, wherein the at least one processor, individually or in any combination, is further configured to cause the first device to:determine the LDPC shift-invariant graph based on the LDPC base graph, the local coupling factor, the set of shift-invariant values, and a global shift size, wherein the global shift size is an integer multiple of the local coupling factor.10.The apparatus of claim 9, whereinthe position index of a check node in the first plurality of streams of check nodes is greater than or equal to zero and less than N+Z, wherein Z is the local coupling factor, and N is the global shift size,the position index of a variable node in the second plurality of streams of variable nodes is greater than or equal to -Z and less than N+Z,a node index of the check node in the first plurality of streams of check nodes is less than a first number of check nodes in the first set of check nodes, andthe node index of the variable node in the second plurality of streams of variable nodes is less than a second number of variable nodes in the second set of variable nodes.11.The apparatus of claim 10, wherein the second plurality of streams of variable nodes include one or more boundary variable nodes, wherein the boundary variable nodes have position indices less than zero or greater than or equal to the global shift size.12.The apparatus of claim 11, wherein the boundary variable nodes correspond to a fixed coded value.13.The apparatus of claim 11, wherein two boundary variable nodes with the position indices differing by the integer multiple of the local coupling factor correspond to a same coded value.14.The apparatus of claim 10, wherein each check node with a first order index is respectively connected to the variable node with a second order index, wherein each check node with the first order index has a same position index interval to a connected variable node.15.The apparatus of claim 10, wherein the at least one processor, individually or in any combination, is configured to cause the first device to:determine the shift-invariant LDPC convolutional coding based on the LDPC shift-invariant graph, wherein a set of codewords for the shift-invariant LDPC convolutional coding for each check node is based on a sum of code bits corresponding to connected variable nodes of the check node, wherein the connected variable nodes do not include boundary variable nodes.16.The apparatus of claim 10, wherein the at least one processor, individually or in any combination, is further configured to cause the first device to:determine a linear filter based on the shift-invariant LDPC convolutional coding, and wherein to encode the input signal into the encoded signal, the at least one processor, individually or in any combination, is configured to cause the first device to:encode, using the linear filter, the input signal into the encoded signal.17.The apparatus of claim 16, wherein to determine the linear filter, the at least one processor, individually or in any combination, is configured to cause the first device to:determine an LDPC parity check matrix based on the LDPC base matrix, wherein the LDPC parity check matrix has a same size of the LDPC base matrix, and entries of the LDPC parity check matrix include polynomials, and exponents of the entries of the LDPC parity check matrix are based on the set of shift-invariant values;determine a generator matrix based on the LDPC parity check matrix; anddetermine the linear filter based on the generator matrix.18.The apparatus of claim 10, wherein the shift-invariant LDPC convolutional coding corresponds to multiple virtual code blocks (CBs) or multiple virtual transport blocks (TBs) .19.The apparatus of claim 18, wherein the at least one processor, individually or in any combination, is further configured to cause the first device to:retransmit, in response to a decode failure on one virtual CB of the multiple virtual CBs or one virtual TB of the multiple virtual TBs, the shift-invariant LDPC convolutional coding corresponding to the one virtual CB or the one virtual TB.20.The apparatus of claim 10, wherein to encode the input signal into the encoded signal using the LDPC convolutional coding, the at least one processor, individually or in any combination, is configured to cause the first device to:encode, in response to a convolutional coding condition being met, the input signal into the encoded signal using the shift-invariant LDPC convolutional coding.21.The apparatus of claim 20, wherein the at least one processor, individually or in any combination, is further configured to cause the first device to:encode, in response to the convolutional coding condition not being met, the input signal into the encoded signal using an LDPC block code.22.The apparatus of claim 21, wherein the LDPC block code and the LDPC convolutional coding are based on a same base graph.23.The apparatus of claim 21, wherein the convolutional coding condition comprises one or more of:a code block size being greater than a threshold size, ora modulation order being greater than a threshold order.24.An apparatus for wireless communication at a receiving device, comprising:at least one memory; andat least one processor coupled to the at least one memory and, based at least in part on information stored in the at least one memory, the at least one processor, individually or in any combination, is configured to cause the receiving device to:receive, from a transmitting device, an encoded signal, wherein the encoded signal is encoded using a shift-invariant low-density parity-check (LDPC) convolutional coding, wherein the shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph comprising a first plurality of streams of check nodes and a second plurality of streams of variable nodes, wherein an LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes; anddecode the encoded signal to obtain a decoded signal.25.The apparatus of claim 24, further comprising a transceiver coupled to the at least one processor, wherein to receive the encoded signal, the at least one processor, individually or in any combination, is configured to cause the receiving device to receive the encoded signal via the transceiver, wherein a first cardinality of the first plurality of streams of check nodes equals a number of check nodes in the LDPC base graph, and a second cardinality of the second plurality of streams of variable nodes equals to a number of variable nodes in the LDPC base graph.26.The apparatus of claim 25, wherein an LDPC base matrix corresponding to the LDPC base graph has the first cardinality of rows and the second cardinality of columns, wherein the rows respectively correspond to a first set of check nodes, and the columns respectively correspond to a second set of variable nodes, and wherein the first cardinality is less than the second cardinality.27.The apparatus of claim 26, wherein entries of the LDPC base matrix include non-negative integers, and an entry of the LDPC base matrix represents a number of edges connecting a corresponding variable node and a corresponding check node in the LDPC base graph, wherein the LDPC base graph is associated with a set of shift-invariant values, wherein each shift-invariant value in the set of shift-invariant values includes an integer greater than or equal to zero and less than a local coupling factor.28.The apparatus of claim 24, wherein to decode the encoded signal to obtain the decoded signal, the at least one processor, individually or in any combination, is configured to cause the receiving device to:apply a moving window at a first end of the LDPC shift-invariant graph, wherein the moving window covers a first number of position indices in the LDPC shift-invariant graph; andsequentially shift the moving window a step size toward a second end of the LDPC shift-invariant graph at each time instant of a set of time instants; anddecode coded bits corresponding to the variable nodes moving out of the moving window at each time instant of the set of time instants.29.A method of wireless communication at a first device, comprising:encoding an input signal into an encoded signal using a shift-invariant low-density parity-check (LDPC) convolutional code, wherein the shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph comprising a first plurality of streams of check nodes and a second plurality of streams of variable nodes, wherein an LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes; andtransmitting, to a second device, the encoded signal, wherein the encoded signal comprises coded bits corresponding to the second plurality of streams of variable nodes.30.A method of wireless communication at a receiving device, comprising:receiving, from a transmitting device, an encoded signal, wherein the encoded signal is encoded using a shift-invariant low-density parity-check (LDPC) convolutional code, wherein the shift-invariant LDPC convolutional coding is associated with an LDPC shift-invariant graph comprising a first plurality of streams of check nodes and a second plurality of streams of variable nodes, wherein an LDPC base graph corresponding to a check node in the first plurality of streams of check nodes or a variable node in the second plurality of streams of variable nodes is independent of a position index of the check node in the first plurality of streams of check nodes or the variable node in the second plurality of streams of variable nodes; anddecoding the encoded signal to obtain a decoded signal.
Citation Information
Patent Citations
Satellite-borne-based variable bit width LDPC parallel coding system and method
CN118074859A
Offset Lifting Method
US20180226992A1
Multi-Label Offset Lifting Method
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