Display panel, display screen module, and electronic device

By setting spacer pillars in the display panel to block the lateral transport of charge carriers, the pixel crosstalk problem of Tandem OLED display devices is solved, improving display effect and brightness, while also enhancing physical performance and production yield.

WO2026091646A1PCT designated stage Publication Date: 2026-05-07HUAWEI TECH CO LTD
View PDF 5 Cites 0 Cited by

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
HUAWEI TECH CO LTD
Filing Date
2025-06-30
Publication Date
2026-05-07

AI Technical Summary

Technical Problem

Tandem OLED display devices suffer from severe pixel crosstalk due to the high lateral mobility of charge carriers in the charge generation layer.

Method used

Spacer pillars are set in the display panel. By limiting the angle difference between the spacer pillars and the first protrusion to be greater than or equal to 20 degrees, the lateral transmission of charge carriers is blocked, ensuring that the common layer is discontinuous on the sidewall of the spacer pillars and blocking the lateral transmission of charge carriers between adjacent sub-pixels.

Benefits of technology

It effectively reduces pixel crosstalk, improves the display effect and brightness of the display panel, enhances the physical performance of the display panel, and increases production yield.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN2025105904_07052026_PF_FP_ABST
    Figure CN2025105904_07052026_PF_FP_ABST
Patent Text Reader

Abstract

The present application provides a display panel, a display screen module, and an electronic device. The display panel comprises a pixel definition layer and spacers. The pixel definition layer is provided between adjacent sub-pixel regions, and in a direction parallel to a plane where the display panel is located, the pixel definition layer comprises a plurality of first protrusions. The spacers are provided between adjacent first protrusions. A first included angle is formed between a first position on each spacer and a first plane, wherein the first position is the position of each spacer close to the first plane. A second included angle is formed between a second position on each first protrusion and the first plane, wherein the second position is the position of each first protrusion close to the first plane. The difference between the first included angle and the second included angle is 20° or more. The first plane is a plane where a planarization layer is located. By adding the spacers and defining the angular difference between the spacers and the first protrusions, the lateral transport of carriers in the display panel is blocked, thereby effectively alleviating the problem of pixel crosstalk and improving the display effect of the display panel.
Need to check novelty before this filing date? Find Prior Art

Description

Display panels, display modules, and electronic devices

[0001] This application claims priority to Chinese Patent Application No. 202411531797.8, filed with the State Intellectual Property Office of China on October 29, 2024, entitled "Display Panel, Display Module and Electronic Device", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of terminal device hardware, specifically to a display panel, a display module, and an electronic device. Background Technology

[0003] Organic light-emitting diode (OLED) displays offer numerous advantages, such as thinness, high contrast, high response speed, and flexibility. With the development and upgrading of high dynamic range (HDR) technology and the demands of outdoor applications, consumers are increasingly demanding higher brightness from display products. Tandem OLEDs represent the next generation of high-brightness, high-efficiency, and long-life electroluminescence (EL) devices. Currently, most display manufacturers are seeking high-quality tandem OLED integrated solutions; however, due to the high lateral mobility of charge carriers in the charge generation layer (CGL), tandem OLEDs suffer from significant pixel crosstalk issues.

[0004] Therefore, how to reduce pixel crosstalk in OLED display devices (especially Tandem OLED display devices) is a problem worth considering. Summary of the Invention

[0005] This application provides a display panel, a display module, and an electronic device. By adding spacer columns to the display panel, the lateral transmission of charge carriers in the display panel is blocked, thereby reducing the problem of pixel crosstalk and improving the display effect of the display panel.

[0006] In a first aspect, a display panel is provided, the display panel having a plurality of sub-pixel regions, the display panel comprising: a substrate, a planarization layer, a first pixel definition layer, and spacers; wherein, the planarization layer is located on the substrate; the first pixel definition layer is located on the side of the planarization layer away from the substrate, the first pixel definition layer is disposed between adjacent sub-pixel regions and along a first direction, the first pixel definition layer including a plurality of first protrusions, the first direction being parallel to the plane of the display panel; the spacers are disposed between adjacent first protrusions, the angle between a first position on the spacer and the first plane is a first angle, the first position being a position of the spacer close to the first plane, the angle between a second position on the first protrusion and the first plane is a second angle, the second position being a position of the first protrusion close to the first plane, the difference between the first angle and the second angle is greater than or equal to 20°, and the first plane is the plane of the planarization layer.

[0007] In the display panel provided in this application, by adding spacer pillars and limiting the angle difference between the spacer pillars and the first protrusion to be greater than or equal to 20 degrees, a large difference in the undulation degree between the spacer pillars and the first protrusion is achieved. As a result, when a common layer (including a hole injection layer, a hole transport layer, an electron transport layer, an electron injection layer, etc.) is set on the first protrusion and the spacer pillars, the common layer cannot effectively cover the sidewalls of the spacer pillars. The common layer is discontinuous, intermittently continuous, or broken at the sidewalls of the spacer pillars, thus preventing charge carriers (including holes and electrons) from being transversely transmitted through the common layer. In other words, it can block the transverse transmission of charge carriers (including holes and electrons) between adjacent sub-pixels, thereby effectively reducing the problem of pixel crosstalk and improving the display effect of the display panel.

[0008] Furthermore, in the first pixel definition layer comprising multiple first protrusions, the surface facing away from the substrate is more uneven, thereby making it easier for large-angle light rays emitted from any sub-pixel region to propagate through the waveguide of the first pixel definition layer facing away from the substrate to exit from the uneven first pixel definition layer. This results in more large-angle light rays exiting from the first pixel definition layer and being used for display, thereby improving the display brightness of the display panel.

[0009] In one possible implementation, the cross-sectional shape of the spacer can be rectangular, the first included angle can be the angle between the sidewall of the rectangle or its extension and the plane where the planarization layer is located, and the first position can be a location on the sidewall of the spacer close to the planarization layer (or the location of any point on the sidewall of the spacer). Alternatively, the cross-sectional shape of the spacer can be arc-shaped, the first included angle can be the angle between the tangent of the arc or its extension at the first position and the plane where the planarization layer is located, and the first position can be a location on the arc close to the planarization layer, for example, the first position can be a location in the lower third of the entire arc.

[0010] In one possible implementation, the cross-sectional shape of the first protrusion can be arc-shaped, and the second included angle can be the angle between the tangent of the arc at the second position or the extension of the tangent and the plane where the planarization layer is located. The second position can be a location on the arc close to the planarization layer, for example, a location in the lower third of the entire arc. Alternatively, the cross-sectional shape of the first protrusion can be rectangular, and the second included angle can be the angle between the sidewall of the rectangle or the extension of the sidewall and the plane where the planarization layer is located. The second position can be a location on the sidewall of the first protrusion close to the planarization layer (or the location of any point on the sidewall of the first protrusion).

[0011] In conjunction with the first aspect, in some implementations of the first aspect, the display panel further includes an anode, a common layer, and a cathode, wherein the anode is located on the side of the planarization layer away from the substrate and is located in the sub-pixel region; the common layer is located on the side of the first pixel definition layer and the anode away from the substrate, and the common layer is used to transport charge carriers; and the cathode is located on the side of the common layer away from the substrate.

[0012] In the display panel provided in this application, the areas corresponding to the anode and cathode can emit light, while the area corresponding to the first pixel definition layer and cathode does not emit light. The first pixel definition layer can define the boundary of each pixel in the display panel, reducing the probability of light-emitting materials in different pixel areas diffusing into each other. However, since the common layer is integrally disposed on the first pixel definition layer and the anode, the related technology may have the problem of lateral transport of charge carriers (including holes and electrons) between adjacent sub-pixels. However, this application, by setting spacer pillars, makes the common layer discontinuous, intermittently continuous, or broken at the sidewall position of the spacer pillars, thereby blocking the lateral transport of charge carriers (including holes and electrons) between adjacent sub-pixels, thus effectively reducing the problem of pixel crosstalk and improving the display effect of the display panel.

[0013] In one possible implementation, the common layer includes a hole control layer, a light-emitting layer, and an electron control layer stacked along a second direction, where the second direction is the direction from the substrate to the first pixel definition layer, thereby forming a single-device OLED. In other words, the display panel provided in this application can be a single-device OLED. By providing the spacer pillars provided in this application in the single-device OLED, the pixel crosstalk problem in the single-device OLED can be reduced.

[0014] In another possible implementation, the common layer includes a first light-emitting stack, a charge-generating layer, and a second light-emitting stack stacked along a second direction. The first light-emitting stack includes a first hole control layer, a first light-emitting layer, and a first electron control layer stacked along the second direction. Each of the second light-emitting stacks includes a second hole control layer, a second light-emitting layer, and a second electron control layer stacked along the second direction, thereby forming a Tandem OLED. In other words, the display panel provided in this application can be a Tandem OLED. By setting the spacer pillars provided in this application in the Tandem OLED, the severe pixel crosstalk problem caused by the charge-generating layer of the Tandem OLED can be effectively solved.

[0015] In one possible implementation, the display panel further includes an encapsulation layer located on the side of the cathode away from the substrate.

[0016] In the display panel provided in this application, an encapsulation layer is provided to seal the display panel, preventing moisture, oxygen, and foreign matter such as dust particles from entering the display panel. The encapsulation layer can have a certain mechanical strength, thereby improving the physical properties of the display panel, such as scratch resistance and abrasion resistance.

[0017] In conjunction with the first aspect, in some implementations of the first aspect, the range of the first included angle is 60°-150°, and the range of the second included angle is 10°-40°. In some examples, the range of the first included angle can be 60°-150°, and the range of the second included angle can be 15°-35°.

[0018] For example, the value of the first included angle can be 60°, 65°, 70°, 75°, 80°, 85°, 90°, 95°, 100°, 105°, 110°, 115°, 120°, 125°, 130°, 135°, 140°, 145°, 150°, etc.; the value of the second included angle can be 10°, 12°, 15°, 18°, 19°, 20°, 21°, 22°, 23°, 24°, 25°, 26°, 27°, 28°, 29°, 30°, 31°, 32°, 33°, 34°, 35°, 36°, 37°, 38°, 39°, 40°, etc. This application does not specifically limit the values ​​of the first and second included angles.

[0019] In the display panel provided in this application, by limiting the angle of the first pixel definition layer to below 40° and the angle of the spacer post to above 60°, with the difference between the two being greater than or equal to 20°, the continuity and low impedance characteristics of the cathode across the entire display surface can be guaranteed. At the same time, the common layer is made discontinuous, intermittently continuous, or broken at the sidewall position of the spacer post, thereby blocking the lateral transmission of carriers between adjacent sub-pixels, thus minimizing the occurrence of pixel crosstalk and improving the display effect of the display panel.

[0020] In conjunction with the first aspect, in some implementations of the first aspect, along the second direction, the thickness of the spacer post is less than or equal to the thickness of the first protrusion, the second direction is perpendicular to the first direction, and the second direction is the direction in which the substrate points to the first pixel definition layer.

[0021] In the display panel provided in this application, by setting the thickness of the spacer column to be less than or equal to the thickness of the first protrusion, problems such as the spacer column being scratched or falling off during the production process due to being too high can be avoided, thereby improving the production yield.

[0022] In one possible implementation, along the second direction, the thickness of the spacer post can be greater than the thickness of the first protrusion, but less than the thickness of the photoresist spacer layer PS. This can also avoid problems such as the spacer post being scratched or falling off during production and processing due to its excessive height, thereby improving production yield.

[0023] In conjunction with the first aspect, in some implementations of the first aspect, adjacent first protrusions are spaced apart; along the second direction, the thickness of the portion of the first pixel definition layer located between adjacent first protrusions is less than the thickness of the first protrusion, the second direction is perpendicular to the first direction, and the second direction is the direction in which the substrate points to the first pixel definition layer.

[0024] In the display panel provided in this application, by setting the thickness of the portion of the first pixel definition layer located between adjacent first protrusions to be less than the thickness of the first protrusions, the surface of the first pixel definition layer away from the substrate becomes more uneven, thereby making it easier for light to escape from the uneven first pixel definition layer, which is beneficial to improving the display brightness of the display panel.

[0025] Based on this, in some possible implementations, the surface of the multiple first protrusions facing away from the substrate is curved, which is beneficial for allowing more large-angle light rays propagating in the waveguide of the first pixel definition layer to exit from the first pixel definition layer and be used for display.

[0026] In conjunction with the first aspect, in some implementations of the first aspect, the thickness of the portion of the first pixel definition layer located between adjacent first protrusions is zero.

[0027] In the display panel provided in this application, by setting the thickness of the portion located between adjacent first protrusions in the first pixel definition layer to zero, the spacer pillars can directly contact the planarization layer, that is, the spacer pillars can be directly formed on the planarization layer, making the manufacturing process simpler.

[0028] In conjunction with the first aspect, in some implementations of the first aspect, along the second direction, the thickness of the spacer column ranges from 0.2 μm to 3 μm, and the thickness of the first protrusion ranges from 0.2 μm to 3 μm.

[0029] For example, along the second direction, the thickness of the spacer can be 0.2μm, 0.5μm, 0.8μm, 1μm, 1.2μm, 1.5μm, 1.8μm, 2μm, 2.2μm, 2.5μm, 2.8μm, 3μm, etc., and the thickness of the first protrusion can be 0.2μm, 0.5μm, 0.8μm, 1μm, 1.2μm, 1.5μm, 1.8μm, 2μm, 2.2μm, 2.5μm, 2.8μm, 3μm, etc. This application does not limit the specific values ​​of the thickness of the spacer and the thickness of the first protrusion, as long as they are within the corresponding range.

[0030] In the display panel provided in this application, by limiting the thickness of the spacer and the first protrusion, it is easy to manufacture. In other words, the thickness range of the spacer and the first protrusion is within the range of mass production.

[0031] In conjunction with the first aspect, in some implementations of the first aspect, along the second direction, the thickness of the portion of the first pixel definition layer located between adjacent first protrusions is greater than zero; and the sum of the thickness of the portion of the first pixel definition layer located between adjacent first protrusions and the thickness of the spacer post is less than or equal to the thickness of the first protrusion.

[0032] In the display panel provided in this application, by setting the thickness of the portion of the first pixel definition layer located between adjacent first protrusions to be greater than zero, the spacer can directly contact the first pixel definition layer, thus enriching the structure of the display panel. Furthermore, the sum of the thickness of the portion of the first pixel definition layer located between adjacent first protrusions and the thickness of the spacer is less than or equal to the thickness of the first protrusion. This avoids problems such as the spacer being scratched or falling off during manufacturing due to its height exceeding the first protrusion, thereby improving production yield.

[0033] In conjunction with the first aspect, in some implementations of the first aspect, along the second direction, the thickness of the portion of the first pixel definition layer located between adjacent first protrusions ranges from 0.1 μm to 2.5 μm, the thickness of the spacer column ranges from 0.2 μm to 2.5 μm, and the thickness of the first protrusion ranges from 0.2 μm to 3 μm.

[0034] For example, along the second direction, the thickness of the portion of the first pixel definition layer located between adjacent first protrusions can be 0.2μm, 0.4μm, 0.5μm, 0.8μm, 1μm, 1.2μm, 1.5μm, 1.8μm, 2μm, 2.2μm, 2.4μm, etc., the thickness of the spacer pillars can be 0.2μm, 0.5μm, 0.8μm, 1μm, 1.2μm, 1.5μm, 1.8μm, 2μm, 2.2μm, 2.5μm, etc., and the thickness of the first protrusions can be 0.2μm, 0.5μm, 0.8μm, 1μm, 1.2μm, 1.5μm, 1.8μm, 2μm, 2.2μm, 2.5μm, 2.8μm, 3μm, etc., and this application does not limit the specific values ​​of the above thicknesses.

[0035] In the display panel provided in this application, by limiting the thickness of the portion located between adjacent first protrusions, the spacer, and the first protrusion in the first pixel definition layer, it is convenient to manufacture. In other words, the above-mentioned thickness range is within the range of mass production.

[0036] In conjunction with the first aspect, in some implementations of the first aspect, along the first direction, the width of the spacer column ranges from 1μm to 10μm, the width of the first protrusion ranges from 1μm to 10μm, and the width of the first pixel definition layer ranges from 10μm to 30μm.

[0037] For example, along the first direction, the width of the spacer post can be 2μm, 3μm, 4μm, 5μm, 6μm, 7μm, 8μm, 9μm, etc., the width of the first protrusion can be 2μm, 3μm, 4μm, 5μm, 6μm, 7μm, 8μm, 9μm, etc., and the width of the first pixel definition layer can be 11μm, 12μm, 13μm, 14μm, 15μm, 16μm, 17μm, 18μm, 19μm, 20μm, 21μm, 22μm, 23μm, 24μm, 25μm, 26μm, 27μm, 28μm, 29μm, etc. This application does not limit the specific values ​​of the width of the spacer post, the width of the first protrusion, and the width of the first pixel definition layer.

[0038] In the display panel provided in this application, the widths of the spacer pillars, the first protrusion, and the first pixel definition layer are defined to facilitate manufacturing. In other words, the width range of the spacer pillars, the first protrusion, and the first pixel definition layer is within the range of mass production.

[0039] In conjunction with the first aspect, in some implementations of the first aspect, the plurality of first protrusions include a second protrusion and a third protrusion, and the spacer post is located between the second protrusion and the third protrusion; along the first direction, the difference between the first distance between the spacer post and the second protrusion and the second distance between the spacer post and the third protrusion is within a preset range.

[0040] For example, the preset range can be 0μm-5.5μm. In one possible implementation, the first distance and the second distance are equal. That is, the difference between the first distance between the spacer post and the second protrusion and the second distance between the spacer post and the third protrusion is zero.

[0041] For example, the first distance ranges from 0.5μm to 6μm, and the second distance ranges from 0.5μm to 6μm.

[0042] For example, the first distance and the second distance can be 1μm, 1.5μm, 2μm, 2.5μm, 3μm, 3.5μm, 4μm, 4.5μm, 5μm, 5.5μm, etc. This application does not specify the values ​​of the first distance and the second distance.

[0043] In the display panel provided in this application, considering the limitations of the manufacturing process, the distance between the spacer and the second protrusion and the distance between the spacer and the third protrusion along the first direction may be equal or unequal, and there may be some manufacturing errors. That is, the distance between the spacer and the second protrusion may be greater than the distance between the spacer and the third protrusion, or the distance between the spacer and the second protrusion may be less than the distance between the spacer and the third protrusion, or the distance between the spacer and the second protrusion and the distance between the spacer and the third protrusion may be equal.

[0044] In conjunction with the first aspect, in some implementations of the first aspect, the material of the spacer pillar is different from the material of the first pixel definition layer.

[0045] For example, the material of the first pixel definition layer can be organic polymers such as polyimide, siloxane, polyamide, and acrylic, while the material of the spacer pillars can be inorganic materials such as silicon nitride (SiNx), silicon oxide (SiOx), silicon dioxide and the intermediate phase of silicon nitride (SiON), or metals / metal oxides / alloys such as silver, aluminum, and indium tin oxide.

[0046] In the display panel provided in this application, since the angle of the spacer pillars needs to be made to a large angle of 60°-150°, the material of the spacer pillars is different from the material of the first pixel definition layer. The spacer pillars can be made of inorganic materials, metals, metal oxides or alloys, etc., so as to form a structure with a large angle range.

[0047] In other examples, the material of the spacer pillars can be the same as the material of the first pixel definition layer. For example, the material of the spacer pillars can also be organic polymers such as polyimide, siloxane, polyamide, and acrylic.

[0048] In conjunction with the first aspect, in some implementations of the first aspect, the plurality of spacer pillars are not connected on the first plane or the second plane, wherein the second plane is the plane where the first pixel definition layer is located.

[0049] In the display panel provided in this application, multiple spacer pillars may not be connected in the plane where the planarization layer is located or the plane where the first pixel definition layer is located, so that when the cathode is laid on the entire surface of the common layer away from the substrate, the continuity of the cathode and the low impedance characteristics of the entire surface can be ensured.

[0050] In conjunction with the first aspect, in some implementations of the first aspect, the plurality of spacer pillars are interconnected on the first plane or the second plane, wherein the second plane is the plane where the first pixel definition layer is located.

[0051] In the display panel provided in this application, multiple spacer pillars can be interconnected on the plane where the planarization layer is located or the plane where the first pixel definition layer is located, so that the blocking effect of the charge generation layer CGL is better, and the arrangement of the spacer pillars in the display panel can be more diversified.

[0052] In conjunction with the first aspect, in some implementations of the first aspect, the planarization layer includes protrusions located between adjacent first protrusions, and the spacer post is disposed on the protrusions.

[0053] In the display panel provided in this application, a protrusion can be provided in the planarization layer between adjacent first protrusions, and the spacer can be located on the protrusion of the planarization layer, thereby making the setting position of the spacer more diverse.

[0054] In conjunction with the first aspect, in some implementations of the first aspect, the planarization layer includes recesses disposed between adjacent first protrusions, and the spacer post is disposed within the recesses.

[0055] In the display panel provided in this application, a recess can be provided in the planarization layer between adjacent first protrusions, and the spacer can be located in the recess of the planarization layer, thereby making the setting position of the spacer more diverse.

[0056] In a second aspect, a display module is provided, which includes a display panel as described in the first aspect and any possible implementation thereof.

[0057] In conjunction with the second aspect, in some implementations of the second aspect, the display module further includes a cover plate and a polarizer, the polarizer being located between the cover plate and the display panel.

[0058] The display module provided in this application can block the lateral transmission of charge carriers between adjacent sub-pixels, thereby effectively reducing pixel crosstalk and improving the display effect of the display module.

[0059] Thirdly, an electronic device is provided, comprising: a circuit board assembly and a display module as described in the second aspect and any possible implementation thereof, wherein the circuit board assembly is electrically connected to the display module.

[0060] For example, the electronic device can be a device with a display screen, such as a laptop, personal digital assistant computer, tablet computer, mobile phone, laptop, super mobile personal computer, netbook, in-vehicle computer, mobile phone (such as a foldable screen phone), television (or smart screen), augmented reality / virtual reality device, wearable device, etc. This application does not impose any special limitations on the specific form of the electronic device.

[0061] The electronic device provided in this application can block the lateral transmission of charge carriers between adjacent sub-pixels, thereby effectively reducing pixel crosstalk and improving the display effect of the electronic device. Attached Figure Description

[0062] Figure 1 is a schematic diagram of the structure of an electronic device provided in an embodiment of this application.

[0063] Figure 2 is a structural schematic diagram of a display module provided in an embodiment of this application.

[0064] Figure 3 is a schematic diagram of the structure of a display panel provided in an embodiment of this application.

[0065] Figure 4 is a structural schematic diagram of a display panel component provided in an embodiment of this application.

[0066] Figure 5 is a structural schematic diagram of another display panel component provided in an embodiment of this application.

[0067] Figure 6 is a schematic diagram of another display panel provided in an embodiment of this application.

[0068] Figure 7 is a schematic diagram of another display panel provided in an embodiment of this application.

[0069] Figure 8A is a top view of a display panel provided in an embodiment of this application.

[0070] Figure 8B is a top view of another display panel provided in an embodiment of this application.

[0071] Figure 9 is a structural schematic diagram of another display panel component provided in an embodiment of this application.

[0072] Figure 10 is a schematic diagram of another display panel provided in an embodiment of this application.

[0073] Figure 11 is a schematic diagram of another display panel provided in an embodiment of this application.

[0074] Figure 12 is a schematic diagram of another display panel provided in an embodiment of this application.

[0075] Figure 13 is a schematic diagram of another display panel provided in an embodiment of this application.

[0076] Figure 14 is a schematic diagram of another display panel provided in an embodiment of this application.

[0077] Figure 15 is a top view of another display panel provided in an embodiment of this application.

[0078] Figure 16 is a top view of another display panel provided in an embodiment of this application.

[0079] Figure 17 is a structural schematic diagram of another display panel component provided in an embodiment of this application.

[0080] Figure 18 is a schematic diagram of a processing method for a display panel provided in an embodiment of this application. Detailed Implementation

[0081] The embodiments of this application are described in detail below, and examples of these embodiments are illustrated in the accompanying drawings. In the drawings, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0082] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains. In the description of this application, it should be understood that the terms “center,” “longitudinal,” “lateral,” “upper,” “lower,” “front,” “rear,” “left,” “right,” “vertical,” “horizontal,” “top,” “bottom,” “inner,” and “outer,” etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are used only for the convenience of describing this application and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0083] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0084] Figure 1 is a schematic diagram of an electronic device 10 provided in an embodiment of this application.

[0085] The electronic device 10 may include a display module 20, a housing 30, a battery assembly 40, and a circuit board assembly 50. The display module 20 is used to implement the display function of the electronic device 10; for example, the display module 20 can display images, text, and other information. The circuit board assembly 50 may include one or more electronic components, such as one or more processors, one or more antennas, a mobile communication module, or a wireless communication module. The battery assembly 40 can be electrically connected to both the display module 20 and the circuit board assembly 50, and is used to power both the circuit board assembly 50 and the display module 20.

[0086] In some examples, the display module 20 may be mounted on the housing 30, and a receiving space 60 may be formed between the display module 20 and the housing 30, in which the battery assembly 40 and the circuit board assembly 50 of the electronic device 10 may be housed. Exemplarily, the circuit board assembly 50 may be located close to the display module 20, and the battery assembly 40 may be located on the side of the circuit board assembly 50 away from the display module 20; or, the battery assembly 40 may be positioned close to the housing 30, and the circuit board assembly 50 may be positioned close to the display module 20.

[0087] Figure 2 is a structural schematic diagram of a display module 20 provided in an embodiment of this application.

[0088] In some examples, the display module 20 may include a cover plate 21, a polarizer 22, and a display panel 100, wherein the cover plate 21 and the display panel 100 are located on opposite sides of the polarizer 22, or in other words, the polarizer 22 is located between the cover plate 21 and the display panel 100.

[0089] In some examples, the cover plate 21 can be used to protect the display module 20 from external environmental influences, such as dust, moisture, and physical damage. In some examples, to improve the display effect of the display module 20 and reduce the adverse effects of the cover plate 21 on the display effect of the display module 20, the cover plate 21 is made of a material with good transparency.

[0090] For example, the cover plate 21 may be composed of chemically strengthened glass or physically strengthened glass to give the cover plate 21 high impact resistance and abrasion resistance. For example, the cover plate 21 may also be composed of a thin film material to make the cover plate 21 flexible or foldable.

[0091] Exemplarily, the cover plate 21 may also include one or more functional coatings, such as an anti-reflective coating, an anti-fingerprint coating, a hardening coating, or an anti-blue light coating. The anti-reflective coating can be used to reduce the reflection of ambient light on the surface of the cover plate 21, thereby improving the visibility of the display module 20. The anti-fingerprint coating can be used to reduce fingerprints and other stains remaining on the surface of the cover plate 21. The hardening coating can be used to increase the hardness of the surface of the cover plate 21, improving its scratch resistance. The anti-blue light coating can be used to absorb some of the blue light emitted by the display panel 100, thereby reducing the harmful effects of blue light on the eyes.

[0092] In some examples, a polarizer (POL) 22 can be used to reduce the reflection of ambient light on the surface of the display module 20, thereby improving the contrast and readability of the display module 20 in bright light environments.

[0093] For example, the polarizer 22 may be composed of one or more thin film materials. For instance, the polarizer 22 may be composed of a polyvinyl alcohol film and / or a polyester film. The polyvinyl alcohol film can be used to adjust the propagation mode of ambient light in the display module 20, and the polyester film can be used to protect the display module 20.

[0094] In some examples, the display module 20 can also adopt a polarizer-free structure, that is, the polarizer 22 can be replaced by a color filter and a black matrix, thereby forming a color on encapsulation (COE) architecture. The black matrix is ​​positioned between the color filters, and the color filters can correspond to the anode layer in the display panel 100, while the black matrix can correspond to the pixel definition layer in the display panel 100.

[0095] Color filters solve the problems of reflection and light transmission. When external light enters the screen, unwanted light is absorbed by the black matrix, while the remaining light passes through the RGB pixels in the color filter. The RGB pixels then display colors and reflect light. During the reflection process, some light is blocked by the black matrix, while the rest is absorbed by the color filter. Polarizer-free technology can achieve lower screen power consumption at the same display brightness, or higher screen brightness at the same power consumption. Furthermore, since color filters are typically only about 10 micrometers thick, they can significantly reduce screen thickness compared to polarizers, extending the lifespan of foldable screens and reducing the cost of polarizers. In other words, the COE architecture light-gathering solution leads to a decrease in the frontal color gamut, but the COE architecture can improve the color gamut, achieving product goals. Additionally, the COE architecture can convert reflected light incident on the screen into scattered light, thus locking it within the screen and reducing reflectivity.

[0096] In some examples, the display module 20 may also include an adhesive layer 23 located between the polarizer 22 and the cover plate 21, which can be used to fix the polarizer 22 and the cover plate 21 relative to each other. For example, the side of the adhesive layer 23 facing the cover plate 21 can be bonded to the cover plate 21, and the side of the adhesive layer 23 facing the polarizer 22 can be bonded to the polarizer 22, thereby fixing the cover plate 21 and the polarizer 22 relative to each other.

[0097] In some examples, the display panel 100 can be used to implement the display function of the display module 20. Exemplarily, the display panel 100 may include a display module and a control module, wherein the display module is used to display images and / or text; the control module is electrically connected to the display module and is used to control the display content and / or display mode of the display module.

[0098] It should be understood that when the display module 20 is roughly circular, the thickness direction of the display panel 100 can also be understood as the axial direction of the display module 20 (the direction parallel to the axis OO in the figure).

[0099] It should also be understood that the display panel 100 may be, for example, an organic light-emitting diode (OLED) display panel, or a display panel with a quantum dot light-emitting diode (QLED) or micro light-emitting diode (micro-LED) structure, but is not limited thereto.

[0100] Figure 3 is a structural schematic diagram of a display panel 100 provided in an embodiment of this application.

[0101] In some examples, the display panel 100 may include a substrate 110, a planarization layer (PLN) 120, a display element layer 200, and an encapsulation layer 130 stacked together.

[0102] The substrate 110 can be a thin-film transistor (TFT) substrate, which may include a base and TFTs disposed on the base. The TFT may include an active layer, a source, a drain, a gate insulating layer, and a gate. The materials of the active layer of the TFT include, but are not limited to, low-temperature polysilicon (LTPS), oxides, amorphous silicon (a-Si), low-temperature polycrystalline oxide (LTPO), and organic materials. The substrate serves as the carrier structure of the display panel 100, and the planarization layer 120, display element layer 200, and encapsulation layer 130 can all be supported on the substrate.

[0103] In some embodiments, the substrate may be a rigid substrate. Exemplarily, the substrate may be any of a glass substrate, a quartz substrate, or a ceramic substrate. For example, a glass substrate may be composed of soda-lime glass and / or borosilicate glass. These types of substrates can have good mechanical strength and good thermal stability.

[0104] In some embodiments, the substrate may be a flexible substrate. Exemplarily, the substrate may be composed of polymer materials, such as one or more of the following: polyimide (PI), polyethylene terephthalate (PET), polycarbonate (PC), polyethylene naphthalate (PEN), or cycloolefin copolymer (COC). These polymer materials can possess good optical and mechanical properties, enabling the substrate to bend and deform, thereby allowing the display panel 100 to meet the requirements of foldable electronic devices (e.g., foldable mobile phones).

[0105] In some embodiments, the substrate may also be composed of the inorganic material constituting the rigid substrate and the polymer material constituting the flexible substrate, and this application does not limit this.

[0106] Exemplarily, the substrate may have a multilayer structure. For example, the substrate may include a first synthetic resin layer, multiple or single inorganic layers, and a second synthetic resin layer disposed on the multiple or single inorganic layers. Each of the first and second synthetic resin layers may contain a polyimide resin.

[0107] The planarization layer 120 is located on the substrate 110, and the planarization layer 120 is mainly used to form a flat surface on the surface of the substrate 110. The materials of the planarization layer 120 include, but are not limited to, organic polymers such as polyimide, siloxane, polyamide, and acrylic.

[0108] The display element layer 200 can be disposed between the planarization layer 120 and the encapsulation layer 130. In some examples, the display element layer 200 may include an anode 210, a cathode 220, a common layer 230, and a pixel definition layer (PDL) 240. The anode 210 and the pixel definition layer 240 are located on the side of the PLN 120 away from the substrate 110. The pixel definition layer 240 (also called a pixel defining layer) can be used to define the boundary of each pixel in the display panel 100, reducing the probability of light-emitting materials diffusing into each other in different pixel areas. The common layer 230 can be located on the side of the anode 210 and the pixel definition layer 240 away from the substrate 110. The cathode 220 can be located on the side of the common layer 230 away from the substrate 110.

[0109] In some examples, as shown in Figure 4, the display panel 100 can be a structure containing a single OLED device. The common layer 230 can include a first light-emitting stack 231. The first light-emitting stack 231 can include a first hole control layer 2311, a first light-emitting layer 2313, and a first electron control layer 2312 stacked along the thickness direction of the display panel 100 (i.e., the D2 direction in Figure 2). The first hole control layer 2311 can include a first hole injection layer (HIL) and a first hole transport layer (HTL), and the first electron control layer 2312 can include a first electron transport layer (ETL) and a first electron injection layer (EIL). In other words, the common layer 230 can include the first hole injection layer, the first hole transport layer, the first light-emitting layer 2313, the first electron transport layer, and the first electron injection layer stacked along the D2 direction.

[0110] For example, a cross-section along the AA direction in FIG3 can yield the stacked structure shown in the upper figure of FIG4. The light-emitting area (such as sub-pixel area A) of the display panel 100 may include a substrate 110, a planarization layer 120, an anode 210, a first hole injection layer, a first hole transport layer, a first light-emitting layer 2313, a first electron transport layer, a first electron injection layer, a cathode 220, and an encapsulation layer 130 stacked along the D2 direction.

[0111] The anode 210 can be electrically connected to the drain on the substrate 110 through vias in the planarization layer 120. By applying voltages to the anode 210 and the cathode 220 respectively, holes can be injected from the anode 210 and electrons from the cathode 220, causing the electrons and holes to meet in the first light-emitting layer 2313 to form excitons (electron-hole pairs), thereby exciting the light-emitting layer 2313 to emit light. Simultaneously, the display brightness of the display panel 100 can be adjusted by regulating the voltage input to the anode 210.

[0112] For example, a cross-section along the BB direction in FIG3 can yield the stacked structure shown in the lower part of FIG4. The non-light-emitting area (such as the non-sub-pixel area) of the display panel 100 may include a substrate 110, a planarization layer 120, a pixel definition layer 240, a first hole injection layer, a first hole transport layer, a first light-emitting layer 2313, a first electron transport layer, a first electron injection layer, a cathode 220, and an encapsulation layer 130 stacked along the D2 direction.

[0113] In other examples, as shown in FIG5, the display panel 100 may be a series structure (i.e., Tandem OLED) containing multiple light-emitting devices (OLEDs, such as dual-device OLEDs), and the common layer 230 may include a first light-emitting stack 231, a charge-generating layer 232 and a second light-emitting stack 233 stacked along the D2 direction.

[0114] The first light-emitting stack 231 may include a first hole control layer 2311, a first light-emitting layer 2313, and a first electron control layer 2312 stacked along the D2 direction. The first hole control layer 2311 may include at least one of a first hole injection layer and a first hole transport layer, and the first hole transport layer may include at least one of a first hole buffer layer and a first electron blocking layer. The first electron control layer 2312 may include at least one of a first electron transport layer and a first electron injection layer, and the first electron control layer 2312 may also include a first hole blocking layer.

[0115] The second light-emitting stack 233 may include a second hole control layer 2331, a second light-emitting layer 2333, and a second electronic control layer 2332 stacked along the D2 direction. The second hole control layer 2331 may include at least one of a second hole injection layer and a second hole transport layer. The second electronic control layer 2332 may include at least one of a second electron injection layer and a second electron transport layer. The descriptions of the first hole control layer 2311 and the first electronic control layer 2312 are equally applicable to the descriptions of the second hole control layer 2331 and the second electronic control layer 2332.

[0116] In some examples, the light emitted from the first light-emitting stack 231 and the second light-emitting stack 233 may have the same wavelength. For example, the light emitted from the first light-emitting stack 231 and the second light-emitting stack 233 may be blue light, which is not limited in this application. In other examples, the wavelength ranges of the light emitted from the first light-emitting stack 231 and the second light-emitting stack 233 may be different from each other. For example, at least one of the first light-emitting stack 231 and the second light-emitting stack 233 may emit blue light, and the other of the first light-emitting stack 231 and the second light-emitting stack 233 may emit green light, thereby enabling the light-emitting element comprising the first light-emitting stack 231 and the second light-emitting stack 233 to emit white light.

[0117] A charge generation layer 232 can be disposed between the first light-emitting stack 231 and the second light-emitting stack 233. When a voltage is applied to the charge generation layer 232, charges (electrons and holes) are generated through redox reactions to form complexes. Furthermore, the charge generation layer 232 can provide the generated charges to each of the first light-emitting stack 231 and the second light-emitting stack 233. The charge generation layer 232 can double the efficiency of the current generated in each of the first and second light-emitting stacks 231 and 233, and plays a role in controlling the charge balance between the first and second light-emitting stacks 231 and 233.

[0118] Referring to Figure 5, the charge generation layer 232 may have a layer structure in which a first charge generation layer and a second charge generation layer are bonded to each other. The first charge generation layer may be an n-type charge generation layer disposed adjacent to the first light-emitting stack 231 and providing electrons to the first light-emitting stack 231. The second charge generation layer may contain an arylamine organic compound. The second charge generation layer may be a p-type charge generation layer disposed adjacent to the second light-emitting stack 233 and providing holes to the second light-emitting stack 233. The second charge generation layer may contain a charge generation compound composed of a metal, metal oxide, carbide, fluoride, or a mixture thereof.

[0119] For example, a cross-section along the AA direction in FIG3 can yield the stacked structure shown in the left figure of FIG5. The light-emitting area (such as sub-pixel area A) of the display panel 100 may include a substrate 110, a planarization layer 120, an anode 210, a first hole injection layer, a first hole transport layer, a first light-emitting layer 2313, a first electron transport layer, a first electron injection layer, a first charge generation layer, a second charge generation layer, a second hole injection layer, a second hole transport layer, a second light-emitting layer 2333, a second electron transport layer, a second electron injection layer, a cathode 220, and an encapsulation layer 130 stacked along the D2 direction.

[0120] For example, a cross-section along the BB direction in FIG3 can yield the stacked structure shown in the right figure of FIG5. The non-light-emitting area (such as the non-sub-pixel area) of the display panel 100 may include a substrate 110, a planarization layer 120, a pixel definition layer 240, a first hole injection layer, a first hole transport layer, a first light-emitting layer 2313, a first electron transport layer, a first electron injection layer, a first charge generation layer, a second charge generation layer, a second hole injection layer, a second hole transport layer, a second light-emitting layer 2333, a second electron transport layer, a second electron injection layer, a cathode 220, and an encapsulation layer 130 stacked along the D2 direction.

[0121] It should be understood that this application does not limit the number of light-emitting devices. In some possible implementations, the common layer 230 may include three light-emitting stacks and two charge-generating layers disposed between the three light-emitting stacks. Alternatively, the common layer 230 may include more light-emitting stacks and charge-generating layers disposed between multiple light-emitting stacks.

[0122] The encapsulation layer 130 can be disposed on the side of the display element layer 200 away from the substrate 110. More specifically, the encapsulation layer 130 can be disposed on the side of the cathode 220 away from the substrate 110. The encapsulation layer 130 can employ thin film encapsulation (TFE), which can seal the display element layer 200 to prevent moisture, oxygen, and foreign matter such as dust particles from entering the display element layer 200. The encapsulation layer 130 can have a certain mechanical strength, thereby improving the scratch resistance, abrasion resistance, and other physical properties of the display panel 100 to a certain extent.

[0123] In some examples, the encapsulation layer 130 may be composed of inorganic materials such as glass and ceramics, which possess good mechanical properties. In this scenario, the encapsulation layer 130 may also be referred to as a rigid encapsulation layer, and the glass, ceramics, and other materials constituting the encapsulation layer may also be referred to as rigid encapsulation materials. Exemplarily, the rigid encapsulation material may include one or more of the following: inorganic materials, metals, metal oxides, or polymer composite materials, etc.

[0124] In some examples, the encapsulation layer 130 may be composed of organic materials such as polymers, which can have good flexibility and bend or deform under stress without being damaged. In this scenario, the encapsulation layer 130 may also be referred to as a flexible encapsulation layer, and the polymer material constituting the encapsulation layer may also be referred to as a flexible encapsulation material. Exemplarily, the flexible encapsulation material may include one or more of the following: polyimide, polyethylene terephthalate, acrylic resin, or polycarbonate, etc.

[0125] In some examples, the encapsulation layer 130 may also be composed of both the inorganic and organic materials mentioned above, and this application does not impose any restrictions on this.

[0126] For example, referring to FIG3, the encapsulation layer 130 may include multiple thin-film encapsulation layers. The encapsulation layer 130 may include a first inorganic encapsulation layer 131, an organic encapsulation layer 132 disposed on the first inorganic encapsulation layer 131, and a second inorganic encapsulation layer 133 disposed on the organic encapsulation layer 132. The first inorganic encapsulation layer 131 and the second inorganic encapsulation layer 133 protect the display element layer 200 from moisture / oxygen, and the organic encapsulation layer 132 can protect the display element layer 200 from foreign matter such as dust particles.

[0127] Referring to Figures 3, 4, and 5, the display area of ​​the display panel 100 may include multiple sub-pixel areas (light-emitting areas) and non-sub-pixel areas (non-light-emitting areas) adjacent to the sub-pixel areas. The non-sub-pixel areas may surround the sub-pixel areas. In this application, the sub-pixel areas may be defined to correspond to the portion of the anode 210 exposed by the pixel opening, or the non-sub-pixel areas may be defined to correspond to the area of ​​the pixel definition layer 240.

[0128] For example, as shown in Figure 3, the multiple sub-pixel regions may include sub-pixel region A and sub-pixel region B, and the light-emitting layers in sub-pixel region A and sub-pixel region B may emit light of different colors or wavelengths. The colors of the light emitted from the multiple sub-pixel regions may include the three primary colors. For example, sub-pixel region A / sub-pixel region B may be a red sub-pixel region, a green sub-pixel region, or a blue sub-pixel region. As another example, sub-pixel region A / sub-pixel region B may be a cyan sub-pixel region, a yellow sub-pixel region, or a magenta sub-pixel region.

[0129] In the display panel shown in Figure 3, the light-emitting layers in sub-pixel regions A and B can emit light of different wavelengths or colors. The pixel definition layer 240 can be spaced between pixels of different wavelengths or colors to reduce pixel crosstalk between different pixels. However, considering that the hole injection layer, hole transport layer, electron transport layer, and electron injection layer in the common layer 230 are all integrally covered, the charge carriers in the common layer 230 will undergo lateral migration (as shown by the arrows in Figure 3) in both single-device OLED and tandem OLED structures. This will result in varying degrees of pixel crosstalk, causing other colored sub-pixels to become slightly brighter and affecting the display effect of the display panel. Especially for tandem OLEDs, the charge carriers in the charge generation layer CGL have a high lateral mobility, which will cause serious pixel crosstalk problems.

[0130] Based on this, this application uses a structural design scheme that combines patterned PDL and spacer pillars to block the lateral transport of charge carriers in OLED devices (such as Tandem OLED), reducing the probability of pixel crosstalk. In addition, it can ensure the continuity of the cathode and avoid problems such as cathode short circuits. Furthermore, it can avoid cracking caused by TFE deposition or excessive stress, ensuring the reliability of TFE packaging.

[0131] The following will describe in detail the structural schematic diagrams of various display panels 500 provided in the embodiments of this application, as shown in Figures 6 to 17.

[0132] As shown in Figure 6, in some examples, the display panel 500 may include a substrate 110, a PLN 120, an anode 210, a first PDL 241, spacers 300, a common layer 230, and an encapsulation layer 130. The PLN 120 is located on the substrate 110. The anode 210, the first PDL 241, and the spacers 300 may be disposed on the side of the PLN 120 away from the substrate 110. The common layer 230 is located on the side of the anode 210, the first PDL 241, and the spacers 300 away from the substrate 110. The encapsulation layer 130 is located on the side of the common layer 230 away from the substrate 110.

[0133] For descriptions of the substrate 110, PLN 120, anode 210, common layer 230 and encapsulation layer 130, please refer to the descriptions in Figures 3 to 5 above. The following mainly describes the structure of the first PDL 241 and spacer 300 in detail with reference to the accompanying drawings.

[0134] Before introducing the structure of the first PDL 241 and the spacer 300, the first and second directions involved in this application are first defined with reference to the accompanying drawings. In the following embodiments, the first direction is parallel to the direction of the plane where the display panel 500 is located (direction D1 in Figure 2), and the first direction can be understood as the direction from any sub-pixel region to its adjacent sub-pixel region; the second direction is the direction from the substrate 110 to the first pixel definition layer 241, and the second direction is perpendicular to the first direction, and the second direction can be understood as the thickness direction of the display panel 500 (direction D2 in Figure 2).

[0135] As shown in Figure 6, the display panel 500 may include adjacent sub-pixel regions A and B, with a non-sub-pixel region between sub-pixel regions A and B. A first PDL 241 may be disposed between adjacent sub-pixel regions; for example, the first PDL 241 may be disposed between sub-pixel regions A and B. Furthermore, along a first direction, the first PDL 241 may include a plurality of first protrusions (two arcuate protrusions as shown in Figure 6), and this first direction is parallel to the plane of the display panel 500.

[0136] Compared to PDL 240 in Figure 3, the first PDL 241 provided in this application may include a plurality of first protrusions, and the plurality of first protrusions may be arranged along a first direction, thereby making the surface away from the substrate 110 more uneven. When large-angle light rays emitted from any sub-pixel region (sub-pixel region A and / or sub-pixel region B) propagate through the waveguide of the first PDL 241 away from the surface of the substrate 110, they are more likely to be emitted from the uneven first PDL 241, thereby allowing more large-angle light rays to be emitted from the first PDL 241 and used for display, which can improve the display brightness of the display panel 500 without increasing the power consumption of the display panel 500.

[0137] The spacer post 300, also known as an electroluminescence partition structure (EPS), can be positioned between adjacent first protrusions (the two arc-shaped protrusions shown in Figure 6). The angle between a first position on the spacer post 300 and the first plane is the first angle (θ in Figure 9). The first position is the location of the spacer post 300 closest to the first plane, which is the plane where the planarization layer 120 is located. The angle between a second position on the first protrusion and the first plane is the second angle (β in Figure 9). The second position is the location of the first protrusion closest to the first plane. The difference between the first angle and the second angle is greater than or equal to 20°.

[0138] By adding spacer pillars 300 and limiting the angle difference between spacer pillars 300 and the first protrusion, the common layer 230 cannot effectively cover the sidewalls of spacer pillars 300. The common layer 230 is discontinuous, intermittently continuous, or broken at the sidewalls of spacer pillars 300, thus preventing charge carriers (including holes and electrons) from laterally transmitting through the common layer 230 (refer to the arrow in Figure 6, charge carriers cannot pass through the sidewalls of spacer pillars 300). In other words, it can block the lateral transmission of charge carriers (including holes and electrons) between adjacent sub-pixels, thereby effectively reducing pixel crosstalk and improving the display effect of the display panel.

[0139] In some examples, as shown in Figure 7, the display panel 500 may also include a photo spacer (PS) 242. The PS 242 supports the fine metal mask (FMM), meaning that when using the FMM for masking, the PS 242 acts as a support, elevating and protecting the FMM from scratching the surfaces of the first PDL 241 and the EPS 300. For example, the PS 242 can be positioned in the middle of the four EPS 300s as shown in Figure 8A, with one PS 242 spaced every few pixels. This allows the PS 242 to elevate the surface when the FMM is applied on top of it for masking. In Figure 7, for illustrative purposes, the EPS 300, the first PDL 241, and the PS 242 are shown simultaneously in a single cross-section.

[0140] In some examples, adjacent first protrusions are spaced apart; and along a second direction, the thickness of the portion of the first PDL 241 located between adjacent first protrusions is less than the thickness of the first protrusions. This second direction is perpendicular to the first direction, which is the direction from the substrate 110 to the first pixel definition layer 241. This makes the surface of the first PDL 241 more uneven, allowing light to escape more easily, thereby improving the display brightness of the display panel 500.

[0141] For example, as shown in FIG6, the first PDL 241 disposed between adjacent sub-pixel regions may be discontinuous, that is, the thickness of the portion of the first PDL 241 located between adjacent first protrusions along the second direction may be zero. In this case, the spacer post 300 may be in direct contact with the PLN 120, that is, the spacer post 300 may be disposed on the side of the PLN 120 away from the substrate 110 and may be located between two adjacent first protrusions.

[0142] In cases where spacer pillars 300 are in direct contact with PLN 120, in some examples, referring to FIG8A, the spacer pillars 300 may not be interconnected on the surface where PLN 120 is located. This ensures the continuity of cathode 220 and low impedance characteristics across the entire surface when cathode 220 and encapsulation layer 130 are disposed on the surface of common layer 230 away from substrate 110. Alternatively, in some examples, referring to FIG8B, the spacer pillars 300 may be interconnected on the surface where PLN 120 is located, resulting in better barrier effect of CGL, but increasing the risk of discontinuity / increased impedance of cathode 220.

[0143] This application embodiment does not limit the shape or number of the first protrusions and spacers 300, and the shapes of the plurality of first protrusions / spacers 300 may be the same or different. Along the direction from the substrate 110 to the first PDL 241 (second direction D2), the thickness of the plurality of first protrusions / spacers 300 may be the same or different. Along the direction from any sub-pixel region to its adjacent sub-pixel region (first direction D1), the width of the plurality of first protrusions / spacers 300 may be the same or different.

[0144] For example, as shown in Figure 6, the shape of the first protrusion is a curved surface, such as an arc surface; or, the shape of the first protrusion is a frustum. Of course, the shapes of the multiple first protrusions can also be other, and this application does not limit them.

[0145] The shape of the multiple first protrusions can be curved. Compared with other shapes, the angle between the numerous tangents at various positions of the curved surface and the horizontal direction is different along the first direction D1. In addition, except for one tangent that is parallel to the horizontal direction, the other tangents are not parallel to the horizontal direction. Therefore, it is beneficial to allow more large-angle light rays that propagate in the waveguide in the first PDL 241 to be emitted from the first PDL 241 and used for display.

[0146] For example, as shown in Figure 6, the cross-sectional shape of the spacer 300 can be rectangular, or the shape of the spacer 300 can be the same as the shape of the first protrusion. The cross-sectional shape of the spacer 300 can also be arc-shaped or frustum-shaped, etc. Of course, the spacer 300 can also be other shapes, which are not limited in this application.

[0147] This application does not limit the shape of the portion of the first PDL 241 located between the first protrusions. The shape of the portion of the first PDL 241 located between the first protrusions can be determined based on the sidewalls of the first protrusions and the thickness of the portion of the first PDL 241 located between the first protrusions. For example, as shown in FIG6 and FIG11 to FIG14, the portion of the first PDL 241 located between the first protrusions can be a recess of different shapes.

[0148] A cross-section along the CC direction of Figure 8A or the DD direction of Figure 8B yields the structural schematic shown in Figure 9. Combining Figures 6 and 9, the first position on the spacer 300 has a first angle θ with the first plane; the first position is the location of the spacer 300 near the plane containing PLN 120. The second position on the first protrusion has a second angle β with the first plane; the second position is the location of the first protrusion near the plane containing PLN 120; and θ - β ≥ 20°. The first angle θ can be the slope angle of the spacer 300, i.e., the interior angle between the spacer 300 and the first plane. The second angle β can be the slope angle of the first protrusion, i.e., the interior angle between the first protrusion and the first plane, where the first plane is the plane containing the planarization layer 120.

[0149] For example, as shown in Figure 9, the cross-sectional shape of the spacer 300 can be rectangular, the first included angle θ can be the angle between the side wall of the rectangle or its extension and the plane where PLN 120 is located, and the first position can be a position on the side wall of the spacer 300 near PLN 120 (or the position of any point on the side wall of the spacer 300). Alternatively, the cross-sectional shape of the spacer 300 can be arc-shaped, the first included angle θ can be the angle between the tangent of the arc at the first position or its extension and the plane where PLN 120 is located, and the first position can be a position on the arc near PLN 120, for example, the first position can be a position in the lower third of the entire arc.

[0150] For example, as shown in Figure 9, the cross-sectional shape of the first protrusion can be arc-shaped, and the second included angle β can be the angle between the tangent or its extension at the second position of the arc and the plane containing PLN 120. The second position can be a location on the arc near PLN 120, for example, a location in the lower third of the entire arc. Alternatively, the cross-sectional shape of the first protrusion can be rectangular, and the second included angle β can be the angle between the sidewall of the rectangle or its extension and the plane containing PLN 120. The second position can be a location on the sidewall of the first protrusion near PLN 120 (or the location of any point on the sidewall of the first protrusion).

[0151] It should be understood that during the actual manufacturing process, the surfaces of the first protrusion and the spacer 300 may not be smooth, but rather have varying undulations and are often rugged. However, from an overall perspective, the first protrusion can present an arc-shaped protrusion, and the spacer 300 can present a rectangular protrusion. In this case, the first position can be the position of the spacer 300 near the plane where the PLN 120 is located, and the second position can be the position of the first protrusion near the plane where the PLN 120 is located.

[0152] In some examples, the first included angle θ can range from 60° to 150°. For example, the first included angle θ can range from 80° to 120°, and the value of the first included angle θ can be 60°, 65°, 70°, 75°, 80°, 85°, 90°, 95°, 100°, 105°, 110°, 115°, 120°, 125°, 130°, 135°, 140°, 145°, 150°, etc. This application does not specifically limit the value of the first included angle θ. The second included angle β has an angle range of 10°-40°. For example, the angle range of the second included angle β is 15°-35°. The value of the second included angle β can be 10°, 12°, 15°, 18°, 19°, 20°, 21°, 22°, 23°, 24°, 25°, 26°, 27°, 28°, 29°, 30°, 31°, 32°, 33°, 34°, 35°, 36°, 37°, 38°, 39°, 40°, etc. This application does not specifically limit the value of the second included angle β.

[0153] By limiting the angle of the first PDL 241 to below 40° and the angle of the spacer post 300 to above 60°, with a difference of 20° or more, the common layer 230 can be made discontinuous, intermittently continuous or broken at the side wall position of the spacer post 300, thereby blocking the lateral transmission of carriers between adjacent sub-pixels and thus minimizing the problem of pixel crosstalk.

[0154] Referring to Figure 9, along the second direction, the thickness (e) of the spacer 300 is less than or equal to the thickness (f) of the first protrusion. Here, thickness can be understood as height, referring to the distance between the highest and lowest points. In other words, along the second direction, the height of the spacer 300 can be less than or equal to the height of the first protrusion, thereby avoiding problems such as the spacer 300 being scratched or falling off during production and processing due to being too high, and improving production yield.

[0155] Of course, in other embodiments, the thickness e of the spacer 300 may be higher than the thickness f of the first protrusion, but less than the thickness of PS242. This can also avoid problems such as the spacer 300 being scratched or falling off during production and processing due to being too high, thereby improving production yield.

[0156] For example, along the second direction, the thickness e of the spacer 300 can range from 0.2μm to 3μm. For instance, the thickness e of the spacer 300 can be 0.2μm, 0.5μm, 0.8μm, 1μm, 1.2μm, 1.5μm, 1.8μm, 2μm, 2.2μm, 2.5μm, 2.8μm, 3μm, etc. This application does not limit the value of the thickness e of the spacer 300. Along the second direction, the thickness f of the first protrusion can range from 0.2μm to 3μm. For instance, the thickness f of the first protrusion can be 0.2μm, 0.5μm, 0.8μm, 1μm, 1.2μm, 1.5μm, 1.8μm, 2μm, 2.2μm, 2.5μm, 2.8μm, 3μm, etc. This application does not limit the value of the thickness f of the first protrusion.

[0157] Referring to Figure 9, along the first direction, the width d of the spacer 300 ranges from 1μm to 10μm. For example, the width d of the spacer 300 can be 1μm, 2μm, 3μm, 4μm, 5μm, 6μm, 7μm, 8μm, 9μm, 10μm, etc. This application does not limit the value of the width d of the spacer 300. Along the first direction, the width b of the first protrusion ranges from 1μm to 10μm. For example, the width b of the first protrusion can be 1μm, 2μm, 3μm, 4μm, 5μm, 6μm, 7μm, 8μm, 9μm, 10μm, etc. This application does not limit the value of the width b of the first protrusion. Along the first direction, the width 'a' of the first pixel definition layer 241 ranges from 10μm to 30μm. For example, the width 'a' of the first pixel definition layer 241 can be 10μm, 11μm, 12μm, 13μm, 14μm, 15μm, 16μm, 17μm, 18μm, 19μm, 20μm, 21μm, 22μm, 23μm, 24μm, 25μm, 26μm, 27μm, 28μm, 29μm, 30μm, etc. This application does not limit the value of the width 'a' of the first pixel definition layer 241.

[0158] In some examples, referring to Figure 9, the plurality of first protrusions may include a second protrusion (the arc-shaped protrusion on the left) and a third protrusion (the arc-shaped protrusion on the right), and the spacer post 300 may be located between the second and third protrusions; and along the first direction, the difference between the first distance between the spacer post 300 and the second protrusion and the second distance between the spacer post 300 and the third protrusion is within a preset range. For example, this preset range may be 0 μm-5.5 μm.

[0159] In the display panel 500, considering the limitations of the manufacturing process, the distance between the spacer 300 and the second protrusion and the distance between the spacer 300 and the third protrusion along the first direction may be equal or unequal, and there may be some manufacturing errors. That is to say, the distance between the spacer 300 and the second protrusion may be greater than the distance between the spacer 300 and the third protrusion, or the distance between the spacer 300 and the second protrusion may be less than the distance between the spacer 300 and the third protrusion, or the distance between the spacer 300 and the second protrusion and the distance between the spacer 300 and the third protrusion may be equal.

[0160] In some examples, the first distance and the second distance can be equal (both are distance c). That is, the difference between the first distance between the spacer 300 and the second protrusion and the second distance between the spacer 300 and the third protrusion is zero. For example, the first distance ranges from 0.5 μm to 6 μm, and the second distance ranges from 0.5 μm to 6 μm.

[0161] For example, the first distance and the second distance can be 1μm, 1.5μm, 2μm, 2.5μm, 3μm, 3.5μm, 4μm, 4.5μm, 5μm, 5.5μm, etc. This application does not specify the values ​​of the first distance and the second distance.

[0162] As shown in Figure 10, in order to better block the lateral transmission of charge carriers between adjacent sub-pixels, multiple spacer pillars 300 can be provided between adjacent first protrusions. That is, there can be multiple spacer pillars 300 between adjacent first protrusions. For example, two spacer pillars 300 can be provided between adjacent first protrusions.

[0163] In some examples, the material of the spacer pillar 300 may differ from the material of the pixel definition layer 240 (including the first pixel definition layer 241). For example, the pixel definition layer 240 may be made of organic polymers such as polyimide, siloxane, polyamide, or acrylic, while the spacer pillar 300 may be made of inorganic materials such as silicon nitride (SiNx), silicon oxide (SiOx), silicon dioxide, and an intermediate phase of silicon nitride (SiON), or metals / metal oxides / alloys such as silver, aluminum, or indium tin oxide. Since the angle of the spacer pillar 300 needs to be fabricated to a large angle range of 60°-150°, the material of the spacer pillar 300 may differ from the material of the first pixel definition layer 241. The spacer pillar 300 may be made of inorganic materials, metals, metal oxides, or alloys to form a structure with a wide angle range.

[0164] In other examples, the material of the spacer pillar 300 may be the same as that of the pixel definition layer 240 (including the first pixel definition layer 241). For example, the material of the pixel definition layer 240 may also be an organic polymer such as polyimide, siloxane, polyamide, or acrylic.

[0165] In some examples, as shown in Figures 11 and 12, the planarization layer 120 has a recess 121, which may be disposed between adjacent first protrusions, and the spacer post 300 is disposed inside the recess 121. It should be understood that the shape of the recess 121 is not limited in this application. For example, the recess 121 may be a rectangle as shown in Figure 11, a trapezoid as shown in Figure 12, or other shapes.

[0166] In some examples, as shown in FIG13, the planarization layer 120 has protrusions 122 located between adjacent first protrusions, and spacers 300 are disposed on the protrusions 122. It should be understood that the shape of the protrusions 122 is not limited in this application; for example, the protrusions 122 may be trapezoidal as shown in FIG13, or may be rectangular or other shapes.

[0167] In some examples, the planarization layer 120 may include both protrusions and recesses, with the protrusions and recesses located between adjacent first protrusions. The spacer pillars 300 may include a plurality of spacer pillars 300, at least one of which may be disposed on the protrusions, and / or at least one of which may be disposed on the recesses.

[0168] In some examples, as shown in FIG14, the first pixel definition layer 241 disposed between adjacent sub-pixel regions can be continuous, that is, along the second direction, the thickness of the portion of the first pixel definition layer 241 located between adjacent first protrusions can be greater than zero. In this case, the spacer post 300 can be in direct contact with the PDL 240 (or the first PDL 241). That is, the spacer post 300 can be disposed on the side of the PDL 240 (or the first PDL 241) away from the substrate 110, and can be located between two adjacent first protrusions.

[0169] In cases where spacer pillars 300 are in direct contact with PDL 240 (or first PDL 241), in some examples, referring to FIG15, the spacer pillars 300 may not be interconnected on the surface of PDL 240 (or first PDL 241). This ensures the continuity of cathode 220 and low impedance characteristics across the entire surface when cathode 220 and encapsulation layer 130 are disposed on the surface of common layer 230 away from substrate 110. Alternatively, in some examples, referring to FIG16, the spacer pillars 300 may be interconnected on the surface of PDL 240 (or first PDL 241), resulting in better barrier effect of CGL, but increasing the risk of discontinuity / increased impedance of cathode 220.

[0170] Since the spacer post 300 may not contact the planarization layer 120, but instead contacts the first pixel definition layer 241 located above the planarization layer 120, in this case, the first included angle θ of the spacer post 300 can be the interior angle formed by the extension of a point on the sidewall of the spacer post 300 or the extension of the tangent at that point and the first plane. Similarly, the second included angle β of the first protrusion can be the interior angle formed by the extension of a point on the sidewall of the first protrusion or the extension of the tangent at that point and the first plane.

[0171] A cross-section along the EE direction of Figure 15 or the FF direction of Figure 16 yields the structural schematic shown in Figure 17. Combining Figures 14 and 17, along the second direction, the sum of the thickness g of the portion of the first PDL 241 located between adjacent first protrusions and the thickness e of the spacer column 300 is less than or equal to the thickness f of the first protrusion.

[0172] For example, along the second direction, the thickness g of the portion of the first PDL 241 located between adjacent first protrusions can range from 0.1μm to 2.5μm. For example, the thickness g can be 0.2μm, 0.4μm, 0.5μm, 0.8μm, 1μm, 1.2μm, 1.5μm, 1.8μm, 2μm, 2.2μm, 2.4μm, etc. This application does not limit the specific value of g.

[0173] For example, along the second direction, the thickness e of the spacer 300 can range from 0.2μm to 2.5μm. For instance, the thickness e of the spacer 300 can be 0.2μm, 0.5μm, 0.8μm, 1μm, 1.2μm, 1.5μm, 1.8μm, 2μm, 2.2μm, 2.5μm, etc. This application does not limit the value of the thickness e of the spacer 300.

[0174] For example, along the second direction, the thickness f of the first protrusion can range from 0.2μm to 3μm. For instance, the thickness f of the first protrusion can be 0.2μm, 0.5μm, 0.8μm, 1μm, 1.2μm, 1.5μm, 1.8μm, 2μm, 2.2μm, 2.5μm, 2.8μm, 3μm, etc. This application does not limit the value of the thickness f of the first protrusion.

[0175] Other parameter information can be found in the description in Figure 9.

[0176] It should be understood that the display panel 500 provided in this application can be applied to the electronic device 10 shown in FIG1 and the display module 20 shown in FIG2. By setting the spacer column 300 in the non-light-emitting area (non-sub-pixel area), the pixel crosstalk problem of the display panel can be effectively reduced.

[0177] Figure 18 is a schematic diagram of a processing method for a display panel 500 according to an embodiment of this application. The display panel 500 may specifically include the following processing steps:

[0178] 101. Fabricate substrate 110. It should be understood that substrate 110 can be a TFT substrate, which specifically may include a substrate and TFT circuits and peripheral driving circuits fabricated on the substrate.

[0179] In some embodiments, a TFT circuit may include an active layer, a source, a drain, a gate insulating layer, and a gate. The materials of the active layer of a TFT include, but are not limited to, LTPS, oxides, a-Si, LTPO, and organic materials.

[0180] In some embodiments, the substrate may be a rigid substrate. Exemplarily, the substrate may be any of a glass substrate, a quartz substrate, or a ceramic substrate. For example, a glass substrate may be composed of soda-lime glass and / or borosilicate glass. These types of substrates can have good mechanical strength and good thermal stability.

[0181] In some embodiments, the substrate may be a flexible substrate. Exemplarily, the substrate may be composed of a polymer material, such as one or more of the following: PI, PET, PC, PEN, or COC. These polymer materials may possess good optical and mechanical properties, enabling the substrate to bend and deform, thereby allowing the display panel 500 to meet the requirements of foldable electronic devices (e.g., foldable mobile phones).

[0182] In some embodiments, the substrate may also be composed of the inorganic material constituting the rigid substrate and the polymer material constituting the flexible substrate, and this application does not limit this.

[0183] Exemplarily, the substrate may have a multilayer structure. For example, the substrate may include a first synthetic resin layer, multiple or single inorganic layers, and a second synthetic resin layer disposed on the multiple or single inorganic layers. Each of the first and second synthetic resin layers may contain a polyimide resin.

[0184] 102. A planarization layer 120 is formed on the surface of the substrate 110.

[0185] For example, a planarization layer 120 can be formed on the substrate 110 through processes such as film formation, exposure, and development. The material of the planarization layer 120 is an organic polymer such as polyimide, siloxane, polyamide, or acrylic.

[0186] 103, an anode 210 is formed on the side of the planarization layer 120 away from the substrate 110.

[0187] For example, an anode 210 can be formed on the planarization layer 120 through processes such as film formation, exposure, development, and etching. The anode 210 is located in the sub-pixel region (light-emitting region). The material of the anode 210 can be a metal / metal oxide / alloy such as silver, aluminum, or indium tin oxide.

[0188] 104. A first pixel definition layer 241 is formed on the side of the planarization layer 120 away from the substrate 110.

[0189] For example, a patterned first pixel definition layer 241 can be formed on the planarization layer 120 through processes such as film formation, exposure, and development. The first pixel definition layer 241 is disposed between adjacent sub-pixel regions; along the direction from any sub-pixel region to its adjacent sub-pixel region, the patterned first pixel definition layer 241 may include a plurality of first protrusions.

[0190] In some embodiments, as shown in FIG18, the first pixel definition layers 241 are completely disconnected, that is, the first pixel definition layers 241 may not be fully connected above the planarization layer 120 in the non-light-emitting area. In other words, the thickness of the portion of the first PDL 241 located between adjacent first protrusions along the second direction perpendicular to the first direction may be zero.

[0191] In other embodiments, the first pixel definition layers 241 are not completely disconnected; that is, along the second direction, the thickness of the portion of the first PDL 241 located between adjacent first protrusions can be greater than zero (as shown in Figure 14 or Figure 17). In other words, in step 104, the first pixel definition layers 241 shown in Figure 14 or Figure 17 can be formed in one step using a half-tone mask process, or they can be formed using two masks or etching methods.

[0192] For example, the material of the first pixel definition layer 241 can be an organic polymer such as polyimide, siloxane, polyamide, or acrylic.

[0193] 105. Spacer pillars 300 are formed on the side of the planarization layer 120 away from the substrate 110.

[0194] In some embodiments, as shown in FIG18, spacer pillars 300 can be formed above the planarization layer 120 through processes such as film formation, exposure, development, and etching. The spacer pillars 300 can be located at the middle opening of the first pixel definition layer 241 and in direct contact with the planarization layer 120. In this example, the film thickness of the spacer pillars 300 can be less than or equal to the film thickness of the first protrusion of the first pixel definition layer 241, thereby avoiding scratch damage to the surface of the spacer pillars 300 during the fabrication process.

[0195] In other embodiments, this step may involve forming spacer pillars 300 on the side of the first pixel definition layer 241 away from the substrate 110. As shown in FIG14 or FIG17, in this case, the spacer pillars 300 may not contact the planarization layer 120, but rather contact the first pixel definition layer 241. In this example, the sum of the film thickness of the spacer pillars 300 and the film thickness of the portion of the first pixel definition layer 241 located between the first protrusions may be less than or equal to the film thickness of the first protrusions, thereby avoiding scratch damage to the surface of the spacer pillars 300 during fabrication.

[0196] In some examples, the material of the spacer pillar 300 may be different from the material of the first pixel definition layer 241. For example, the material of the first pixel definition layer 241 may be an organic polymer such as polyimide, siloxane, polyamide, or acrylic, while the material of the spacer pillar 300 may be an inorganic material such as silicon nitride (SiNx), silicon oxide (SiOx), silicon dioxide, or an intermediate phase of silicon nitride (SiON), or a metal / metal oxide / alloy such as silver, aluminum, or indium tin oxide.

[0197] In other examples, the material of the spacer column 300 can be the same as the material of the first pixel definition layer 241. For example, the material of the first pixel definition layer 241 can also be an organic polymer such as polyimide, siloxane, polyamide, or acrylic.

[0198] The relevant structure of the spacer column 300 can be found above and will not be described again.

[0199] 106. A common layer 230 is formed on the side of the anode 210, the first pixel definition layer 241 and the spacer 300 away from the substrate 110.

[0200] In some examples, the common layer 230 may include a first hole injection layer, a first hole transport layer, a first light-emitting layer, a first electron transport layer, and a first electron injection layer stacked along a second direction, thereby forming an OLED that is a display panel with a single light-emitting device.

[0201] In other examples, the common layer 230 may include a first hole injection layer, a first hole transport layer, a first light-emitting layer, a first electron transport layer, a first electron injection layer, a first charge generation layer, a second charge generation layer, a second hole injection layer, a second hole transport layer, a second light-emitting layer, a second electron transport layer, and a second electron injection layer, thereby forming an OLED that is a multi-emitting device display panel (i.e., a Tandem OLED).

[0202] For details regarding the common layer 230, please refer to the relevant descriptions in Figures 3 to 5, which will not be repeated here.

[0203] 107. A cathode 220 is formed on the side of the common layer 230 away from the substrate 110.

[0204] For example, the cathode 220 can be integrally deposited on the side of the common layer 230 away from the substrate 110. The material of the cathode 220 can be a metal / metal oxide / alloy such as silver, aluminum, or indium tin oxide.

[0205] 108. An encapsulation layer 130 is formed on the side of the cathode 220 away from the substrate 110.

[0206] For example, the encapsulation layer 130 can be integrally deposited on the side of the cathode 220 away from the substrate 110. The encapsulation layer 130 can be a thin-film encapsulated TFE, which can seal the anode 210, cathode 220, common layer 230, pixel definition layer 240 (including the first pixel definition layer 241), and spacer pillars 300 to prevent moisture, oxygen, and foreign matter such as dust particles from entering. The encapsulation layer 130 can have a certain mechanical strength, thereby improving the scratch resistance, abrasion resistance, and other physical properties of the display panel 500 to a certain extent.

[0207] In some examples, the encapsulation layer 130 may be composed of inorganic materials such as glass and ceramics, which possess good mechanical properties. In this scenario, the encapsulation layer 130 may also be referred to as a rigid encapsulation layer, and the glass, ceramics, and other materials constituting the encapsulation layer may also be referred to as rigid encapsulation materials. Exemplarily, the rigid encapsulation material may include one or more of the following: inorganic materials, metals, metal oxides, or polymer composite materials, etc.

[0208] In some examples, the encapsulation layer 130 may be composed of organic materials such as polymers, which can have good flexibility and bend or deform under stress without being damaged. In this scenario, the encapsulation layer 130 may also be referred to as a flexible encapsulation layer, and the polymer material constituting the encapsulation layer may also be called a flexible encapsulation material. Exemplarily, the flexible encapsulation material may include one or more of the following: polyimide, polyethylene terephthalate, acrylic resin, or polycarbonate, etc.

[0209] In some examples, the encapsulation layer 130 may also be composed of both the inorganic and organic materials mentioned above, and this application does not impose any restrictions on this.

[0210] For example, the encapsulation layer 130 may include multiple thin-film encapsulation layers. For instance, the encapsulation layer 130 may include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer. In specific processing, the first inorganic encapsulation layer may first be formed on the side of the cathode 220 away from the substrate 110, then the organic encapsulation layer may be formed on the first inorganic encapsulation layer, and finally the second inorganic encapsulation layer may be formed on the organic encapsulation layer. The first and second inorganic encapsulation layers protect the cathode 220 and downstream devices from moisture / oxygen, while the organic encapsulation layer protects the cathode 220 and downstream devices from foreign matter such as dust particles.

[0211] It should be understood that the processing technology of the display panel 500 approved in this application does not require additional etching, peeling and other processes compared with the relevant mass production processes. The process is relatively simple and can avoid organic particle contamination.

[0212] The above, in conjunction with steps 101 to 108, describes a processing method for a display panel 500 provided by an embodiment of this application. In this processing method, the materials of the spacer pillar 300 and the first pixel definition layer 241 can be different, and the spacer pillar 300 and the first pixel definition layer 241 can be formed on the planarization layer 120 in two separate steps. In other processing methods, through material improvements and special photolithography processes and mask designs, it may be possible to form the spacer pillar 300 and the first pixel definition layer 241 on the planarization layer 120 in a single step in the future.

[0213] Furthermore, other explanations and beneficial effects of the embodiments of this application are the same as those of the foregoing embodiments, and will not be repeated here.

[0214] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A display panel, characterized in that, The display panel has multiple sub-pixel regions, and the display panel includes: substrate; A planarization layer is located on the substrate; A first pixel definition layer is located on the side of the planarization layer away from the substrate. The first pixel definition layer is disposed between adjacent sub-pixel regions and along a first direction. The first pixel definition layer includes a plurality of first protrusions. The first direction is parallel to the plane where the display panel is located. Spacer posts are disposed between adjacent first protrusions. The angle between a first position on the spacer post and a first plane is a first angle. The first position is the position of the spacer post close to the first plane. The angle between a second position on the first protrusion and the first plane is a second angle. The second position is the position of the first protrusion close to the first plane. The difference between the first angle and the second angle is greater than or equal to 20°. The first plane is the plane where the planarization layer is located.

2. The display panel according to claim 1, characterized in that, The first included angle ranges from 60° to 150°, and the second included angle ranges from 10° to 40°.

3. The display panel according to claim 1 or 2, characterized in that, Along the second direction, the thickness of the spacer post is less than or equal to the thickness of the first protrusion, the second direction is perpendicular to the first direction, and the second direction is the direction in which the substrate points to the first pixel definition layer.

4. The display panel according to any one of claims 1 to 3, characterized in that, The adjacent first protrusions are spaced apart; Along the second direction, the thickness of the portion of the first pixel definition layer located between adjacent first protrusions is less than the thickness of the first protrusions. The second direction is perpendicular to the first direction, and the second direction is the direction in which the substrate points to the first pixel definition layer.

5. The display panel according to claim 4, characterized in that, Along the second direction, the thickness of the portion of the first pixel definition layer located between adjacent first protrusions is zero.

6. The display panel according to claim 5, characterized in that, Along the second direction, the thickness of the spacer ranges from 0.2 μm to 3 μm, and the thickness of the first protrusion ranges from 0.2 μm to 3 μm.

7. The display panel according to claim 4, characterized in that, Along the second direction, the thickness of the portion of the first pixel definition layer located between adjacent first protrusions is greater than zero; and the sum of the thickness of the portion of the first pixel definition layer located between adjacent first protrusions and the thickness of the spacer post is less than or equal to the thickness of the first protrusion.

8. The display panel according to claim 7, characterized in that, Along the second direction, the thickness of the portion of the first pixel definition layer located between adjacent first protrusions ranges from 0.1μm to 2.5μm, the thickness of the spacer column ranges from 0.2μm to 2.5μm, and the thickness of the first protrusion ranges from 0.2μm to 3μm.

9. The display panel according to any one of claims 1 to 8, characterized in that, Along the first direction, the width of the spacer column ranges from 1μm to 10μm, the width of the first protrusion ranges from 1μm to 10μm, and the width of the first pixel definition layer ranges from 10μm to 30μm.

10. The display panel according to any one of claims 1 to 9, characterized in that, The plurality of first protrusions includes a second protrusion and a third protrusion, and the spacer is located between the second protrusion and the third protrusion; Along the first direction, the difference between the first distance between the spacer post and the second protrusion and the second distance between the spacer post and the third protrusion is within a preset range.

11. The display panel according to any one of claims 1 to 10, characterized in that, The material of the spacer pillars is different from the material of the first pixel definition layer.

12. The display panel according to any one of claims 1 to 11, characterized in that, On the first plane or the second plane, the plurality of spacer pillars are not connected to each other, and the second plane is the plane where the first pixel definition layer is located.

13. The display panel according to any one of claims 1 to 11, characterized in that, On the first plane or the second plane, the plurality of spacer pillars are interconnected, and the second plane is the plane where the first pixel definition layer is located.

14. The display panel according to any one of claims 1 to 13, characterized in that, The planarization layer includes recesses disposed between adjacent first protrusions, and the spacer pillars are disposed within the recesses.

15. The display panel according to any one of claims 1 to 14, characterized in that, The planarization layer includes protrusions located between adjacent first protrusions, and the spacer posts are disposed on the protrusions.

16. The display panel according to any one of claims 1 to 15, characterized in that, The display panel also includes: The anode is located on the side of the planarization layer away from the substrate, and the anode is located in the sub-pixel region; A common layer is located on the side of the first pixel definition layer and the anode that is away from the substrate, and the common layer is used to transport charge carriers; The cathode is located on the side of the common layer away from the substrate.

17. The display panel according to claim 16, characterized in that, The common layer includes a first light-emitting stack, a charge-generating layer, and a second light-emitting stack stacked along the second direction. The first light-emitting stack includes a first hole control layer, a first light-emitting layer, and a first electron control layer stacked along the second direction. The second light-emitting stack includes a second hole control layer, a second light-emitting layer, and a second electron control layer stacked along the second direction.

18. A display module, characterized in that, include: The display panel as described in any one of claims 1 to 17.

19. The display module according to claim 18, characterized in that, The display module also includes a cover plate and a polarizer, with the polarizer located between the cover plate and the display panel.

20. An electronic device, characterized in that, include: The circuit board assembly and the display module of claim 18 or 19, wherein the circuit board assembly is electrically connected to the display module.

Citation Information

Patent Citations

  • OLED display device and method of manufacturing the same

    CN109216413A

  • Display panel, manufacturing method thereof and display device

    CN116156947A

  • Bank structure, light emitting display device including the same, and method of manufacturing the same

    CN118284121A

  • Organic el display device, and manufacturing method therefor

    JP2008135325A

  • Array substrate and preparation method therefor, and display panel and terminal device

    WO2024169792A1