Display panel and electronic device comprising same

Abstract

The present invention provides a display panel comprising: a substrate including a plurality of island portions and a plurality of bridge portions for connecting neighboring island portions among the plurality of island portions; a display layer, which is disposed on the substrate and includes plurality of pixels disposed in the plurality of island portions and a plurality of wires disposed in the plurality of bridge portions; and a first protective layer for covering a side surface of the substrate and a side surface of the display layer, wherein the first protective layer is disposed to be spaced apart from the plurality of pixels on a plane.

Description

Display panel and electronic device including the same

[0001] The present invention relates to a display panel and an electronic device including the same, and more specifically, to a flexible display panel and an electronic device including the same.

[0002] As display panels that visually display electrical signals advance, various electronic devices with excellent characteristics such as thinness, lightness, and low power consumption are being introduced. For example, electronic devices may include flexible display panels that can be folded or rolled into a roll shape. Recently, research and development on various electronic devices including stretchable display panels that can change into various shapes is actively underway.

[0003] Embodiments of the present invention provide a display panel, such as a flexible display panel, and an electronic device including the same.

[0004] According to one aspect of the present invention, a display panel is provided comprising a substrate including a plurality of island portions and a plurality of bridge portions connecting adjacent island portions among the plurality of island portions, a display layer disposed on the substrate and including a plurality of pixels disposed on the plurality of island portions and a plurality of wires disposed on the plurality of bridge portions, and a first protective layer covering a side of the substrate and a side of the display layer, wherein the first protective layer is disposed spaced apart from the plurality of pixels on a plane.

[0005] In one embodiment, the substrate further comprises at least one base layer including an organic insulating material and at least one barrier layer including an inorganic insulating material disposed on the at least one base layer, and the at least one barrier layer may be spaced apart from the plurality of bridge portions in a planar manner.

[0006] In one embodiment, the display layer may further include a pixel circuit disposed in each of the plurality of island portions, a first organic insulating layer disposed on the pixel circuit, a first electrode pad and a second electrode pad disposed on the first organic insulating layer, and a light-emitting diode disposed on the first electrode pad and the second electrode pad.

[0007] In one embodiment, the display layer further includes at least one inorganic insulating layer, and on a plane, the at least one inorganic insulating layer may be spaced apart from the plurality of bridge portions.

[0008] In one embodiment, the display panel further includes an encapsulation layer disposed on the light-emitting diode, and the first protective layer may cover the side of the encapsulation layer.

[0009] In one embodiment, the first protective layer may expose the upper surface of the encapsulation layer.

[0010] In one embodiment, each of the plurality of bridge portions may have a wavy shape.

[0011] In one embodiment, each of the plurality of bridge portions may include two round portions having an inner edge and an outer edge, and a connecting portion connecting the two round portions.

[0012] In one embodiment, each of the plurality of bridge portions has a wiring area where the plurality of wires are arranged, and the wiring area may be spaced apart from the outer edge by a first distance and spaced apart from the inner edge by a second distance greater than the first distance.

[0013] In one embodiment, the display panel may further include a second protective layer disposed between the inner edges and the first protective layer.

[0014] In one embodiment, the modulus of the second protective layer may be higher than the modulus of the first protective layer.

[0015] In one embodiment, each of the plurality of bridge portions may include two corner portions, each having a first portion extending in a first direction and a second portion extending in a second direction intersecting the first direction, and a connecting portion connecting the two corner portions.

[0016] In one embodiment, each of the two corner portions has an inner edge and an outer edge, and may further include a second protective layer disposed between the inner edges and the first protective layer.

[0017] In one embodiment, the modulus of the second protective layer may be higher than the modulus of the first protective layer.

[0018] In one embodiment, the first protective layer may include parylene, silicon oxide, or silicon nitride.

[0019] According to another aspect of the present invention, the apparatus may comprise a substrate including a plurality of island portions and a plurality of bridge portions connecting adjacent island portions among the plurality of island portions, a pixel circuit disposed on each of the plurality of island portions, a first organic insulating layer disposed on the pixel circuit, a first electrode pad and a second electrode pad disposed on the first organic insulating layer, a light-emitting diode disposed on the first electrode pad and the second electrode pad, a first protective layer extending from the upper surface of the first organic insulating layer to the side of the substrate and having openings corresponding to each of the first electrode pad and the second electrode pad, and a second protective layer disposed between the first protective layer and the side of the plurality of bridge portions.

[0020] In one embodiment, the substrate further comprises at least one base layer including an organic insulating material and at least one barrier layer including an inorganic insulating material disposed on the at least one base layer, and the at least one barrier layer may be spaced apart from the plurality of bridge portions in a planar manner.

[0021] In one embodiment, each of the plurality of bridge portions may include two round portions having an inner edge and an outer edge, and a connecting portion connecting the two round portions.

[0022] In one embodiment, the second protective layer may be disposed along the inner edge.

[0023] In one embodiment, the modulus of the second protective layer may be higher than the modulus of the first protective layer.

[0024] According to another aspect of the present invention, an electronic device comprising a flexible display panel is provided, wherein the display panel comprises a substrate including a plurality of island portions and a plurality of bridge portions connecting adjacent island portions among the plurality of island portions, a display layer disposed on the substrate and comprising a plurality of pixels disposed on the plurality of island portions and a plurality of wires disposed on the plurality of bridge portions, and a first protective layer covering a side of the substrate and a side of the display layer, wherein the first protective layer is disposed spaced apart from the pixels in a planar manner.

[0025] Other aspects, features, and advantages other than those described above will become clear from the following drawings, claims, and detailed description of the invention.

[0026] According to one embodiment of the present invention as described above, a high-resolution display panel having high elasticity and an electronic device including the same can be realized. Of course, the scope of the present invention is not limited by such effects.

[0027] FIG. 1 is a schematic perspective view of a display panel according to one embodiment of the present invention.

[0028] FIGS. 2A and FIGS. 2B are perspective views showing the display panel of FIG. 1 extended in a first direction.

[0029] FIG. 2c is a perspective view showing the display panel of FIG. 1 extended in a second direction.

[0030] FIG. 2d is a perspective view showing the display panel of FIG. 1 extended in the first direction and the second direction.

[0031] FIG. 2e is a perspective view showing the display panel of FIG. 1 extended in a third direction.

[0032] FIGS. 3a to 3c are each equivalent circuit diagrams of pixels included in a display panel according to one embodiment of the present invention.

[0033] FIGS. 4a to 4c are schematic plan views showing the display area of ​​a display panel according to one embodiment of the present invention.

[0034] FIG. 5 is a cross-sectional view schematically illustrating a cross-section along line I-I' of the display panel of FIG. 4a.

[0035] FIGS. 6a to 6e are cross-sectional views schematically showing a light-emitting diode of a display panel according to one embodiment of the present invention.

[0036] FIG. 7 is a cross-sectional view schematically showing a part of the display area of ​​a display panel according to one embodiment of the present invention.

[0037] FIG. 8a is a schematic plan view showing a bridge portion of a display panel according to one embodiment of the present invention.

[0038] FIG. 8b is a cross-sectional view schematically illustrating a cross-section along the line II-II' of the bridge portion of FIG. 8a.

[0039] FIG. 9a is a schematic plan view showing a bridge portion of a display panel according to one embodiment of the present invention.

[0040] FIG. 9b is a cross-sectional view schematically illustrating a cross-section along the line III-III' of the bridge portion of FIG. 9a.

[0041] FIG. 10 is a schematic plan view showing the display area of ​​a display panel according to one embodiment of the present invention.

[0042] FIG. 11a is a cross-sectional view schematically showing a part of the display area of ​​a display panel according to one embodiment of the present invention.

[0043] FIG. 11b is a cross-sectional view schematically showing a part of the bridge portion of the display panel of FIG. 11a.

[0044] FIG. 12 is a block diagram showing an electronic device including a display panel according to one embodiment of the present invention.

[0045] FIGS. 13a to 13g are schematic perspective views illustrating embodiments of an electronic device including a display panel according to one embodiment of the present invention.

[0046] The present invention is capable of various modifications and may have various embodiments; specific embodiments are illustrated in the drawings and described in detail in the detailed description. The effects and features of the present invention, and the methods for achieving them, will become clear by referring to the embodiments described below in detail together with the drawings. However, the present invention is not limited to the embodiments disclosed below but can be implemented in various forms.

[0047] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings. When describing with reference to the drawings, identical or corresponding components are given the same reference numerals, and redundant descriptions thereof will be omitted.

[0048] In this specification, terms such as first, second, etc. are used not in a limiting sense, but for the purpose of distinguishing one component from another.

[0049] In this specification, singular expressions include plural expressions unless the context clearly indicates otherwise.

[0050] In this specification, terms such as "include" or "have" mean that the features or components described in the specification exist, and do not preclude the possibility that one or more other features or components may be added.

[0051] In this specification, when a part such as a film, region, or component is described as being on or above another part, it includes not only cases where it is immediately above the other part, but also cases where another film, region, or component is interposed therein.

[0052] In this specification, when it is stated that a membrane, region, component, etc. is connected, it includes cases where the membrane, region, or component is directly connected, or / or cases where other membranes, regions, or components are interposed between them to form an indirect connection. For example, when it is stated that a membrane, region, or component, etc. is electrically connected in this specification, it indicates cases where the membrane, region, or component, etc. are directly electrically connected, and / or cases where other membranes, regions, or components are interposed between them to form an indirect electrical connection.

[0053] In this specification, "A and / or B" indicates the case where it is A, B, or both A and B. And, "at least one of A and B" indicates the case where it is A, B, or both A and B.

[0054] In this specification, the x direction, y direction, and z direction are not limited to directions along the three axes of an orthogonal coordinate system, but can be interpreted in a broad sense that includes them. For example, the x direction, y direction, and z direction may be orthogonal to each other, but may also refer to different directions that are not orthogonal to each other.

[0055] In this specification, "planar" means when the subject part is viewed from above (e.g., when viewed from a direction perpendicular to the upper surface of the substrate), and "cross-sectional" means when the cross-section obtained by vertically cutting the subject part is viewed from the side.

[0056] In this specification, "the first component overlaps" the second component, meaning that the first component is positioned above or below the second component so that at least a portion overlaps on a plane.

[0057] Where any embodiment in this specification can be implemented differently, a specific process sequence may be performed differently from the order described. For example, two processes described consecutively may be performed substantially simultaneously or proceed in the reverse order of the order described.

[0058] In this specification, "substantially" means "approximately or exactly." For example, "substantially identical" means "approximately identical or exactly identical." "Substantially perpendicular" means "approximately perpendicular or exactly perpendicular." "Substantially parallel" means "approximately parallel or exactly parallel." "Substantially simultaneously" means "approximately simultaneously or exactly simultaneously."

[0059] In the drawings, the size of components may be exaggerated or reduced for convenience of explanation. For example, the size and thickness of each component shown in the drawings are depicted arbitrarily for convenience of explanation, so the present invention is not necessarily limited to what is illustrated.

[0060] FIG. 1 is a schematic perspective view of a display panel (10) according to an embodiment of the present invention. FIG. 2a and FIG. 2b are perspective views showing the display panel (10) of FIG. 1 extended in a first direction. FIG. 2c is a perspective view showing the display panel (10) of FIG. 1 extended in a second direction. FIG. 2d is a perspective view showing the display panel (10) of FIG. 1 extended in the first direction and the second direction. FIG. 2e is a perspective view showing the display panel (10) of FIG. 1 extended in a third direction.

[0061] Referring to FIG. 1, a display panel (10) may include a display area (DA) and a non-display area (NDA). The display area (DA) may include a plurality of pixels. The display panel (10) may provide a predetermined image using light emitted from a plurality of pixels. The non-display area (NDA) may be placed outside the display area (DA). The non-display area (NDA) may completely surround the display area (DA).

[0062] The display panel (10) can be extended or retracted in various directions. The display panel (10) can be extended in a first direction (e.g., x direction and / or -x direction) by an external force applied by an external object or a user. In one embodiment, as shown in FIGS. 2a and 2b, the display area (DA) and / or non-display area (NDA) of the display panel (10) can be extended in a first direction (e.g., x direction and / or -x direction). For example, as shown in FIG. 2a, it can be extended along the x direction and -x direction, or as shown in FIG. 2b, it can be extended along the x direction while one side of the display panel (10) remains fixed.

[0063] The display panel (10) can be extended in a second direction (e.g., the y direction and / or the -y direction) by an external force applied by an external object or a user. In one embodiment, as shown in FIG. 2c, the display area (DA) and / or non-display area (NDA) of the display panel (10) can be extended in the y direction and the -y direction. In another embodiment, one side of the display panel (10) can be extended in the y direction or the -y direction while remaining fixed.

[0064] The display panel (10) can be extended in multiple directions, such as a first direction (e.g., x direction and / or -x direction) and a second direction (e.g., y direction and / or -y direction) by an external force applied by an external object or a part of a person's body. As shown in FIG. 2d, the display area (DA) and / or non-display area (NDA) of the display panel (10) can be extended in the ±x direction and ±y direction.

[0065] The display panel (10) can be extended in a third direction (e.g., z direction or -z direction) by an external force applied by an external object or a part of a person's body. In one embodiment, FIG. 2e illustrates a part of the display panel (10), such as a part of the display area (DA), protruding in the z direction. In another embodiment, a part of the display panel (10), such as a part of the display area (DA), may protrude along the z direction (or be sunken along the -z direction).

[0066] FIGS. 2a to 2e illustrate a display panel (10) extended in a first direction, a second direction, and / or a third direction, but the present invention is not limited thereto. In other embodiments, the display panel (10) may be deformed into various irregular shapes, such as having two or more axes, being bent or twisted.

[0067] FIGS. 3a to 3c are each equivalent circuit diagrams of pixels included in a display panel according to one embodiment of the present invention.

[0068] Referring to FIG. 3a, a pixel may include a light-emitting diode (ED) and a pixel circuit (PC) that controls the brightness of the light-emitting diode (ED). The light-emitting diode (ED) is electrically connected to the pixel circuit (PC), and the pixel circuit (PC) may include a first transistor (T1), a second transistor (T2), and a storage capacitor (Cst). The pixel circuit (PC) may be electrically connected to signal lines and voltage lines. The signal lines may include a scan signal line (GWL) and a data line (DL), and the voltage lines may include a first voltage line (VDDL) and a second voltage line (VSSL).

[0069] The second transistor (T2) can be electrically connected to the scan signal line (GWL) and the data line (DL). The scan signal line (GWL) can provide a scan signal (GW) to the gate electrode of the second transistor (T2). The second transistor (T2) can transmit a data signal (Dm) input from the data line (DL) to the first transistor (T1) according to the scan signal (GW) input from the scan signal line (GWL).

[0070] The storage capacitor (Cst) is electrically connected to the second transistor (T2) and the first voltage line (VDDL), and can store a voltage corresponding to the difference between the voltage received from the second transistor (T2) and the first power supply voltage (VDD) supplied by the first voltage line (VDDL).

[0071] The first transistor (T1) is a driving transistor and can control the driving current flowing through the light-emitting diode (ED). The first transistor (T1) can be connected to the first voltage line (VDDL) and the storage capacitor (Cst). The first transistor (T1) can control the driving current flowing from the first voltage line (VDDL) to the light-emitting diode (ED) in correspondence with the voltage value stored in the storage capacitor (Cst). The light-emitting diode (ED) can emit light having a predetermined brightness by the driving current. The first electrode of the light-emitting diode (ED) is electrically connected to the first transistor (T1), and the second electrode can be electrically connected to the second voltage line (VSSL) that supplies the second power supply voltage (VSS).

[0072] FIG. 3a illustrates a pixel circuit (PC) comprising two transistors and one storage capacitor, but in other embodiments, the pixel circuit (PC) may comprise three or more transistors.

[0073] Referring to FIG. 3b, the pixel circuit (PC) may include a first transistor (T1), a second transistor (T2), a third transistor (T3), a fourth transistor (T4), a fifth transistor (T5), a sixth transistor (T6), a seventh transistor (T7), and a storage capacitor (Cst).

[0074] The pixel circuit (PC) is electrically connected to signal lines and voltage lines. For example, the signal lines may include gate lines such as a scan signal line (GWL), a bypass control line (GBL), an initialization control line (GIL), and an emission control line (EML), and data lines (DL). The voltage lines may include first and second initialization voltage lines (VL1, VL2), a first voltage line (VDDL), and a second voltage line (VSSL).

[0075] The first voltage line (VDDL) can transmit a first power supply voltage (VDD) to the first transistor (T1). The first initialization voltage line (VL1) can transmit a first initialization voltage (Vint) that initializes the first transistor (T1) to the pixel circuit (PC). The second initialization voltage line (VL2) can transmit a second initialization voltage (Vaint) that initializes the first electrode of the light-emitting diode (ED) to the pixel circuit (PC).

[0076] The first transistor (T1) can be electrically connected to the first voltage line (VDDL) via the fifth transistor (T5) and electrically connected to the light-emitting diode (ED) via the sixth transistor (T6). The first transistor (T1) acts as a driving transistor and receives a data signal (Dm) according to the switching operation of the second transistor (T2) and supplies a driving current to the light-emitting diode (ED).

[0077] The second transistor (T2) is a data write transistor and is electrically connected to the scan signal line (GWL) and the data line (DL). The second transistor (T2) is electrically connected to the first voltage line (VDDL) via the fifth transistor (T5). The second transistor (T2) is turned on according to the scan signal (GW) received through the scan signal line (GWL) and performs a switching operation to transmit the data signal (Dm) transmitted to the data line (DL) to the first node (N1).

[0078] The third transistor (T3) is electrically connected to the scan signal line (GWL) and is electrically connected to the light-emitting diode (ED) via the sixth transistor (T6). The third transistor (T3) is turned on according to the scan signal (GW) received through the scan signal line (GWL) and can diode-connect the first transistor (T1).

[0079] The fourth transistor (T4) is a first initialization transistor and is electrically connected to the initialization control line (GIL) and the first initialization voltage line (VL1). The fourth transistor (T4) is turned on according to the initialization control signal (GI) received through the initialization control line (GIL) and transmits the first initialization voltage (Vint) from the first initialization voltage line (VL1) to the gate electrode of the first transistor (T1) to initialize the voltage of the gate electrode of the first transistor (T1). The initialization control signal (GI) may correspond to a scan signal of another pixel circuit placed in the previous row of the corresponding pixel circuit (PC).

[0080] The fifth transistor (T5) may be an operation control transistor, and the sixth transistor (T6) may be a light emission control transistor. The fifth transistor (T5) and the sixth transistor (T6) are electrically connected to the light emission control line (EML) and are simultaneously turned on according to the light emission control signal (EM) received through the light emission control line (EML), thereby forming a current path so that a driving current can flow from the first voltage line (VDDL) toward the light-emitting diode (ED). The first electrode of the light-emitting diode (ED) may be electrically connected to the first transistor (T1) through the sixth transistor (T6), and the second electrode may be electrically connected to the second voltage line (VSSL) that supplies the second power supply voltage (VSS).

[0081] The seventh transistor (T7) is a second initialization transistor and can be electrically connected to the bypass control line (GBL), the second initialization voltage line (VL2), and the sixth transistor (T6). The seventh transistor (T7) is turned on according to the bypass control signal (GB) received through the bypass control line (GBL), and can initialize the first electrode of the light-emitting diode (ED) by transmitting the second initialization voltage (Vaint) from the second initialization voltage line (VL2) to the first electrode of the light-emitting diode (ED).

[0082] The storage capacitor (Cst) includes a first electrode (CE1) and a second electrode (CE2). The first electrode (CE1) is electrically connected to the gate electrode of the first transistor (T1), and the second electrode (CE2) is electrically connected to the first voltage line (VDDL). The storage capacitor (Cst) can maintain the voltage applied to the gate electrode of the first transistor (T1) by storing and maintaining a voltage corresponding to the difference between the voltages of the first voltage line (VDDL) and the gate electrode of the first transistor (T1).

[0083] Referring to FIG. 3c, the pixel circuit (PC) may include a first transistor (T1), a second transistor (T2), a third transistor (T3), a fourth transistor (T4), a fifth transistor (T5), a sixth transistor (T6), a seventh transistor (T7), an eighth transistor (T8), a ninth transistor (T9), a storage capacitor (Cst), and an auxiliary capacitor (Ca).

[0084] The pixel circuit (PC) is electrically connected to signal lines and voltage lines. The signal lines may include gate lines such as a scan signal line (GWL), a bypass control line (GBL), an initialization control line (GIL), and an emission control line (EML), and data lines (DL). The voltage lines may include first and second initialization voltage lines (VL1, VL2), a hold voltage line (VL3), a first voltage line (VDDL), and a second voltage line (VSSL).

[0085] The first voltage line (VDDL) can transmit the first power supply voltage (VDD) to the first transistor (T1). The first initialization voltage line (VL1) can transmit the first initialization voltage (Vint) that initializes the first transistor (T1) to the pixel circuit (PC). The second initialization voltage line (VL2) can transmit the second initialization voltage (Vaint) that initializes the first electrode of the light-emitting diode (ED) to the pixel circuit (PC). The holding voltage line (VL3) can provide the holding voltage (VSUS) to the second electrode (CE2) of the second node (N2), for example, the storage capacitor (Cst), during the initialization period and the data writing period.

[0086] The first transistor (T1) can be electrically connected to the first voltage line (VDDL) via the fifth transistor (T5) and the eighth transistor (T8), and can be electrically connected to the light-emitting diode (ED) via the sixth transistor (T6). The first transistor (T1) acts as a driving transistor and can receive a data signal (Dm) according to the switching operation of the second transistor (T2) and supply a driving current to the light-emitting diode (ED).

[0087] The second transistor (T2) is electrically connected to the scan signal line (GWL) and the data line (DL), and is electrically connected to the first voltage line (VDDL) via the fifth transistor (T5) and the eighth transistor (T8). The second transistor (T2) is turned on according to the scan signal (GW) received through the scan signal line (GWL) and performs a switching operation to transmit the data signal (Dm) transmitted through the data line (DL) to the first node (N1).

[0088] The third transistor (T3) is electrically connected to the scan signal line (GWL) and is electrically connected to the light-emitting diode (ED) via the sixth transistor (T6). The third transistor (T3) is turned on according to the scan signal (GW) received through the scan signal line (GWL) and connects the first transistor (T1) to the diode, thereby compensating for the threshold voltage of the first transistor (T1).

[0089] The fourth transistor (T4) is electrically connected to the initialization control line (GIL) and the first initialization voltage line (VL1), and is turned on according to the initialization control signal (GI) received through the initialization control line (GIL) to transmit the first initialization voltage (Vint) from the first initialization voltage line (VL1) to the gate electrode of the first transistor (T1) to initialize the voltage of the gate electrode of the first transistor (T1). The initialization control signal (GI) may correspond to a scan signal of another pixel circuit placed in the previous row of the corresponding pixel circuit (PC).

[0090] The fifth transistor (T5), the sixth transistor (T6), and the eighth transistor (T8) are electrically connected to the light emission control line (EML) and are simultaneously turned on according to the light emission control signal (EM) received through the light emission control line (EML), thereby forming a current path so that a driving current can flow from the first voltage line (VDDL) toward the light-emitting diode (ED). The first electrode of the light-emitting diode (ED) is electrically connected to the first transistor (T1) through the sixth transistor (T6), and the second electrode can be electrically connected to the second voltage line (VSSL) that supplies the second power supply voltage (VSS).

[0091] The seventh transistor (T7) is a second initialization transistor and can be electrically connected to the bypass control line (GBL), the second initialization voltage line (VL2), and the sixth transistor (T6). The seventh transistor (T7) is turned on according to the bypass control signal (GB) received through the bypass control line (GBL) and transmits the second initialization voltage (Vaint) from the second initialization voltage line (VL2) to the first electrode of the light-emitting diode (ED) to initialize the first electrode of the light-emitting diode (ED).

[0092] The ninth transistor (T9) can be electrically connected to the bypass control line (GBL), the second electrode (CE2) of the storage capacitor (Cst), and the holding voltage line (VL3). The ninth transistor (T9) is turned on according to the bypass control signal (GB) received through the bypass control line (GBL), and can transmit a holding voltage (VSUS) to the second node (N2), such as the second electrode (CE2) of the storage capacitor (Cst), during the initialization period and the data writing period.

[0093] The eighth transistor (T8) and the ninth transistor (T9) can each be electrically connected to the second node (N2), for example, the second electrode (CE2) of the storage capacitor (Cst). In some embodiments, the eighth transistor (T8) can be turned off and the ninth transistor (T9) can be turned on during the initialization period and the data writing period, and the eighth transistor (T8) can be turned on and the ninth transistor (T9) can be turned off during the light emission period.

[0094] The storage capacitor (Cst) includes a first electrode (CE1) and a second electrode (CE2). The first electrode (CE1) is electrically connected to the gate electrode of the first transistor (T1), and the second electrode (CE2) is electrically connected to the eighth transistor (T8) and the ninth transistor (T9).

[0095] The auxiliary capacitor (Ca) can be electrically connected to the sixth transistor (T6), the holding voltage line (VL3), and the first electrode of the light-emitting diode (ED). By storing and maintaining a voltage corresponding to the voltage difference between the first electrode of the light-emitting diode (ED) and the holding voltage line (VL3) while the seventh transistor (T7) and the ninth transistor (T9) are turned on, the auxiliary capacitor (Ca) can prevent the problem of black brightness rising when the sixth transistor (T6) is turned off.

[0096] FIGS. 4a to 4c are schematic plan views showing the display area of ​​a display panel according to one embodiment of the present invention.

[0097] Referring to FIG. 4a, the display panel (10) may include a plurality of first island portions (11) spaced apart from each other along a first direction (e.g., x direction or -x direction) and a second direction (e.g., y direction or -y direction) in a display area (DA, see FIG. 1), a plurality of first bridge portions (12) connecting adjacent first island portions (11), and a first protection layer (15).

[0098] Each first island section (11) may be connected to a plurality of first bridge sections (12). For example, each first island section (11) may be connected to four first bridge sections (12). Two of the four first bridge sections (12) may be positioned on both sides of the first island section (11) along a first direction (e.g., x direction or -x direction), and the remaining two first bridge sections (12) may be positioned on both sides of the first island section (11) along a second direction (e.g., y direction or -y direction). In one embodiment, four first bridge sections (12) may be connected to each of the four sides of the first island section (11). Each of the four first bridge sections (12) may be adjacent to each corner of the first island section (11).

[0099] The first bridge sections (12) may be spaced apart from each other by an opening (CS) located between the first bridge sections (12). The first bridge section (12) may have a wavy shape. For example, as shown in FIG. 4a, the first bridge section (12) may have a shape of approximately the letter 'S'.

[0100] The first protective layer (15) is positioned on the outside of the first island portions (11) and the first bridge portions (12) and may extend along the edges of the first island portions (11) and the first bridge portions (12). That is, the first protective layer (15) may be positioned to cover the side wall defining the opening (CS).

[0101] Referring to FIG. 4b, the display panel (10) may include a plurality of first island portions (11) spaced apart from each other in a first direction (e.g., x direction or -x direction) and a second direction (e.g., y direction or -y direction) in a display area (DA, see FIG. 1), a plurality of first bridge portions (12) connecting adjacent first island portions (11), and a first protection layer (15). The first bridge portions (12) may be spaced apart from each other by an opening (CS) located between the first bridge portions (12).

[0102] In one embodiment, at least one of the sides of the first island portion (11) may be tilted obliquely with respect to a first direction (e.g., x direction or -x direction) and / or a second direction (e.g., y direction or -y direction). FIG. 4b illustrates that all four sides of the first island portion (11) are tilted obliquely in a clockwise direction.

[0103] The first island section (11) can be connected to a plurality of first bridge sections (12). For example, the first island section (11) can be connected to four first bridge sections (12). Two of the four first bridge sections (12) may be positioned on both sides of the first island section (11) along a first direction (e.g., x direction or -x direction), and the remaining two first bridge sections (12) may be positioned on both sides of the first island section (11) along a second direction (e.g., y direction or -y direction).

[0104] The first bridge portion (12) may have a wavy shape. For example, as shown in FIG. 4b, the first bridge portion (12) may have a shape of approximately the letter 'S'.

[0105] In one embodiment, the first bridge section (12) may extend substantially parallel to the side of the adjacent first island section (11) as shown in FIG. 4b. For example, the first bridge section (12) may have two rounded sections connected to the adjacent first island sections (11) and a straight section connecting the two rounded sections. The straight section of the first bridge section (12) may extend substantially parallel to the side of the adjacent first island section (11).

[0106] The first protective layer (15) is positioned on the outside of the first island portions (11) and the first bridge portions (12) and may extend along the edges of the first island portions (11) and the first bridge portions (12). That is, the first protective layer (15) may be positioned to cover the side wall defining the opening (CS).

[0107] Depending on the arrangement of the first island section (11) and / or the structure of the first bridge section (12) described above, the area of ​​the opening (CS) shown in FIG. 4b may be relatively smaller than the area of ​​the opening (CS) shown in FIG. 4a, and thus the display panel (10) according to the embodiment shown in FIG. 4a may provide a relatively high-resolution image.

[0108] Referring to FIG. 4c, the display panel (10) may include a plurality of first island portions (11) spaced apart from each other along a first direction (e.g., x direction or -x direction) and a second direction (e.g., y direction or -y direction) in a display area (DA, see FIG. 1), a plurality of first bridge portions (12) connecting adjacent first island portions (11), and a first protection layer (15).

[0109] Each first island section (11) may be connected to a plurality of first bridge sections (12). For example, each first island section (11) may be connected to four first bridge sections (12). Two of the four first bridge sections (12) may be positioned on both sides of the first island section (11) along a first direction (e.g., x direction or -x direction), and the remaining two first bridge sections (12) may be positioned on both sides of the first island section (11) along a second direction (e.g., y direction or -y direction). In one embodiment, four first bridge sections (12) may be connected to each of the four sides of the first island section (11). Each of the four first bridge sections (12) may be adjacent to each corner of the first island section (11).

[0110] The first bridge sections (12) may be spaced apart from each other by an opening (CS) located between the first bridge sections (12). In one embodiment, an opening (CS) approximately H-shaped and an opening (CS) approximately I-shaped, which is the aforementioned H-shaped rotated 90 degrees, may be alternately arranged along a first direction (e.g., x-direction or -x-direction) and a second direction (e.g., y-direction or -y-direction), respectively. Both ends of each first bridge section (12) are connected to each of the adjacent first island sections (11), and one side of each first bridge section (12) may be spaced apart from one side of the adjacent first island section (11) and / or one side of the other first bridge section (12) by the opening (CS).

[0111] The first protective layer (15) is positioned on the outside of the first island portions (11) and the first bridge portions (12) and may extend along the edges of the first island portions (11) and the first bridge portions (12). That is, the first protective layer (15) may be positioned to cover the side wall defining the opening (CS).

[0112] In one embodiment, the display panel (10) may include a plurality of second island portions spaced apart from each other along a first direction (e.g., x direction or -x direction) and a second direction (e.g., y direction or -y direction) in a non-display area (NDA, see FIG. 1), and a plurality of second bridge portions connecting adjacent second island portions. Thus, the non-display area (NDA) of the display panel (10) may also be stretchable in various directions. Each of the second island portions and the second bridge portions may have the same or similar shape as the first island portion (11) and the first bridge portion (12) of the display area (DA) described with reference to FIG. 4a to 4c. In another embodiment of the present invention, the second island portion and the second bridge portion of the non-display area (NDA) may each have a different shape from the first island portion (11) and the first bridge portion (12) of the display area (DA).

[0113] FIG. 5 is a cross-sectional view schematically illustrating a cross-section along line I-I' of the display panel of FIG. 4a.

[0114] Referring to FIG. 5, the first island portion (11) and the first bridge portion (12) of the display panel (10) may be spaced apart with an opening (CS) in between. The first island portion (11) may include light-emitting diodes (ED) and pixel circuits (PC) electrically connected thereto, and the first bridge portion (12) may include wiring (WL) electrically connected to pixel circuits (PC) placed in each of the adjacent first island portions (11).

[0115] The substrate (100) may include an island region (100a) corresponding to the first island portion (11) of the display panel (10) and a bridge region (100b) corresponding to the first bridge portion (12) of the display panel (10). The substrate (100) may include a polymer resin such as polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate. In one embodiment, the substrate (100) may be a single layer comprising the aforementioned polymer resin. In another embodiment, the substrate (100) may be a multilayer structure comprising at least one base layer comprising the aforementioned polymer resin and at least one barrier layer comprising an inorganic insulating material. In a planar view, at least one barrier layer may be positioned corresponding to the island region (100a) and spaced apart from the bridge regions (100b). The bridge region (100b) may include only a base layer and may not include a barrier layer. Since the first bridge portion (12) undergoes relatively significant deformation when the display panel (10) is stretched, the bridge region (100b) may not contain a layer containing an inorganic insulating material that is prone to cracking. The substrate (100) containing a polymer resin may have flexible, rollable, and bendable characteristics.

[0116] First, looking at the first island portion (11) of the display panel (10), a display layer (200) including a pixel circuit (PC) and a light-emitting diode (ED) may be disposed on the island region (100a) of the substrate (100). The display layer (200) may include at least one semiconductor layer and a conductive layer forming the pixel circuit (PC), and an insulating layer (IL) disposed above and / or below the at least one semiconductor layer and the conductive layer. The insulating layer (IL) on the island region (100a) may include an inorganic insulating layer and / or an organic insulating layer. The light-emitting diode (ED) is disposed on the insulating layer (IL) and may be electrically connected to the corresponding pixel circuit (PC). The light-emitting diodes (ED) may emit light of different colors or light of the same color. In one embodiment, the light-emitting diodes (ED) may each emit red, green, and blue light. In some embodiments, light-emitting diodes (EDs) can emit white light. In another embodiment, light-emitting diodes (EDs) can emit red, green, blue, and white light, respectively.

[0117] In one embodiment, FIG. 5 illustrates three pixel circuits (PCs) arranged in each first island section (11) and three light-emitting diodes (EDs) connected to each of the three pixel circuits (PCs), but the invention is not limited thereto. In another embodiment, the number of pixel circuits (PCs) and light-emitting diodes (EDs) arranged in each first island section (11) may be one, two, or four or more.

[0118] The encapsulation layer (300) may be placed on a light-emitting diode (ED) and may protect the light-emitting diode (ED) from external forces and / or moisture permeability. The encapsulation layer (300) may include an inorganic encapsulation layer and / or an organic encapsulation layer. In some embodiments, the encapsulation layer (300) may include a structure in which an inorganic encapsulation layer containing an inorganic insulating material, an organic encapsulation layer containing an organic insulating material, and an inorganic encapsulation layer containing an inorganic insulating material are laminated. In other embodiments, the encapsulation layer (300) may include an organic material such as resin. In some embodiments, the encapsulation layer (300) may include urethane, epoxy, and / or acrylate. The encapsulation layer (300) may include a photosensitive material, such as a photoresist.

[0119] Looking at the first bridge portion (12) of the display panel (10), a display layer (200) including wiring (WL) may be disposed on the bridge region (100b) of the substrate (100). The display layer (200) may include a plurality of conductive layers including wiring (WL) and an insulating layer (IL) disposed above and / or below the conductive layers. The insulating layer (IL) on the bridge region (100b) may not include an inorganic insulating layer but may include an organic insulating layer. Since the first bridge portion (12) undergoes relatively significant deformation when the display panel (10) is stretched, the display layer (200) of the first bridge portion (12) may not contain a layer containing an inorganic insulating material that is prone to cracking.

[0120] As previously described, the wiring (WL) of the first bridge section (12) may be signal lines (e.g., gate lines, data lines, etc.) for providing electrical signals to transistors included in the pixel circuit (PC) of the first island section (11), or voltage lines (e.g., power supply voltage lines, initialization voltage lines, etc.) for providing voltage. An encapsulation layer (300) may also be disposed in the first bridge section (12). In another embodiment, the encapsulation layer (300) may not exist in the first bridge section (12).

[0121] Referring to FIGS. 4a through 4c and FIG. 5, the island region (100a) of the substrate (100) corresponds to the first island portion (11), and the bridge region (100b) corresponds to the first bridge portion (12), and the island region (100a) and the bridge region (100b) of the substrate (100) can be connected to each other. The substrate (100) may have (or define) an opening (100OP1) having the same shape as the opening (CS).

[0122] Similarly, the display layer (200) placed on the island area (100a) and the display layer (200) placed on the bridge area (100b) can be connected to each other. In other words, the display layer (200) may include an area corresponding to the first island portion (11), an area corresponding to the first bridge portion (12), and an opening (200OP1) having the same shape as the opening (CS).

[0123] The bag layer (300) placed on the island area (100a) and the bag layer (300) placed on the bridge area (100b) can be connected to each other. In other words, the bag layer (300) may include an area corresponding to the first island portion (11), an area corresponding to the first bridge portion (12), and an opening (300OP1) having the same shape as the opening (CS).

[0124] In other words, the opening (100OP1) of the substrate (100), the opening (200OP1) of the display layer (200), and the opening (300OP1) of the encapsulation layer (300) can be connected to each other to form an opening (CS). The first protective layer (15) can cover the side of the substrate (100) defining the opening (100OP1) of the substrate (100) and the side of the display layer (200) defining the opening (200OP1) of the display layer (200). In one embodiment, the first protective layer (15) can further cover the side of the encapsulation layer (300) defining the opening (300OP1) of the encapsulation layer (300). The first protective layer (15) can be extended in the z direction or the -z direction.

[0125] The first protective layer (15) may include an organic insulating material and / or an inorganic insulating material capable of conformal coating based on chemical vapor deposition. In one embodiment, the first protective layer (15) may include parylene, silicon oxide (SiOx) and / or silicon nitride (SiNx).

[0126] As the display panel (10) becomes higher resolution, the aspect ratio of the opening (CS) increases and the area of ​​the first bridge portion (12) may be reduced. In the process of manufacturing the opening (CS), the wiring (WL) of the first bridge portion (12) may be exposed by the opening (CS) due to the reduction in margin. Embodiments of the present invention include a first protective layer (15) covering the side of the substrate (100) forming the opening (CS) and the side of the display layer (200), thereby preventing the wiring (WL) from being exposed by the opening (CS), which reduces defects during the manufacturing process and can provide a highly reliable display panel (10).

[0127] FIGS. 6a to 6e are cross-sectional views schematically showing a light-emitting diode of a display panel according to one embodiment of the present invention.

[0128] Referring to FIG. 6a, the light-emitting diode (LED) may include an inorganic light-emitting diode containing an inorganic material. The light-emitting diode (LED) may include a first semiconductor layer (231), a second semiconductor layer (232), an intermediate layer (233) between the first semiconductor layer (231) and the second semiconductor layer (232), a first electrode (235) electrically connected to the first semiconductor layer (231), and a second electrode (238) electrically connected to the second semiconductor layer (232). The first electrode (235) and the second electrode (238) of the light-emitting diode (LED) may each be electrically connected to a first electrode pad (241) and a second electrode pad (242) disposed on the same layer. The second electrode pad (242) may be a part of the second voltage line (VSSL, FIG. 3a) or a conductive layer electrically connected to the second voltage line (VSSL, FIG. 3a).

[0129] In some embodiments, the first semiconductor layer (231) may include a p-type semiconductor layer. The p-type semiconductor layer is In x Al y Ga 1-x-y A semiconductor material having the composition formula N (0≤x≤1, 0≤y≤1, 0≤x+y≤1) can be selected from, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, etc., and p-type dopants such as Mg, Zn, Ca, Sr, and Ba can be doped.

[0130] The second semiconductor layer (232) may include, for example, an n-type semiconductor layer. The n-type semiconductor layer is In x Al y Ga 1-x-y A semiconductor material having the composition formula N (0≤x≤1, 0≤y≤1, 0≤x+y≤1) can be selected from, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, etc., and can be doped with n-type dopants such as Si, Ge, and Sn.

[0131] The intermediate layer (233) is a region where electrons and holes recombine, and as electrons and holes recombine, they transition to a lower energy level and can generate light having a corresponding wavelength. The intermediate layer (233) is, for example, In x Al y Ga 1-x-y It can be formed by including a semiconductor material having a composition formula of N (0≤x≤1, 0≤y≤1, 0≤x+y≤1), and can be formed as a single quantum well structure or a multi-quantum well (MQW) structure. In addition, it may include a quantum wire structure or a quantum dot structure.

[0132] FIG. 6a illustrates that the first semiconductor layer (231) includes a p-type semiconductor layer and the second semiconductor layer (232) includes an n-type semiconductor layer, but the present invention is not limited thereto. In another embodiment, the first semiconductor layer (231) may include an n-type semiconductor layer and the second semiconductor layer (232) may include a p-type semiconductor layer.

[0133] FIG. 6a illustrates that the first electrode pad (241) and the second electrode pad (242) are disposed on the same layer, but the present invention is not limited thereto. Referring to FIG. 6b, the first electrode pad (241) and the second electrode pad (242) may be disposed on different layers. For example, a bank layer (230) having an opening that overlaps with at least a portion of the first electrode pad (241) may be disposed on the first electrode pad (241), and the second electrode pad (242) may be disposed on the upper surface of the bank layer (230). The structure of the light-emitting diode (LED) shown in FIG. 6b is the same as previously described with reference to FIG. 6a.

[0134] In another embodiment, as shown in FIG. 6c, the second electrode pad (242) may be positioned on both sides centered on the first electrode pad (241) in a cross-sectional view. The bank layer (230) includes an opening that overlaps at least a portion of the first electrode pad (241), and the second electrode pad (242) may be positioned around the opening of the bank layer (230). In some embodiments, the second electrode pad (242) may have a closed-loop shape that completely surrounds the opening of the bank layer (230) and / or the first electrode pad (241) in a planar view. The structure of the light-emitting diode (LED) shown in FIG. 6c is the same as previously described with reference to FIG. 6a.

[0135] FIGS. 6a to 6c illustrate the first electrode (235) and the second electrode (238) of a light-emitting diode (LED) facing in the same direction (e.g., downward direction, -z direction), but the present invention is not limited thereto. As shown in FIG. 6d, the first electrode (235) and the second electrode (238) of the light-emitting diode (LED) may face in opposite directions.

[0136] The bank layer (230) includes an opening that exposes at least a portion of the first electrode pad (241), and the thickness of the bank layer (230) may be substantially the same as the thickness of the light-emitting diode (LED). The opening of the bank layer (230) may be filled with a filling material, and the second electrode pad (242) may be disposed on the upper surface of the bank layer (230) so as to be electrically connected (e.g., in contact) with the second electrode (238) of the light-emitting diode (LED). The filling material may be an organic material having insulating properties.

[0137] In another embodiment, as illustrated in FIG. 6e, the first electrode (235) and the second electrode (238) of the light-emitting diode (LED) may face in the same direction, but may face in the +z direction. The light-emitting diode (LED) may be attached to the first electrode pad (241) and the second electrode pad (242) using an adhesive layer (251). A first encapsulation layer (301) may be disposed on the first electrode pad (241), the second electrode pad (242), and the light-emitting diode (LED). In one embodiment, a light-emitting diode protection layer (253) may be disposed between the light-emitting diode (LED) and the first encapsulation layer (301). The light-emitting diode protection layer (253) may include an organic insulating material and / or an inorganic insulating material. In one embodiment, the light-emitting diode protection layer (253) may include polyimide.

[0138] A first contact electrode (CMa) and a second contact electrode (CMb) may be disposed on the first encapsulation layer (301). Each of the first contact electrode (CMa) and the second contact electrode (CMb) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer containing the above materials. The first contact electrode (CMa) may electrically connect the first electrode pad (241) and the first electrode (235) of the light-emitting diode (LED) through contact holes penetrating the first encapsulation layer (301). The second contact electrode (CMb) may electrically connect the second electrode pad (242) and the second electrode (238) of the light-emitting diode (LED) through contact holes penetrating the first encapsulation layer (301).

[0139] A second encapsulation layer (303) may be disposed on the first contact electrode (CMa) and the second contact electrode (CMb). Each of the first encapsulation layer (301) and the second encapsulation layer (303) may include a structure in which an inorganic encapsulation layer containing an inorganic insulating material, an organic encapsulation layer containing an organic insulating material, and an inorganic encapsulation layer containing an inorganic insulating material are laminated. In another embodiment, each of the first encapsulation layer (301) and the second encapsulation layer (303) may include an organic material such as resin.

[0140] FIG. 7 is a cross-sectional view schematically showing a part of the display area of ​​a display panel according to one embodiment of the present invention.

[0141] Referring to FIG. 7, the first island portion (11) and the first bridge portion (12) of the display panel (10) may be spaced apart with an opening (CS) in between. The first island portion (11) may include a light-emitting diode (LED) and a pixel circuit (PC) electrically connected to the light-emitting diode (LED), and the first bridge portion (12) may include wiring (WL) electrically connected to the pixel circuit (PC) placed in the first island portion (11).

[0142] The substrate (100) may include an island region (100a) corresponding to a first island portion (11) of the display panel (10) and a bridge region (100b) corresponding to a first bridge portion (12) of the display panel (10). In one embodiment, the substrate (100) may have a multilayer structure including first and second base layers (101, 105) comprising a polymer resin and first and second barrier layers (103, 107) comprising an inorganic insulating material. For example, the substrate (100) may include a first base layer (101), a second base layer (105) on the first base layer (101), a first barrier layer (103) between the first base layer (101) and the second base layer (105), and a second barrier layer (107) on the second base layer (105). Each of the first base layer (101) and the second base layer (105) may comprise a polymer resin, and each of the first barrier layer (103) and the second barrier layer (107) may comprise an inorganic insulating material. The first barrier layer (103) and the second barrier layer (107) may have an isolated shape disposed in the first island portion (11). That is, in a planar view, the first barrier layer (103) and the second barrier layer (107) may not overlap with the bridge area (100b).

[0143] Looking first at the first island portion (11), a pixel circuit (PC) may be disposed on the second barrier layer (107). The pixel circuit (PC) may include a first thin-film transistor (TFT1), a second thin-film transistor (TFT2), and a storage capacitor (Cst). Each of the first thin-film transistor (TFT1) and the second thin-film transistor (TFT2) may include a semiconductor layer (Act), a gate electrode (GE), a source electrode (SE), and a drain electrode (DE). In one embodiment, the first thin-film transistor (TFT1) may be a driving transistor, and the second thin-film transistor (TFT2) may be a switching transistor. FIG. 7 illustrates that the first thin-film transistor (TFT1) and the second thin-film transistor (TFT2) are each of the top gate type, with the gate electrode (GE) placed on the semiconductor layer (Act) with the gate insulating layer (111) in between; however, according to another embodiment, the first thin-film transistor (TFT1) and the second thin-film transistor (TFT2) may each be of the bottom gate type.

[0144] Inorganic insulating layers constituting an inorganic insulating stack (IIL) may be disposed between the semiconductor layer (Act) and the conductive layer constituting the pixel circuit (PC). The inorganic insulating stack (IIL) may include a gate insulating layer (111), a first interlayer insulating layer (113), and a second interlayer insulating layer (115). Each of the gate insulating layer (111), the first interlayer insulating layer (113), and the second interlayer insulating layer (115) may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, etc., and may be a single layer or a multilayer containing the aforementioned material.

[0145] The semiconductor layer (Act) may include polysilicon. Alternatively, the semiconductor layer (Act) may include amorphous silicon, an oxide semiconductor, an organic semiconductor, etc. The gate electrode (GE) may include a metal thin film composed of a low-resistance metal material. The gate electrode (GE) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer including the above materials. For example, the gate electrode (GE) may include a metal thin film formed as a triple layer with a titanium (Ti) / aluminum (Al) / titanium (Ti) structure. A gate insulating layer (111) may be disposed between the semiconductor layer (Act) and the gate electrode (GE).

[0146] The source electrode (SE) and the drain electrode (DE) may be located on the same layer, for example, the second interlayer insulating layer (115), and may contain the same material. Each of the source electrode (SE) and the drain electrode (DE) may contain a metal thin film composed of a low-resistance metal material. Each of the source electrode (SE) and the drain electrode (DE) may contain a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer containing the above materials. For example, each of the source electrode (SE) and the drain electrode (DE) may be provided with a metal thin film formed as a triple layer of titanium (Ti) / aluminum (Al) / titanium (Ti) structure, similar to the gate electrode (GE).

[0147] The storage capacitor (Cst) may include a first electrode (CE1) and a second electrode (CE2) that overlap with the first interlayer insulating layer (113) in between. The storage capacitor (Cst) may overlap with the first thin-film transistor (TFT1). In this regard, FIG. 7 illustrates that the gate electrode (GE) of the first thin-film transistor (TFT1) is integrally formed with the first electrode (CE1) of the storage capacitor (Cst). In another embodiment, the storage capacitor (Cst) may not overlap with the first thin-film transistor (TFT1). The storage capacitor (Cst) may be covered by the second interlayer insulating layer (115).

[0148] The second electrode (CE2) of the storage capacitor (Cst) may include a conductive material and may be formed as a multilayer or single layer. The second electrode (CE2) may include a metal thin film composed of a low-resistance metal material. The second electrode (CE2) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer including the above materials. For example, the second electrode (CE2) may be provided with a metal thin film formed as a triple layer of a titanium (Ti) / aluminum (Al) / titanium (Ti) structure.

[0149] A first organic insulating stack (OILa) may be disposed on an inorganic insulating stack (IIL). The first organic insulating stack (OILa) may include a first organic insulating layer (123), a second organic insulating layer (124), and a third organic insulating layer (125). Each of the first organic insulating layer (123), the second organic insulating layer (124), and the third organic insulating layer (125) may include an organic insulating material and may be formed as a multilayer or a single layer.

[0150] The first organic insulating layer (123) may be disposed on the source electrode (SE) and the drain electrode (DE). A third contact electrode (CM1) may be disposed on the first organic insulating layer (123). The third contact electrode (CM1) may be electrically connected to the drain electrode (DE) of the first thin-film transistor (TFT1) through a contact hole penetrating the first organic insulating layer (123). The third contact electrode (CM1) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer including the above materials.

[0151] A second organic insulating layer (124) may be disposed on the third contact electrode (CM1), and a second voltage line (VSSL) may be disposed on the second organic insulating layer (124). The second voltage line (VSSL) may be electrically connected to the second electrode of a light-emitting diode (LED) to supply a second power supply voltage (VSS). The second voltage line (VSSL) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer including the above materials.

[0152] A third organic insulating layer (125) may be disposed on the second voltage line (VSSL), and a first electrode pad (241) and a second electrode pad (242) may be disposed on the third organic insulating layer (125). The first electrode pad (241) may be electrically connected to the third contact electrode (CM1) through a contact hole penetrating the second organic insulating layer (124) and the third organic insulating layer (125). The second electrode pad (242) may be electrically connected to the second voltage line (VSSL) through a contact hole penetrating the third organic insulating layer (125).

[0153] A light-emitting diode (LED) may be placed on the first electrode pad (241) and the second electrode pad (242). The structure of the light-emitting diode (LED) is as described above with reference to FIG. 6e. The light-emitting diode (LED) may be attached to the first electrode pad (241) and the second electrode pad (242) using an adhesive layer (251, see FIG. 6e).

[0154] An encapsulation layer (300) may be disposed on the first electrode pad (241), the second electrode pad (242), and the light-emitting diode (LED). The encapsulation layer (300) may include a first encapsulation layer (301) and a second encapsulation layer (303).

[0155] A first contact electrode (CMa) and a second contact electrode (CMb) may be disposed on the first encapsulation layer (301). The first contact electrode (CMa) can electrically connect the first electrode pad (241) and the first electrode (235) of the light-emitting diode (LED) through contact holes penetrating the first encapsulation layer (301). The second contact electrode (CMb) can electrically connect the second electrode pad (242) and the second electrode (238) of the light-emitting diode (LED) through contact holes penetrating the first encapsulation layer (301). That is, the first electrode (235) of the light-emitting diode (LED) can be electrically connected to the pixel circuit (PC) through the first contact electrode (CMa), the first electrode pad (241), and the third contact electrode (CM1). The second electrode (238) of the light-emitting diode (LED) can be electrically connected to the second voltage line (VSSL) through the second contact electrode (CMb) and the second electrode pad (242).

[0156] A second encapsulation layer (303) may be disposed on the first contact electrode (CMa) and the second contact electrode (CMb). Each of the first encapsulation layer (301) and the second encapsulation layer (303) may include a structure in which an inorganic encapsulation layer containing an inorganic insulating material, an organic encapsulation layer containing an organic insulating material, and an inorganic encapsulation layer containing an inorganic insulating material are laminated. In another embodiment, each of the first encapsulation layer (301) and the second encapsulation layer (303) may include an organic material such as resin.

[0157] The first island portion (11) of the display panel (10) may represent a stacked structure extending from the island region (100a) of the substrate (100) to the encapsulation layer (300) disposed on the island region (100a). In this specification, the upper surface refers to the surface on which an image is displayed on the display panel (10), i.e., the surface facing the substrate (100). In FIG. 7, the upper surface (11us) of the first island portion (11) may be the upper surface of the second encapsulation layer (303). The side surface (11ss) of the first island portion (11) refers to the surface exposed by the opening (CS). As shown in FIG. 7, the side surface of the island region (100a), the side surface of the first organic insulating stack (OILa), and the side surface of the encapsulation layer (300) may form the side surface (11ss) of the first island portion (11).

[0158] Looking at the first bridge portion (12), barrier layers may be omitted in the bridge region (100b) of the substrate (100), and only base layers may be disposed. For example, only the first base layer (101) and the second base layer (105) may be disposed in the bridge region (100b), and the first barrier layer (103) and the second barrier layer (107) may be spaced apart from the bridge region (100b) and not overlapped on the plane.

[0159] A second organic insulating stack (OILb) may be disposed on a bridge region (100b) of a substrate (100). The second organic insulating stack (OILb) may include a first organic insulating layer (123), a second organic insulating layer (124), a third organic insulating layer (125), and a fourth organic layer (121). The first organic insulating layer (123), the second organic insulating layer (124), and the third organic insulating layer (125) of the second organic insulating stack (OILb) may be formed through the same process as the first organic insulating layer (123), the second organic insulating layer (124), and the third organic insulating layer (125) of the first organic insulating stack (OILa). Since the bridge region (100b) does not include an inorganic insulating stack (IIL), the second organic insulating stack (OILb) may further include a fourth organic layer (121) to level with the upper surface of the inorganic insulating stack (IIL). In another embodiment, the first island portion (11) may further include a fourth organic layer (121), and the fourth organic layer (121) may be positioned to cover the side of the inorganic insulating stack (IIL) having an isolated shape. The fourth organic layer (121) may include an organic insulating material and may be formed as a multilayer or a single layer.

[0160] First wiring lines (WL1) may be disposed on the fourth organic layer (121), second wiring lines (WL2) may be disposed on the first organic insulating layer (123), and third wiring lines (WL3) may be disposed on the second organic insulating layer (124). Each of the first wiring lines (WL1), second wiring lines (WL2), and third wiring lines (WL3) may be a signal line (e.g., gate line, data line, etc.) for providing an electrical signal to a transistor included in the pixel circuit (PC) of the first island portion (11) as described above, or a voltage line (e.g., power supply voltage line, initialization voltage line, etc.) for providing a voltage. Each of the wiring lines (WL) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer including the above materials.

[0161] The wiring (WL) can be placed within the wiring area (WA). The width of the wiring area (WA) may be narrower than the width of the bridge area (100b). For example, the edge of the wiring area (WA) may be spaced inward from the edge of the bridge area (100b). FIG. 7 illustrates that the edge of the wiring area (WA) is spaced inward by a first distance (d1) from both edges of the bridge area (100b).

[0162] A sealing layer (300) may be disposed on the second organic insulating stack (OILb). The sealing layer (300) may include a first sealing layer (301) and a second sealing layer (303). Each of the first sealing layer (301) and the second sealing layer (303) may include a structure in which an inorganic sealing layer containing an inorganic insulating material, an organic sealing layer containing an organic insulating material, and an inorganic sealing layer containing an inorganic insulating material are laminated. In another embodiment, each of the first sealing layer (301) and the second sealing layer (303) may include an organic material such as resin.

[0163] The first bridge portion (12) of the display panel (10) may represent a stacked structure from the bridge region (100b) of the substrate (100) to the encapsulation layer (300) disposed on the bridge region (100b). The upper surface (12us) of the first bridge portion (12) may be the upper surface of the second encapsulation layer (303). The side surface (12ss) of the first bridge portion (12) refers to the surface exposed by the opening (CS). As shown in FIG. 7, the side surface of the bridge region (100b), the side surface of the second organic insulating stack (OILb), and the side surface of the encapsulation layer (300) may form the side surface (12ss) of the first bridge portion (12).

[0164] A first protective layer (15) may be positioned to cover the side (11ss) of the first island portion (11) and the side (12ss) of the first bridge portion (12). The first protective layer (15) may be deposited on the upper surface (11us) and side (11ss) of the first island portion (11) and the upper surface (12us) and side (12ss) of the first bridge portion (12) using a conformal coating based on chemical vapor deposition. Subsequently, a portion of the first protective layer (15) may be etched and removed so that the upper surface of the second encapsulation layer (303) is exposed. Thus, the first protective layer (15) may be positioned spaced apart from the pixel (or light-emitting diode (LED)) positioned on the first island portion (11) in a planar manner. Since the first protective layer (15) is not placed on the upper surface (11us) of the first island portion (11) and the upper surface (12us) of the first bridge portion (12), damage to the wiring (WL) or organic insulating layers caused by cracks in the first protective layer (15) can be reduced or prevented even if the first protective layer (15) includes an inorganic insulating material.

[0165] As the display panel (10) becomes higher resolution, the aspect ratio of the opening (CS) increases, and a defect may occur in which the wiring (WL) is exposed through the opening (CS). The first protective layer (15) can cover the side (11ss) of the first island portion (11) and the side (12ss) of the first bridge portion (12) to prevent the exposure of the wiring (WL). Thus, the width of the wiring area (WA) where the wiring (WL) is placed can be increased. In addition, the first protective layer (15) can relieve the stress accumulated on the first bridge portion (12) when the display panel (10) is stretched, thereby improving the elongation rate of the display panel (10).

[0166] FIG. 8a is a schematic plan view showing a bridge portion of a display panel according to one embodiment of the present invention, and FIG. 8b is a schematic cross-sectional view showing a cross-section along the line II-II' of the bridge portion of FIG. 8a.

[0167] Referring to FIGS. 8a and 8b, the first bridge portion (12) may have a wavy shape (e.g., approximately an "S" shape). The first bridge portion (12) may be placed in the gap between two adjacent first island portions (11).

[0168] The first bridge portion (12) may include two round portions (RP) and a connecting portion (CP) connecting the two round portions (RP). Each of the round portions (RP) has an approximately arc shape and may be connected to an edge of the first island portion (11). The connecting portion (CP) may have an approximately straight shape extending in a direction oblique to the first direction (e.g., x direction or -x direction) and the second direction (e.g., y direction or -y direction). In one embodiment, the first island portion (11) may be tilted obliquely with respect to the first direction (e.g., x direction or -x direction) and / or the second direction (e.g., y direction or -y direction). In this case, the connecting portion (CP) may extend substantially parallel to the side of the adjacent first island portion (11).

[0169] Each of the round portions (RP) may have an inner edge (IE) and an outer edge (OE). The inner edge (IE) may extend along the arc of a virtual circle having a first radius. The outer edge (OE) may extend along the arc of a virtual circle having a second radius larger than the first radius. One end of the inner edge (IE) may be connected to the edge of the connecting portion (CP), and the other end of the inner edge (IE) may be connected to the edge of the first island portion (11). One end of the outer edge (OE) may be connected to the edge of the connecting portion (CP), and the other end of the outer edge (OE) may be connected to the edge of the first island portion (11).

[0170] The first bridge portion (12) may have a wiring area (WA) in which wiring (WL, see FIG. 7) is placed. The wiring area (WA) may extend along the approximate center of the first bridge portion (12). The width of the wiring area (WA) may be smaller than the width of the first bridge portion (12). In one embodiment, the wiring area (WA) may be spaced inward from the edges of the first bridge portion (12) to prevent the wiring (WL) from being exposed by the opening (CS). The edges of the first bridge portion (12) may coincide with the edges of the bridge area (100b). At the connection portion (CP), the edges of the wiring area (WA) may be spaced inward by a first distance (d1) from the edges of the first bridge portion (12). The edge of the wiring area (WA) in the round portion (RP) may be spaced inward by a first distance (d1) from the outer edge (OE) of the first bridge portion (12). The edge of the wiring area (WA) in the round portion (RP) may be spaced inward by a second distance (d2) from the inner edge (IE) of the first bridge portion (12). The second distance (d2) may be greater than the first distance (d1).

[0171] When the display panel (10) is stretched, stress may be concentrated on the inner edge (IE) of each of the rounded portions (RP) more than on the outer edge (OE). Therefore, by placing the wiring (WL) closer to the outer edge (OE) of each of the rounded portions (RP), the occurrence of cracks can be reduced or prevented.

[0172] The first protective layer (15) may extend along the edge of the first island portion (11) and the edge of the first bridge portion (12). That is, the first protective layer (15) may be positioned to cover the side (11ss) of the first island portion (11) and the side (12ss) of the first bridge portion (12) that define the opening (CS), as described with reference to FIG. 7. The first protective layer (15) may expose the upper surface (11us) of the first island portion (11) and the upper surface (12us) of the first bridge portion (12).

[0173] As the display panel (10) becomes higher resolution, the width of the first bridge portion (12) may be reduced. As the distance between the boundary of the wiring area (WA) and the edge of the first bridge portion (12) decreases, the margin during the etching process may be reduced. The first protective layer (15) can cover the side (12ss) of the first bridge portion (12) to prevent the wiring (WL) from being exposed by the opening (CS). Thus, the distance between the boundary of the wiring area (WA) and the edge of the first bridge portion (12), i.e., the first distance (d1) and the second distance (d2), can be reduced to secure a sufficient wiring area (WA). In addition, since the first protective layer (15) has a higher modulus than the bridge area (100b) of the substrate (100) and the first organic insulating stack (OILa), it can disperse the stress accumulated on the inner edge (IE) of the round portion (RP).

[0174] FIG. 9a is a schematic plan view showing a bridge portion of a display panel according to one embodiment of the present invention, and FIG. 9b is a schematic cross-sectional view showing a cross-section along the line III-III' of the bridge portion of FIG. 9a.

[0175] Referring to FIGS. 9a and 9b, the first bridge portion (12) may have a wavy shape (e.g., approximately an "S" shape). The first bridge portion (12) may be placed in the gap between two adjacent first island portions (11).

[0176] The first bridge portion (12) may include two round portions (RP) and a connecting portion (CP) connecting the two round portions (RP). Each of the round portions (RP) has an approximately arc shape and may be connected to the edge of the first island portion (11). The connecting portion (CP) may have an approximately straight shape extending in a first direction (e.g., x direction or -x direction) and a second direction (e.g., y direction or -y direction) and an oblique direction.

[0177] Each of the round portions (RP) may have an inner edge (IE) and an outer edge (OE). The inner edge (IE) may extend along the arc of a virtual circle having a first radius. The outer edge (OE) may extend along the arc of a virtual circle having a second radius larger than the first radius. One end of the inner edge (IE) may be connected to the edge of the connecting portion (CP), and the other end of the inner edge (IE) may be connected to the edge of the first island portion (11). One end of the outer edge (OE) may be connected to the edge of the connecting portion (CP), and the other end of the outer edge (OE) may be connected to the edge of the first island portion (11).

[0178] The first bridge section (12) may have a wiring area (WA) in which wiring (WL, see FIG. 7) is arranged. The wiring area (WA) may extend along the approximate center of the first bridge section (12). The width of the wiring area (WA) may be smaller than the width of the first bridge section (12).

[0179] In the connection portion (CP), the edge of the wiring area (WA) may be spaced inward by a first distance (d1) from the edge of the first bridge portion (12). In the round portion (RP), the edge of the wiring area (WA) may be spaced inward by a first distance (d1) from the outer edge (OE) of the first bridge portion (12). In the round portion (RP), the edge of the wiring area (WA) may be spaced inward by a second' distance (d2') from the inner edge (IE) of the first bridge portion (12). The second' distance (d2') may be greater than the first distance (d1).

[0180] The first protective layer (15) may extend along the edge of the first island portion (11) and the edge of the first bridge portion (12). That is, the first protective layer (15) may be positioned to cover the side (12ss) of the first bridge portion (12). At this time, the first protective layer (15) may expose the upper surface (12us) of the first bridge portion (12).

[0181] A second protective layer (17) may be disposed between the first protective layer (15) and the inner edge (IE) of the first bridge portion (12). The second protective layer (17) may be disposed to extend along the inner edge (IE) of the first bridge portion (12) and to cover the side (12ss) of the first bridge portion (12). The second protective layer (17) may include an organic insulating material and / or an inorganic insulating material capable of conformal coating based on chemical vapor deposition. In one embodiment, the second protective layer (17) may include parylene, silicon oxide (SiOx) and / or silicon nitride (SiNx).

[0182] In one embodiment, the material constituting the second protective layer (17) may be different from the material constituting the first protective layer (15). The modulus of the second protective layer (17) may be higher than the modulus of the first protective layer (15). By placing the second protective layer (17), which has a relatively high modulus, between the inner edge (IE) of the first bridge portion (12) and the first protective layer (15), the stress that accumulates during the expansion and contraction of the display panel (10) can be dispersed. Accordingly, the second 'distance (d2') between the wiring area (WA) and the inner edge (IE) of the first bridge portion (12) can be further reduced, thereby sufficiently securing the width of the wiring area (WA) where the wiring (WL) is placed.

[0183] FIG. 10 is a schematic plan view showing the display area of ​​a display panel according to one embodiment of the present invention.

[0184] Referring to FIG. 10, the first bridge section (12) may have a wavy shape. The first bridge section (12) may be placed in the gap between two adjacent first island sections (11).

[0185] The first bridge portion (12) may include two corner regions (CNAs) and a connecting portion connecting the two corner regions (CNAs). Each of the corner regions (CNAs) may include a first portion extending along a first direction (e.g., x direction or -x direction) or a second direction (e.g., y direction or -y direction) from the first island portion (11), and a second portion connected to the first portion and extending along a second direction (e.g., y direction or -y direction) or a first direction (e.g., x direction or -x direction). In one embodiment, the corner region (CNA) may be a region where two portions extending in orthogonal directions are connected to each other.

[0186] The first protective layer (15) may extend along the edge of the first island portion (11) and the edge of the first bridge portion (12). That is, the first protective layer (15) may be positioned to cover the side (11ss) of the first island portion (11) and the side (12ss) of the first bridge portion (12) that define the opening (CS), as described with reference to FIG. 7. The first protective layer (15) may expose the upper surface (11us) of the first island portion (11) and the upper surface (12us) of the first bridge portion (12).

[0187] The corner area (CNA) may have an inner edge and an outer edge adjacent to the first island portion (11) to which the first bridge portion (12) is connected. A second protective layer (17) may be disposed along the inner edge of the corner area (CNA). In one embodiment, the second protective layer (17) extends along the inner edge of the corner area (CNA) and a portion of the edge of the adjacent first island portion (11), and may have an approximate "C" shape in a plane. The second protective layer (17) may be disposed between the first protective layer (15) and the side (12ss) of the first bridge portion (12).

[0188] In one embodiment, the modulus of the second protective layer (17) may be higher than the modulus of the first protective layer (15). By placing the second protective layer (17), which has a relatively high modulus, between the inner edge (IE) of the first bridge portion (12) and the first protective layer (15), the stress that accumulates when the display panel (10) is stretched can be dispersed.

[0189] FIG. 11a is a cross-sectional view schematically showing a part of the display area of ​​a display panel according to one embodiment of the present invention, and FIG. 11b is a cross-sectional view schematically showing a part of the bridge portion of the display panel of FIG. 11a.

[0190] FIGS. 11a and FIGS. 11b are similar to FIGS. 7 and FIGS. 9b, respectively, but differ in that the first protective layer (15) is positioned to cover the upper surface of the first organic insulating stack (OILa). The description of identical or similar configurations will be omitted below, and the explanation will focus on the differences.

[0191] Referring to FIGS. 11a and 11b, the first island portion (11) and the first bridge portion (12) of the display panel (10) may be spaced apart with an opening (CS) in between. The first island portion (11) may include a light-emitting diode (LED) and a pixel circuit (PC) electrically connected to the light-emitting diode (LED), and the first bridge portion (12) may include wiring (WL) electrically connected to the pixel circuit (PC) placed in the first island portion (11).

[0192] The substrate (100) may include an island region (100a) corresponding to the first island portion (11) of the display panel (10) and a bridge region (100b) corresponding to the first bridge portion (12) of the display panel (10). Inorganic insulating layers constituting an inorganic insulating stack (IIL) may be disposed between the semiconductor layer (Act) and the conductive layer constituting the pixel circuit (PC). The inorganic insulating stack (IIL) may include a gate insulating layer (111), a first interlayer insulating layer (113), and a second interlayer insulating layer (115).

[0193] A first organic insulating stack (OILa) may be disposed on an inorganic insulating stack (IIL). The first organic insulating stack (OILa) may include a first organic insulating layer (123), a second organic insulating layer (124), and a third organic insulating layer (125).

[0194] The first organic insulating layer (123) may be disposed on the source electrode (SE) and the drain electrode (DE). A third contact electrode (CM1) may be disposed on the first organic insulating layer (123). The third contact electrode (CM1) may be electrically connected to the drain electrode (DE) of the first thin-film transistor (TFT1) through a contact hole penetrating the first organic insulating layer (123).

[0195] A second organic insulating layer (124) may be disposed on the third contact electrode (CM1), and a second voltage line (VSSL) may be disposed on the second organic insulating layer (124). The second voltage line (VSSL) may be electrically connected to the second electrode of a light-emitting diode (LED) to supply a second power supply voltage (VSS).

[0196] A third organic insulating layer (125) may be disposed on the second voltage line (VSSL), and a first electrode pad (241) and a second electrode pad (242) may be disposed on the third organic insulating layer (125). The first electrode pad (241) may be electrically connected to the third contact electrode (CM1) through a contact hole penetrating the second organic insulating layer (124) and the third organic insulating layer (125). The second electrode pad (242) may be electrically connected to the second voltage line (VSSL) through a contact hole penetrating the third organic insulating layer (125).

[0197] A light-emitting diode (LED) may be placed on the first electrode pad (241) and the second electrode pad (242). The structure of the light-emitting diode (LED) is as described above with reference to FIG. 6a.

[0198] A first electrode (235, see FIG. 6a) of a light-emitting diode (LED) may be attached to a first electrode pad (241) through a bonding layer (BD), and a second electrode (238, see FIG. 6a) may be attached to a second electrode pad (242) through a bonding layer (BD). The bonding layer (BD) may include copper (Cu), indium (In), gold (Au), tin (Sn), or an alloy thereof. In one embodiment, the bonding layer (BD) may include a conductive composite material comprising conductive particles, metal nanostructures, and / or an elastomer.

[0199] Looking at the first bridge portion (12), barrier layers may be omitted in the bridge region (100b) of the substrate (100), and only base layers may be disposed. For example, only the first base layer (101) and the second base layer (105) may be disposed in the bridge region (100b), and the first barrier layer (103) and the second barrier layer (107) may be spaced apart from the bridge region (100b) and not overlapped on the plane.

[0200] A second organic insulating stack (OILb) may be disposed on a bridge region (100b) of a substrate (100). The second organic insulating stack (OILb) may include a first organic insulating layer (123), a second organic insulating layer (124), a third organic insulating layer (125), and a fourth organic layer (121).

[0201] First wiring lines (WL1) may be disposed on the fourth organic layer (121), second wiring lines (WL2) may be disposed on the first organic insulating layer (123), and third wiring lines (WL3) may be disposed on the second organic insulating layer (124). Each of the first wiring lines (WL1), second wiring lines (WL2), and third wiring lines (WL3) may be a signal line (e.g., gate line, data line, etc.) for providing an electrical signal to a transistor included in the pixel circuit (PC) of the first island portion (11) as described above, or a voltage line (e.g., power supply voltage line, initialization voltage line, etc.) for providing a voltage.

[0202] The wiring (WL) can be placed within the wiring area (WA). The width of the wiring area (WA) may be narrower than the width of the bridge area (100b). For example, the edge of the wiring area (WA) may be spaced inward from the edge of the bridge area (100b). FIG. 11a illustrates that the edge of the wiring area (WA) is spaced inward by a first distance (d1) from both edges of the bridge area (100b).

[0203] In FIG. 11a, the upper surface (11us) of the first island portion (11) and the upper surface (12us) of the first bridge portion (12) may each be the upper surface of the third organic insulating layer (125). The side surface (11ss) of the first island portion (11) is a surface exposed by the opening (CS), and the side surface of the island region (100a) and the side surface of the first organic insulating stack (OILa) may form the side surface (11ss) of the first island portion (11). The side surface (12ss) of the first bridge portion (12) is a surface exposed by the opening (CS), and the side surface of the bridge region (100b) and the side surface of the second organic insulating stack (OILb) may form the side surface (12ss) of the first bridge portion (12).

[0204] A first protective layer (15) may be disposed to cover the upper surface (11us) and side surface (11ss) of the first island portion (11) and the upper surface (12us) and side surface (12ss) of the first bridge portion (12). The first protective layer (15) may be deposited on the upper surface (11us) and side surface (11ss) of the first island portion (11) and the upper surface (12us) and side surface (12ss) of the first bridge portion (12) using a conformal coating based on silver chemical vapor deposition. The first protective layer (15) may have openings that overlap each of the first electrode pad (241) and the second electrode pad (242).

[0205] FIG. 11b illustrates a round portion (RP, see FIG. 9a) of the first bridge portion (12). As described with reference to FIG. 9a, the first bridge portion (12) may include two round portions (RP) and a connecting portion (CP) connecting the two round portions (RP). Each of the round portions (RP) has an inner edge (IE) and an outer edge (OE). A second protective layer (17) extends along the inner edge (IE) of the first bridge portion (12) and may be positioned to cover the side (12ss) of the first bridge portion (12). The second protective layer (17) is positioned between the first protective layer (15) and the inner edge (IE) of the first bridge portion (12), and the first protective layer (15) may be extended to cover the side of the second protective layer (17), the upper surface of the second protective layer (17), the upper surface (12us) of the first bridge portion (12), and the outer side of the first bridge portion (12).

[0206] In one embodiment, the material constituting the second protective layer (17) may be different from the material constituting the first protective layer (15). The modulus of the second protective layer (17) may be higher than the modulus of the first protective layer (15). By placing the second protective layer (17), which has a relatively high modulus, between the inner edge (IE) of the first bridge portion (12) and the first protective layer (15), the stress that accumulates during the expansion and contraction of the display panel (10) can be dispersed. Accordingly, the second 'distance (d2') between the wiring area (WA) and the inner edge (IE) of the first bridge portion (12) can be further reduced, thereby sufficiently securing the width of the wiring area (WA) where the wiring (WL) is placed.

[0207] FIG. 12 is a block diagram showing an electronic device including a display panel according to one embodiment of the present invention.

[0208] Referring to FIG. 12, the electronic device (1) may include a processor (1100), memory (1200), input module (1300), display module (1400), power module (1500), built-in module (1600), and external module (1700). According to one embodiment, at least one of the above-described components may be omitted from the electronic device (1), or one or more other components may be added. According to one embodiment, some of the above-described components (e.g., built-in module (1600)) may be integrated into another component (e.g., display module (1400)).

[0209] The processor (1100) can execute software to control at least one other component (e.g., a hardware or software component) of the electronic device (1) connected to the processor (1100) and can perform various data processing or operations. According to one embodiment, as at least part of the data processing or operations, the processor (1100) can store commands or data received from other components (e.g., an input module (1300), a sensor module (1610), or a communication module (1730)) in a volatile memory (1210), process the commands or data stored in the volatile memory (1210), and store the resulting data in a non-volatile memory (1220).

[0210] The processor (1100) may include a main processor (1110) and an auxiliary processor (1120). The main processor (1110) may include at least one of a central processing unit (1111, CPU) and an application processor (AP). The main processor (1110) may further include at least one of a graphic processing unit (1112, GPU), a communication processor (CP), and an image signal processor (ISP). The main processor (1110) may further include a neural processing unit (1113, NPU). The neural processing unit (1113) is a processor specialized for processing artificial intelligence models, and the artificial intelligence model may be generated through machine learning. The artificial intelligence model may include a plurality of artificial neural network layers. An artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to the hardware structure, the artificial intelligence model may include a software structure, either additionally or substantially. At least two of the processing unit and processor described above may be implemented as a single integrated configuration (e.g., a single chip), or each may be implemented as an independent configuration (e.g., multiple chips).

[0211] The auxiliary processor (1120) may include a controller (1121). The controller (1121) may include an interface conversion circuit and a timing control circuit. The controller (1121) receives a video signal from the main processor (1110), converts the data format of the video signal to match the interface specifications with the display module (1400), and outputs video data. The controller (1121) may output various control signals required for driving the display module (1400).

[0212] The auxiliary processor (1120) may further include data processing circuits such as a data conversion circuit (1122), a gamma correction circuit (1123), and a rendering circuit (1124). The data conversion circuit (1122) receives image data from the controller (1121) and can compensate the image data so that the image is displayed at a desired brightness according to the characteristics of the electronic device (1) or the user's settings, or can convert the image data to reduce power consumption or compensate for afterimages. The gamma correction circuit (1123) can convert image data or gamma reference voltage, etc. so that the image displayed on the electronic device (1) has desired gamma characteristics. The rendering circuit (1124) receives image data from the controller (1121) and can render the image data by considering the pixel arrangement of the display panel (10) applied to the electronic device (1). At least one of the data conversion circuit (1122), gamma correction circuit (1123), and rendering circuit (1124) may be integrated into another component (e.g., main processor (1110) or controller (1121)). In one embodiment, the auxiliary processor (1120) may be integrated into the data driver (1430).

[0213] The memory (1200) can store various data used by at least one component of the electronic device (1) (e.g., a processor (1100) or a sensor module (1610)) and input or output data for related commands. The memory (1200) may include at least one of a volatile memory (1210) and a non-volatile memory (1220).

[0214] The input module (1300) can receive commands or data to be used for components of the electronic device (1) (e.g., processor (1100), sensor module (1610) or sound output module (1630)) from outside the electronic device (1) (e.g., user or external electronic device (2000)).

[0215] The input module (1300) may include a first input module (1310) into which commands or data are input from a user and a second input module (1320) into which commands or data are input from an external electronic device (2000).

[0216] The first input module (1310) may include a microphone, a mouse, a keyboard, or a pen (e.g., a passive pen or an active pen). The first input module (1310) may include mechanical input means or touch input means, such as a button, a dome switch, a jog wheel, a jog switch, etc., located on the rear or side of the electronic device (1). The touch input means may include a touchscreen layer of the display panel (10).

[0217] The second input module (1320) can be connected to various types of external electronic devices (2000) connected to the electronic device (1) via wired or wireless connection. According to one embodiment, the second input module (1320) may include an HDMI (high definition multimedia interface), a USB (universal serial bus) interface, an SD card interface, or an audio interface. The second input module (1320) may include a connector capable of physically connecting the electronic device (1) to the external electronic device (2000), for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector). The electronic device (1) can perform appropriate control related to the connected external electronic device (2000) in response to the external electronic device (2000) being connected to the second input module (1320).

[0218] The display module (1400) provides information visually to the user. The display module (1400) may include a display panel (10), a scan driver (1420), and a data driver (1430).

[0219] The display panel (10) displays (outputs) information processed by the electronic device (1). The display panel (10) can display information on the execution screen of an application running on the electronic device (1), or UI (User Interface) and GUI (Graphic User Interface) information based on the execution screen information.

[0220] The scan driver (1420) may be mounted on the display panel (10) as a driving chip. Alternatively, the scan driver (1420) may be formed directly on the display panel (10). For example, the scan driver (1420) may include an ASG (Amorphous Silicon TFT Gate driver circuit), an LTPS (Low Temperature Polycrystalline Silicon) TFT Gate driver circuit, or an OSG (Oxide Semiconductor TFT Gate driver circuit) embedded in the display panel (10). The scan driver (1420) receives a control signal from the controller (1121) and outputs scan signals to the display panel (10) in response to the control signal.

[0221] The display panel (10) may further include a light emission control driver. The light emission control driver outputs a light emission control signal to the display panel (10) in response to a control signal received from the controller (1121). The light emission control driver may be formed separately from the scan driver (1420) or may be integrated into the scan driver (1420).

[0222] The data driver (1430) receives a control signal from the controller (1121), converts the image data into an analog voltage data voltage in response to the control signal, and then outputs the data voltages to the display panel (10).

[0223] The data driver (1430) may be integrated with some components of the auxiliary processor (1120). For example, the data driver (1430) may be provided as a timing controller embedded driver integrated circuit (Timing controller embedded driver IC) including a controller (1121).

[0224] The power module (1500) supplies power to the components of the electronic device (1). The power module (1500) may include a battery that charges the power voltage. Additionally, the power module (1500) is provided with a connection port, and the connection port may be included in a second input module (1320) to which an external charger that supplies power for charging the battery is connected. Alternatively, the power module (1500) may include a wireless power transmission and reception member so that the battery can be charged wirelessly. The wireless power transmission and reception member may include a plurality of coil-shaped antenna radiators. The power module (1500) may include a PMIC (power management integrated circuit). The PMIC supplies optimized power to each of the components of the electronic device (1).

[0225] The electronic device (1) may further include an internal module (1600) and an external module (1700). The internal module (1600) may include a sensor module (1610), an antenna module (1620), and an audio output module (1630). The external module (1700) may include a camera module (1710), a light module (1720), and / or a communication module (1730).

[0226] The sensor module (1610) may include touch electrodes of the touchscreen layer of the display panel (10) and a touch sensor driver. The sensor module (1610) may detect input by the user's body or input by a pen and generate an electrical signal or data value corresponding to the input. The sensor module (1610) may include at least one of a fingerprint sensor (1611), an input sensor (1612), and a digitizer (1613).

[0227] The fingerprint sensor (1611) can generate a data value corresponding to the user's fingerprint. The fingerprint sensor (1611) may include either an optical or capacitive fingerprint sensor.

[0228] The input sensor (1612) can generate a data value corresponding to coordinate information of input by the user's body or input by a pen. The input sensor (1612) generates a data value of the amount of change in capacitance due to the input. The input sensor (1612) can detect input by a passive pen or transmit and receive data with an active pen.

[0229] The input sensor (1612) may measure biosignals such as blood pressure, water content, or body fat. For example, if a user contacts a part of their body to the sensor layer or sensing panel and does not move for a certain period of time, the input sensor (1612) may detect biosignals based on changes in the electric field caused by the part of the body and output information desired by the user to the display module (1400).

[0230] The digitizer (1613) can generate a data value corresponding to the coordinate information of the input by the pen. The digitizer (1613) generates the amount of electromagnetic change caused by the input as a data value. The digitizer (1613) can detect input by a passive pen or transmit and receive data with an active pen.

[0231] In one embodiment, at least one of a fingerprint sensor (1611), an input sensor (1612), and a digitizer (1613) may be embedded in the display panel (10). For example, at least one of the fingerprint sensor (1611), the input sensor (1612), and the digitizer (1613) may be formed through a process that is continuous with the process of forming the pixel circuits and light-emitting diodes of the display panel (10). As a result, the display panel (10) may function as one of the input modules (1300) that provide an input interface between the electronic device (1) and the user, and may also function as a display module (1400) that provides an output interface between the electronic device (1) and the user.

[0232] In one embodiment, at least two of the fingerprint sensor (1611), input sensor (1612), and digitizer (1613) may be formed to be integrated into a single sensing panel through the same process. The sensing panel may be positioned between the display panel (10) and a window positioned above the display panel (10), but the present invention is not limited thereto.

[0233] The antenna module (1620) may include one or more antennas for transmitting a signal or power to the outside or receiving it from the outside. According to one embodiment, the communication module (1730) may transmit a signal to an external electronic device or receive it from an external electronic device through an antenna suitable for a communication method. The antenna pattern of the antenna module (1620) may be integrated with one component of the display module (1400) (e.g., a display panel (10)) or an input sensor (1612), etc.

[0234] The sound output module (1630) is a device for outputting sound signals to the outside of the electronic device (1), and can output sound data received from the communication module (1730) or stored in the memory (1200) in call signal reception, call mode or recording mode, voice recognition mode, broadcast reception mode, etc. The sound output module (1630) can output sound signals related to functions performed in the electronic device (1) (e.g., call signal reception sound, message reception sound, etc.). The sound output module (1630) may include a receiver and a speaker. At least one of the receiver and the speaker may be a sound generating device attached to the lower part of the display panel (10) to vibrate the display panel (10) and output sound. The sound generating device may be a piezoelectric element or a piezoelectric actuator that contracts and expands according to an electric signal, or an exciter that generates magnetic force using a voice coil to vibrate the display panel (10).

[0235] The camera module (1710) can capture still images and video. According to one embodiment, the camera module (1710) may include one or more lenses, image sensors, or image signal processors. The camera module (1710) may further include an infrared camera capable of measuring the presence or absence of a user, the location of the user, the user's gaze, etc.

[0236] The light module (1720) can use light from a light source to output a signal to indicate the occurrence of an event or provide light for image acquisition. Here, examples of event occurrences may include receiving a message, receiving a call signal, a missed call, an alarm, a schedule notification, receiving an email, or receiving battery charge capacity information notifications. The light module (1720) may include a light-emitting diode or a xenon lamp. The light module (1720) may emit single-color or multiple-color light toward the front or rear of the electronic device (1). The light module (1720) may operate in conjunction with the camera module (1710) or operate independently.

[0237] The communication module (1730) can support the establishment of a wired or wireless communication channel between an electronic device (1) and an external electronic device (2000), and the performance of communication through the established communication channel. The communication module (1730) may include one or all of a wireless communication module such as a cellular communication module, a short-range wireless communication module, or a GNSS (global navigation satellite system) communication module, and a wired communication module such as a LAN (local area network) communication module or a power line communication module. The communication module (1730) can transmit and receive wireless signals over an internet network using at least one of WLAN (Wireless LAN), Wi-Fi (Wireless-Fidelity), Wi-Fi (Wireless Fidelity) Direct, and DLNA (Digital Living Network Alliance) technologies. Additionally, the communication module (1730) can support short-range communication by using at least one of Bluetooth™, RFID (Radio Frequency Identification), Infrared Data Association (IrDA), UWB (Ultra Wideband), ZigBee, NFC (Near Field Communication), Wi-Fi (Wireless-Fidelity), Wi-Fi Direct, and Wireless USB (Wireless Universal Serial Bus) technologies. The various types of communication modules (1730) described above may be implemented as a single chip or as separate chips.

[0238] The electronic device (1) can provide an image surface that is deformable in three dimensions by being freely deformed in three dimensions. In another embodiment, the electronic device (1) includes an image providing area having a fixed shape, and in the process of manufacturing the electronic device, a display panel (10) is placed in the image providing area of ​​the electronic device (1), and the display panel (10) can be fixed to the electronic device (1) in a state that is deformed in three dimensions.

[0239] FIGS. 13a to 13g are schematic perspective views illustrating embodiments of an electronic device including a display panel according to one embodiment of the present invention.

[0240] Referring to FIG. 13a, a display panel according to one embodiment of the present invention can be utilized in a wearable electronic device (3100) that can be worn on a part of a user's body. The wearable electronic device (3100) may include a body part (3110) and a display part (3120) provided in the body part (3110). The display panel according to embodiments of the present invention can be used as the display part (3120) of the wearable electronic device (3100). As illustrated in FIG. 13a, the wearable electronic device (3100) may be modified. In one embodiment, it can be used as a smart watch or a smartphone depending on the user's choice.

[0241] FIG. 13b illustrates a medical electronic device (3200). In one embodiment, the medical electronic device (3200) may include a body part (3210) and a light-emitting part (3220). A display panel according to embodiments of the present invention may be used as the light-emitting part (3220) of the medical electronic device (3200). The light-emitting part (3220) may emit light of a specific wavelength band (e.g., infrared, visible light, etc.) to the patient's body. In one embodiment, the body part (3210) may have a stretchable fiber material and the light-emitting part (3220) may have a structure that can be worn on the user's body.

[0242] FIG. 13c illustrates an educational electronic device (3300). In one embodiment, the educational electronic device (3300) may include a display unit (3320) provided within a frame (3310). The display unit (3320) may utilize a display panel according to embodiments of the present invention. The display unit (3320) may provide images such as a sea with waves, a snow-covered mountain, or a volcano with flowing lava, wherein the display unit (3320) may extend in the height direction (e.g., z-direction) to reflect the height of the waves, mountain, or volcano. In some embodiments, a portion of the display unit (3320) may sequentially vary in height along the direction of the lava flow to show the movement of the lava in three dimensions. The educational electronic device (3300) may include a plurality of pins (or stroke units, 3330) arranged on the back of the display unit (3320) so that the display unit (3320) extends in the height direction. The pins (3330) can be implemented to move along a third direction (e.g., z direction or -z direction) so that the image displayed on the display unit (3320) has a three-dimensional height. FIG. 13c describes an educational electronic device (3300), but its use is not limited as long as it provides certain image information.

[0243] The electronic device illustrated in FIGS. 13a to 13c is described as having a variable shape, but the present invention is not limited thereto. As in the embodiments described below, the display panel according to the embodiments of the present invention can be used in an electronic device in which a portion capable of displaying an image (e.g., a screen) is fixed.

[0244] FIG. 13d illustrates a robot (3400) as another electronic device in one embodiment of the present invention. The robot (3400) can move or perceive objects using a camera unit (3440) and can display a predetermined image to a user through a display unit (3420, 3430). In some embodiments, the display panels according to one embodiment of the present invention can be assembled to a body frame having a hemispherical shape, as they can be extended in various directions as described above, and thus the robot (3400) may include a hemispherical display unit (3420, 3430).

[0245] FIG. 13e illustrates a vehicle display device (3500) as another electronic device in one embodiment of the present invention. The vehicle display device (3500) may include a cluster (3510), a Center Information Display (CID) (3520), and / or a passenger display (3530). Since the display panel according to the embodiment of the present invention can be extended in various directions, it can be used for the cluster (3510), the CID (3520), and / or the passenger display (3530) without being constrained by the shape of the vehicle's internal frame.

[0246] FIG. 13e illustrates the cluster (3510), CID (3520), and / or passenger seat indicator (3530) being separated, but the invention is not limited thereto. In another embodiment, two or more selected from the cluster (3510), CID (3520), and / or passenger seat indicator (3530) may be connected as a single unit.

[0247] In some embodiments, the vehicle display device (3500) may include a button (3540) capable of displaying a predetermined image. Referring to the enlarged view of FIG. 13e, the hemispherical button (3540) may include an object (3542) that provides a tactile sensation of the button while moving in the z-direction or -z-direction, and an electronic device placed on the object (3542). In some embodiments, if the object (3542) has a three-dimensionally rounded surface, the electronic device may also have a three-dimensionally rounded surface.

[0248] FIG. 13f illustrates that an electronic device according to one embodiment of the present invention is an electronic device for advertising or display (3600). In some embodiments, the electronic device for advertising or display (3600) may be installed on a fixed structure (3610), such as a wall or a column. If the structure (3610) includes an uneven surface as shown in FIG. 13f, the electronic device for advertising or display (3600) may also be placed along the uneven surface of the structure (3610). In some embodiments, the electronic device for advertising or display (3600) may be installed on the structure (3610) using a heat-shrink film or the like.

[0249] FIG. 13g illustrates that an electronic device according to one embodiment of the present invention is a controller (3700). The controller (3700) may include an image-type button. For example, the controller (3700) may include first to third button areas (3720, 3730, 3740) in which a portion of the display portion (3710) protrudes in the z-direction or protrudes in the -z-direction (or is recessed in the z-direction). In some embodiments, the first and third button areas (3720, 3740) may protrude in the z-direction, and the second button area (3730) may protrude in the -z-direction (or be recessed in the z-direction).

[0250] The present invention has been described with reference to the embodiments illustrated in the drawings, but this is merely illustrative, and those skilled in the art will understand that various modifications and equivalent alternative embodiments are possible therefrom. Accordingly, the true technical scope of protection of the present invention should be determined by the technical spirit of the appended claims.

Claims

1. A substrate comprising a plurality of island portions and a plurality of bridge portions connecting adjacent island portions among the plurality of island portions; A display layer disposed on the substrate and comprising a plurality of pixels disposed in the plurality of island portions and a plurality of wirings disposed in the plurality of bridge portions; and A first protective layer covering the side of the substrate and the side of the display layer; comprising A display panel in which the first protective layer is spaced apart from the plurality of pixels on a flat plane.

2. In Paragraph 1, The above substrate is, At least one base layer comprising an organic insulating material; and The invention further comprises at least one barrier layer disposed on the above-mentioned at least one base layer and including an inorganic insulating material; A display panel in which the at least one barrier layer in a planar plane is spaced apart from the plurality of bridge portions.

3. In Paragraph 1, The above display layer is, Pixel circuits disposed in each of the above plurality of island sections; A first organic insulating layer disposed on the pixel circuit above; A first electrode pad and a second electrode pad disposed on the first organic insulating layer; and A display panel further comprising a light-emitting diode disposed on the first electrode pad and the second electrode pad.

4. In Paragraph 3, The above-mentioned display layer further comprises at least one inorganic insulating layer, and A display panel in which the at least one inorganic insulating layer in a planar plane is spaced apart from the plurality of bridge portions.

5. In Paragraph 3, Further comprising an encapsulation layer disposed on the light-emitting diode; and The first protective layer is a display panel covering the side of the sealing layer.

6. In Paragraph 5, The first protective layer is a display panel that exposes the upper surface of the sealing layer.

7. In Paragraph 1, A display panel in which each of the above plurality of bridge parts has a wavy shape.

8. In Paragraph 7, Each of the above plurality of bridge parts is, Two rounded portions, each having an inner edge and an outer edge; and A display panel comprising a connecting portion connecting the two round portions above.

9. In Paragraph 8, Each of the above plurality of bridge parts is, having a wiring area in which the above plurality of wirings are arranged, A display panel, wherein the wiring area is spaced apart from the outer edge by a first distance and spaced apart from the inner edge by a second distance greater than the first distance.

10. In Paragraph 8, A display panel further comprising: a second protective layer disposed between the inner edges and the first protective layer.

11. In Paragraph 10, A display panel in which the modulus of the second protective layer is higher than the modulus of the first protective layer.

12. In Paragraph 7, Each of the above plurality of bridge parts is, Two corner portions, each having a first portion extending in a first direction and a second portion extending in a second direction intersecting the first direction; and A display panel including a connecting part connecting the two corner parts above.

13. In Paragraph 12, Each of the two corner sections above has an inner edge and an outer edge, A display panel further comprising: a second protective layer disposed between the inner edges and the first protective layer.

14. In Paragraph 13, A display panel in which the modulus of the second protective layer is higher than the modulus of the first protective layer.

15. In Paragraph 1, A display panel comprising the first protective layer, which includes parylene, silicon oxide, or silicon nitride.

16. A substrate comprising a plurality of island portions and a plurality of bridge portions connecting adjacent island portions among the plurality of island portions; Pixel circuits disposed in each of the above plurality of island sections; A first organic insulating layer disposed on the pixel circuit above; A first electrode pad and a second electrode pad disposed on the first organic insulating layer; A light-emitting diode disposed on the first electrode pad and the second electrode pad; A first protective layer extending from the upper surface of the first organic insulating layer to the side of the substrate and having openings corresponding to each of the first electrode pad and the second electrode pad; and A display panel comprising: a second protective layer disposed between the first protective layer and the sides of the plurality of bridge portions.

17. In Paragraph 16, The above substrate is, At least one base layer comprising an organic insulating material; and Further comprising at least one barrier layer disposed on the above at least one base layer and including an inorganic insulating material; A display panel in which the at least one barrier layer in a planar plane is spaced apart from the plurality of bridge portions.

18. In Paragraph 16, Each of the above plurality of bridge parts is, Two rounded portions, each having an inner edge and an outer edge; and A connecting part connecting the two round parts mentioned above; including, The second protective layer is a display panel disposed along the inner edge.

19. In Paragraph 18, A display panel in which the modulus of the second protective layer is higher than the modulus of the first protective layer.

20. In an electronic device including a retractable display panel, The above display panel is, A substrate comprising a plurality of island portions and a plurality of bridge portions connecting adjacent island portions among the plurality of island portions; A display layer disposed on the substrate and comprising a plurality of pixels disposed in the plurality of island portions and a plurality of wirings disposed in the plurality of bridge portions; and A first protective layer covering the side of the substrate and the side of the display layer; comprising An electronic device in which the first protective layer is spaced apart from the plurality of pixels on a plane.

Images