HBM semiconductor storage device and method for manufacturing same

Abstract

The present invention is an HBM semiconductor storage device comprising a substrate having a semiconductor storage element region, wherein: the substrate is a carbon-doped silicon substrate and has the semiconductor storage element region on the surface layer of the carbon-doped silicon substrate; or the substrate comprises a carbon-doped first silicon substrate and a carbon-undoped second silicon substrate on the carbon-doped first silicon substrate, and has the semiconductor storage element region on the surface layer of the carbon-undoped second silicon substrate. Thus, an HBM semiconductor storage device with which cracking can be suppressed is provided.

Description

Semiconductor memory device for HBM and method for manufacturing the same

[0001] This invention relates to a semiconductor memory device for High Bandpass Memory (HBM) and a method for manufacturing the same, and more particularly to a semiconductor memory device for HBM installed inside a GPU used in a server for generating AI, and a method for manufacturing the same.

[0002] In the 2000s, the demand for AI servers exploded, driven by the ability to machine-learn large amounts of data on servers and dramatically improve the accuracy of image recognition. Furthermore, in recent years, generative AI, which generates data based on machine-learned data, has become mainstream. While it was previously possible to output search results based on the results of machine learning, generative AI, which will attract attention in the future, will produce new results. An example of this is the recent case at SoftBank (registered trademark) where an overwhelming number of patents were filed in a short period of time, which will fundamentally change the conventional social structure (Non-Patent Literature 1).

[0003] Furthermore, since the content of the data used for learning naturally differs between machine learning and generative AI, the importance of AI servers, which replace conventional general-purpose servers, is expected to increase even more in the future (the age of artificial intelligence).

[0004] The GPU used in AI servers has a structure in which the processor's main core and the HBM are connected by a silicon interposer. For thermal management, heat sinks are installed on top of the processor and HBM. For this reason, the height of the HBM must be the same as that of the processor (Non-Patent Literature 2).

[0005] HBMs have a stacked structure of DRAM (Dynamic Random Access Memory) chips (DRAM dies). To improve performance, the number of stacks needs to be increased, but due to height constraints, the height of individual DRAM chips needs to be reduced (thinner). As mentioned in Non-Patent Literature 2 above, as the DRAM chips become thinner, the substrate strength of the DRAM chip decreases, leading to problems such as cracking defects due to crack formation and bonding defects due to warping.

[0006] Nomura Research Institute Future Creation Center Research Report Vol. 10 "The Future Landscape Transformed by Generative AI: What You Should Know About the Suddenly Appearing 'Generative AI'" December 2023 ADMETAPlus 2024, Tutorial "Metallization for Memory Devices - Challenging High Bandwidth Memory" Micron Memory Japan, K. K. Yokoi Naoki

[0007] This invention was made to solve the above problems and aims to provide a semiconductor memory device for HBMs that can suppress cracking.

[0008] To achieve the above objective, the present invention provides a semiconductor memory device for HBMs comprising a substrate having a semiconductor memory element region, wherein the substrate is a carbon-doped silicon substrate and has the semiconductor memory element region on the surface layer of the carbon-doped silicon substrate, or comprises a carbon-doped first silicon substrate and a carbon-non-doped second silicon substrate on the carbon-doped first silicon substrate, and has the semiconductor memory element region on the surface layer of the carbon-non-doped second silicon substrate.

[0009] In the semiconductor memory device for HBMs of the present invention, there are two patterns for the substrate as described above. Both patterns have at least a carbon-doped silicon region (a region other than the surface of the carbon-doped silicon substrate, or a carbon-doped first silicon substrate) excluding the surface layer (semiconductor memory element region). As a result, the strength is improved by the doped carbon, making it possible to suppress cracking in the HBM semiconductor memory device. This allows for further thinning of the HBM semiconductor memory device without causing problems such as cracking, enabling higher performance in HBMs (increasing the number of stacked HBM semiconductor memory devices).

[0010] In this case, the thickness of the region of the carbon-doped silicon substrate other than the semiconductor memory element region, or the thickness of the first carbon-doped silicon substrate, can be 100 nm or more.

[0011] If the thickness of the above-mentioned parts falls within the above numerical range, crack suppression can be achieved more reliably and effectively.

[0012] Furthermore, the substrate may be further provided with a silicon support on its back side.

[0013] The device may also be further equipped with a silicon support. The presence of the silicon support further improves its strength.

[0014] The present invention also provides a method for manufacturing a semiconductor memory device for HBM, comprising forming an epitaxial layer on a silicon substrate, forming a semiconductor memory element on the surface layer of the epitaxial layer, and performing a thin-film treatment, wherein in the formation of the epitaxial layer and the formation of the semiconductor memory element, a carbon-doped silicon layer is formed on the silicon substrate by epitaxial growth, and then the semiconductor memory element is formed on the surface layer of the carbon-doped silicon layer, or a first carbon-doped silicon layer is formed on the silicon substrate by epitaxial growth, then a second carbon-non-doped silicon layer is formed on the first carbon-doped silicon layer, and then the semiconductor memory element is formed on the surface layer of the second carbon-non-doped silicon layer, and in the thin-film treatment, part or all of the silicon substrate is removed.

[0015] The present invention's method for manufacturing a semiconductor memory device for HBMs makes it possible to manufacture an HBM semiconductor memory device having at least a carbon-doped silicon region (a region of the carbon-doped silicon layer other than the surface layer, or a carbon-doped first silicon layer) excluding the surface layer (semiconductor memory element region), as described above. Therefore, the doped carbon can improve strength and suppress cracking. Consequently, the HBM semiconductor memory device can be made thinner without causing cracking problems, increasing the number of layers in the HBM and improving the performance of the HBM.

[0016] In this case, when forming the semiconductor memory element on the surface layer of the carbon-doped silicon layer, the thickness of the region of the carbon-doped silicon layer other than the thickness of the semiconductor memory element formation region can be left at 100 nm or more, or when forming the first carbon-doped silicon layer, the thickness of the formed film can be 100 nm or more.

[0017] If the thickness of the above-mentioned parts falls within the above numerical range, crack suppression can be achieved more reliably and effectively.

[0018] Furthermore, when forming the carbon-doped silicon layer or the carbon-non-doped second silicon layer, the film thickness can be adjusted depending on the thickness of the semiconductor memory device for the HBM being manufactured.

[0019] In HBM fabrication, when attempting to increase the number of stacked semiconductor memory devices for the HBM while considering the thickness limitations of the HBM, it is necessary to reduce the thickness of each individual HBM semiconductor memory device. Therefore, it is best to appropriately adjust the thickness of each silicon layer described above, taking into account the required thickness of the HBM semiconductor memory device.

[0020] The present invention provides a semiconductor memory device for HBMs and a manufacturing method thereof, which improves strength due to doped carbon and reduces cracking. This allows for thinner films than conventional HBMs, increases the number of layers in the HBM, and improves the performance of the HBM.

[0021] This is a schematic diagram showing a first embodiment of the semiconductor memory device for HBM of the present invention. This is a schematic diagram showing a second embodiment of the semiconductor memory device for HBM of the present invention. This is a schematic diagram showing a third embodiment of the semiconductor memory device for HBM of the present invention. This is a schematic diagram showing a fourth embodiment of the semiconductor memory device for HBM of the present invention. This is a process flow diagram showing a first embodiment of the method for manufacturing the semiconductor memory device for HBM of the present invention. This is a process flow diagram showing a second embodiment of the method for manufacturing the semiconductor memory device for HBM of the present invention.

[0022] The present invention will be described in detail below with reference to the figures as an example of an embodiment, but the present invention is not limited thereto. As mentioned above, there is a demand for thinning of individual DRAM chips (semiconductor memory devices for HBMs) in HBMs, but cracking due to thinning is a problem.

[0023] Therefore, the present inventors conducted diligent research and discovered that a semiconductor memory device for HBMs comprising a substrate having a semiconductor memory element region, wherein the substrate is a carbon-doped silicon substrate and has a semiconductor memory element region on the surface layer of the carbon-doped silicon substrate, or comprises a carbon-doped first silicon substrate and a carbon-non-doped second silicon substrate on the carbon-doped first silicon substrate, and has a semiconductor memory element region on the surface layer of the carbon-non-doped second silicon substrate, is such that, excluding the surface layer (semiconductor memory element region), it is possible to suppress cracking because it has at least a carbon-doped silicon portion, thus completing the present invention.

[0024] Furthermore, the present invention was found to provide a method for manufacturing a semiconductor memory device for HBMs that exhibits the above-mentioned excellent effects, which involves forming an epitaxial layer on a silicon substrate, forming a semiconductor memory element on the surface layer of the epitaxial layer, and performing a thin-film treatment, wherein in the process of forming the epitaxial layer and forming the semiconductor memory element, a carbon-doped silicon layer is formed on the silicon substrate by epitaxial growth, and then a semiconductor memory element is formed on the surface layer of the carbon-doped silicon layer, or a first carbon-doped silicon layer is formed on the silicon substrate by epitaxial growth, then a second carbon-non-doped silicon layer is formed on the first carbon-doped silicon layer, and then a semiconductor memory element is formed on the surface layer of the second carbon-non-doped silicon layer, and in the thin-film treatment, part or all of the silicon substrate is removed, thereby providing a semiconductor memory device for HBMs that exhibits the above-mentioned excellent effects, thus completing the present invention.

[0025] The present invention will now describe a semiconductor memory device for HBMs. <First Embodiment of the Device> Figure 1 shows an example of the semiconductor memory device for HBMs of the present invention. As shown in Figure 1, the semiconductor memory device for HBMs (hereinafter also simply referred to as memory device) 1 of the present invention comprises a silicon support 2 and a substrate 3. In the embodiment of Figure 1, the substrate 3 is a carbon-doped silicon substrate (hereinafter also simply referred to as silicon substrate). The silicon substrate refers to the same thing as the substrate 3, but for convenience, a different reference numeral 4 is used.

[0026] The silicon support 2 can be made of silicon and is not particularly limited. It supports the substrate 3 from its back side. The silicon support 2 may be provided in this way to improve strength, etc. The silicon substrate 4 (substrate 3) is carbon-doped throughout and has a semiconductor memory element region 4A on its surface. That is, in the carbon-doped silicon layer, the desired semiconductor memory element is formed only on the surface. The formed semiconductor memory element can be a capacitor or a transistor, or any other element that can play an appropriate role as a DRAM, and is not particularly limited. Furthermore, in the thickness direction, no semiconductor memory elements are formed in regions other than the surface layer (semiconductor memory element region 4A) of the silicon substrate 4 (hereinafter also referred to as the inner layer region 4B).

[0027] As described above, the memory device 1 of the present invention has at least a carbon-doped silicon region (i.e., an inner layer region 4B) excluding the surface layer (semiconductor memory element region 4A), which suppresses the occurrence of cracks and is extremely superior. It is capable of adequately addressing the challenges of cracking and bonding defects due to warping in thin-film DRAM chips, which are required in recent years to achieve even thinner films and an increase in the number of layers.

[0028] Here, the carbon concentration in the silicon substrate 4 is not particularly limited, but for example, 1 × 10 １８ atoms / cm ３ The above is preferable because it allows for a more reliable improvement in strength. Furthermore, there is no particular upper limit, but for example, 4 × 10 ２１ atoms / cm ３ Within the following range, sufficient strength can be obtained from doped carbon, and the crack suppression effect can be fully obtained. To more reliably obtain these effects, more preferably 1 × 10 １９ atoms / cm ３ The above 4 x 10 ２１ atoms / cm ３ The following range is possible.

[0029] Incidentally, the thicknesses of the silicon support 2 and the silicon substrate 4 are not particularly limited and can be determined as appropriate. For example, the thicknesses of each part can be determined according to the overall thickness of the memory device 1 in accordance with the requirements of thinning. The thinner it is, the thinner the overall thickness of the memory device 1 becomes, and it is preferable because the number of stacked layers can be increased in the manufacture of HBM.

[0030] Also, the thickness of the inner layer region 4B (that is, the region thickness other than the thickness of the semiconductor memory element region 4A among the thicknesses of the carbon-doped silicon substrate 4) is not particularly limited, but for example, if it is 100 nm or more, it is more effective in suppressing the above-mentioned cracking and is therefore preferable. If necessary, it can be set to, for example, 125 nm or more, and further 150 nm or more. As the upper limit value, for example, if it is about 200 nm, it is considered to be basically sufficient, but of course it is not limited to this, and it can be determined while considering the above effect and the overall thickness of the memory device 1 etc.

[0031] <Device Second Aspect> Also, FIG. 2 shows an example of another aspect of the semiconductor memory device for HBM of the present invention. As shown in FIG. 2, in the memory device 1A of this aspect, it consists only of the silicon substrate 4 (semiconductor memory element region 4A and inner layer region 4B) which is the substrate 3. In other words, compared with FIG. 1, in FIG. 2, there is nothing corresponding to the silicon support 2 in FIG. 1. Therefore, the memory device 1A in the aspect of FIG. 2 can also be made to have an even thinner overall thickness than the memory device 1 in the aspect of FIG. 1. Incidentally, the effectiveness of the silicon part doped with carbon in the inner layer region 4B is as described above, and the same effect regarding cracking as in the case of the aspect of FIG. 1 can be obtained.

[0032] <Device Third Aspect> FIG. 3 shows an example of another aspect of the semiconductor memory device for HBM of the present invention. As shown in FIG. 3, the memory device 10 of this aspect includes a silicon support 20 and a substrate 30. In the aspect of FIG. 3, the substrate 30 includes a carbon-doped first silicon substrate (hereinafter, also simply referred to as the first silicon substrate) 40 and a carbon-undoped second silicon substrate (hereinafter, also simply referred to as the second silicon substrate) 50 on the carbon-doped first silicon substrate 40.

[0033] The silicon support 20 only needs to be made of silicon and is not particularly limited. It supports the substrate 30 from its back side. In order to improve the strength etc. in this way, the silicon support 20 may be provided. The first silicon substrate 40 is a layer of silicon doped with carbon throughout. On the other hand, the second silicon substrate is a layer of carbon-undoped silicon and has a semiconductor memory element region 50A on its surface layer. That is, in the layer of carbon-undoped silicon, only the desired semiconductor memory elements (such as capacitors and transistors for DRAM) are formed on its surface layer. Also, in the thickness direction, semiconductor memory elements are not formed in the regions (inner layer regions 50B) other than the surface layer (semiconductor memory element region 50A) of the second silicon substrate 50.

[0034] As described above, since the memory device 10 of the present invention has at least a silicon portion doped with carbon (that is, the first silicon substrate 40), the occurrence of cracks therein can be suppressed, and thus further thinning and an increase in the number of stacked layers can be achieved.

[0035] Note that the thicknesses of the silicon support 20, the substrate 30 (the first silicon substrate 40 and the second silicon substrate 50) are not particularly limited and can be appropriately determined. For example, according to the overall thickness of the memory device 10 in accordance with the requirement of thinning, the thickness of each part (especially the second silicon substrate 50) can be determined. The thinner it is, the thinner the overall thickness of the memory device 10 becomes, and the number of stacked layers can be increased in the manufacture of HBM, so it is preferable.

[0036] Here, the carbon concentration in the first silicon substrate 40 is not particularly limited. For example, if it is 1×10 １８ atoms / cm ３ or more, it is preferable because the strength can be more surely improved. Also, the upper limit is not particularly limited. For example, if it is in the range of 4×10 ２１ atoms / cm ３ or less, sufficient strength can be obtained by the doped carbon, and the effect of suppressing cracks and fractures can be sufficiently obtained. In order to more surely obtain these effects, more preferably, it is 1×10 １９ atoms / cm３ The above 4 x 10 ２１ atoms / cm ３ The following range is possible.

[0037] Furthermore, the thickness of the first silicon substrate 40 is not particularly limited, but a thickness of 100 nm or more is preferable because it is more effective in suppressing the cracks mentioned above. If necessary, it can be, for example, 125 nm or more, or even 150 nm or more. As an upper limit, a thickness of about 200 nm is generally considered sufficient, but it is not limited to this, and can be determined while comparing the above effects with the overall thickness of the memory device 10.

[0038] <Fourth Embodiment of the Apparatus> Figure 4 shows an example of another embodiment of the semiconductor memory device for HBM of the present invention. As shown in Figure 4, the memory device 10A in this embodiment consists only of a first silicon substrate 40 and a second silicon substrate 50 (semiconductor memory element region 50A and inner layer region 50B), which are the substrate 30. To put it another way, in Figure 4 there is no equivalent to the silicon support 20 in Figure 3. Therefore, the memory device 10A in the embodiment of Figure 4 can be made even thinner overall than the memory device 10 in the embodiment of Figure 3. The effectiveness of the carbon-doped silicon portion, the first silicon substrate 40, is as described above, and the same crack prevention effect as in the embodiment of Figure 3 can be obtained.

[0039] Next, the method for manufacturing a semiconductor memory device for HBMs according to the present invention will be described. <Method 1 Embodiment> Figure 5 shows an example of the process flow of the manufacturing method of the present invention. This is the process flow for manufacturing the semiconductor memory device for HBMs shown in Figure 1 or Figure 2, and as shown in Figure 5, it consists of (Step 1) preparation of a silicon substrate, (Step 2) deposition of a carbon-doped silicon layer, (Step 3) formation of a semiconductor memory element, and (Step 4) thin-film processing. Each step will be described in detail below.

[0040] (Step 1) Preparation of the silicon substrate First, a silicon substrate (single-crystal silicon substrate) is prepared. A silicon ingot can be manufactured by methods such as the Czochralski method or the floating zone method, and from there, it can be cut into wafers and subjected to various processes such as grinding, etching, and polishing to prepare this silicon substrate. The diameter size and surface orientation are not particularly limited.

[0041] (Step 2) Deposition of carbon-doped silicon layer Next, a vacuum CVD apparatus is prepared (an apparatus similar to the one used conventionally can be prepared), and an epitaxial layer is deposited on a silicon substrate placed inside the apparatus. More specifically, a carbon-doped silicon layer is deposited on a silicon substrate by epitaxial growth. In the vacuum CVD apparatus, under reduced pressure, the carbon-doped silicon layer is epitaxially grown using, for example, trimethylsilane, monomethylsilane, or monosilane as the raw material gas. At this time, the temperature can be set to, for example, 700°C to 900°C, preferably 730°C to 750°C, to produce a carbon-doped epitaxial layer with fewer defects. The pressure during deposition can be, for example, 1 to 80 Torr (133 to 10666 Pa).

[0042] For example, the carbon concentration could be 1 × 10⁻⁶. １８ atoms / cm ３ The above 4 x 10 ２１ atoms / cm ３ More preferably 1 × 10 within the following range. １９ ~4 x 10 ２１ atoms / cm ３ The carbon concentration can be set within this range. By setting it within this range, it is possible to more reliably ensure sufficient strength from the doped carbon, and consequently, achieve sufficient suppression of cracks and fractures. The carbon concentration can be adjusted by the flow rate of the raw material gas and the film deposition temperature.

[0043] The thickness of the film deposited at this stage is not particularly limited and can be changed as appropriate. However, it is advisable to consider the final overall thickness of the memory device in advance and adjust the thickness of the silicon layer appropriately so that it falls within the range of the overall thickness after the subsequent thinning process.

[0044] (Step 3) Formation of semiconductor memory elements Then, the desired semiconductor memory elements are formed on the surface layer of the carbon-doped silicon layer that has been deposited. Using techniques such as photolithography, a DRAM consisting of capacitors that serve as memory elements and transistors that serve as switches can be fabricated. The fabrication of this DRAM can be carried out in basically the same way as in the past. The region in which the semiconductor memory elements are formed in this way corresponds to the semiconductor memory element region 4A in Figures 1 and 2. In addition, in the thickness direction of the carbon-doped silicon layer, the region other than the semiconductor memory element region 4A (i.e., the region remaining where semiconductor memory elements are not formed) corresponds to the inner layer region 4B in Figures 1 and 2. The combination of these regions, that is, the carbon-doped silicon layer with semiconductor memory elements formed on the surface layer as described above, corresponds to the carbon-doped silicon substrate 4 (or substrate 3) in Figures 1 and 2.

[0045] At this time, the film thickness to be left as the inner layer region 4B in Figures 1 and 2 is not particularly limited, but it is preferably 100 nm or more. As mentioned above, this is because it is more effective in suppressing cracking of the memory device that is ultimately manufactured. Furthermore, it can be, for example, 125 nm or more, 150 nm or more, and about 200 nm is sufficient.

[0046] (Step 4) Thinning treatment Then, part or all of the silicon substrate is removed. The removal method itself is not particularly limited and can be carried out as appropriate using grinding, polishing, etching, etc., and may be the same as conventional methods. If only a part is removed, the remaining part of the silicon substrate corresponds to the silicon support 2 in Figure 1. Furthermore, the entire remaining part after this thinning treatment corresponds to the memory device 1 in Figure 1. On the other hand, if the entire silicon substrate is removed, the entire remaining part after the thinning treatment corresponds to the memory device 1A in Figure 2. Removing the entire silicon substrate allows for even thinner film formation, making it possible to thin the HBM by one layer or increase the number of stacked DRAM chips, which is more preferable.

[0047] Furthermore, the thickness of each layer in each of the aforementioned processes can be appropriately changed according to the desired thickness of the memory device. In particular, the thickness of the layer formed by epitaxial growth can be freely set by adjusting the growth time.

[0048] As described above, the manufacturing method of the present invention makes it possible to improve strength by utilizing carbon doping and to manufacture memory devices that can suppress cracking. Therefore, even if the memory device is made thinner than conventional devices, it is less prone to cracking and warping. Furthermore, by making the film even thinner, it is possible to increase the number of layers and improve the performance of the HBM.

[0049] In the fabrication of the HBM, the semiconductor memory device for the HBM of the present invention is formed into a chip (DRAM chip) by dicing, and multiple DRAM chips (memory dies) prepared in this way are stacked vertically and connected to each other with through-electrodes to manufacture the HBM. This HBM is then connected to a silicon interposer, and a processor is connected to the silicon interposer, making it usable in AI servers and the like.

[0050] <Method 2 Embodiment> Figure 6 also shows an example of a process flow of another embodiment of the manufacturing method of the present invention. This is a process flow for manufacturing the semiconductor memory device for HBM shown in Figure 3 or Figure 4, and as shown in Figure 6, it consists of (Step 1) preparation of a silicon substrate, (Step 2) deposition of a carbon-doped first silicon layer, (Step 3) deposition of a carbon-non-doped second silicon layer, (Step 4) formation of a semiconductor memory element, and (Step 5) thin-film processing. Each step will be described in detail below.

[0051] (Step 1) Preparation of the silicon substrate First, prepare the silicon substrate (single-crystal silicon substrate). This can be done in the same way as in Step 1 of the first embodiment of the method.

[0052] (Step 2) Deposition of the carbon-doped first silicon layer Next, a vacuum CVD apparatus is prepared (an apparatus similar to the one used conventionally can be prepared), and an epitaxial layer is deposited on a silicon substrate placed inside the apparatus. More specifically, a carbon-doped first silicon layer is deposited on the silicon substrate by epitaxial growth. This deposited carbon-doped first silicon layer corresponds to the carbon-doped first silicon substrate 40 in Figures 3 and 4. The vacuum CVD apparatus used, the pressure and temperature during deposition, the carbon concentration, etc., can be the same as in Step 2 of the first embodiment of the method, for example. The thickness of the deposited film is not particularly limited, but it is preferably 100 nm or more. As mentioned above, this is because it is more effective in suppressing cracking of the memory device that is finally manufactured. Furthermore, it can be, for example, 125 nm or more, 150 nm or more, and about 200 nm is sufficient.

[0053] (Step 3) Deposition of the carbon-non-doped second silicon layer Next, a carbon-non-doped second silicon layer is deposited on the deposited carbon-doped first silicon layer by epitaxial growth. At this time, either a vacuum CVD apparatus or an atmospheric pressure CVD apparatus can be used without restriction, but an atmospheric pressure CVD apparatus is preferable in particular when growing a thick layer because it allows for a higher growth rate. At this time, the carbon-non-doped second silicon layer can be deposited by introducing, for example, monosilane or trichlorosilane into the CVD apparatus and setting the temperature to approximately 1000°C to 1200°C.

[0054] At this time, by taking into consideration the final overall thickness of the memory device in advance, it is advisable to appropriately adjust the thickness of the carbon-non-doped second silicon layer so that it falls within the range of the final overall thickness after the subsequent thinning process.

[0055] (Step 4) Formation of semiconductor memory elements Then, a desired semiconductor memory element is formed on the surface layer of the deposited carbon-non-doped second silicon layer. A DRAM can be manufactured, and the manufacturing process itself can be the same as in step 3 of the first embodiment of the method. In other words, it can be carried out basically in the same way as in the conventional method. The region in which the semiconductor memory element is formed in this way corresponds to the semiconductor memory element region 50A in Figures 3 and 4. In addition, in the thickness direction of the carbon-non-doped second silicon layer, the region other than the semiconductor memory element region 50A (i.e., the region remaining without the formation of a semiconductor memory element) corresponds to the inner layer region 50B in Figures 3 and 4. The combination of these regions, that is, the carbon-non-doped second silicon layer with the semiconductor memory element formed on its surface as described above, corresponds to the carbon-non-doped second silicon substrate 50 in Figures 3 and 4. Furthermore, the combination of the carbon-doped first silicon layer and the carbon-non-doped second silicon layer (with a semiconductor memory element on its surface) corresponds to the substrate 30 in Figures 3 and 4.

[0056] (Step 5) Thinning treatment Then, part or all of the silicon substrate is removed. This can be done in the same way as in step 4 of the first embodiment of the method. If only a part is removed, the remaining portion of the silicon substrate corresponds to the silicon support 20 in Figure 3. Furthermore, the entire portion remaining after this thinning treatment corresponds to the memory device 10 in Figure 3. On the other hand, if the entire silicon substrate is removed, the entire portion remaining after the thinning treatment corresponds to the memory device 10A in Figure 4.

[0057] Furthermore, the thickness of each layer in each of the aforementioned steps can be appropriately changed according to the desired thickness of the memory device. In particular, the thickness of the layer formed by epitaxial growth can be freely set by adjusting the growth time. The subsequent fabrication of the HBM can be carried out in the same manner as in the first embodiment of the method.

[0058] As described above, the manufacturing method of the present invention makes it possible to manufacture memory devices that can suppress cracking by utilizing carbon doping, and consequently, to further improve the capabilities of HBMs by making them thinner and increasing the number of layers.

[0059] The present invention will be described more specifically below with reference to embodiments of the present invention, but the present invention is not limited thereto. (Example 1) The semiconductor memory device 1 for HBM of the present invention was manufactured as follows according to the flow chart in Figure 5. A single crystal silicon substrate with a diameter of 300 mm, a thickness of 750 μm, a crystal orientation (100), boron doping, and a resistance of 10 Ω·cm was prepared (Step 1). The prepared single crystal silicon substrate was placed on a susceptor in the reactor of a commercially available general vacuum CVD apparatus, and carbon was converted to 1 × 10¹⁶ carbon using trimethylsilane gas as the raw material gas at 700°C and 10 Torr (1333 Pa). ２０ atoms / cm ３ A silicon layer doped with the specified concentration (carbon-doped silicon layer) was grown to a thickness of 2 μm (step 2).

[0060] Using this epitaxial substrate, a semiconductor memory element (DRAM) was formed on the surface layer of a carbon-doped silicon layer by photolithography (Step 3). At this time, a region where no DRAM was formed (inner layer region) remained with a thickness of approximately 100 nm in the thickness direction. Subsequently, for use in an HBM, the single-crystal silicon substrate was polished to a thickness of approximately 78 μm to thin it, resulting in an overall thickness of 80 μm (Step 4), thereby obtaining the HBM semiconductor memory device 1 of the present invention. After this, multiple DRAM chips were obtained by dicing. Then, bumps were formed on the back surface and four DRAM chips were bonded together, but no cracks occurred.

[0061] (Example 2) The semiconductor memory device 10 for HBM of the present invention was manufactured as follows, following the flow chart in Figure 6. A single crystal silicon substrate similar to that in Example 1 was prepared (Step 1). Using a vacuum CVD apparatus similar to that in Example 1, carbon was quantized at 700°C and 10 Torr (1333 Pa) using trimethylsilane gas as the raw material gas, resulting in 1 × 10¹⁶ carbon ２０ atoms / cm ３ A silicon layer doped with the specified concentration (the first carbon-doped silicon layer) was grown to a thickness of 100 nm (Step 2). Subsequently, a silicon layer (the second carbon-non-doped silicon layer) was grown to a thickness of 2 μm at 1080°C for 10 minutes using trichlorosilane gas as the raw material (Step 3).

[0062] Using this epitaxial substrate, a DRAM was formed on the surface layer of the carbon-non-doped second silicon layer in the same manner as in Example 1 (Step 4). At this time, a region where no DRAM was formed (inner layer region) remained with a thickness of approximately 100 nm in the thickness direction. Subsequently, for use in HBM, the single-crystal silicon substrate was polished to a thickness of approximately 78 μm to thin it, resulting in an overall thickness of 80 μm (Step 5), thereby obtaining the HBM semiconductor memory device 10 of the present invention. After this, multiple DRAM chips were obtained by dicing. Then, bumps were formed on the back surface and four DRAM chips were bonded together, but no cracks occurred.

[0063] (Comparative Example) A single-crystal silicon substrate similar to that in Example 1 was prepared. In a commercially available general atmospheric pressure epitaxial growth furnace, H was grown at 1130°C for 1 minute. ２ Annealing was performed. Subsequently, a silicon epitaxial layer (carbon-non-doped layer) was grown to a thickness of 2 μm at a growth temperature of 1080°C using trichlorosilane gas as the raw material gas.

[0064] Using this epitaxial substrate, a DRAM was formed on the surface layer of the silicon epitaxial layer in the same manner as in Example 1. At this time, a region where no DRAM was formed (inner layer region) remained with a thickness of approximately 100 nm in the thickness direction. Subsequently, for use in HBM, the single-crystal silicon substrate was polished to a thickness of approximately 78 μm to thin it, resulting in a total thickness of 80 μm, and an HBM semiconductor memory device was obtained. After this, multiple DRAM chips were obtained by dicing. Then, when bumps were formed on the back surface and four DRAM chips were bonded together, cracks occurred in all chips starting from the bumps.

[0065] It should be noted that the present invention is not limited to the embodiments described above. The embodiments described above are illustrative, and any configuration that has substantially the same technical idea as described in the claims of the present invention and achieves similar effects is included within the technical scope of the present invention.

Claims

1. A semiconductor memory device for HBM comprising a substrate having a semiconductor memory element region, wherein the substrate is a carbon-doped silicon substrate and has the semiconductor memory element region on the surface layer of the carbon-doped silicon substrate, or comprises a carbon-doped first silicon substrate and a carbon-non-doped second silicon substrate on the carbon-doped first silicon substrate, and has the semiconductor memory element region on the surface layer of the carbon-non-doped second silicon substrate.

2. The semiconductor memory device for HBM according to claim 1, characterized in that the thickness of the region of the carbon-doped silicon substrate other than the thickness of the semiconductor memory element region, or the thickness of the first carbon-doped silicon substrate, is 100 nm or more.

3. The semiconductor memory device for HBM according to claim 1 or 2, further comprising a silicon support on the back side of the substrate.

4. A method for manufacturing a semiconductor memory device for HBM, comprising forming an epitaxial layer on a silicon substrate, forming a semiconductor memory element on the surface layer of the epitaxial layer, and performing a thin-film treatment, wherein in the formation of the epitaxial layer and the formation of the semiconductor memory element, a carbon-doped silicon layer is formed on the silicon substrate by epitaxial growth, and then the semiconductor memory element is formed on the surface layer of the carbon-doped silicon layer, or a first carbon-doped silicon layer is formed on the silicon substrate by epitaxial growth, then a second carbon-non-doped silicon layer is formed on the first carbon-doped silicon layer, and then the semiconductor memory element is formed on the surface layer of the second carbon-non-doped silicon layer, and in the thin-film treatment, part or all of the silicon substrate is removed.

5. The method for manufacturing a semiconductor memory device for HBM according to claim 4, characterized in that when forming the semiconductor memory element on the surface layer of the carbon-doped silicon layer, the thickness of the region other than the formation region of the semiconductor memory element in the thickness of the carbon-doped silicon layer is left at 100 nm or more, or when forming the first carbon-doped silicon layer, the thickness of the formed film is 100 nm or more.

6. The method for manufacturing a semiconductor memory device for an HBM according to claim 4 or 5, characterized in that when forming the carbon-doped silicon layer or the carbon-non-doped second silicon layer, the film thickness is adjusted according to the thickness of the semiconductor memory device for an HBM to be manufactured.

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