Electronic device and method for notifying of malfunction state of display driving circuit by using signal transmitted to processor

Abstract

An electronic device is provided. The electronic device may comprise: a display including a display panel and a display driving circuit; and at least one processor. The at least one processor may be configured to identify a state of a signal transmitted from the display driving circuit to the at least one processor. The state of the signal may include a first state indicating activation of image transmission from the at least one processor to the display driving circuit and a second state indicating deactivation of the image transmission. The at least one processor may be configured to detect a malfunction state of the display driving circuit on the basis of identifying that a time period during which the state of the signal is maintained as the second state is longer than a reference time period during which a scan for display through the display panel is performed.

Description

Electronic device and method for indicating a malfunction state of a display driving circuit using a signal transmitted to a processor

[0001] The following descriptions relate to an electronic device and method for indicating a malfunction state of a display driving circuit using a signal transmitted to a processor.

[0002] An electronic device may include a display. The display may be used to display an image. The display may include a display panel and a display driving circuit. The display driving circuit may be configured to display the image obtained from the processor of the electronic device on the display panel. For example, the display driving circuit may be configured to control a source driver (or data driver) of the electronic device and a gate driver (or scan driver) of the electronic device to display the image on the display panel.

[0003] The information described above may be provided as related art for the purpose of aiding understanding of the present disclosure. No claim or determination is made as to whether any of the foregoing may be applied as prior art related to the present disclosure.

[0004] An electronic device is provided. The electronic device may include a display comprising a display panel and a display driving circuit. The electronic device may include at least one processor comprising a processing circuit. The electronic device may include a memory comprising one or more storage media for storing one or more programs configured to be executed individually or collectively by the at least one processor. The one or more programs may include instructions that cause the at least one processor to identify the state of a signal transmitted from the display driving circuit to the at least one processor. The state of the signal may include a first state indicating that image transmission from the at least one processor to the display driving circuit is enabled and a second state indicating that image transmission is disabled. The one or more programs may include instructions that cause the at least one processor to detect a malfunction state of the display driving circuit based on identifying that the time period during which the state of the signal is maintained in the second state is longer than a reference time period during which a scan for display through the display panel is performed.

[0005] An electronic device is provided. The electronic device may include at least one processor comprising a processing circuit. The electronic device may include a display comprising a display panel and a display driving circuit. The display driving circuit may be configured to transmit a signal to the at least one processor to indicate whether image transmission from the at least one processor to the display driving circuit is enabled or disabled. The state of the signal may include a first state indicating that the image transmission is enabled and a second state indicating that the image transmission is disabled. The display driving circuit may be configured to set the state of the signal to the second state while a scan for display through the display panel is performed by the display driving circuit. The display driving circuit may be configured to change the state of the signal from the second state to the first state based on the completion of the scan. The display driving circuit may be configured to maintain the state of the signal in the second state independently of the completion of the scan when a malfunction state of the display driving circuit is identified.

[0006] A method is provided. The method may be executed within an electronic device comprising at least one processor and a display including a display panel and a display driving circuit. The method may include an operation of identifying the state of a signal transmitted from the display driving circuit to the at least one processor. The state of the signal may include a first state indicating that image transmission from the at least one processor to the display driving circuit is enabled and a second state indicating that image transmission is disabled. The method may include an operation of detecting a malfunction state of the display driving circuit based on identifying that the time period during which the state of the signal is maintained in the second state is longer than a reference time period during which a scan for display through the display panel is performed.

[0007] A method is provided. The method may be executed within an electronic device comprising at least one processor and a display including a display panel and a display driving circuit. The method may include an operation in which the display driving circuit transmits a signal to the at least one processor to indicate whether image transmission from the at least one processor to the display driving circuit is enabled or disabled. The state of the signal may include a first state indicating that the image transmission is enabled and a second state indicating that the image transmission is disabled. The method may include an operation in which the display driving circuit sets the state of the signal to the second state while a scan for display through the display panel is performed by the display driving circuit. The method may include an operation in which the display driving circuit changes the state of the signal from the second state to the first state based on the completion of the scan. The method may include an operation in which, when a malfunction state of the display driving circuit is identified, the display driving circuit maintains the state of the signal to the second state independently of the completion of the scan.

[0008] Figure 1 is a schematic diagram of an electronic device including a display driving circuit including memory.

[0009] FIG. 2 illustrates the state of a signal transmitted from a display driving circuit to at least one processor through a third interface.

[0010] FIG. 3 illustrates a control command transmitted from at least one processor to a display driving circuit upon detection of a malfunction state of the display driving circuit.

[0011] FIG. 4 illustrates a VSS (vertical sync start) packet and a data packet transmitted from at least one processor to a display driving circuit upon detection of a malfunction state of the display driving circuit.

[0012] FIG. 5 is a block diagram of an electronic device in a network environment according to various embodiments.

[0013] FIG. 6 is a block diagram of a display module according to various embodiments.

[0014] An electronic device may include at least one processor. The electronic device may include a display comprising a display driving circuit and a display panel. The display driving circuit may include a memory (e.g., graphic random access memory (GRAM)) for storing an image at least temporarily. The memory may be used to store an image received from the at least one processor. The display driving circuit may display the image through the display panel by scanning the image stored in the memory. The scan for displaying the image may not be recognized or identified by the at least one processor. The scan may be unnoticeable (or transparent) to the at least one processor. Because the scan is unnoticeable to the at least one processor, the at least one processor may transmit another image following the image to the display driving circuit while the image stored in the memory is being scanned. When the other image is transmitted while the above image is being scanned, the other image may be displayed together with the image, even though it should be displayed after the image is displayed. For example, when the other image is transmitted while the above image is being scanned, a portion of the other image may be displayed through the display panel together with a portion of the image. Since the other image must be displayed after the image is displayed, displaying the portion of the image and the portion of the other image may reduce the quality of the service provided through the display.

[0015] A signal may be used within the electronic device for the quality of the service. For example, the signal may be referred to as a refresh window (RW) signal (or RW). For example, the signal may be provided from the display driving circuit to the at least one processor to reduce the display of the portion of the image and the portion of the other image. The state of the signal may be changed to reduce the display of the portion of the image and the portion of the other image. The state of the signal may be identified by the at least one processor. Since the state of the signal is identified by the at least one processor, the signal may be further used to inform (or indicate) the state of the display driving circuit to the at least one processor. For example, the signal may be further used to inform the malfunction status of the display driving circuit. The electronic device may include components for the signal to inform the state of the scan performed by the display driving circuit and the malfunction status of the display driving circuit. The above components are described with reference to FIG. 1.

[0016] Figure 1 is a schematic diagram of an electronic device including a display driving circuit including memory.

[0017] Referring to FIG. 1, the electronic device (100) may include a display (105), at least one processor (110), and memory (190).

[0018] The display (105) may include a display driving circuit (120) and a display panel (130). The display (105) may include at least a part of the display module (560) of FIGS. 5 and 6, or correspond to at least a part of the display module (560) of FIGS. 5 and 6.

[0019] The display driving circuit (120) may include at least a portion of the display driver IC (integrated circuitry) (630) of FIG. 6 or correspond to at least a portion of the display driver IC (630) of FIG. 6. The display driving circuit (120) may include a memory (145) (e.g., said memory) which may be composed of volatile memory. The memory (145) may be described as a graphic random access memory (GRAM) (145). The memory (145) may include at least a portion of the memory (633) of FIG. 6 or correspond to at least a portion of the memory (633) of FIG. 6. The memory (145) may be enabled or disabled according to a control command transmitted from at least one processor (110) to the display driving circuit (120) and / or a decision of the display driving circuit (120). For example, the enabled memory (145) may be available for storing images. For example, disabled memory (145) may not be available for storing images.

[0020] The display driving circuit (120) may further include a switch (140). The memory (145) may be connected to at least one processor (110) through the switch (140). The state of the switch (140) may include a first state (141) for connecting the memory (145) to at least one processor (110) and a second state (142) for disconnecting the memory (145) from at least one processor (110). For example, the memory (145) may be configured to acquire an image transmitted from at least one processor (110) to the display driving circuit (120) through the switch (140) in the first state (141). For example, the memory (145) may be disconnected from at least one processor (110) through the switch (140) in the second state (142).

[0021] FIG. 1 illustrates an example in which a switch (140) is included within a display driving circuit (120), but this is merely illustrative. The switch (140) may be located within the display (105) and may also be located outside the display driving circuit (120).

[0022] The display driving circuit (120) may further include a switch (146). The memory (145) may be connected to the display panel (130) via the switch (146). The state of the switch (146) may include a first state (147) for connecting the memory (145) to the display panel (130) and a second state (148) for disconnecting the memory (145) from the display panel (130). For example, an image stored in the memory (145) may be scanned by the display driving circuit (120) via the switch (146) in the first state (147). For example, refraining from scanning an image stored in the memory (145) may be controlled based on setting the state of the switch (146) to the second state (148).

[0023] For example, the display driving circuit (120) may control the switch (140) to have both a first state (141) and a second state (142) and control the switch (146) to have a second state (148) in order to simultaneously perform (or execute) storing an image received from at least one processor (110) in memory (145) and scanning an image received from at least one processor (110) (bypassing memory (145). However, it is not limited thereto. For example, when image transmission from at least one processor (110) to a display driving circuit (120) is performed as burst transmission, the display driving circuit (120) may control a switch (140) to have a first state (141) and control a switch (146) to have a first state (147) in order to perform storing an image received from at least one processor (110) and scanning said image stored in memory (145).

[0024] For example, the display driving circuit (120) can control the switch (140) to have a second state (142) and control the switch (146) to have a second state (148) in order to perform scanning of an image received from at least one processor (110) (bypassing memory (145)) without storing the image received from at least one processor (110) in memory (145) (or based on refraining from storing the image received from at least one processor (110) in memory (145).

[0025] For example, the display driving circuit (120) can control the switch (140) to have a second state (142) and control the switch (146) to have a first state (147) in order to scan an image stored in memory (145) while image transmission from at least one processor (110) to the display driving circuit (120) is not performed.

[0026] The display panel (130) may include at least a portion of the display (610) of FIG. 6 or correspond to at least a portion of the display (610) of FIG. 6. As an example, without limitation, the display panel (130) may include a low temperature polycrystalline oxide (LTPO) thin film transistor (TFT) or a low temperature polysilicon (LTPS) TFT. The display panel (130) may be configured to display an image scanned by the display driving circuit (120).

[0027] At least one processor (110) may include at least a part of the processor (520) of FIG. 5 or correspond to at least a part of the processor (520) of FIG. 5. At least one processor (110) may include a processing circuit. For example, at least one processor (110) may include a central processing unit (CPU) that includes a processing circuit and is configured to acquire and / or generate an image, and a display processing unit (DPU) that includes a processing circuit and is configured to transmit the image acquired by the CPU to a display driving circuit (120).

[0028] Memory (190) may include at least a portion of the memory (530) of FIG. 5 or correspond to at least a portion of the memory (530) of FIG. 5. Memory (190) may include one or more storage media. Memory (190) may store one or more programs configured to be executed individually or collectively by at least one processor (110). The one or more programs may include instructions that cause an electronic device (100) (or at least one processor (110)) to perform operations described in this document. The one or more programs may include one or more storage media.

[0029] The electronic device (100) may include one or more interfaces for connecting a display driving circuit (120) to at least one processor (110). The one or more interfaces may include an interface circuit (circuit or circuitry). The one or more interfaces may be configured to support communication between at least one processor (110) and the display driving circuit (120). For example, the one or more interfaces may include an interface used to transmit signals, data, information, and / or commands from at least one processor (110) to the display driving circuit (120). For example, the one or more interfaces may include an interface used to transmit signals, data, and / or information from the display driving circuit (120) to at least one processor (110).

[0030] The above one or more interfaces may include a first interface (151) used for transmitting images from at least one processor (110) (or the DPU) to a display driving circuit (120). The first interface (151) may include a mobile industry processor interface (MIPI). The first interface (151) may be configured to support a video hybrid mode of a MIPI display serial interface (DSI). At least one processor (110) and a display (105) (or display driving circuit (120)) may operate for the video hybrid mode. The first interface (151) may be used for control commands transmitted from at least one processor (110) to the display driving circuit (120). The first interface (151) may be used for images transmitted from at least one processor (110) to the display driving circuit (120). For example, the first interface (151) may be used for a vertical sync start (VSS) packet transmitted from at least one processor (110) to a display driving circuit (120), and for a data packet (e.g., including an image) following the VSS packet.

[0031] The above one or more interfaces may (optionally) further include a second interface (152) used for a pulse signal transmitted from at least one processor (110) to the display driving circuit (120) to synchronize at least one processor (110) and the display driving circuit (120). The pulse signal may be transmitted periodically to the display driving circuit (120) to synchronize the processor (110) and the display driving circuit (120) (or the display (105)). The pulse signal may be described as an external synchronization signal.

[0032] The transmission period of the pulse signal may correspond to the period of a synchronization signal for at least one processor (110) that is used or identified for display through the display panel (130). For example, the transmission period may correspond to the period of a horizontal synchronization signal. For example, the transmission period may correspond to the period of a light emission synchronization signal (e.g., indicating the timing of a light emission signal transmitted from the display driving circuit (120) to the display panel (130). However, it is not limited thereto.

[0033] The waveform (or width) of the pulse signal may have multiple widths to represent a period of another synchronization signal for at least one processor (110) that is different from the synchronization signal represented by the transmission period and is used or identified for display through the display panel (130). For example, the pulse signal transmitted at the timing (or start timing) (or end timing) of the other synchronization signal may have a first waveform, and the pulse signal transmitted at a different timing distinct from the timing of the other synchronization signal may have a second waveform. For example, when the transmission period corresponds to the period of the horizontal synchronization signal, the pulse signal transmitted at the timing of the vertical synchronization signal (and / or light emission synchronization signal) may have the first waveform. For example, when the transmission period corresponds to the period of the light emission synchronization signal, the pulse signal transmitted at the timing of the vertical synchronization signal may have the first waveform.

[0034] The above one or more interfaces may include a third interface (153) used for a signal described as the RW signal, which is transmitted from the display driving circuit (120) to at least one processor (110) (or the DPU). The signal may indicate a state of the display driving circuit (120) related to image transmission from at least one processor (110) to the display driving circuit (120). The signal may be in a first state indicating that the image transmission is enabled, or in a second state indicating that the image transmission is disabled. By example, without limitation, the signal in the second state may be caused by ceasing to provide power in relation to the signal, unlike the signal in the first state. By example, without limitation, the signal in the second state may be transmitted to at least one processor (110) by reducing the power consumed to transmit the signal in the first state to at least one processor (110). As an example not limited to, the signal in the second state may be transmitted to at least one processor (110) by reducing the voltage applied to transmit the signal in the first state to at least one processor (110).

[0035] The signal in the first state may indicate that the image transmission is authorized. The signal in the first state may indicate the state of a display driving circuit (120) capable of receiving an image from at least one processor (110). The signal in the first state may be different from a TE (tearing effect) signal. Unlike the TE signal, the signal in the first state may indicate that the image transmission is available. Unlike the TE signal, the signal in the first state may indicate at least one timing at which the image transmission can be executed.

[0036] The signal in the second state may indicate that the image transmission is not authorized (or restricted). The signal in the second state may indicate a state of the display driving circuit (120) that cannot receive an image from at least one processor (110). The signal in the second state may indicate that the image transmission is unavailable. The signal in the second state may be transmitted from the display driving circuit (120) to at least one processor (110) while the display driving circuit (120) performs a scan for display through the display panel (130).

[0037] The display driving circuit (120) can set the state of the signal to the first state. The display driving circuit (120) can set the state of the signal to the second state. The display driving circuit (120) can change (or switch) (or adjust) the state of the signal from the first state to the second state. The display driving circuit (120) can change (or switch) (or adjust) the state of the signal from the second state to the first state. The state of the signal is described in more detail with reference to FIG. 2.

[0038] FIG. 2 illustrates the state of a signal transmitted from a display driving circuit to at least one processor through a third interface.

[0039] Referring to FIG. 2, a display driving circuit (120) can scan an image to be displayed through a display panel (130). The scan for display through the display panel (130) may include scanning an image received from at least one processor (110) by bypassing memory (145) according to the video hybrid mode. The scan for display through the display panel (130) may include scanning an image received from at least one processor (110) while storing an image received from at least one processor (110) in memory (145) according to the video hybrid mode. The scan for display through the display panel (130) may include scanning an image stored in memory (145) according to the video hybrid mode.

[0040] The display driving circuit (120) may change the state of the signal from the first state to the second state in response to initiating the scan for display through the display panel (130) or before (or immediately before) initiating the scan for display through the display panel (130). For example, the display driving circuit (120) may change the state of the signal from the first state to the second state in response to initiating scanning of an image received from at least one processor (110) by bypassing the memory (145) (e.g., an image received while the switch (140) is in the second state (142). For example, the display driving circuit (120) may change the state of the signal from the first state to the second state in response to starting to scan an image received from at least one processor (110) (e.g., an image received while the switch (140) is in the first state (141)) while storing an image received from at least one processor (110) in memory (145). For example, the display driving circuit (120) may change the state of the signal from the first state to the second state in response to a timing prior to the reference time interval from the timing of starting to scan an image stored (or has been stored) in memory (145).

[0041] The display driving circuit (120) can set the state of the signal to the second state while performing the scan for display through the display panel (130). The display driving circuit (120) can change the state of the signal from the second state to the first state based on (or in response to) completing the scan for display through the display panel (130).

[0042] For example, the display driving circuit (120) may change the state of the signal from the first state to the second state in response to the timing (201) at which the scan (210) begins. The scan (210) may be a scan of an image received from at least one processor (110) by bypassing the memory (145) or a scan of an image received from at least one processor (110) while storing the image received from at least one processor (110) in the memory (145). The scan (210) may be performed for a time period (211). The time period (211) may be described as a time period during which the scan for display through the display panel (130) is performed by the display driving circuit (120). As an example without limitation, the time period (211) may be described as a time period during which the scan for display through the display panel (130) is performed slowest by the display driving circuit (120). As an example without limitation, the time period (211) may correspond to a refresh rate of 120 Hz (hertz). For example, the time period (211) may be approximately 8.3 ms (milliseconds). The time period (211) may correspond to a reference time period described below.

[0043] For example, the display driving circuit (120) can set the state of the signal to the second state while the scan (210) is performed (or during the time period (211-1). For example, during the time period (211-1), the state of the signal can be maintained in the second state by setting the state of the signal to the second state.

[0044] For example, the display driving circuit (120) can change the state of the signal from the second state to the first state in response to the timing (202) when the scan (210) ends (or is completed).

[0045] For example, the display driving circuit (120) may change the state of the signal from the first state to the second state in response to a timing (205) prior to a reference time interval (212) from the timing (203) at which the scan (220) begins. The scan (220) may be a scan of an image stored (or formerly stored) in memory (145). The scan (220) may be a scan performed according to a decision of the display driving circuit (120) among at least one processor (110) and the display driving circuit (120). The scan (220) may be a scan performed to reduce flickering and / or afterimages occurring on the display panel (130). A reference time interval (212) may be defined to inform at least one processor (110) in advance of a scan (220) performed according to the determination of the display driving circuit (120) without transmitting an image from at least one processor (110) to the display driving circuit (120). As a non-limiting example, a timing (205) prior to the reference time interval (212) from the timing (203) may be within the vertical front porch (VFP) portion (or extended VFP) portion) of the second vertical synchronization signal prior to (or immediately preceding) the first vertical synchronization signal for the scan (220). The scan (220) may be performed for a time period (211), just like the scan (210).

[0046] For example, the display driving circuit (120) can set the state of the signal to the second state while the scan (220) is performed (or during the time period (211-2). For example, during the time period (211-2), the state of the signal can be maintained in the second state by setting the state of the signal to the second state.

[0047] For example, the display driving circuit (120) can change the state of the signal from the second state to the first state in response to the timing (204) when the scan (220) ends (or is completed).

[0048] Referring again to FIG. 1, the one or more interfaces may not include a fourth interface (154) for an interrupt transmitted from the display driving circuit (120) to at least one processor (110). The interrupt may indicate a malfunction state of the display driving circuit. The fourth interface (154) may be described as an interface consisting of a single pin. The interrupt may be transmitted from the display driving circuit to at least one processor by performing a toggle with respect to the single pin of the fourth interface (154) in response to a malfunction state of the display driving circuit.

[0049] As a non-limiting example, the toggle through the fourth interface (154) may be performed (unintentionally) by electrical overstress (EOS) and / or electrostatic discharge (ESD). The EOS may be described as stress caused by a voltage above a reference voltage or a current above a reference current in relation to the display driving circuit (120). The ESD may be described as a discharge occurring within a relatively short time due to static electricity. At least one processor that detects (or identifies) the toggle may initialize or reset the display driving circuit even though the display driving circuit is in a normal state. Since initializing the display driving circuit due to noise such as the EOS or ESD is not performed due to the malfunction state of the display driving circuit, a method for reducing initializing the display driving circuit due to noise such as the EOS or ESD may be applied to the electronic device (100).

[0050] For example, the display driving circuit (120) within the electronic device (100) may inform at least one processor (110) of the malfunction state of the display driving circuit (120) using the third interface (153) instead of informing at least one processor (110) of the malfunction state of the display driving circuit (120) using the fourth interface (154). For example, the display driving circuit (120) may inform at least one processor (110) of the malfunction state of the display driving circuit (120) by using a time period during which the state of the signal transmitted from the display driving circuit (120) to at least one processor (110) through the third interface (153) is maintained in the second state. As an example without limitation, the fourth interface (154) may be omitted from the electronic device (100). As a non-limiting example, the fourth interface (154) is included within the electronic device (100), but the fourth interface (154) may not be used to indicate the malfunction state of the display driving circuit (120) to at least one processor (110).

[0051] For example, the display driving circuit (120) may inform, indicate, or notify the at least one processor (110) of the malfunction state of the display driving circuit (120) by making the time period for maintaining the state of the signal transmitted from at least one processor (110) to the display driving circuit (120) through the third interface (153) longer than the reference time period (e.g., corresponding to the time period (211) of FIG. 2) based on the malfunction state of the display driving circuit (120). The operation of such a display driving circuit (120) is described in more detail with reference to FIG. 3 and FIG. 4.

[0052] FIG. 3 illustrates a control command transmitted from at least one processor to a display driving circuit upon detection of a malfunction state of the display driving circuit.

[0053] Referring to FIG. 3, the display driving circuit (120) may lengthen the time period for maintaining the state of the signal in the second state based on identifying the malfunction state of the display driving circuit (120) than the reference time period (311) (e.g., corresponding to the time period (211)). For example, the display driving circuit (120) may identify the malfunction state of the display driving circuit (120) based on identifying that the waveform of the pulse signal received from at least one processor (110) through the second interface (152) is different from the waveform estimated (or predicted) (or expected) (or determined) by the display driving circuit (120). For example, the display driving circuit (120) may identify the malfunction state of the display driving circuit (120) based on identifying that the reception timing (or position) of the pulse signal is different from the timing estimated (or predicted) (or expected) (or determined) by the display driving circuit (120). For example, the display driving circuit (120) may identify the malfunction state of the display driving circuit (120) based on identifying the non-reception of the pulse signal. For example, the display driving circuit (120) may identify the malfunction state of the display driving circuit (120) based on identifying the abnormal state of the waveform corresponding to the packet received through the first interface (151). Examples, without limitation, include the non-reception of the pulse signal and / or the abnormal state of the waveform of the pulse signal, which may be caused by EOS and / or ESD.

[0054] For example, the display driving circuit (120) can identify the malfunction state of the display driving circuit (120) based on identifying that the magnitude of the voltage applied to the display driving circuit (120) (e.g., driving voltage (ELVSS or ELVDD)) is outside a reference range. For example, the display driving circuit (120) can identify the malfunction state of the display driving circuit (120) based on identifying that the vertical synchronization signal, horizontal synchronization signal, and / or light emission synchronization signal for the display driving circuit (120) is within an abnormal state. For example, the display driving circuit (120) can identify the malfunction state of the display driving circuit (120) based on identifying the malfunction of the image processing circuit within the display driving circuit (120). For example, the display driving circuit (120) can identify the malfunction state of the display driving circuit (120) based on identifying the malfunction of at least some of the one or more interfaces. However, it is not limited to this.

[0055] At least one processor (110) can detect the malfunction state of the display driving circuit (120) based on identifying that the time period is longer than the reference time period (311). The timing for transmitting an image from the at least one processor (110) to the display driving circuit (120) can be set within the electronic device (100) as the timing (or start timing) of the light emission synchronization signal. The timing of the light emission signal can be repeated at times a time period shorter than the reference time period (311). For example, the light emission signal can be started periodically every 4.2 (ms) corresponding to 240 (Hz).

[0056] Since the timing for transmitting an image from at least one processor (110) to the display driving circuit (120) is set to the timing of the light emission signal that is repeated at time intervals shorter than the reference time period (311), the fact that the time period during which the state of the signal is maintained in the second state is longer than the reference time period (311) may indicate that the change of the state of the signal from the second state to the first state is not performed by the display driving circuit (120), even though the change of the state of the signal from the second state to the first state should be performed by the display driving circuit (120). For example, since the display driving circuit (120) does not perform the change of the state of the signal from the second state to the first state, it indicates the intended operation of the display driving circuit (120) to indicate the malfunction state of the display driving circuit (120), or indicates that the state of the signal is not changed due to the malfunction state of the display driving circuit (120), at least one processor (110) can detect the malfunction state of the display driving circuit (120) by identifying that the time period is longer than the reference time period (311).

[0057] For example, at least one processor (110) can identify a time period longer than a reference time period (311) at timing (312). At least one processor (110) can detect the malfunction state of the display driving circuit (120) based on the identification performed at timing (312). For example, at least one processor (110) can transmit a control command to the display driving circuit (120) to reset or initialize the display driving circuit (120) at timing (314) (or from timing (314), as in indication (315), based on the detection. As an example without limitation, the control command may be transmitted from at least one processor (110) to the display driving circuit (120) through the first interface (151). As an example not limited to, the control command may be transmitted to the display driving circuit (120) by changing the waveform (or width) of the pulse signal transmitted through the second interface (152) to a defined waveform.

[0058] For example, the control command may be transmitted by the DPU. As an example without limitation, the CPU in at least one processor (110) may initialize (or reset) the DPU at a timing (313) after timing (312) based on the detection. The DPU may transmit the control command to the display driving circuit (120) based on the completion of the initialization of the DPU performed at timing (313).

[0059] FIG. 4 illustrates a VSS (vertical sync start) packet and a data packet transmitted from at least one processor to a display driving circuit upon detection of a malfunction state of the display driving circuit.

[0060] Referring to FIG. 4, the display driving circuit (120) may make the time period for maintaining the state of the signal in the second state longer than the reference time period (311) (e.g., corresponding to the time period (211)) based on identifying the malfunction state of the display driving circuit (120). For example, the display driving circuit (120) may identify the malfunction state of the display driving circuit (120) based on identifying that the waveform of the pulse signal received from at least one processor (110) through the second interface (152) is different from the waveform estimated (or predicted) (or expected) (or determined) by the display driving circuit (120). For example, the display driving circuit (120) can identify the malfunction state of the display driving circuit (120) based on identifying that the reception timing (or position) of the pulse signal is different from the timing estimated (or predicted) (or expected) (or determined) by the display driving circuit (120). For example, the display driving circuit (120) can identify the malfunction state of the display driving circuit (120) based on identifying the non-reception of the pulse signal. For example, the display driving circuit (120) can identify the malfunction state of the display driving circuit (120) based on identifying an abnormal state of the waveform corresponding to the packet received through the first interface (151). For example, the display driving circuit (120) can identify the malfunction state of the display driving circuit (120) based on identifying that the magnitude of the voltage applied to the display driving circuit (120) (e.g., driving voltage (ELVSS or ELVDD)) is outside the reference range.For example, the display driving circuit (120) may identify the malfunction state of the display driving circuit (120) based on identifying that a vertical synchronization signal, a horizontal synchronization signal, and / or a light emission synchronization signal for the display driving circuit (120) are in an abnormal state. For example, the display driving circuit (120) may identify the malfunction state of the display driving circuit (120) based on identifying a malfunction of an image processing circuit within the display driving circuit (120). For example, the display driving circuit (120) may identify the malfunction state of the display driving circuit (120) based on identifying a malfunction of at least some of the one or more interfaces. However, it is not limited thereto.

[0061] At least one processor (110) can detect the malfunction state of the display driving circuit (120) based on identifying that the time period is longer than the reference time period (311). For example, at least one processor (110) can identify that the time period is longer than the reference time period (311) at the timing (412). At least one processor (110) can detect the malfunction state of the display driving circuit (120) based on the identification performed at the timing (412). For example, at least one processor (110) may transmit, based on the detection, a vertical sync start (VSS) packet (e.g., indicated by an indication (416)) at (or from) the timing (414), such as an indication (415), and a data packet (e.g., indicated by an indication (417)) containing an image that has been maintained (or has been displayed) through the display panel (130) and is following the VSS packet, to the display driving circuit (120) through the first interface (151). The VSS packet and the data packet may be transmitted to the display driving circuit (120) through the first interface (151) even though the state of the signal is the second state. Since the data packet contains the same image as the image being displayed through the display panel (130), the display driving from at least one processor (110) is independent of the second state of the signal. The scan performed by the display driving circuit (120) according to the VSS packet and the data packet transmitted to the circuit (120) may not be recognized by the user.

[0062] For example, the display driving circuit (120) can synchronize one or more timings of the display driving circuit (120) for display through the display panel (130) (e.g., start timing of a scan and / or end timing of a scan) with one or more timings of at least one processor (110) for display through the display panel (130), respectively, according to the VSS packet and the data packet. For example, the display driving circuit (120) can change (or switch) the malfunctioning state of the display driving circuit (120) to a normal state based on the synchronization.

[0063] The operations described with reference to FIG. 3 and the operations described with reference to FIG. 4 may be combined with each other. For example, at least one processor (110) may transmit to the display driving circuit (120), based on the detection (e.g., a first detection of the malfunction state of the display driving circuit (120)), a VSS packet and a data packet including an image that is followed by the VSS packet and maintained through the display panel. For example, at least one processor (110) may identify that the detected malfunction state of the display driving circuit (120) is maintained after the transmission of the VSS packet and the data packet, based on the fact that the time period longer than the reference time period (311) is identified after the transmission of the VSS packet and the data packet. For example, at least one processor (110) may transmit the control command to the display driving circuit (120) to reset or initialize the display driving circuit (120) based on identifying that the detected malfunction state of the display driving circuit (120) persists after transmitting the VSS packet and the data packet. For example, at least one processor (110) may stop supplying power to the display driving circuit (120) based on the fact that the malfunction state of the display driving circuit (120) persists after transmitting the control command. For example, at least one processor (110) may turn off the display driving circuit (120) when the detection of the malfunction state of the display driving circuit (120) persists for a period of time longer than a certain time.

[0064] The operations described above can be performed within the electronic device (501) of FIG. 5.

[0065] FIG. 5 is a block diagram of an electronic device (501) in a network environment (500) according to various embodiments. Referring to FIG. 5, in the network environment (500), the electronic device (501) may communicate with an electronic device (502) through a first network (598) (e.g., a short-range wireless communication network) or may communicate with at least one of an electronic device (504) or a server (508) through a second network (599) (e.g., a long-range wireless communication network). According to one embodiment, the electronic device (501) may communicate with the electronic device (504) through a server (508). According to one embodiment, the electronic device (501) may include a processor (520), memory (530), input module (550), sound output module (555), display module (560), audio module (570), sensor module (576), interface (577), connection terminal (578), haptic module (579), camera module (580), power management module (588), battery (589), communication module (590), subscriber identification module (596), or antenna module (597). In some embodiments, at least one of these components (e.g., connection terminal (578)) may be omitted from the electronic device (501), or one or more other components may be added. In some embodiments, some of these components (e.g., sensor module (576), camera module (580), or antenna module (597)) may be integrated into a single component (e.g., display module (560)).

[0066] The processor (520) can control at least one other component (e.g., a hardware or software component) of the electronic device (501) connected to the processor (520) by executing software (e.g., a program (540)), for example, and can perform various data processing or operations. According to one embodiment, as at least part of the data processing or operations, the processor (520) can store commands or data received from other components (e.g., a sensor module (576) or a communication module (590)) in volatile memory (532), process the commands or data stored in volatile memory (532), and store the resulting data in non-volatile memory (534). According to one embodiment, the processor (520) may include a main processor (521) (e.g., a central processing unit or an application processor) or an auxiliary processor (523) that can operate independently or together with it (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor). For example, if the electronic device (501) includes a main processor (521) and an auxiliary processor (523), the auxiliary processor (523) may be configured to use lower power than the main processor (521) or to be specialized for a designated function. The auxiliary processor (523) may be implemented separately from the main processor (521) or as part thereof.

[0067] The auxiliary processor (523) may control at least some of the functions or states associated with at least one component of the electronic device (501) (e.g., display module (560), sensor module (576), or communication module (590)) on behalf of the main processor (521) while the main processor (521) is in an inactive (e.g., sleep) state, or together with the main processor (521) while the main processor (521) is in an active (e.g., application execution) state. According to one embodiment, the auxiliary processor (523) (e.g., image signal processor or communication processor) may be implemented as part of another functionally related component (e.g., camera module (580) or communication module (590)). According to one embodiment, the auxiliary processor (523) (e.g., neural network processing unit) may include a hardware structure specialized for processing an artificial intelligence model. The artificial intelligence model may be generated through machine learning. Such learning may be performed, for example, on the electronic device (501) itself where the artificial intelligence model is executed, or through a separate server (e.g., server (508)). The learning algorithm may include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model may include a plurality of artificial neural network layers.An artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to the hardware structure, the artificial intelligence model may include a software structure, either additionally or substantially.

[0068] The memory (530) can store various data used by at least one component of the electronic device (501) (e.g., processor (520) or sensor module (576)). The data may include, for example, software (e.g., program (540)) and input data or output data for related commands. The memory (530) may include volatile memory (532) or non-volatile memory (534).

[0069] The program (540) may be stored as software in memory (530) and may include, for example, an operating system (542), middleware (544), or an application (546).

[0070] The input module (550) can receive commands or data to be used for a component of the electronic device (501) (e.g., processor (520)) from outside the electronic device (501) (e.g., user). The input module (550) may include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0071] The sound output module (555) can output a sound signal to the outside of the electronic device (501). The sound output module (555) may include, for example, a speaker or a receiver. The speaker may be used for general purposes, such as multimedia playback or recording playback. The receiver may be used to receive incoming calls. According to one embodiment, the receiver may be implemented separately from the speaker or as part thereof.

[0072] The display module (560) can visually provide information to an external (e.g., user) of the electronic device (501). The display module (560) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling said device. According to one embodiment, the display module (560) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of the force generated by said touch.

[0073] The audio module (570) can convert sound into an electrical signal or, conversely, convert an electrical signal into sound. According to one embodiment, the audio module (570) can acquire sound through the input module (550) or output sound through the sound output module (555) or an external electronic device (e.g., electronic device (502)) (e.g., speaker or headphones) connected directly or wirelessly to the electronic device (501).

[0074] The sensor module (576) can detect the operating state of the electronic device (501) (e.g., power or temperature) or the external environmental state (e.g., user state) and generate an electrical signal or data value corresponding to the detected state. According to one embodiment, the sensor module (576) may include, for example, a gesture sensor, a gyroscope sensor, a barometric pressure sensor, a magnetic sensor, an accelerometer sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biosensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0075] The interface (577) may support one or more specified protocols that can be used for the electronic device (501) to be connected directly or wirelessly to an external electronic device (e.g., electronic device (502)). According to one embodiment, the interface (577) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0076] The connection terminal (578) may include a connector through which the electronic device (501) can be physically connected to an external electronic device (e.g., electronic device (502)). According to one embodiment, the connection terminal (578) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0077] The haptic module (579) can convert an electrical signal into a mechanical stimulus (e.g., vibration or movement) or an electrical stimulus that the user can perceive through tactile or kinesthetic senses. According to one embodiment, the haptic module (579) may include, for example, a motor, a piezoelectric element, or an electric stimulation device.

[0078] The camera module (580) can capture still images and video. According to one embodiment, the camera module (580) may include one or more lenses, image sensors, image signal processors, or flashes.

[0079] The power management module (588) can manage the power supplied to the electronic device (501). According to one embodiment, the power management module (588) can be implemented, for example, as at least part of a power management integrated circuit (PMIC).

[0080] The battery (589) can supply power to at least one component of the electronic device (501). According to one embodiment, the battery (589) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0081] The communication module (590) can support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between an electronic device (501) and an external electronic device (e.g., electronic device (502), electronic device (504), or server (508)), and the performance of communication through the established communication channel. The communication module (590) may include one or more communication processors that operate independently of the processor (520) (e.g., application processor) and support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (590) may include a wireless communication module (592) (e.g., cellular communication module, short-range wireless communication module, or GNSS (global navigation satellite system) communication module) or a wired communication module (594) (e.g., LAN (local area network) communication module, or power line communication module). The corresponding communication module among these communication modules can communicate with an external electronic device (504) through a first network (598) (e.g., a short-range communication network such as Bluetooth, WiFi (wireless fidelity) direct, or IrDA (infrared data association)) or a second network (599) (e.g., a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., LAN or WAN)). These various types of communication modules may be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (592) can identify or authenticate the electronic device (501) within a communication network such as the first network (598) or the second network (599) using subscriber information (e.g., International Mobile Subscriber Identifier (IMSI)) stored in the subscriber identification module (596).

[0082] The wireless communication module (592) can support 5G networks and next-generation communication technologies following 4G networks, for example, new radio access technology. NR access technology can support high-speed transmission of high-capacity data (enhanced mobile broadband (eMBB)), minimization of terminal power and connection of multiple terminals (massive machine type communications (mMTC)), or high reliability and low latency (ultra-reliable and low-latency communications (URLLC)). The wireless communication module (592) can support a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate, for example. The wireless communication module (592) can support various technologies for securing performance in the high-frequency band, such as beamforming, massive MIMO (multiple-input and multiple-output), full-dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large-scale antenna. The wireless communication module (592) can support various requirements specified in the electronic device (501), external electronic device (e.g., electronic device (504)), or network system (e.g., second network (599)). According to one embodiment, the wireless communication module (592) can support a Peak data rate (e.g., 20 Gbps or more) for eMBB realization, loss coverage (e.g., 164 dB or less) for mMTC realization, or U-plane latency (e.g., downlink (DL) and uplink (UL) each 0.5 ms or less, or round trip 1 ms or less) for URLLC realization.

[0083] An antenna module (597) can transmit a signal or power to or from an external source (e.g., an external electronic device). According to one embodiment, the antenna module (597) may include an antenna comprising a radiator made of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). According to one embodiment, the antenna module (597) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as a first network (598) or a second network (599), may be selected from the plurality of antennas, for example, by a communication module (590). A signal or power may be transmitted or received between the communication module (590) and an external electronic device through the selected at least one antenna. According to some embodiments, in addition to the radiator, other components (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as part of the antenna module (597).

[0084] According to various embodiments, the antenna module (597) may form a mmWave antenna module. According to one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent to a first surface (e.g., bottom surface) of the printed circuit board and capable of supporting a specified high frequency band (e.g., mmWave band), and a plurality of antennas (e.g., array antennas) disposed on or adjacent to a second surface (e.g., top surface or side surface) of the printed circuit board and capable of transmitting or receiving a signal of the specified high frequency band.

[0085] At least some of the above components can be connected to each other via a communication method between peripheral devices (e.g., bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)) and exchange signals (e.g., commands or data) with each other.

[0086] According to one embodiment, commands or data may be transmitted or received between the electronic device (501) and an external electronic device (504) through a server (508) connected to a second network (599). Each of the external electronic devices (502, or 504) may be the same or a different type of device as the electronic device (501). According to one embodiment, all or part of the operations performed on the electronic device (501) may be performed on one or more of the external electronic devices (502, 504, or 508). For example, if the electronic device (501) needs to perform a function or service automatically or in response to a request from a user or another device, the electronic device (501) may request one or more external electronic devices to perform at least part of the function or service instead of performing the function or service itself or additionally. One or more external electronic devices that receive the above request may execute at least part of the requested function or service, or additional function or service related to the request, and transmit the result of the execution to the electronic device (501). The electronic device (501) may provide the result as is or additionally processed as at least part of the response to the request. For this purpose, for example, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used. The electronic device (501) may provide ultra-low latency services using, for example, distributed computing or mobile edge computing. In one embodiment, the external electronic device (504) may include an Internet of Things (IoT) device. The server (508) may be an intelligent server using machine learning and / or neural networks. According to one embodiment, the external electronic device (504) or the server (508) may be included within a second network (599).The electronic device (501) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

[0087] FIG. 6 is a block diagram (600) of a display module (560) according to various embodiments. Referring to FIG. 6, the display module (560) may include a display (610) and a display driver IC (DDI) (630) for controlling the display. The DDI (630) may include an interface module (631), a memory (633) (e.g., a buffer memory), an image processing module (635), or a mapping module (637). The DDI (630) may receive image information, for example, image data or an image control signal corresponding to a command for controlling the image data, from another component of the electronic device (501) through the interface module (631). For example, according to one embodiment, image information may be received from a processor (520) (e.g., main processor (521) (e.g., application processor)) or an auxiliary processor (523) (e.g., graphics processing unit) that operates independently of the functions of the main processor (521). The DDI (630) may communicate with the touch circuit (650) or sensor module (576), etc., through the interface module (631). Additionally, the DDI (630) may store at least a portion of the received image information in memory (633), for example, in frame units. The image processing module (635) may perform preprocessing or postprocessing (e.g., resolution, brightness, or size adjustment) on at least a portion of the image data based at least on the characteristics of the image data or the characteristics of the display (610), for example. The mapping module (637) may generate voltage values ​​or current values ​​corresponding to the image data preprocessed or postprocessed through the image processing module (635). According to one embodiment, voltage values ​​or current The generation of values ​​can be performed, for example, based on at least some of the attributes of the pixels of the display (610) (e.g., array of pixels (RGB stripe or pentile structure), or size of each subpixel).At least some pixels of the display (610) are driven, for example, based on at least some of the voltage value or current value, so that visual information (e.g., text, image, or icon) corresponding to the image data can be displayed through the display (610).

[0088] According to one embodiment, the display module (560) may further include a touch circuit (650). The touch circuit (650) may include a touch sensor (651) and a touch sensor IC (653) for controlling the same. The touch sensor IC (653) may control the touch sensor (651) to detect a touch input or hovering input for a specific location on the display (610), for example. For example, the touch sensor IC (653) may detect a touch input or hovering input by measuring a change in a signal (e.g., voltage, light intensity, resistance, or charge) for a specific location on the display (610). The touch sensor IC (653) may provide information regarding the detected touch input or hovering input (e.g., location, area, pressure, or time) to the processor (520). According to one embodiment, at least a part of the touch circuit (650) (e.g., touch sensor IC (653)) may be included as part of the display driver IC (630) or the display (610), or as part of another component (e.g., auxiliary processor (523)) placed outside the display module (560).

[0089] According to one embodiment, the display module (560) may further include at least one sensor (e.g., fingerprint sensor, iris sensor, pressure sensor, or light sensor) of the sensor module (576) or a control circuit for the same. In this case, the at least one sensor or the control circuit for the same may be embedded in a part of the display module (560) (e.g., display (610) or DDI (630)) or a part of the touch circuit (650). For example, if the sensor module (576) embedded in the display module (560) includes a biometric sensor (e.g., fingerprint sensor), the biometric sensor may obtain biometric information (e.g., fingerprint image) associated with a touch input through a part of the display (610). As another example, if the sensor module (576) embedded in the display module (560) includes a pressure sensor, the pressure sensor may obtain pressure information associated with a touch input through a part or the entire area of ​​the display (610). According to one embodiment, a touch sensor (651) or a sensor module (576) may be placed between pixels of a pixel layer of a display (610), or on top of or below the pixel layer.

[0090] The technical problems to be solved in this disclosure are not limited to those mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art to which this disclosure belongs.

[0091] As described above, an electronic device (e.g., electronic device (100)) may include a display (e.g., display (105)) comprising a display panel (e.g., display panel (130)) and a display driving circuit (e.g., display driving circuit (120)), at least one processor (e.g., at least one processor (110)) comprising a processing circuit, and one or more storage media for storing one or more programs configured to be executed individually or collectively by said at least one processor, and a memory (e.g., memory (190)). The above one or more programs may include instructions for identifying the state of a signal transmitted from the display driving circuit to the at least one processor (e.g., a first state indicating that image transmission from the at least one processor to the display driving circuit is enabled and a second state indicating that image transmission is disabled), and for detecting a malfunction state of the display driving circuit based on identifying that the time period during which the state of the signal is maintained in the second state is longer than a reference time period (e.g., reference time period (311)) during which a scan for display through the display panel is performed.

[0092] The above one or more programs may include instructions for transmitting, based on the detection, a VSS (vertical sync start) packet and a data packet including an image maintained through the display panel, which follows the VSS packet, from the at least one processor to the display driving circuit.

[0093] The above VSS packet and the above data packet can be transmitted from the at least one processor to the display driving circuit independently of the above second state of the signal.

[0094] The above one or more programs may include instructions for transmitting a control command from the at least one processor to the display driving circuit to reset or initialize the display driving circuit based on the detection.

[0095] The at least one processor may include a central processing unit (CPU) including a processing circuit and a display processing unit (DPU) including a processing circuit. The one or more programs may include instructions for controlling the CPU to initialize the DPU in response to the detection, and for transmitting the control command from the DPU to the display driving circuit based on the initialization of the DPU.

[0096] The above one or more programs may include instructions for transmitting, based on the detection, a vertical sync start (VSS) packet and a data packet including an image maintained through the display panel following the VSS packet from the at least one processor to the display driving circuit, identifying that the detected malfunction state of the display driving circuit is maintained after transmitting the VSS packet and the data packet based on the identification that the time period longer than the reference time period is identified after transmitting the VSS packet and the data packet, and transmitting a control command to reset or initialize the display driving circuit from the at least one processor based on the identification that the detected malfunction state of the display driving circuit is maintained after transmitting the VSS packet and the data packet.

[0097] The above one or more programs may include instructions for stopping power supply to the display driving circuit based on the fact that the malfunction state of the display driving circuit is maintained after the control command is transmitted.

[0098] The display driving circuit may include a memory (e.g., memory (145)) configured to store an image that is displayed through the display panel and / or is to be displayed through the display panel.

[0099] The memory included in the display driving circuit may be enabled or disabled according to a control command transmitted from the at least one processor to the display driving circuit and / or a decision of the display driving circuit.

[0100] The above at least one processor and the display can support a video hybrid mode of MIPI (mobile industry processor interface) DSI (display serial interface).

[0101] The display driving circuit may be configured to transmit the signal to the at least one processor, set the state of the signal to the second state while the scan is performed by the display driving circuit, and change the state of the signal from the second state to the first state based on the completion of the scan.

[0102] The display driving circuit above may be configured to change the state of the signal from the first state to the second state in response to the start timing of the scan or the timing prior to the start timing of the scan.

[0103] The display driving circuit may be configured to maintain the state of the signal in the second state independently of the completion of the scan when the malfunction state of the display driving circuit is identified.

[0104] As described above, an electronic device (e.g., electronic device (100)) may include at least one processor (e.g., at least one processor (110)) including a processing circuit, and a display (e.g., display panel (130)) and a display driving circuit (e.g., display driving circuit (120)). The display driving circuit transmits to the at least one processor a signal (e.g., the state of the signal includes a first state indicating that the image transmission is enabled and a second state indicating that the image transmission is disabled) to indicate whether image transmission from the at least one processor to the display driving circuit is enabled or disabled, and while a scan for display through the display panel is performed by the display driving circuit, the state of the signal is set to the second state, and based on the completion of the scan, the state of the signal is changed from the second state to the first state, and when a malfunction state of the display driving circuit is identified, the state of the signal is changed to the second state independently of the completion of the scan. It can be configured to maintain.

[0105] The display driving circuit above may be configured to change the state of the signal from the first state to the second state in response to the start timing of the scan or the timing prior to the start timing of the scan.

[0106] The display driving circuit may include a memory (e.g., memory (145)) configured to store an image that is displayed through the display panel and / or is to be displayed through the display panel.

[0107] The memory included in the display driving circuit may be enabled or disabled according to a control command transmitted from the at least one processor to the display driving circuit and / or a decision of the display driving circuit.

[0108] The above at least one processor and the display can support a video hybrid mode of MIPI (mobile industry processor interface) DSI (display serial interface).

[0109] The method described above may be executed within an electronic device (e.g., electronic device (100)) comprising at least one processor (e.g., at least one processor (110)), and a display (e.g., display panel (130)) and a display driving circuit (e.g., display driving circuit (120)). The method may include an operation of identifying the state of a signal transmitted from the display driving circuit to the at least one processor (e.g., a first state indicating that image transmission from the at least one processor to the display driving circuit is enabled and a second state indicating that image transmission is disabled), and an operation of detecting a malfunction state of the display driving circuit based on identifying that the time period during which the state of the signal is maintained in the second state is longer than a reference time period during which a scan for display through the display panel is performed.

[0110] The above method may include, based on the detection, an operation of transmitting a VSS (vertical sync start) packet and a data packet following the VSS packet, which includes an image maintained through the display panel, from the at least one processor to the display driving circuit.

[0111] The effects obtainable from the present disclosure are not limited to those mentioned above, and other unmentioned effects will be clearly understood by those skilled in the art to which the present disclosure belongs.

[0112] The electronic device according to the various embodiments disclosed in this document may be of various forms. The electronic device may include, for example, a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a consumer electronics device. The electronic device according to the embodiments of this document is not limited to the devices described above.

[0113] The various embodiments of this document and the terms used therein are not intended to limit the technical features described in this document to specific embodiments, and should be understood to include various modifications, equivalents, or substitutions of said embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of said items unless the relevant context clearly indicates otherwise. In this document, phrases such as "A or B," "at least one of A and B," "at least one of A or B," "A, B or C," "at least one of A, B and C," and "at least one of A, B, or C" may each include any one of the items listed together in the corresponding phrase, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used simply to distinguish said components from other said components and do not limit said components in any other aspect (e.g., importance or order). Where any (e.g., 1st) component is referred to as “coupled” or “connected” to another (e.g., 2nd) component, with or without the terms “functionally” or “communicationly,” it means that said any component may be connected to said other component directly (e.g., via a wire), wirelessly, or through a third component.

[0114] The term “module” as used in the various embodiments of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit, for example. A module may be a component formed integrally, or a minimum unit of said component or a part thereof that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0115] Various embodiments of the present document may be implemented as software (e.g., program (540)) comprising one or more instructions stored in a storage medium (e.g., internal memory (536) or external memory (538)) readable by a machine (e.g., electronic device (501)). For example, a processor (e.g., processor (520)) of the machine (e.g., electronic device (501)) may call at least one of the one or more instructions stored from the storage medium and execute it. This enables the machine to operate to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code that can be executed by an interpreter. The storage medium readable by the machine may be provided in the form of a non-transitory storage medium. Here, 'non-temporary' simply means that the storage medium is a tangible device and does not contain a signal (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently and cases where it is stored temporarily.

[0116] According to one embodiment, the method according to the various embodiments disclosed herein may be provided as included in a computer program product. The computer program product may be traded between a seller and a buyer as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)), or distributed online (e.g., download or upload) through an application store (e.g., Play Store™) or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily created on a device-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

[0117] According to various embodiments, each component (e.g., module or program) of the components described above may include a singular or multiple entities, and some of the multiple entities may be separated and placed in other components. According to various embodiments, one or more of the components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Generally or additionally, multiple components (e.g., module or program) may be integrated into a single component. In this case, the integrated component may perform one or more functions of each of the multiple components in the same or similar manner as those performed by the corresponding component among the multiple components prior to integration. According to various embodiments, operations performed by the module, program, or other components may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

Claims

1. In an electronic device, A display including a display panel and a display driving circuit; At least one processor including a processing circuit; and The memory comprises one or more storage media for storing one or more programs configured to be executed individually or collectively by at least one processor, and The above one or more programs are, Identifying the state of a signal transmitted from the display driving circuit to the at least one processor, wherein the state of the signal includes a first state indicating that image transmission from the at least one processor to the display driving circuit is enabled and a second state indicating that image transmission is disabled; and For detecting a malfunction state of the display driving circuit based on identifying that the time period during which the state of the above signal is maintained in the second state is longer than the reference time period during which a scan for display through the display panel is performed, including instructions Electronic device.

2. In claim 1, the one or more programs are, Based on the above detection, for transmitting from the at least one processor to the display driving circuit a VSS (vertical sync start) packet and a data packet including an image maintained through the display panel, which follows the VSS packet. including instructions Electronic device.

3. In claim 2, the VSS packet and the data packet are, Independently of the second state of the above signal, transmitted from the at least one processor to the display driving circuit, Electronic device.

4. In claim 1, the one or more programs are, Based on the above detection, for transmitting a control command from the at least one processor to the display driving circuit to reset or initialize the display driving circuit, including instructions Electronic device.

5. In claim 4, the at least one processor is, It includes a CPU (central processing unit) including processing circuits, and a DPU (display processing unit) including processing circuits, and The above one or more programs are, In response to the above detection, the CPU is controlled to initialize the DPU, and Based on the initialization of the above DPU, for transmitting the control command from the DPU to the display driving circuit, including instructions Electronic device.

6. In claim 5, the one or more programs are, Based on the above detection, the at least one processor transmits to the display driving circuit a data packet including a VSS (vertical sync start) packet and an image maintained through the display panel, which follows the VSS packet. Based on the fact that the above time period, which is longer than the above reference time period, is identified after transmitting the VSS packet and the data packet, it is identified that the detected malfunction state of the display driving circuit is maintained after transmitting the VSS packet and the data packet, and Based on identifying that the detected malfunction state of the display driving circuit is maintained after transmitting the VSS packet and the data packet, for transmitting a control command from the at least one processor to the display driving circuit to reset or initialize the display driving circuit. including instructions Electronic device.

7. In claim 6, the one or more programs are, Based on the fact that the malfunction state of the display driving circuit is maintained after transmitting the control command, for stopping the supply of power to the display driving circuit, including instructions Electronic device.

8. In claim 1, the display driving circuit is, A memory configured to store an image that is displayed through the display panel and / or to be displayed through the display panel, Electronic device.

9. In claim 8, the memory included in the display driving circuit is, A control command transmitted from at least one processor to the display driving circuit and / or a determination of the display driving circuit that is enabled or disabled, Electronic device.

10. In claim 8, the at least one processor and the display are, Supporting the video hybrid mode of MIPI (mobile industry processor interface) DSI (display serial interface), Electronic device.

11. In claim 1, the display driving circuit is, Transmitting the signal to at least one processor, and While the above scan is performed by the display driving circuit, the state of the signal is set to the second state, and Based on completing the above scan, to change the state of the above signal from the second state to the first state, Constituting, Electronic device.

12. In claim 11, the display driving circuit is, In response to the start timing of the scan or the timing prior to the start timing of the scan, a reference time interval prior to the start timing of the scan, the state of the signal is changed from the first state to the second state. Further composed, Electronic device.

13. In claim 11, the display driving circuit is, When the malfunction state of the display driving circuit is identified, the state of the signal is maintained in the second state independently of the completion of the scan. Further composed, Electronic device.

14. A method executed in an electronic device comprising at least one processor and a display comprising a display panel and a display driving circuit, wherein An operation for identifying the state of a signal transmitted from the display driving circuit to the at least one processor, wherein the state of the signal includes a first state indicating that image transmission from the at least one processor to the display driving circuit is enabled and a second state indicating that image transmission is disabled; and The operation of detecting a malfunction state of the display driving circuit based on identifying that the time period during which the state of the above signal is maintained in the second state is longer than the reference time period during which a scan for display through the display panel is performed. method.

15. In Claim 14, Based on the above detection, the operation further comprises transmitting from at least one processor to the display driving circuit a VSS (vertical sync start) packet and a data packet including an image maintained through the display panel, which follows the VSS packet. method.

Images