Circuit board and semiconductor package
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- LG INNOTEK CO LTD
- Filing Date
- 2025-12-02
- Publication Date
- 2026-06-11
Smart Images
Figure KR2025020396_11062026_PF_FP_ABST
Abstract
Description
Circuit boards and semiconductor packages
[0001] The present embodiment relates to a circuit board and a semiconductor package.
[0002]
[0003] Recently, technologies related to electronic products such as AI and servers have been progressing toward multi-functionality and high speed. To respond to this trend, high-layer and large-area circuit board technologies are also developing rapidly to keep pace with the fast-advancing semiconductor chip manufacturing technology.
[0004] Furthermore, regarding mobile products such as smartphones and tablets, the thickness of circuit boards applied to miniaturize finished electronic products is also decreasing, and technologies related to multilayer circuit boards, which configure more circuit layers within a circuit board of the same thickness, are being actively researched. In addition, as the pitch of semiconductor chips narrows and the size of chips increases, chiplet technology for separating semiconductor chips by function is being researched. Moreover, technologies for connecting separated chiplets on circuit boards are being actively researched. Furthermore, by connecting semiconductor chips with different functions on circuit boards, technologies regarding the connection relationship between circuit boards and semiconductor chips are being actively researched, such as the circuit board connecting semiconductor chips to one another, which was previously considered only from the perspective of conventional semiconductor packaging.
[0005] A circuit board is formed by printing circuit line patterns using a conductive material, such as copper, onto an electrically insulating substrate; it is a general term for a board immediately before electronic components are mounted. To densely mount many different types of electronic components on a flat surface, the mounting positions of each component are determined, and circuit patterns connecting the components are printed on the surface of the flat plate to secure them.
[0006] A circuit board includes a plurality of insulating layers arranged in a vertical direction, wiring portions arranged on the surface of each of the plurality of insulating layers, and via portions connecting different wiring portions. In this case, via holes for arranging via portions may be formed in each of the plurality of insulating layers.
[0007] Circuit boards according to conventional technology have the problem of low productivity because a processing process for via holes is required to arrange vias for electrical connection between different wiring sections.
[0008]
[0009] The present invention provides a circuit board and a semiconductor package that improve productivity by securing a placement space for a connecting wiring section for electrical connection of multiple wiring sections without processing via holes.
[0010]
[0011] A circuit board according to the present embodiment comprises: a first build-up layer; a second build-up layer disposed on the first build-up layer and including a through hole; a first wiring portion disposed on the first build-up layer and superimposed in a vertical direction with respect to the through hole; a second wiring portion disposed on the second build-up layer and offset in a vertical direction with respect to the through hole; and a connecting wiring portion connecting the first wiring portion and the second wiring portion, wherein the connecting wiring portion comprises an upper portion disposed on the second build-up layer; a lower portion disposed on the first build-up layer; and a connecting portion connecting the upper portion and the lower portion and disposed on the inner wall of the through hole.
[0012] The inner wall of the through hole and the upper surface of the first build-up layer may have an angle of 50 degrees or less.
[0013] The material of the insulating layer of the first build-up layer and the material of the insulating layer of the second build-up layer may be different.
[0014] The material of the insulating layer of the first build-up layer is prepreg (PPG), and the material of the insulating layer of the second build-up layer may be photoimageable dielectric (PID).
[0015] The second build-up layer may include a plurality of insulating layers arranged in a vertical direction.
[0016] The insulating layer of the second build-up layer includes a second insulating layer including a first through-hole and a third insulating layer including a second through-hole disposed on the second insulating layer and overlapping in a vertical direction with respect to the first through-hole, and the connecting portion may be disposed along the inner wall of the first through-hole and the inner wall of the second through-hole.
[0017] The inclination angle of the inner wall of the first through hole and the inclination angle of the inner wall of the second through hole are different from each other, and the connecting part may have multiple regions with different inclination angles.
[0018] The insulating layer of the second build-up layer includes a second insulating layer including a first through-hole and a third insulating layer disposed on the second insulating layer and including a second through-hole that overlaps in a vertical direction with the first through-hole, and the connecting portion is disposed along the inner wall of the first through-hole and the upper portion can penetrate the inner wall of the second through-hole.
[0019] The upper surface of the first build-up layer includes a first surface that is superimposed in a vertical direction with respect to the through hole, and the first surface may include a plurality of protruding surfaces spaced apart from each other.
[0020] A semiconductor package according to the present embodiment comprises: a first build-up layer; a second build-up layer disposed on the first build-up layer and including a through hole; an electronic element disposed in the through hole; a first wiring portion disposed on the first build-up layer and superimposed in a vertical direction with respect to the through hole; a second wiring portion disposed on the second build-up layer and offset in a vertical direction with respect to the through hole; and a connecting wiring portion connecting the first wiring portion and the second wiring portion, wherein the connecting wiring portion comprises an upper portion disposed on the second build-up layer; a lower portion disposed on the first build-up layer; and a connecting portion connecting the upper portion and the lower portion and disposed on the inner wall of the through hole.
[0021]
[0022] Through this embodiment, a plurality of wiring sections can be connected through a connecting wiring section arranged along the inner wall of the cavity, so there is an advantage of improving productivity by eliminating via sections.
[0023]
[0024] FIG. 1 is a cross-sectional view of a circuit board according to an embodiment of the present invention.
[0025] FIG. 2 is a plan view showing the upper surface of a second build-up layer according to an embodiment of the present invention.
[0026] FIG. 3 is an enlarged drawing illustrating the connection structure of a plurality of wiring sections through a connecting wiring section according to an embodiment of the present invention.
[0027] FIG. 4 is a cross-sectional view of a semiconductor package according to an embodiment of the present invention.
[0028] FIGS. 5 to 9 are drawings illustrating the arrangement structure of a connecting wiring section according to various embodiments of the present invention.
[0029]
[0030]
[0031] The present invention is susceptible to various modifications and may have various embodiments, and specific embodiments are illustrated and described in the drawings. However, this does not specify the present invention.
[0032] It should be understood that the embodiments are not intended to be limited and include all modifications, equivalents, and substitutions that fall within the spirit and scope of the invention.
[0033] However, the technical concept of the present invention is not limited to some of the described embodiments but can be implemented in various different forms, and within the scope of the technical concept of the present invention, one or more of the components among the embodiments may be selectively combined or substituted.
[0034] In addition, terms used in the embodiments of the present invention (including technical and scientific terms) shall be interpreted in a meaning generally understood by those skilled in the art to which the present invention pertains, unless explicitly and specifically defined otherwise. Commonly used terms, such as those defined in a dictionary, shall be interpreted in consideration of their contextual meaning as described in the present invention. If a commonly used term defined in a dictionary does not match the meaning it has in the context of the description of the present invention, it shall be interpreted in accordance with the meaning it has in the context of the description of the present invention. Furthermore, even if not explicitly defined in this application, it shall not be interpreted in an ideal or overly formal sense based on the description of the present invention.
[0035] Furthermore, the terms used in the embodiments of the present invention are for describing the embodiments and are not intended to limit the present invention. In this specification, the singular form may include the plural form unless specifically stated otherwise in the text.
[0036] Terms containing ordinal numbers, such as "first," "second," etc., may be used to describe various components, but the meaning of the components is not limited by the ordinal numbers. Terms containing ordinal numbers are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the second component may be named the first component, and similarly, the first component may be named the second component. Furthermore, if the meaning of the component does not depart from the scope of the present invention even without ordinal numbers such as "first" and "second," the component may be referred to by excluding the ordinal number.
[0037] The term "and / or" includes a combination of multiple related listed items or any of the multiple related listed items. Such a term is used merely to distinguish a component from other components and is not limited by the nature, order, sequence, etc. of the component.
[0038] In this application, terms such as “comprising,” “provided,” and “having” are intended to specify the existence of the features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, and should be understood as not excluding in advance the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.
[0039] When referring to directions, vertical and horizontal directions are used for convenience of explanation. Additionally, the horizontal direction may include a first horizontal direction perpendicular to the vertical direction, and a second horizontal direction perpendicular to the first horizontal direction and the vertical direction. Furthermore, if the vertical and horizontal directions follow a Cartesian coordinate system, they may correspond to the first horizontal direction (X-axis), the second horizontal direction (Y-axis), and the vertical direction (Z-axis), respectively; if they follow a cylindrical coordinate system, the first horizontal direction may refer to the azimuth (Φ) direction (or circumferential direction), and the second horizontal direction may refer to the radius (ρ) direction (or centrifugal direction) separated from a specific configuration; and if they follow a spherical coordinate system, the first horizontal direction may refer to the azimuth (Φ) direction (or circumferential direction), and the second horizontal direction may refer to the radius (r) direction (or centrifugal direction) separated from a specific configuration. In particular, the vertical direction may refer to the polar angle (θ) direction formed by the second horizontal direction and the Z-axis. For convenience of explanation, the first horizontal direction, the second horizontal direction, and the vertical direction may be used by combining the Cartesian coordinate system, the cylindrical coordinate system, and the spherical coordinate system described above. However, unless otherwise specified, the vertical direction refers to the Z-axis according to the Cartesian coordinate system, and the horizontal direction refers to any direction that can be defined on the XY plane; when referring to the first horizontal direction and the second horizontal direction perpendicular to the first horizontal direction, the first horizontal direction refers to the X-axis and the second horizontal direction refers to the Y-axis.
[0040] Furthermore, when described as being formed or placed "above or below" each component, "above" or "below" includes not only cases where two components are in direct contact with each other, but also cases where one or more other components are formed or placed between the two components. Additionally, when expressed as "above or below," it may include the meaning of a downward direction as well as an upward direction relative to a single component.
[0041] Furthermore, the meaning that Configuration A is positioned between Configuration B and Configuration C may include the meaning that Configuration A is positioned such that at least a portion of it overlaps with Configurations B and C in the horizontal and / or vertical directions. Unless otherwise noted, even if Configuration C is located between a virtual line extending vertically and / or horizontally from Configuration A and a virtual line extending vertically and / or horizontally from Configuration B, the meaning may include that Configuration C is positioned between Configuration A and Configuration B.
[0042] Furthermore, the statement that Configuration A is exposed from Configuration B should be understood as meaning that Configuration A is exposed from Configuration B, not that Configuration A is exposed from the entire product; and unless there are special circumstances, it should not be understood as meaning that the entirety of Configuration A is covered by Configuration B. In other words, when Configuration A is stated to be exposed from Configuration B, it should be understood to mean that Configuration C, in addition to Configurations A and B, covers Configuration A exposed from Configuration B.
[0043] Additionally, where it is stated that a component is 'connected,' 'combined,' 'connected,' or 'contacted' with another component, this may include not only cases where the component is directly connected, combined, or connected to the other component, but also cases where it is 'connected,' 'combined,' or 'connected' due to another component located between the component and the other component. Accordingly, if component A is to be understood only as being directly 'connected,' 'combined,' 'connected,' or 'contacted' with component B, it is described as being 'directly connected,' 'directly combined,' 'directly connected,' or 'directly contacted.'
[0044] In addition, when it is stated that configuration A is 'fixed' to configuration B, it should be understood that configuration A is indirectly fixed to configuration B through configuration C and / or configuration D, etc., unless otherwise specifically mentioned, considering the function and purpose to be solved, and in cases where configuration A is to be understood only as being 'directly fixed' to configuration B, it is stated as being 'directly fixed'.
[0045] In addition, when described as “flat” or “located on the same plane,” it should not be interpreted according to the dictionary definition, but rather understood by a person with ordinary knowledge in the relevant technical field to the extent that process deviations are taken into account.
[0046] FIG. 1 is a cross-sectional view of a circuit board according to an embodiment of the present invention, FIG. 2 is a plan view showing the upper surface of a second build-up layer according to an embodiment of the present invention, FIG. 3 is an enlarged view showing the connection structure of a plurality of wiring sections through a connecting wiring section according to an embodiment of the present invention, and FIG. 4 is a cross-sectional view of a semiconductor package according to an embodiment of the present invention.
[0047] Referring to FIGS. 1 to 4, a circuit board (10) according to an embodiment of the present invention may include a first build-up layer (100), a second build-up layer (110), and a third build-up layer (120). The first build-up layer (100), the second build-up layer (110), and the third build-up layer (120) may be arranged along a vertical direction. With respect to the first build-up layer (100), the second build-up layer (110) may be arranged on one side of the first build-up layer (100), and the third build-up layer (120) may be arranged on the other side of the first build-up layer (100). For example, the second build-up layer (110) may be arranged on the upper surface of the first build-up layer (100), and the third build-up layer (120) may be arranged on the lower surface of the first build-up layer (100).
[0048] The circuit board (10) may include a first build-up layer (100). The first build-up layer (100) may include a plurality of insulating layers stacked along a vertical direction. For example, the plurality of insulating layers of the first build-up layer (100) may include a sixth insulating layer (106), a fifth insulating layer (105) disposed on the sixth insulating layer (106), a fourth insulating layer (104) disposed on the fifth insulating layer (105), and a first insulating layer (101) disposed on the fourth insulating layer (104). The first insulating layer (101) may face the second build-up layer (110) in a vertical direction, and the sixth insulating layer (106) may face the third build-up layer (120) in a vertical direction.
[0049] The circuit board (10) may include a second build-up layer (110). The second build-up layer (110) may include at least one insulating layer. For example, the insulating layer of the second build-up layer (110) may include a second insulating layer (102). The second insulating layer (102) may be placed on the first insulating layer (101) of the first build-up layer (100). In FIG. 1, the insulating layer constituting the second build-up layer (110) is described as having one layer, but this is not limited thereto, and the insulating layer constituting the second build-up layer (110) may be a plurality of layers arranged in a vertical direction as shown in FIG. 5 to FIG. 9. For example, when the second build-up layer (110) is a plurality of layers, as illustrated in FIGS. 5 to 9, the second build-up layer (110) may further include a third insulating layer (103) disposed on the second insulating layer (102).
[0050] The circuit board (10) may include a third build-up layer (120). The third build-up layer (120) may include at least one insulating layer. For example, the insulating layer of the third build-up layer (120) may include a seventh insulating layer (107). The seventh insulating layer (107) may be placed on the lower surface of the sixth insulating layer (106) of the first build-up layer (100). In this embodiment, the insulating layer constituting the third build-up layer (130) is described as having one layer, but this is not limited thereto, and the insulating layer constituting the third build-up layer (120) may be a plurality of layers arranged in a vertical direction as shown in FIGS. 5 to 9. For example, when the second build-up layer (120) is a plurality of layers, as shown in FIGS. 5 to 9, the third build-up layer (120) may further include an eighth insulating layer (108) disposed on the lower surface of the seventh insulating layer (107).
[0051] The first insulating layer and the fourth to eighth insulating layers (101, 104, 105, 106, 107, 108) may each be a thermosetting insulator. As the thermosetting insulator, an insulator in which inorganic and / or organic fillers are dispersed within a resin, such as ABF (Ajinomoto Build-up Film), a product released by Ajinomoto, may be used, and a prepreg (PPG) containing glass fibers within a resin may be used. In addition, the resins described above may be, for example, epoxy resin, bismaleimide triazine resin (BT resin), phenolic resin, etc., and the inorganic and / or organic fillers may be provided with materials such as silica or plastic. When an insulating resin is used as a core, it may include a reinforcing material provided with glass fibers or aramid fibers.
[0052] Some of the insulating layers among the plurality of insulating layers may have a material different from that of other insulating layers. For example, the second insulating layer (102) and the third insulating layer (103) may be provided with a photocurable insulating material. The second insulating layer (102) and the third insulating layer (103) may each be a PID (Photo Imageable Dielectric). Compared to manufacturing the cavity (150) using a drill bit and / or laser process, using a photocurable insulating material can provide a significant advantage in manufacturing process costs for manufacturing a cavity (150) with a large surface area. In addition, the electrodes placed on the bottom surface of the cavity (150) can be freely designed, which can be advantageous for flip-bonding electronic devices such as semiconductor devices. Therefore, the overall thickness of the semiconductor package is reduced, and the electrical operation of the semiconductor device can be further improved by increasing the number of bonded terminals compared to wire-bonding the semiconductor device placed within the cavity.
[0053] The insulating layer constituting the first build-up layer (100) may be a thermosetting insulating layer. The first insulating layer (101), the fourth insulating layer (104), the fifth insulating layer (105), and the sixth insulating layer (106) constituting the first build-up layer (100) may each be a prepreg (PPG) containing glass fibers in a resin.
[0054] Accordingly, the strength of the circuit board (10) can be reinforced through the first insulating layer (101), the fourth insulating layer (104), the fifth insulating layer (105), and the sixth insulating layer (106) positioned in the center based on the vertical direction, thereby minimizing bending.
[0055] As a variation example, the seventh insulating layer (107) and the eighth insulating layer (108) constituting the third build-up layer (120) may also be photocurable insulating layers. The seventh insulating layer (107) and the eighth insulating layer (108) may be PID (Photo Imageable Dielectric). Accordingly, a fine pattern of a plurality of wiring portions and via portions for connecting the plurality of wiring portions can be realized on the surface of the circuit board (10).
[0056] The vertical thickness of each of the plurality of insulating layers constituting the first build-up layer (100) may be thicker than the vertical thickness of each of the insulating layers constituting the second build-up layer (110) or the third build-up layer (120). Accordingly, the bending of the circuit board (10) can be minimized.
[0057] To ensure the integrity of signal and / or power transmission or to alleviate bending of the circuit board (10), the number of insulating layers of the second build-up layer (110) and the number of insulating layers of the third build-up layer (120) may be the same, but are not limited thereto and may be different from each other.
[0058] The circuit board (10) may include a protective layer (190, 196, see FIG. 5). The protective layer (190, 196) may include a first protective layer (190) disposed on the second build-up layer (110) and a second protective layer (196) disposed on the lower surface of the third build-up layer (120). When a semiconductor device is disposed on the surface of the circuit board (10) using a material such as solder, the first protective layer (190) and the second protective layer (196) can perform the function of preventing short circuits between solders due to low wettability with the solder, and can prevent the problem of external contaminants penetrating into the build-up structure and reducing reliability. The first protective layer (190) and the second protective layer (196) may each be a solder resist.
[0059] The first protective layer (190) may include a hole (191, see FIG. 5) for exposing a wiring portion placed on the second build-up layer (120) upward. The hole (191) may have a shape in which the horizontal width narrows as it approaches the second build-up layer (110). The first protective layer (190) may include a through hole that overlaps vertically with the cavity (150) to be described later. However, the through hole may be omitted when a part of the first protective layer (190) buries the cavity (150).
[0060] The second protective layer (196) may include a hole (197, see FIG. 5) for exposing a wiring portion disposed on the lower surface of the third build-up layer (120) downward. The hole (197) of the second protective layer (196) may have a shape in which the horizontal width becomes narrower as it approaches the third build-up layer (120).
[0061] Although not illustrated, the protective layer (190, 196) and the second build-up layer (110), and the protective layer (190, 196) and the third build-up layer (120) can each be implemented with a bonding structure through protrusions and grooves, and the protrusions and grooves are each placed at the bonding interface between the protective layer (190, 196) and the second build-up layer (110), and between the protective layer (190, 196) and the third build-up layer (120), thereby increasing the bonding strength.
[0062] When the insulating layer constituting the second build-up layer (110) or the third build-up layer (120) includes a filler, the filler of the second build-up layer (110) or the third build-up layer (120) may have at least a portion protruding from the surface and having a surface that is combined with the protective layer (190, 196).
[0063] A circuit board (10) may include a cavity. The cavity may be placed on the upper surface of the circuit board (10). The cavity may be placed in a second build-up layer (110). The second build-up layer (110) may include a through hole (150) that forms the cavity. The through hole (150) may have a shape that penetrates from one side of the second build-up layer (110) to the other side. The through hole (150) may have a shape in which the horizontal width gradually decreases as it faces the first build-up layer (100). As shown in FIG. 1, when the second build-up layer (110) includes a second insulating layer (102), the through hole (150) may have a shape that penetrates from the upper surface of the second insulating layer (102) to the lower surface. In this case, the cavity may be realized by the through hole (150).
[0064] As illustrated in FIG. 5, when the second build-up layer (110) includes a second insulating layer (102) and a third insulating layer (103), the through hole (150) may include a first through hole penetrating from the upper surface to the lower surface of the second insulating layer (102) and a second through hole penetrating from the upper surface to the lower surface of the third insulating layer (102). The first through hole and the second through hole may be arranged so that at least a portion overlaps in the vertical direction. In this case, a cavity may be formed by the first through hole and the second through hole.
[0065] A portion of the upper surface of the first build-up layer (100) may be exposed vertically from the second build-up layer (110) through the cavity. The cavity may form a placement area for an electronic device (1000, see FIG. 4) to be described later. In this case, a portion of the upper surface of the first insulating layer (101) may be provided as the bottom surface of the cavity to form a placement surface for the electronic device (1000).
[0066] The through hole (150) of the second build-up layer (110), which is the cavity formation area, may have a shape in which the horizontal width gradually decreases as it faces the first build-up layer (100). Accordingly, the inner wall of the through hole (150) of the second build-up layer (110) may have an inclined surface shape. For example, the inner wall of the through hole (150) of the second build-up layer (110) may form an obtuse angle with the upper surface of the first build-up layer (100) that forms the bottom surface of the cavity.
[0067] Cavities and through holes are each provided in multiple numbers within the circuit board (10) and can be arranged spaced apart from each other along the horizontal direction of the circuit board (10).
[0068] A circuit board (10) may include a circuit layer for transmitting electrical signals and / or power to an electronic device such as a semiconductor chip. The circuit layer may be disposed between a plurality of insulating layers and a plurality of insulating layers. The circuit layer may include a plurality of wiring portions and a plurality of via portions.
[0069] A plurality of wiring sections may each be disposed on the surface of a plurality of insulating layers. Here, the meaning of being disposed on the surface may also include the meaning that at least a portion of the plurality of wiring sections is embedded within each of the plurality of insulating layers or protective layers and exposed to the outside from the surface. A wiring section may also be referred to as a metal layer. Furthermore, the surface of the plurality of insulating layers includes a first surface, a second surface, and a side between the first surface and the second surface. Here, the first surface of the insulating layer may be understood as the upper surface, and the second surface of the insulating layer may be understood as the lower surface. The meaning of a wiring section being disposed on the surface is that it is disposed on at least one of the first surface, the second surface, or the side between the plurality of insulating layers. A structure may be formed in which wiring sections are disposed on both the first surface and the second surface of some of the insulating layers, and wiring sections are disposed on only one of the first surface or the second surface of other parts of the plurality of insulating layers.
[0070] A plurality of wiring sections may include a first wiring section (111) disposed on a first insulating layer (101), a second wiring section (112) disposed on a second insulating layer (102), a fourth wiring section (114) disposed on a fourth insulating layer (104), a fifth wiring section (115) disposed on a fifth insulating layer (105), a sixth wiring section (116) disposed on the lower surface of the fifth insulating layer (105), a seventh wiring section (117) disposed on the lower surface of the sixth insulating layer (106), and an eighth wiring section (118) disposed on the lower surface of the seventh insulating layer (107). Additionally, the wiring section may include a pad section for connecting to a via section.
[0071] As illustrated in FIG. 5, when the second build-up layer (110) and the third build-up layer (120) each further include a third insulating layer (103) and an eighth insulating layer (108), the plurality of wiring sections may further include a third wiring section (113) disposed on the third insulating layer (103) and a ninth wiring section (119) disposed on the lower surface of the eighth insulating layer (108).
[0072] The second wiring section (112) and the third wiring section (113) placed in the second build-up layer (110) may each be arranged so as to be offset in a vertical direction from the through hole (150). The second wiring section (112) and the third wiring section (113) may each overlap in a horizontal direction from the through hole (150).
[0073] The via may be a metallic material disposed in a via hole formed in each of a plurality of insulating layers to connect a plurality of wiring portions facing each other in a vertical direction. Here, the via hole penetrates at least a portion of each of the plurality of insulating layers in a vertical direction, and a via may be disposed within the via hole.
[0074] The via section may include a first via section (123) penetrating at least a portion of the first insulating layer (101), a second via section penetrating at least a portion of the second insulating layer (102), a fourth via section (124) penetrating at least a portion of the fourth insulating layer (104), a fifth via section (125) penetrating at least a portion of the fifth insulating layer (105), a sixth via section (126) penetrating at least a portion of the sixth insulating layer (106), and a seventh via section (127) penetrating at least a portion of the seventh insulating layer (107).
[0075] As illustrated in FIG. 5, when the second build-up layer (110) and the third build-up layer (120) each further include a third insulating layer (103) and an eighth insulating layer (108), the via portion may further include a third via portion penetrating at least a portion of the third insulating layer (103) and an eighth via portion (128) penetrating at least a portion of the eighth insulating layer (108).
[0076] The second via and third via sections, which overlap at least partially with the cavity or through hole (150) in the horizontal direction, may each be omitted. This will be described later.
[0077] The first via section (123) can electrically connect the first wiring section (111) and the fourth wiring section (114). The second via section can electrically connect the first wiring section (111) and the second wiring section (112). The third via section can electrically connect the second wiring section (112) and the third wiring section (113). The fourth via section (124) can electrically connect the fourth wiring section (114) and the fifth wiring section (115). The fifth via section (125) can electrically connect the fifth wiring section (115) and the sixth wiring section (116). The sixth via section (126) can electrically connect the sixth wiring section (116) and the seventh wiring section (117). The 7th via (127) can electrically connect the 7th wiring section (117) and the 8th wiring section (118). The 8th via (128) can electrically connect the 8th wiring section (118) and the 9th wiring section (119).
[0078] The first via section (123), the second via section, the third via section, and the fourth via section (124) may each have a shape in which the horizontal width decreases as it goes downward. The fifth via section (125), the sixth via section (126), the seventh via section (127), and the eighth via section (128) may each have a shape in which the horizontal width decreases as it goes upward. The expansion direction of the via section within the circuit board (10) may be reversed within the first build-up layer (100) made of prepreg. Accordingly, stress can be distributed in the vertical direction of the circuit board (10) by the structure of the reversed expansion direction of the via section at the vertical center of the circuit board (10).
[0079] The first wiring section (111) disposed on the first insulating layer (101) may also be disposed on the bottom surface of the cavity. In this case, the first wiring section (111) disposed on the bottom surface of the cavity may be named the first wiring section (160) by a different reference numeral. The first wiring section (160) may be disposed so as to overlap vertically with the through hole (150). The first wiring section (160) may be exposed above the second build-up layer (110) through the through hole (150). The first wiring section (160) may be electrically connected to an electronic element (1000) to be described later. The first wiring section (160) may be disposed on the first insulating layer (101) of the first build-up layer (100). The first wiring section (160) can be electrically connected to the fourth wiring section (114) through a via that penetrates the first insulating layer (101). The first wiring section (160) can be spaced horizontally apart from the inner wall of the cavity. Accordingly, damage to the electronic device caused by the inner wall can be minimized during the bonding process of the electronic device on the first wiring section (160). In addition, when the electronic device is bonded to the wiring section (160) through an adhesive member (not shown) such as a DAF (Die Attach Film), a space can be secured through the gap between the inner wall of the cavity and the first wiring section (160) to allow for the formation of a bubble between the adhesive member and the electronic device.
[0080] The first wiring section (160) is provided in multiple numbers and can be spaced apart along the horizontal direction from the bottom surface of the cavity.
[0081] As illustrated in FIGS. 1 to 3, the circuit board (10) may include a connecting wiring section (130). The connecting wiring section (130) may electrically connect a first wiring section (160) disposed on the bottom surface of the cavity and a second wiring section (112) disposed on the second build-up layer (110). At least a portion of the connecting wiring section (130) may be disposed on the inner wall (152) of the through hole (150).
[0082] For example, the connecting wiring section (130) may include an upper section (132) disposed on the second build-up layer (110), a lower section (134) disposed on the first build-up layer (100), and a connecting section (136) disposed on the inner wall (152) of the through hole (150). The upper section (132) and the lower section (134) may be arranged in a stepped manner in the vertical direction. The upper section (132) and the lower section (134) may be arranged in a staggered manner in the horizontal direction. The upper section (132) may be arranged to overlap horizontally with the second wiring section (112) disposed on the second build-up layer (110). The lower section (134) may be arranged to overlap horizontally with the first wiring section (160) disposed on the first build-up layer (100).
[0083] The connecting portion (136) may be positioned on the inner wall (152) of the through hole (150). The connecting portion (136) may be positioned at an angle to the upper surface of the first insulating layer (101) to correspond to the inclined shape of the inner wall (152). For example, if the bottom surface of the cavity and the inner wall (152) form an obtuse angle, the connecting portion (136) may also form an obtuse angle to the bottom surface of the cavity. If the bottom surface of the cavity and the inner wall (152) form an acute or right angle, the connecting portion (136) may also form an acute or right angle to the bottom surface of the cavity.
[0084] As illustrated in FIG. 2, when a plurality of second wiring sections (112) are arranged on the second build-up layer (110), a plurality of connecting wiring sections (130) are also provided and can be arranged along the perimeter of the cavity.
[0085] According to the above structure, a plurality of wiring sections can be connected through a connecting wiring section (130) arranged along the inner wall of the cavity, so via sections can be omitted. Specifically, a via hole penetrating the insulating layer must be formed for electrical connection of a plurality of wiring sections arranged in a vertical direction, but according to the present embodiment, a plurality of wiring sections can be electrically connected without forming a via hole penetrating the second build-up layer (110), so productivity can be improved.
[0086] In addition, there is an advantage that a fine pattern can be implemented through an electrical connection structure via a plurality of connecting wiring sections (130) arranged along the perimeter of the inner wall of the cavity.
[0087] In addition, by implementing the insulating layer constituting the second build-up layer (110) as a photocurable insulating layer, such as a PID (Photo Imageable Dielectric), the shape of the inner wall (152) of the cavity can be varied, which has the advantage of allowing the connection between the connecting wiring part (130) and the inner wall (152) to be more stably formed. For example, the inner wall (152) of the through hole (150) forming the inner wall of the cavity can form an angle of 50 degrees or less with the upper surface of the first build-up layer (100). If the angle between the inner wall (152) of the through hole (150) and the upper surface of the first build-up layer (100) exceeds 50 degrees, the plating process for forming the connecting part (136) is difficult, and delamination between the connecting part (136) and the inner wall (152) may occur due to the high angle.
[0088] When the insulating layer constituting the second build-up layer (110) is prepreg (PPG), it is difficult to form the connecting wiring section (130) because the angle formed by the inner wall and bottom surface of the cavity cannot be reduced by processing the cavity using a laser drilling method. In addition, when the insulating layer constituting the second build-up layer (110) is prepreg (PPG), glass fibers may be exposed from the inner wall of the cavity, so not only is it difficult to form the connecting wiring section (130), but signal transmission through the connecting wiring section (130) may also be lost.
[0089] Meanwhile, in this embodiment, only the electrical connection structure of the first wiring section (160) and the second wiring section (112) that are stepped in the vertical direction is described as an example, but this is not limited thereto, and the connecting wiring section (130) may be arranged to connect a plurality of first wiring sections (111, 160). In this case, the connecting wiring section (130) may be arranged to penetrate the inner wall (152) of the through hole (150), and may electrically connect the wiring section (160) that is vertically superimposed with the through hole (150) and the wiring section (111) that is vertically offset.
[0090] Additionally, although not illustrated, the first wiring section (160) disposed on the bottom surface of the cavity may be connected in a horizontal direction to the first wiring section (111) which is vertically superimposed with the second insulating layer (102). In this case, the circuit board (10) may additionally include a connecting wiring section that connects the first wiring section (160) disposed on the bottom surface of the cavity and the first wiring section (111) which is vertically superimposed with the second insulating layer (102). The connecting wiring section is disposed to penetrate the inner wall (152) of the through hole (150) so as to connect a plurality of first wiring sections (111) in a horizontal direction.
[0091] Referring to FIG. 4, a semiconductor package according to an embodiment of the present invention may include an electronic element (1000) disposed in a cavity. The electronic element (1000) may be coupled on a first wiring portion (160).
[0092] A protective layer (191) may be disposed on the second build-up layer (110). In this case, the protective layer (191) may include a base (193) disposed on the second build-up layer (110) and a protrusion (194) protruding vertically from the base (193). The protrusion (194) may be disposed in a through hole (150). An electronic element (1000) may be embedded in the cavity through the protrusion (194). The protrusion (194) may come into contact with at least a portion of the connecting wiring portion (130) disposed in the cavity. The protrusion (194) may be disposed to surround the connecting portion (136) of the connecting wiring portion (130).
[0093] Meanwhile, in the circuit board (10) according to an embodiment of the present invention, the shape of the cavity can be varied by the material characteristics of the insulating layer constituting the second build-up layer (110). Hereinafter, various arrangement structures of the connecting wiring portion (130) according to various structures of the second build-up layer (110) will be described.
[0094] FIGS. 5 to 9 are drawings illustrating the arrangement structure of a connecting wiring section according to various embodiments of the present invention.
[0095] Referring to FIG. 5, as described above, the insulating layer constituting the second build-up layer (110) may be a plurality of layers. For example, the second build-up layer (110) may include a second insulating layer (102) disposed on the first insulating layer (101) of the first build-up layer (100), and a third insulating layer disposed on the second insulating layer (102). The cavity of the circuit board (10) may be implemented by a first through-hole penetrating the second insulating layer (102) and a second through-hole penetrating the third insulating layer (103).
[0096] The wiring portion of the second build-up layer (110) may include a second wiring portion (112) disposed on the second insulating layer (102) and a third wiring portion (113) disposed on the third insulating layer (103).
[0097] The connecting wiring section (130) may include an upper section (132) disposed on the third insulating layer (103), a lower section (134) disposed on the first insulating layer (101), and a connecting section (136) disposed on the inner wall of the through hole. In this case, the connecting section (136) may be disposed along the inner wall of the first through hole and the inner wall of the second through hole. The connecting section (135) may include an area in which at least a portion has an angle of inclination equal to the angle of inclination of the inner wall of the first through hole. The connecting section (135) may include an area in which at least a portion has an angle of inclination equal to the angle of inclination of the inner wall of the second through hole. When the angle of inclination of the inner wall of the first through hole and the angle of inclination of the inner wall of the second through hole are the same, the angle of inclination of the connecting section (135) may have a uniform angle of inclination over the entire area. In contrast, if the angle of inclination of the inner wall of the first through hole and the angle of inclination of the inner wall of the second through hole are different, the connecting part (135) may include a plurality of regions with different angles of inclination.
[0098] Meanwhile, since the third wiring section (113) and the first wiring section (160) can be electrically connected through the connecting wiring section (130), the second via section penetrating the second insulating layer (102) and the third via section penetrating the third insulating layer (103) can be omitted.
[0099] Referring to FIG. 6, the connecting wiring section (130) may be arranged to electrically connect the second wiring section (112) and the first wiring section (160). In this case, the connecting wiring section (130) may be arranged so that at least a portion penetrates the inner wall of the second through hole. Accordingly, the second via section penetrating the second insulating layer (102) may be omitted, and the second wiring section (112) may be electrically connected to the third wiring section (113) by a third via section penetrating the third insulating layer (103). In this modified example, the difference is that the signal transmission length through the connecting wiring section (130) may be reduced.
[0100] Referring to FIGS. 7 and 8, the upper surface of the first build-up layer (100), i.e., the upper surface of the first insulating layer (101), may include a first surface (170) that overlaps along the vertical direction with the through hole (150) and a second surface (172) that is offset in the vertical direction with respect to the through hole (150). The first surface (170) may form the bottom surface of the cavity. The first surface (170) may be exposed upward through the through hole (150). A second build-up layer (110) may be disposed on the second surface (172). A second insulating layer (102) may be laminated on the second surface (172).
[0101] The first surface (170) may include a plurality of protruding surfaces (174). Each of the plurality of protruding surfaces (174) may have a shape that protrudes vertically from the first surface (170). Each of the plurality of protruding surfaces (174) may have a shape that protrudes vertically upward from the first surface (170). The protruding surfaces (174) may be arranged in a stepped manner vertically from the first surface (170).
[0102] The first surface (170) and the protruding surface (174) may have shapes that are distinct from each other through a desmearing process after the formation of the cavity. The first surface (170) may be an area where the resin of the insulating layer constituting the first build-up layer (100) is lost due to chemicals according to the desmearing process. When viewed from the top of the cavity, the placement area of the first surface (170) among the bottom surfaces of the cavity may have a concave groove (171) structure from the protruding surface (174). The groove (171) may be placed on the outside of the protruding surface (174). The groove (171) may be placed along the perimeter of the protruding surface (174).
[0103] The vertical height between the lower surface of the first build-up layer (100) and the protruding surface (174) may be the same as the vertical height between the lower surface of the first build-up layer (100) and the second surface (172). The vertical height between the lower surface of the first build-up layer (100) and the first surface (170) may be smaller than the vertical height between the lower surface of the first build-up layer (100) and the protruding surface (174) or the vertical height between the lower surface of the first build-up layer (100) and the second surface (172).
[0104] Multiple protruding surfaces (174) can be spaced apart from each other along the horizontal direction.
[0105] A first wiring section (160) for coupling with an electronic element (1000) may be disposed on the protruding surface (174). The protruding surface (174) may support the lower surface of the first wiring section (160). The cross-sectional shape of the protruding surface (174) may be formed to correspond to the cross-sectional shape of the first wiring section (160). The cross-sectional shape of the first protruding surface (174) may have a circular shape, a polygonal shape including a square, etc.
[0106] The circuit board (10) according to the embodiment has the advantage of enabling a support structure for the first wiring portion (160) and the electronic element (1000) through the protruding surface (174), thereby facilitating the bonding process of the electronic element (1000) and improving the reliability of the circuit board (10).
[0107] In particular, even if the pitch between the plurality of protruding surfaces (174) where the first wiring section (160) is arranged becomes small, since the protruding surface (174) protrudes relative to the first surface (170), there is an advantage that short circuits between adjacent plurality of wiring sections (160) can be easily prevented.
[0108] The connecting wiring section (130) can electrically connect the first wiring section (160) and the third wiring section (113) disposed on the second build-up layer (110). The connecting wiring section (130) may include an upper section (132) disposed on the second build-up layer (110), a lower section (134) disposed on the first build-up layer (100), and a connecting section (136) that connects the upper section (132) and the lower section (134) and is disposed on the inner wall of the through hole (150).
[0109] Meanwhile, as the upper surface of the first insulating layer (101) forming the bottom surface of the cavity is implemented with a first surface (170) and a protruding surface (174), the lower portion (134) disposed on the first insulating layer (101) may have at least a portion of a stepped area in the vertical direction. For example, as shown in FIG. 8, the lower portion (134) may include a protrusion (135) that protrudes downward toward the first build-up layer (100) more than other areas and has its lower surface in contact with the first surface (170). The protrusion (135) may be coupled to the groove (171). Accordingly, by increasing the contact area with the first build-up layer (100) through the protrusion (135), the connection between the connecting wiring portion (130) and the first build-up layer (100) can be firmly formed.
[0110] Meanwhile, an inclined surface (173) connecting the first surface (170) and the protruding surface (174) may be included, in which case the inclined surface (173) may have a right angle or an obtuse angle. An angle of inclination corresponding to the angle of inclination of the inclined surface (173) may be formed on the side of the protruding part (135) facing the inclined surface (173).
[0111] Referring to FIG. 9, the second build-up layer (110) may include a second insulating layer (102) and a third insulating layer (103). The third insulating layer (103) may include a base portion disposed on the second insulating layer (102) and a protrusion portion (155) protruding downward from the base portion. The protrusion portion (155) may refer to a portion that protrudes downward from the lower surface of the base portion and is closer to the first insulating layer (101) than to the upper surface of the second insulating layer (102). The protrusion portion (155) may be disposed to surround the inner wall of the first through hole of the second insulating layer (102). The protrusion portion (155) may be disposed to overlap the second insulating layer (102) in a horizontal direction. The inner surface of the protrusion (155) surrounding the inner wall of the first through hole may have an inclined surface shape corresponding to the inclined surface of the inner wall of the first through hole. Accordingly, since the shape of the inner wall of the cavity can be realized as the shape of the protrusion (155) of the third insulating layer (103), the processing of the cavity can be made easier. In addition, thickness deviations caused by differences in hardening degree between a plurality of insulating layers arranged in a vertical direction in the cavity formation area can be minimized.
[0112] The connecting wiring portion (130) may include an upper portion (132) disposed on the second build-up layer (110), a lower portion (134) disposed on the first build-up layer (100), and a connecting portion (136) that connects the upper portion (132) and the lower portion (134) and is disposed on the inner wall of the through hole (150). In the embodiment of FIG. 9, as the inner wall of the through hole (150) is implemented as the outer surface of the protrusion (155) of the third insulating layer (103), the connecting portion (136) may be disposed along the outer surface of the protrusion (155). Accordingly, in this embodiment, by forming a bonding surface with the connecting portion (136) through a single protrusion (155), there is an advantage of preventing in advance the reduction of the bonding strength of the connecting portion (136) that may occur at the bonding interface of multiple insulating layers. In the foregoing, although all components constituting an embodiment of the present invention have been described as being combined or operating in combination, the present invention is not necessarily limited to such embodiments. That is, within the scope of the purpose of the present invention, all components may be selectively combined in one or more ways. Furthermore, terms such as "include," "constitute," or "have" described above, unless specifically stated otherwise, mean that the relevant component may be inherent; thus, they should be interpreted as allowing for the inclusion of additional components rather than excluding other components. All terms, including technical or scientific terms, have the same meaning as generally understood by those skilled in the art to which the present invention pertains, unless otherwise defined. Terms commonly used, such as those defined in advance, should be interpreted in accordance with their meaning in the context of the relevant technology and should not be interpreted in an ideal or overly formal sense unless explicitly defined in the present invention.
[0113] The foregoing description is merely an illustrative explanation of the technical concept of the present invention, and those skilled in the art to which the present invention pertains will be able to make various modifications and variations within the scope of the essential characteristics of the present invention. Accordingly, the embodiments disclosed in the present invention are intended to explain, not limit, the technical concept of the present invention, and the scope of the technical concept of the present invention is not limited by such embodiments. The scope of protection of the present invention shall be interpreted by the claims below, and all technical concepts within an equivalent scope shall be interpreted as being included within the scope of rights of the present invention.
[0114] Meanwhile, when a circuit board having the features of the invention described above is used in IT devices or home appliances such as smartphones, server computers, and TVs, it can stably perform functions such as signal transmission or power supply. For example, when a circuit board having the features of the invention performs a semiconductor package function, it can safely protect the semiconductor chip from external moisture or contaminants, and can resolve issues such as leakage current, electrical short circuits between terminals, or electrical open circuits of terminals supplying power to the semiconductor chip. In addition, when it is responsible for signal transmission, it can resolve noise issues. Through this, the circuit board having the features of the invention described above enables the stable operation of IT devices or home appliances, thereby allowing the entire product and the circuit board to which the invention is applied to achieve functional integration or technical interoperability.
[0115] When a circuit board having the features of the invention described above is used in a transportation device such as a vehicle, it can resolve the problem of signal distortion transmitted to the transportation device, or safely protect a semiconductor chip controlling the transportation device from the outside, and further improve the stability of the transportation device by resolving problems such as leakage current, electrical short circuits between terminals, or electrical open circuits of terminals supplying power to the semiconductor chip. Accordingly, the transportation device and the circuit board to which the present invention is applied can achieve functional integration or technical interoperability with each other.
Claims
1. First build-up layer; A second build-up layer disposed on the first build-up layer and including a through hole; A first wiring section disposed on the first build-up layer and superimposed in a vertical direction with respect to the through hole; A second wiring portion disposed in the second build-up layer and offset in a vertical direction from the through hole; and It includes a connecting wiring section connecting the first wiring section and the second wiring section, and The above connecting wiring section is, An upper portion disposed on the second build-up layer above; A lower portion disposed on the first build-up layer; and A circuit board including a connecting portion that connects the upper portion and the lower portion and is disposed on the inner wall of the through hole.
2. In Paragraph 1, A circuit board having an angle of 50 degrees or less between the inner wall of the through hole and the upper surface of the first build-up layer.
3. In Paragraph 1, A circuit board in which the material of the insulating layer of the first build-up layer and the material of the insulating layer of the second build-up layer are different.
4. In Paragraph 3, The material of the insulating layer of the first build-up layer is prepreg (PPG), and The insulating layer of the second build-up layer is a circuit board made of PID (Photo Imageable Dielectric).
5. In Paragraph 1, The second build-up layer includes a plurality of insulating layers arranged in a vertical direction, and The insulating layer of the second build-up layer comprises a second insulating layer disposed on the first build-up layer and including a first through-hole, and a third insulating layer disposed on the second insulating layer. The third insulating layer comprises a base portion disposed on the second insulating layer and a protrusion portion protruding from the base portion and disposed to surround the inner wall of the first through hole. The above connection is a circuit board arranged along the outer surface of the above protrusion.
6. In Paragraph 1, The insulating layer of the second build-up layer comprises a second insulating layer including a first through-hole and a third insulating layer disposed on the second insulating layer and including a second through-hole that overlaps in a vertical direction with the first through-hole. The above connection portion is a circuit board arranged along the inner wall of the first through hole and the inner wall of the second through hole.
7. In Paragraph 6, The angle of inclination of the inner wall of the first through hole and the angle of inclination of the inner wall of the second through hole are different from each other, The above connection part is a circuit board having multiple regions with different inclination angles.
8. In Paragraph 1, The insulating layer of the second build-up layer comprises a second insulating layer including a first through-hole and a third insulating layer disposed on the second insulating layer and including a second through-hole that overlaps in a vertical direction with the first through-hole. The above connecting portion is arranged along the inner wall of the first through hole, and The upper portion is a circuit board penetrating the inner wall of the second through hole.
9. In Paragraph 1, The upper surface of the first build-up layer includes a first surface that is superimposed in a vertical direction with respect to the through hole, and The above first surface is a circuit board comprising a plurality of protruding surfaces spaced apart from each other.
10. 1st Build-up Layer; A second build-up layer disposed on the first build-up layer and including a through hole; An electronic element disposed in the above-mentioned through hole; A first wiring section disposed on the first build-up layer and superimposed in a vertical direction with respect to the through hole; A second wiring portion disposed in the second build-up layer and offset in a vertical direction from the through hole; and It includes a connecting wiring section connecting the first wiring section and the second wiring section, and The above connecting wiring section is, An upper portion disposed on the second build-up layer above; A lower portion disposed on the first build-up layer; and A semiconductor package including a connecting portion that connects the upper portion and the lower portion and is disposed on the inner wall of the through hole.