TSV radiation-resistant packaging structure and packaging method

Abstract

The present invention provides a TSV radiation-resistant packaging structure and a packaging method. The TSV radiation-resistant packaging structure comprises: a first redistribution layer, which is disposed on a front side of a wafer; the wafer, a cavity being etched inside the wafer; a chip, which is disposed in the cavity inside the wafer; a second redistribution layer, which is disposed on a back side of the wafer and is electrically connected to the chip; a radiation protection layer, which is disposed in the cavity inside the wafer and on the back side, and encapsulates the chip; and a TSV via, which penetrates through the wafer and connects the first redistribution layer to the second redistribution layer. A radiation-resistant material is used to protect the chip, such that the present invention can be used in fields such as high-energy X-ray detection and gamma-ray detection, thereby improving the protection performance of the chip.

Description

A TSV radiation-hardened packaging structure and packaging method Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a TSV radiation-resistant packaging structure and packaging method. Background Technology

[0002] In current technological scenarios, X-ray detectors are widely used in medical and industrial fields such as CT scans, with photon counters currently offering the highest resolution. In a typical photon counter structure, the X-ray detector is located above, and the processor chip is below. The detector chip and the processor chip are manufactured using different processes and then stacked in three dimensions. The processor chip below is manufactured using CMOS technology. High-energy rays, such as X-rays, can damage the processor chip. High-energy rays produce ionization effects in electronic components, leading to varying degrees of damage, such as oxide charge traps and increased leakage current.

[0003] Therefore, the processing chip in the detector module needs to be protected against high-energy X-rays from the detector direction to prevent module failure. Summary of the Invention

[0004] To address the above problems, the present invention provides a TSV radiation-hardened packaging structure, characterized in that it comprises:

[0005] The first wiring layer is located on the front side of the wafer;

[0006] A wafer having a cavity extending inward from the front side;

[0007] The chip is disposed within the cavity inside the wafer;

[0008] The second wiring layer is disposed on the back side of the wafer and is electrically connected to the chip;

[0009] A radiation shielding layer is disposed in the internal cavity of the wafer and on at least a portion of the back surface of the wafer, encapsulating the chip;

[0010] TSV vias are disposed through the wafer and are electrically connected to the first and second multiple wiring layers.

[0011] In one embodiment of the present invention, the packaging structure further includes solder balls disposed on the first redistribution layer on the front side of the wafer for connecting to external structures.

[0012] In another embodiment of the present invention, the packaging structure further includes a detector disposed on the back side of the wafer and electrically connected to the second redistribution layer.

[0013] In another embodiment of the present invention, the radiation protection layer is made of metal, polymer, aluminum-lead microcomposite material or lead-free polymer material;

[0014] The metallic material is one or more of lead and tungsten, and the lead-free polymeric material is one or more of bismuth (B), barium (Ba), gadolinium (Gd), tungsten (W), antimony (Sb), and tin (Sn).

[0015] In another embodiment of the present invention, the chip is disposed in the internal cavity of the wafer, and the gap is filled by dry film or resin.

[0016] In another embodiment of the present invention, the chip is a single chip or multiple chips integrated and packaged to form a chipset, which is then assembled with multiple detectors.

[0017] In another embodiment of the present invention, the radiation protection layer forms a sealed space for housing the chip and isolating it from external radiation.

[0018] The present invention also provides a method for packaging a TSV radiation-hardened structure, characterized in that it includes:

[0019] Step 1: Create TSV vias on the wafer, then etch cavities, and place radiation-resistant material inside the cavities to form a radiation protection layer;

[0020] Step 2: Embed the processor chip in the cavity and fill it with dry film or resin;

[0021] Step 3: Fabricate a first wiring layer on the front side of the wafer. The first wiring layer is electrically connected to the TSV via and the processor chip, and the front side of the wafer is bonded to the first temporary carrier.

[0022] Step 4: Thin the back side of the wafer to expose the TSV vias, and fabricate a second wiring layer, which is electrically connected to the TSV vias.

[0023] Step 5: Bond the back side of the wafer to the second temporary carrier, then debond the front side of the wafer to the first temporary carrier, and finally perform anti-radiation treatment on the processor chip on the front side of the wafer to form a radiation protection layer.

[0024] Step 6: Remove the second temporary carrier and form solder balls on the front side of the wafer.

[0025] In one embodiment of the present invention, the radiation protection layer is a lead plate or other radiation-resistant material.

[0026] In another embodiment of the invention, the detector is further mounted on a second rewiring layer on the back side of the wafer.

[0027] This invention protects against high-energy X-rays from the detector by placing a chip within a cavity with a radiation shielding layer. The radiation shielding layer is fabricated using radiation-resistant materials, such as metals (e.g., lead, tungsten) or other radiation-resistant materials (e.g., polymers, aluminum-lead microcomposite materials, or lead-free polymers combining various precious metals such as bismuth (B), barium (Ba), gadolinium (Gd), tungsten (W), antimony (Sb), and tin (Sn)). This prevents module failure and can be used in fields such as high-energy X-ray detection and gamma-ray detection, improving the chip's protective performance. Attached Figure Description

[0028] Figure 1 shows a schematic diagram of a TSV radiation-resistant packaging structure in one embodiment of the present invention;

[0029] Figures 2A to 2F show the packaging process of the TSV radiation-resistant packaging structure in one embodiment of the present invention;

[0030] Figure 3 shows a schematic diagram of a TSV radiation-resistant packaging structure assembly in one embodiment of the present invention. Specific Implementation

[0031] In the following description, the invention is described with reference to various embodiments. However, those skilled in the art will recognize that the embodiments may be practiced without one or more specific details or with other alternatives and / or additional methods, materials, or components. In other instances, well-known structures, materials, or operations are not shown or described in detail so as not to obscure the inventive points of the invention. Similarly, for illustrative purposes, specific quantities, materials, and configurations are set forth to provide a comprehensive understanding of embodiments of the invention. However, the invention is not limited to these specific details.

[0032] Furthermore, it should be understood that the embodiments shown in the accompanying drawings are illustrative and not necessarily drawn to scale. In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are only for the convenience of describing this utility model and simplifying the description, and do not explicitly or implicitly suggest that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model.

[0033] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. In this specification, references to "an embodiment" or "this embodiment" mean that a particular feature, structure, or characteristic described in connection with that embodiment is included in at least one embodiment of the invention. The phrase "in one embodiment" appearing throughout this specification does not necessarily refer to the same embodiment in all instances.

[0034] Figure 1 shows a schematic diagram of a TSV radiation-resistant packaging structure in one embodiment of the present invention.

[0035] The present invention provides a TSV radiation-resistant packaging structure, specifically including: a first wiring layer 403, a wafer 4, a chip 3, a second wiring layer 402, a radiation protection layer 2, and a TSV via 401.

[0036] A cavity is formed by etching wafer 4, and a radiation shielding layer 2 is formed inside the cavity to house chip 3. The radiation shielding layer 2, with its material properties that isolate radiation, protects chip 3 from its influence.

[0037] By forming a sealed space through the radiation shielding layer 2, the influence of external radiation on the chip 3 is blocked in sequence. At the same time, the chip 3 is electrically connected through the first wiring layer 403. Then, through the TSV via 401, the electrical connection between the first wiring layer 403 and the second wiring layer 402 on the front and back sides of the wafer 4 is realized, thus completing the electrical connection of the entire packaging structure.

[0038] As shown in Figure 1, in one embodiment of the present invention, a single chip package is used, while in another embodiment of the present invention, as shown in Figure 3, multiple chips are integrated into a package to form a chip group, which is then assembled with multiple detectors. The present invention does not specifically limit the number of chips.

[0039] Compared to existing technologies, this invention uses a radiation protection layer 2, which is formed by cutting a lead plate or by spin coating or spraying an anti-radiation polymer, to block the influence of external radiation. Compared to existing photonics technology structures that place the detector directly above the processor chip, this invention adds a radiation protection layer 2 to isolate radiation, which is used in fields such as high-energy X-ray detection and gamma-ray detection, thereby improving the protection performance of the chip 3.

[0040] Based on the above structure, the present invention provides a TSV radiation-resistant structure packaging method, comprising the following steps:

[0041] Step 1: Create TSV vias on the wafer, then etch cavities, and place radiation-resistant material inside the cavities to form a radiation protection layer;

[0042] Step 2: Embed the processor chip in the cavity and fill it with dry film or resin;

[0043] Step 3: Fabricate the first interconnect layer on the front side of the wafer, connect the TSV vias, and bond them to the first temporary carrier.

[0044] Step 4: Thin the back side of the wafer to expose the TSV vias, and fabricate a second wiring layer to complete the electrical connection with the TSV vias.

[0045] Step 5: Bond the back side of the wafer to the second temporary carrier, debond the front side to the first temporary carrier, and perform radiation protection treatment on the front side of the wafer, such as photolithography, electroplating, etc., to form the required radiation protection layer; or attach the required radiation protection layer; or form a protective layer on the front side and then etch to form the required radiation protection layer.

[0046] Step 6: Disassemble the second temporary carrier, form solder balls on the front side, cut into individual chips, and complete the packaging.

[0047] In step 1, as shown in Figure 2A, TSV holes are fabricated on the surface of wafer 4 using photolithography and etching processes. The diameter of the TSV holes ranges from 1µm to 1000µm, and the depth ranges from 10µm to 1000µm. Then, copper is electroplated to fill the TSV holes. Electroplating at a temperature of 200°C to 500°C makes the copper more dense, forming TSV vias 401. In some embodiments of the present invention, wafer 4 may include a variety of semiconductor materials, such as silicon, germanium, gallium arsenide, indium phosphide, etc. Alternatively, wafer 4 may also be made of electrically non-conductive materials, such as glass, plastic, or sapphire wafers.

[0048] Then, a groove is fabricated on the front side of wafer 4 using a dry etching method. The groove can be cubic, inverted trapezoidal, cylindrical, or hemispherical. In one embodiment of the present invention, a cubic groove is used, with a size ranging from 10µm to 10000µm. Here, the size includes the length, width, and height of a cubic or inverted trapezoidal shape, or the diameter or height of a cylindrical or hemispherical shape.

[0049] Next, a radiation-resistant material, such as a pre-cut metal material like a lead plate, or a radiation-resistant polymer, is placed inside the cavity groove to form a radiation protection layer 2. The radiation protection layer 2 covers the sidewalls and bottom surface of the cavity groove.

[0050] Step 2, as shown in Figure 2B, embed chip 3 into the cavity and fill the gap with dry film or resin.

[0051] Step 3, as shown in Figure 2C, involves fabricating a first super-wiring layer 403 on the front side of wafer 4 using photolithography and electroplating processes. This allows the copper pillars and chip 3 within the TSV vias 401 to be electrically connected to the first super-wiring layer 403. The first super-wiring layer 403 includes both wiring and bonding functions. Then, the front side of wafer 4 is bonded to a first temporary carrier 102 using a temporary bonding film. This temporary bonding film is a thermoplastic or thermosetting organic material, or an inorganic material containing Cu, Ni, Cr, Co, etc. The temporary bonding film can be debonded or removed by heating, mechanical, chemical, laser, or freezing methods. The first super-wiring layer 403 is a structure composed of a metal layer and an insulating dielectric layer. The metal layer forms electrical connections, and the insulating dielectric layer isolates the conductive metal layer. In one embodiment of the invention, the metal wiring layer can be prepared using physical vapor deposition (PVD), photolithography, electroplating, etc., and the insulating dielectric layer can be prepared using photolithography, etc.

[0052] Step 4, as shown in Figure 2D, thin the back side of wafer 4 and expose the other end of the copper pillar through grinding, wet etching and dry etching processes. A second wiring layer 402 and bonding metal are then fabricated on the back side of wafer 4.

[0053] Step 5, as shown in Figure 2E, the back side of wafer 4 is bonded to the second temporary carrier 103, and then the front side is debonded to the first temporary carrier 102. The front side of wafer 4 is subjected to anti-radiation treatment to form a radiation protection layer 2, which forms a sealed space with the anti-radiation material in the cavity, thereby isolating the influence of external radiation.

[0054] Step 6: Finally, the wafer 4 is debonded to the second temporary carrier 103, and solder balls 101 are formed on the front side of the wafer 4 for external connection.

[0055] Finally, the detector is mounted on the second wiring layer on the back of the wafer, and the bonding wafer is diced to complete the single module process. The detector is electrically connected to the second wiring layer 402, and then electrically connected to the chip 3 through the TSV via 401.

[0056] Those skilled in the art will understand that the operations shown in the above methods are not exhaustive, and other operations may be performed before, after, or between the shown operations. Furthermore, some of the operations may be performed simultaneously or in a different order than described above.

[0057] This invention protects against high-energy X-rays from the detector by placing the chip inside a cavity with a radiation shielding layer. The radiation shielding layer is made of materials with radiation-resistant properties, such as cut lead plates, or by spin-coating or spraying radiation-resistant polymers (which can be done by photolithography), thereby preventing module failure. This invention can be used in fields such as high-energy X-ray detection and gamma-ray detection to improve the chip's protection performance.

[0058] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this invention.

Claims

1. A TSV radiation-hardened packaging structure, characterized in that, include: The first wiring layer is located on the front side of the wafer; A wafer having a cavity extending inward from the front side; The chip is disposed within the cavity inside the wafer; The second wiring layer is disposed on the back side of the wafer and is electrically connected to the chip; A radiation shielding layer is disposed in the internal cavity of the wafer and on at least a portion of the back surface of the wafer, encapsulating the chip; TSV vias are disposed through the wafer and are electrically connected to the first and second multiple wiring layers.

2. The TSV radiation-resistant packaging structure as described in claim 1, characterized in that, The packaging structure also includes solder balls disposed on the first wiring layer on the front side of the wafer for connecting to external structures.

3. The TSV radiation-resistant packaging structure as described in claim 1, characterized in that, The packaging structure also includes a detector disposed on the back side of the wafer and electrically connected to the second redistribution layer.

4. The TSV radiation-resistant packaging structure as described in claim 1, characterized in that, The radiation protection layer is made of metal, polymer, aluminum-lead microcomposite material or lead-free polymer material; The metallic material is one or more of lead and tungsten, and the lead-free polymeric material is one or more of bismuth (B), barium (Ba), gadolinium (Gd), tungsten (W), antimony (Sb), and tin (Sn).

5. The TSV radiation-resistant packaging structure as described in claim 1, characterized in that, The chip is disposed inside the cavity of the wafer, and the gaps are filled with dry film or resin.

6. The TSV radiation-hardened packaging structure as described in claim 2, characterized in that, The chip is a single chip or multiple chips integrated and packaged to form a chipset, which is then assembled with multiple detectors.

7. The TSV radiation-resistant packaging structure as described in claim 1, characterized in that, The radiation protection layer forms a sealed space for housing the chip and isolating it from external radiation.

8. A method for packaging a TSV radiation-hardened structure, characterized in that, include: Step 1: Create TSV vias on the wafer, then etch cavities, and place radiation-resistant material inside the cavities to form a radiation protection layer; Step 2: Embed the processor chip in the cavity and fill it with dry film or resin; Step 3: Fabricate a first wiring layer on the front side of the wafer. The first wiring layer is electrically connected to the TSV via and the processor chip, and temporarily bond the front side of the wafer to the first temporary carrier. Step 4: Thin the back side of the wafer to expose the TSV vias, and fabricate a second wiring layer, which is electrically connected to the TSV vias. Step 5: Bond the back side of the wafer to the second temporary carrier, then debond the front side of the wafer to the first temporary carrier, and finally perform anti-radiation treatment on the processor chip on the front side of the wafer to form a radiation protection layer. Step 6: Remove the second temporary carrier and form solder balls on the front side of the wafer.

9. The TSV radiation-resistant structure packaging method as described in claim 8, characterized in that, The radiation protection layer is made of metal, polymer, aluminum-lead microcomposite material, or lead-free polymer material; The metallic material is one or more of lead and tungsten, and the lead-free polymeric material is one or more of bismuth (B), barium (Ba), gadolinium (Gd), tungsten (W), antimony (Sb), and tin (Sn).

10. The TSV radiation-resistant structure packaging method as described in claim 8, characterized in that, It also includes mounting the detector on a second wiring layer on the back of the wafer.

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