Display panel and preparation method therefor, display module, and electronic device

By setting an electrical connection structure inside the display panel and eliminating the flexible electrical connection, the driving circuit and chip are directly connected within the carrier plate and insulation layer, solving the problem of large bezel width in display devices, achieving a narrow bezel design and high screen ratio, and improving display reliability.

WO2026138670A1PCT designated stage Publication Date: 2026-07-02HUAWEI TECH CO LTD

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
HUAWEI TECH CO LTD
Filing Date
2025-12-19
Publication Date
2026-07-02

AI Technical Summary

Technical Problem

Existing technologies struggle to effectively reduce the "black border" area of ​​display devices within a limited size, resulting in insufficient display area and impacting the user's visual experience.

Method used

By setting an electrical connection structure inside the display panel, the flexible electrical connection structure is eliminated, and the electrical connection between the driving circuit and the driving chip is directly realized in the carrier plate, inorganic insulating layer and organic insulating layer. The bending design is eliminated, the area of ​​the non-display area is reduced, and the screen ratio is increased.

Benefits of technology

The display panel features a narrow bezel design, which improves the screen-to-body ratio and electrical connection reliability, enhances display reliability, and reduces the risk of conductive trace breakage.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application relates to the technical field of display, and provides a display panel and a preparation method therefor, a display module, and an electronic device. The display panel comprises a bearing plate, a driving circuit, an electrical connection structure, an inorganic insulating layer, and an organic insulating layer. The bearing plate, the inorganic insulating layer and the organic insulating layer are sequentially stacked. The electrical connection structure comprises a first conductive wire, a second conductive wire, and a third conductive wire. The first conductive wire is arranged on the bearing plate, and the first conductive wire is configured to be electrically connected to a driving chip and the second conductive wire; the second conductive wire is arranged on the inorganic insulating layer and spaced apart from a first portion of the driving circuit in the inorganic insulating layer; and the third conductive wire is arranged on the organic insulating layer, and the third conductive wire is electrically connected between the second conductive wire and a second portion of the driving circuit. The second portion of the driving circuit is electrically connected to the first portion of the driving circuit. In this way, the area of a non-display region of the display panel is reduced, thereby achieving a narrow bezel of the display panel.
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Description

Display panels and their manufacturing methods, display modules and electronic devices

[0001] This application claims priority to Chinese Patent Application No. 202411983726.1, filed on December 27, 2024, with the China National Intellectual Property Administration, entitled “Display Panel and Method for Preparing the Same, Display Module and Electronic Device”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of display technology, and in particular to a display panel and its manufacturing method, a display module and an electronic device. Background Technology

[0003] With the development of display devices, there is a growing pursuit of minimizing the "black border" around the display area, enabling narrow bezels (the smaller the "black border," the narrower the bezel). This allows the display area to stand out, providing consumers with a wider field of view while maintaining the same screen size, thus enhancing the user's visual experience and ensuring product competitiveness. Therefore, minimizing the "black border" area within a limited size to achieve a larger screen display has become a crucial research direction for companies in the industry. Summary of the Invention

[0004] This application provides a display panel with a narrow bezel, a method for manufacturing the same, a display module, and an electronic device.

[0005] In a first aspect, embodiments of this application provide a display panel. The display panel includes a carrier plate, a driving circuit, an electrical connection structure, an inorganic insulating layer, and an organic insulating layer. The carrier plate, the inorganic insulating layer, and the organic insulating layer are stacked sequentially. A first portion of the driving circuit is disposed within the inorganic insulating layer, and a second portion of the driving circuit is disposed within the organic insulating layer. The electrical connection structure includes a first conductive trace, a second conductive trace, and a third conductive trace. The first conductive trace is disposed on the carrier plate and is used to electrically connect to a driving chip and a second conductive trace. The second conductive trace is disposed on the inorganic insulating layer and is spaced apart from the first portion of the driving circuit within the inorganic insulating layer. The third conductive trace is disposed on the organic insulating layer and is electrically connected between the second conductive trace and the second portion of the driving circuit. The second portion of the driving circuit is electrically connected to the first portion of the driving circuit.

[0006] It is understood that in the embodiments of this application, the display panel, by setting an electrical connection structure, can realize the electrical connection between the driving circuit and the driving chip inside the display panel. The driving signal can be transmitted from the surface of the carrier plate away from the inorganic insulation to the driving circuit inside the display panel through the electrical connection structure, without having to pass through the side of the display panel. As shown in Figure 1b, the technical solution of the embodiments of this application eliminates the flexible electrical connection structure, which is beneficial to reducing the non-display area of ​​the display panel, thereby achieving a narrow bezel and improving the screen-to-body ratio of the display panel. Furthermore, the electrical connection structure of this application is directly disposed within the carrier plate, the inorganic insulating layer, and the organic insulating layer, without bending. Therefore, the electrical connection structure is not prone to breakage, the electrical connection between the driving chip and the driving circuit has better reliability, and the display reliability of the display panel is better.

[0007] In one possible implementation, the carrier plate includes a first side and a second side disposed opposite to each other, an inorganic insulating layer is disposed on the first side of the carrier plate, and the surface of the first conductive trace away from the inorganic insulating layer is flush with the second side of the carrier plate.

[0008] It is understandable that "the end of the first conductive trace furthest from the inorganic insulating layer is flush with the second surface" means that the surface of the first conductive trace furthest from the inorganic insulating layer and the second surface are in direct contact and connection. Along the thickness direction of the display panel, there is no height difference, or a small height difference, at the connection point between the surface of the first conductive trace furthest from the inorganic insulating layer and the second surface. Thus, when the display panel is applied to a display module, the electrical signals of the first conductive trace are transmitted to the driver chip by applying conductive ink. In the direction perpendicular to the thickness of the display panel, the thickness of the conductive ink is small. During the fabrication of the display module, the climbing height of the conductive ink is small, and the conductive ink is less prone to breakage. Therefore, the electrical connection reliability of the conductive ink is better.

[0009] In one possible implementation, the carrier plate includes a first surface and a second surface disposed opposite to each other, and an inorganic insulating layer is disposed on the first surface of the carrier plate. The carrier plate is provided with a groove, the opening of which is located on the second surface of the carrier plate, and the surface of the first conductive trace away from the inorganic insulating layer is located within the groove.

[0010] Understandably, by creating grooves, the height of the first conductive trace in the thickness direction of the display panel is relatively small. During the fabrication of the display panel, the etching depth of the carrier plate is also relatively small.

[0011] In one possible implementation, the carrier board includes a first organic layer, a second organic layer, and a first inorganic layer, which are sequentially stacked. An inorganic insulating layer is located on the surface of the first organic layer away from the first inorganic layer. The first conductive trace includes a first trace and a second trace. The first trace is disposed on the first organic layer for electrically connecting to the driver chip. The second trace is disposed on the first inorganic layer and the second organic layer. A portion of the first trace is located between the first inorganic layer and the first organic layer and connects to the second trace. A portion of the second trace is located on the surface of the second organic layer near the inorganic insulating layer and connects to the second conductive trace.

[0012] Understandably, when the substrate is a multilayer stack of organic and inorganic layers with a large thickness, the first conductive trace can be configured as multiple segments connected sequentially along the thickness direction of the substrate. During the fabrication of the display panel, these multiple segments of the first conductive trace can be fabricated in different steps, reducing the etching depth and fabrication difficulty for each step.

[0013] In one possible implementation, the first trace includes a first segment and a second segment. The first segment of the first trace is disposed within a first organic layer. The second segment of the first trace is connected to and electrically connected to the end of the first segment near the inorganic insulating layer. Along the thickness direction of the display panel, the second segment of the first trace is located between the first organic layer and the first inorganic layer. The second trace also includes a first segment and a second segment. The first segment of the second trace is disposed within both the first inorganic layer and the second organic layer, and is connected to the second segment of the first trace. The first segment of the second trace is electrically connected to the second segment of the first trace. The second segment of the second trace is connected to and electrically connected to the end of the first segment near the inorganic insulating layer. Along the thickness direction of the display panel, the projection of the first segment of the second trace onto the first organic layer and the projection of the second segment of the first trace onto the first organic layer at least partially overlap, and the projections of the first segment of the second trace onto the first organic layer and the projections of the first segment of the first trace onto the first organic layer are offset.

[0014] It is understandable that the positions of the first trace within the first organic layer and the second trace within the second organic layer are staggered. During the fabrication of the display panel, the different positions where the first trace passes through the first organic layer and the second trace pass through the second organic layer help to reduce the etching depth and manufacturing costs.

[0015] In one possible implementation, the carrier plate further includes a third inorganic layer disposed on the surface of the second organic layer away from the first inorganic layer. Along the thickness direction of the display panel, the third inorganic layer connects the second trace and the second organic layer. The second trace is disposed in the third inorganic layer and extends into the second organic layer, with the third inorganic layer serving to separate the second trace from the second organic layer.

[0016] Understandably, the third inorganic layer can be used to strengthen the connection between the second trace and the second organic layer, reducing the risk of external moisture eroding the interior of the display panel through the gap between the second trace and the second organic layer.

[0017] In one possible implementation, the carrier board further includes a fourth inorganic layer connected between the second trace and the second organic layer along a first direction. The second trace is disposed between the first inorganic layer and the second organic layer, and the fourth inorganic layer is used to separate the second trace and the second organic layer. The first direction is perpendicular to the thickness direction of the display panel.

[0018] Understandably, the fourth inorganic layer can be used to enhance the connection strength between the second trace and the second organic layer in the first direction, reducing the risk of external moisture eroding the interior of the display panel due to gaps between the second trace and the second organic layer.

[0019] In one possible implementation, the first segment of the second trace includes a first part and a second part, with the first part of the first segment connected to the second segment of the first trace. The second part of the first segment is connected to the end of the first part of the first segment away from the first trace. Both the first part and the second part of the first segment are cylindrical, with the outer diameter D1 of the first part of the first segment being smaller than the outer diameter D2 of the second part of the first segment.

[0020] It is understandable that during the deposition of the second trace, the shape of the contact surface between the support plate and the second trace can be changed to a stepped surface, so that the second trace can be deposited along the stepped surface. This helps to reduce the height difference of the second trace during the deposition process, making the second trace less prone to breakage and improving the electrical connection reliability of the second trace.

[0021] In one possible implementation, the carrier plate further includes a first pad layer, which is located on the side of the first trace near the inorganic insulating layer along the thickness direction of the display panel and surrounds the second trace. The first pad layer and the second organic layer are disposed opposite each other along a first direction, or the first inorganic layer and the second organic layer are disposed opposite each other, with the first direction perpendicular to the thickness direction of the display panel.

[0022] Understandably, the first padding layer can be used to locally thin the second organic layer. Specifically, depending on the desired thinning location of the second organic layer, the first padding layer and the corresponding location of the second organic layer are aligned along the thickness direction of the substrate. By setting the second padding layer, the thickness of the second organic layer at the third via location is smaller during subsequent etching, resulting in a shallower etching depth. This helps reduce etching time and accelerates the production efficiency of the display panel.

[0023] In one possible implementation, the display panel further includes a pixel structure. The pixel structure is located on the side of the organic insulating layer away from the inorganic insulating layer. A third portion of the driving circuit is disposed within the organic insulating layer and electrically connected between the pixel structure and the first portion of the driving circuit. A fourth portion of the driving circuit is located within the organic insulating layer and electrically connected between a third conductive trace and the first portion of the driving circuit.

[0024] Understandably, pixel structures are used to realize the display function of a display panel; pixel structures are also called light-emitting devices. The area where the pixel structure is located is the display area of ​​the display panel.

[0025] Secondly, embodiments of this application provide a display module. The display module includes a cover plate and a display panel, with the cover plate stacked on the display panel. The display panel also includes a driver chip, which is disposed on the surface of a carrier plate away from the inorganic insulating layer.

[0026] Understandably, a narrower bezel on the display panel and the display module improves the user experience. Placing the driver chip on the surface of the carrier board away from the inorganic insulating layer reduces the area of ​​the non-display area of ​​the display panel, thereby increasing the screen-to-body ratio.

[0027] In one possible implementation, the display panel further includes conductive ink and an insulating protective layer disposed on the surface of the carrier plate away from the inorganic insulating layer. The conductive ink is electrically connected between the first conductive trace and the driver chip, and the insulating protective layer covers the conductive ink.

[0028] It is understandable that the position of the driver chip on the surface of the carrier board away from the inorganic insulating layer is not limited to the vicinity of the first conductive trace; the specific position can be designed according to the device arrangement on or near the carrier board. When the driver chip is far from the first conductive trace, conductive ink can be used to achieve electrical connection between the first conductive trace and the driver chip, making the placement of the driver chip more flexible. The insulating protective layer can be used for the protection and insulation of the missile ink.

[0029] Thirdly, embodiments of this application provide an electronic device. The electronic device includes a housing and a display module, the display module being mounted on the housing.

[0030] Understandably, a narrower bezel in the display module allows for a larger display area on electronic devices, resulting in a better user experience.

[0031] Fourthly, embodiments of this application provide a method for manufacturing a display panel. The manufacturing method includes:

[0032] A first organic layer to be treated and a second inorganic layer to be treated are sequentially formed on a substrate, with the first organic layer to be treated located between the second inorganic layer to be treated and the substrate.

[0033] The second inorganic layer to be treated is exposed and developed to form a second inorganic layer, wherein the second inorganic layer has a fourth through hole that penetrates the second inorganic layer.

[0034] Using the second inorganic layer as a mask, the first organic layer to be treated is exposed and developed to form a pre-treated first organic layer. The pre-treated first organic layer has a first groove, the opening of the first groove faces away from the substrate, and the first groove is connected to a fourth through hole.

[0035] A first conductive trace is formed on the pre-treated first organic layer and second inorganic layer. The first conductive trace enters the first groove through the fourth through hole. The first conductive trace is used to electrically connect the driver chip and the driver circuit.

[0036] The substrate and part of the pretreated first organic layer are removed to form the first organic layer, so that the first conductive trace is exposed in the first organic layer. The first organic layer and the second inorganic layer are used to form the carrier plate.

[0037] It is understandable that in the process of manufacturing a display panel, the carrier plate may include organic and inorganic layers stacked along the thickness direction. The inorganic layer can be etched first, and the inorganic layer can be used as a mask for etching the organic layer, thereby reducing one mask, which helps to reduce the design difficulty of the display panel and simplify the manufacturing process.

[0038] In one possible implementation, the preparation method further includes, prior to forming the first organic layer to be treated on the substrate:

[0039] A second pad layer is formed on the substrate.

[0040] Forming a first organic layer to be treated on a substrate includes:

[0041] A first organic layer to be treated is formed on a substrate and a second pad layer, wherein the second pad layer and the first organic layer to be treated are disposed opposite to each other along a second direction.

[0042] The process of exposing and developing the first organic layer to be treated to form a pre-treated first organic layer includes: a first groove and a second pad layer being disposed opposite each other along the thickness direction of the first organic layer to be treated.

[0043] After removing the substrate and before removing part of the pretreated first organic layer, the preparation method further includes:

[0044] Remove the second layer of padding.

[0045] It is understandable that by setting a second pad layer during the fabrication of the display panel, the etching depth of the first organic layer to be treated can be reduced, and finally a groove can be formed on the back of the substrate of the fabricated display panel.

[0046] In one possible implementation, forming the first organic layer to be treated on the substrate includes:

[0047] A first sub-organic layer, an etch stop layer, and a second sub-organic layer to be processed are sequentially formed on the substrate, wherein the material of the etch stop layer is an inorganic material.

[0048] Using the second inorganic layer as a mask, the first organic layer to be treated is exposed and developed to form a pre-treated first organic layer, including: exposing and developing the second sub-organic layer to be treated to form a second sub-organic layer, wherein a first groove is located on the second sub-organic layer and penetrates the second sub-organic layer, wherein the first sub-organic layer, the etch stop layer and the second sub-organic layer constitute the pre-treated first organic layer.

[0049] The process of removing a portion of the pre-treated first organic layer includes: removing a first sub-organic layer and an etch stop layer, wherein a second sub-organic layer is used to form the first organic layer.

[0050] Understandably, during the fabrication of a display panel, an etch stop layer is incorporated into the first organic layer. This etch stop layer is made of an inorganic material. Since the etching gases used for organic and inorganic materials differ during the fabrication process, the gas used to etch organic materials cannot etch inorganic materials. Therefore, during the exposure and development of the second sub-organic layer, the etch stop layer protects the first sub-organic layer from etching and helps control the etching depth. Furthermore, after removing the substrate, during the removal of the first organic layer from one side of the bottom of the display panel to expose the first traces, the etch stop layer helps control the ashing depth and protects the second sub-organic layer from over-etching. The etch stop layer can subsequently be removed using a laser process, allowing the first traces to be exposed on the back side of the display panel.

[0051] In one possible implementation, removing a portion of the pretreated first organic layer includes: removing a portion of the pretreated first organic layer by a full-surface ashing process.

[0052] Understandably, compared to the solution of using laser technology to remove part of the substrate to be processed, the whole-surface ashing process does not require alignment and is not affected by the alignment accuracy. It can completely expose the end of the first conductive trace away from the inorganic insulating layer to facilitate subsequent electrical connection, which is beneficial to improving the manufacturing efficiency of the display panel.

[0053] Fifthly, embodiments of this application provide a method for manufacturing a display panel. The manufacturing method includes:

[0054] A second pad layer is formed on the substrate.

[0055] A first organic layer to be treated and a second inorganic layer to be treated are sequentially formed on the substrate and the second pad layer. The first organic layer to be treated is located between the second inorganic layer to be treated and the substrate. Along the second direction, the second pad layer and the first organic layer to be treated are disposed opposite to each other.

[0056] The second inorganic layer to be treated is exposed and developed to form a second inorganic layer, wherein the second inorganic layer has a fourth through hole that penetrates the second inorganic layer.

[0057] Using the second inorganic layer as a mask, the first organic layer to be treated is exposed and developed to form the first organic layer. The first organic layer has a first through hole that penetrates the first organic layer and connects to a fourth through hole. The second padding layer is exposed inside the first through hole.

[0058] A first conductive trace is formed on the first organic layer and the second inorganic layer. The first conductive trace enters the first through-hole through the fourth through-hole and contacts the second pad layer. The first conductive trace is used to electrically connect the driver chip and the driver circuit. The first organic layer and the second inorganic layer are used to form a carrier board.

[0059] Remove the substrate and the second pad layer to expose the first conductive trace in the first organic layer.

[0060] It is understood that in this embodiment, the first organic layer can be formed before the first inorganic layer, and the second padding layer is exposed within the first via. During the subsequent formation of the first conductive trace, the first conductive trace can directly contact and connect to the second padding layer. After removing the second padding layer, the first conductive trace can be exposed, eliminating the need to remove a portion of the first organic layer on the side of the first conductive trace furthest from the inorganic layer. This simplifies the display panel fabrication process and reduces manufacturing costs. Attached Figure Description

[0061] To illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be described below.

[0062] Figure 1a is a schematic diagram of the structure of a display module in a traditional technical solution;

[0063] Figure 1b is a partial cross-sectional view of the display module shown in Figure 1a at point AA;

[0064] Figure 2a is a schematic diagram of one embodiment of the electronic device provided in this application;

[0065] Figure 2b is an exploded view of the electronic device shown in Figure 2a;

[0066] Figure 3 is a front view of the plane in which module 100 is located;

[0067] Figure 4a is a partial cross-sectional view of one embodiment of the display module shown in Figure 3 at the BB line;

[0068] Figure 4b is a partial cross-sectional view of another embodiment of the display module shown in Figure 3 at the BB line;

[0069] Figure 5a is a partial structural diagram of the display module at another angle;

[0070] Figure 5b is a partial structural diagram of the display module at another angle;

[0071] Figure 6a is a schematic diagram of another embodiment of the structure shown in Figure 5a;

[0072] Figure 6b is a schematic diagram of another embodiment of the structure shown in Figure 5b;

[0073] Figures 7 to 20 are cross-sectional views of the product structure corresponding to one manufacturing method of the display module shown in Figure 4b;

[0074] Figures 21 to 23 are cross-sectional views of the product structure corresponding to another manufacturing method of the display module shown in Figure 4b;

[0075] Figure 24 is a partial cross-sectional view of another embodiment of the display module shown in Figure 4b at point C;

[0076] Figure 25 is another cross-sectional view of the display module shown in Figure 24;

[0077] Figure 26 is another cross-sectional view of the display module shown in Figure 24;

[0078] Figures 27 and 28 are cross-sectional views of the product structure corresponding to one manufacturing method of the display module shown in Figure 26;

[0079] Figure 29 is a partial cross-sectional view of another embodiment of the display module shown in Figure 4b;

[0080] Figures 30 to 36 are cross-sectional views of the product structure corresponding to one manufacturing method of the display module shown in Figure 29;

[0081] Figure 37 is another cross-sectional view of the structure shown in Figure 34;

[0082] Figure 38 is a partial cross-sectional view of another embodiment of the display module shown in Figure 4b at point C;

[0083] Figures 39 to 42 are cross-sectional views of the product structure corresponding to one manufacturing method of the display module shown in Figure 38. Detailed Implementation

[0084] The embodiments of this application are described below with reference to the accompanying drawings. The embodiments described herein with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.

[0085] In the description of the embodiments of this application, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation" and "connection" should be interpreted broadly. For example, "connection" can be a detachable connection or a non-detachable connection; it can be a direct connection or an indirect connection through an intermediate medium. It should be understood that in this application, "electrical connection" can be understood as components physically contacting and conducting electricity; it can also be understood as a form of connection between different components in a circuit structure through physical lines that can transmit electrical signals, such as copper foil or wires on a printed circuit board (PCB). "Connection" and "connected" can both refer to a mechanical connection relationship or a physical connection relationship. For example, A connecting to B or A being connected to B can mean that there are fastening components (such as screws, bolts, rivets, etc.) between A and B, or that A and B are in contact with each other and are difficult to separate.

[0086] Furthermore, the term "fixed" in this document should be interpreted broadly. For example, "fixed" can mean direct fixing or indirect fixing through an intermediate medium. "Fixed" refers to connections where the relative positional relationship remains unchanged after connection. The directional terms used in the embodiments of this application, such as "upper" and "lower," are merely for reference to the directions in the accompanying drawings. Therefore, the directional terms used are for better and clearer explanation and understanding of the embodiments of this application, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application. "Multiple" refers to two or more.

[0087] In the embodiments of this application, the terms "first," "second," "third," and "fourth" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first," "second," "third," and "fourth" may explicitly or implicitly include one or more of that feature.

[0088] References to "one embodiment" or "some embodiments" as used in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, phrases such as "in one embodiment," "in some embodiments," "in other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0089] It is understood that the specific embodiments described herein are merely for explaining the relevant product structure and not for limiting the product structure. It should also be noted that, for ease of description, the accompanying drawings only show the parts relevant to the invention of this application.

[0090] Figure 1a is a schematic diagram of the display module 40 in a conventional technical solution. Figure 1b is a partial cross-sectional view of the display module 40 shown in Figure 1a at point AA. Figure 1b only shows a portion of the structure along line AA. For ease of description, the length direction of the display module 40 is defined as the X-axis. The width direction of the display module 40 is defined as the Y-axis. The thickness direction of the display module 40 is defined as the Z-axis. The plane containing the display module 40 is parallel to the XY plane.

[0091] As shown in Figures 1a and 1b, the display module 40 may include a display panel 30 and a driving chip 310. The display panel 30 may include a carrier plate 301, an inorganic insulating layer 302, an organic insulating layer 303, a driving circuit 304, a flexible electrical connection structure 305, and a pixel structure 306. The pixel structure 306 may include a cathode 3061, an anode 3062, and a light-emitting structure 3063. The light-emitting structure 3063 is connected between the cathode 3061 and the anode 3062. The carrier plate 301, the inorganic insulating layer 302, and the organic insulating layer 303 are stacked. The inorganic insulating layer 302 is located between the organic insulating layer 303 and the carrier plate 301. The first portion 3041 of the driving circuit 304 is disposed within the inorganic insulating layer 302, and the second portion 3042 of the driving circuit 304 is disposed within the organic insulating layer 303. The second portion 3042 of the driving circuit 304 is electrically connected between the first portion 3041 of the driving circuit 304 and the pixel structure 306. The first portion 3041 of the driving circuit 304 includes functional components of the driving circuit 304, such as thin-film transistors, capacitors, etc. The second portion 3042 of the driving circuit 304 is used for connections between different components of the first portion 3041 of the driving circuit 304, and for connections between the pixel structure 306 and the first portion 3041 of the driving circuit. The driving chip 310 is disposed on the surface of the carrier plate 301 away from the inorganic insulating layer 302.

[0092] A flexible electrical connection structure 305 is located on one side of the display panel 30 and is used to electrically connect the second part 3042 of the driving circuit 304 and the driving chip 310. Exemplarily, the flexible electrical connection structure 305 may include conductive traces 3051 and a flexible substrate 3052. The conductive traces 3051 are embedded within the flexible substrate 3052. The flexible substrate 3052 serves to protect and insulate the conductive traces 3051. The conductive traces 3051 are electrically connected between the driving chip 310 and the driving circuit 304.

[0093] For example, the display panel 30 may include a display area 307 and a non-display area 308. Figure 1a illustrates the distinction between the display area 307 and the non-display area 308 using dotted lines and fill patterns. The display area 307 can display images. The area containing multiple pixel structures 306 is the display area 307 of the display panel 30. The non-display area 308 may consist of non-displayable structures surrounding the display area 307, such as flexible electrical connection structures 305. The ratio of the area of ​​the display area 307 to the area of ​​the non-display area 308 can also be called the screen-to-body ratio. When the sum of the areas of the display area 307 and the non-display area 308 remains constant, the smaller the area of ​​the non-display area 308 and the larger the display area 307, the larger the screen-to-body ratio. Increasing the screen-to-body ratio of the display panel 30 improves the user experience.

[0094] It is understandable that the flexible electrical connection structure 305 can be formed after the fabrication of the carrier plate 301, the inorganic insulating layer 302, the organic insulating layer 303, the driving circuit 304, and the pixel structure 306; or it can be fabricated in the same process as the second part 3042 of the driving circuit 304 and the organic insulating layer 303, so that the flexible electrical connection structure 305 is electrically connected to the second part 3042 of the driving circuit 304 during the fabrication process.

[0095] In some conventional technical solutions, the fourth portion 3044 of the driving circuit 304 is disposed within the organic insulating layer 303. The fourth portion 3044 of the driving circuit 304 is electrically connected between the driving circuit 304 and the flexible electrical connection structure 305. The fourth portion 3044 of the driving circuit 304 can be used to lead the electrical signals of the driving circuit 304 from the display area 307 to the non-display area 308.

[0096] In conventional solutions, the driver chip 310 is placed on the back of the display panel 30, that is, on the surface of the carrier plate 301 away from the inorganic insulating layer 302. This reduces the area of ​​the non-display area 308 of the display panel 30 and increases the screen-to-body ratio. A flexible electrical connection structure 305 is provided, which bends to electrically connect the driver circuit 304 and the driver chip 310 from the side. A portion of the non-display area 308 of the display panel 30 is used to accommodate the flexible electrical connection structure 305, resulting in a relatively large area of ​​the non-display area 308. Furthermore, the flexible electrical connection structure 305 requires bending, causing significant stress on the conductive traces 3051 and the flexible substrate 3052 after bending. This can easily lead to breakage of the conductive traces 3051 and the flexible substrate 3052. Cracks in the conductive traces 3051 reduce their conductivity, thus affecting the display effect of the display panel 30.

[0097] The following description, with reference to the accompanying drawings, details how this application further reduces the area of ​​the non-display area 308 of the display panel 30, thereby increasing the screen-to-body ratio of the display panel 30. Furthermore, the technical solution of this application can also improve the reliability of the electrical connection between the driving circuit 304 and the driving chip 310 while reducing the area of ​​the non-display area 308 of the display panel 30.

[0098] Figure 2a is a schematic diagram of the structure of an electronic device 1000 provided in an embodiment of this application. It should be noted that the accompanying drawings of this application only schematically show some components included in the electronic device 1000; the actual size, actual position, and actual structure of these components are not limited by the figures. Similarly, the following figures only schematically show some components; the actual size, actual position, and actual structure of these components are not limited by the following figures, and will not be elaborated further below.

[0099] As shown in Figure 2a, this application embodiment provides an electronic device 1000. The electronic device 1000 can be a mobile phone, tablet personal computer, laptop computer, personal digital assistant (PDA), personal computer, television, laptop computer, in-vehicle equipment, wearable device, augmented reality (AR) glasses, AR headset, virtual reality (VR) glasses, or VR headset, etc., all devices with a display module 100. The electronic device 1000 of the embodiment shown in Figure 2a is described using a mobile phone as an example.

[0100] Figure 2b is an exploded view of the structure of the electronic device 1000 shown in Figure 2a.

[0101] As shown in Figures 2a and 2b, the electronic device 1000 includes a display module 100, a housing 200, and electronic components 300. The housing 200 can serve as a structural support component for the display module 100 and the electronic components 300. Specifically, this application does not limit the structure of the housing 200.

[0102] For example, the display module 100 is mounted on the housing 200. The display module 100 and the housing 200 can enclose the internal space of the electronic device 1000. The display module 100 can be a flat screen, that is, the edges of the display module 100 are not curved to form an arc surface. Alternatively, the display module 100 can be a curved screen, that is, the edges of the display module 100 are curved to form an arc surface. In addition, the display module 100 can be a non-foldable rigid screen or a foldable screen.

[0103] For example, the electronic device 300 can be mounted on the housing 200, and the electronic device 300 can be located inside the electronic device 1000. The electronic device 300 can be a camera module, a fingerprint module, a home button, an earpiece, or a speaker, etc.

[0104] As shown in Figure 2b, the display module 100 may include a display panel 10 and a cover plate 20. The cover plate 20 is stacked on the top surface 10a of the display panel 10. The cover plate 20 can be used to protect the display panel 10. For ease of description, the length direction of the display panel 10 is defined as the X-axis. The width direction of the display panel 10 is defined as the Y-axis. The thickness direction of the display panel 10 is defined as the Z-axis.

[0105] For example, the cover plate 20 can be made of glass or polyimide, etc. The display panel 10 can be an organic light-emitting diode (OLED) panel, a quantum dot light-emitting diode (QLED) panel, an active-matrix organic light-emitting diode (AMOLED) panel, etc. This embodiment will be described using an OLED display panel 10 as an example.

[0106] Figure 3 is a front view of the display module 100 in the plane. The plane in which the display module 100 is located is parallel to the XY plane. Figure 3 illustrates the positional relationship between the display panel 10 and the driver chip 8 of the display module 100 in the plane in which the display module 100 is located.

[0107] As shown in Figure 3, the display panel 10 may include a display area 101 (Active Area, AA) and a non-display area 102. The non-display area 102 is connected to the display area 101. For example, the non-display area 102 may surround the display area 101. The display area 101 and the non-display area 102 are schematically distinguished by dotted lines in Figure 3. The display area 101 can display images. The non-display area 102 may consist of non-displayable structures surrounding the display area 101. It is understood that the ratio of the area of ​​the display area 101 to the area of ​​the non-display area 102 can also be called the screen-to-body ratio. When the sum of the areas of the display area 101 and the non-display area 102 remains constant, the smaller the area of ​​the non-display area 102 and the larger the display area 101, the larger the screen-to-body ratio. Increasing the screen-to-body ratio of the display panel 10 is beneficial to improving the user experience.

[0108] Figure 4a is a partial cross-sectional view of one embodiment of the display module 100 shown in Figure 3 at line BB.

[0109] As shown in Figures 2b, 3, and 4a, the display module 100 may further include a driver chip 8. The driver chip 8 may be disposed on the surface of the display panel 10 away from the cover plate 20. The driver chip 8 may be used to drive the display panel 10 to display images.

[0110] Exemplarily, the display module 100 may further include conductive ink 45 and an insulating protective layer 46. The conductive ink 45 and the insulating protective layer 46 may be disposed on the surface of the display panel 10 away from the cover plate 20. The conductive ink 45 is electrically connected between the display panel 10 and the driver chip 8, and can be used for the transmission of drive signals between the driver chip 8 and the display panel 10. The insulating protective layer 46 may be disposed on the display panel 10 and cover the conductive ink 45. The insulating protective layer 46 can be used for the protection and insulation of the conductive ink 45.

[0111] As shown in Figures 3 and 4a, the display panel 10 may include a carrier plate 1, an inorganic insulating layer 2, an organic insulating layer 3, a driving circuit 41, an electrical connection structure 5, and a pixel structure 6. In this embodiment, during use, the pixel structure 6 is located on the side of the carrier plate 1 closer to the user. In the display module 100, the pixel structure 6 is located on the side of the carrier plate 1 closer to the cover plate 20. Figure 4a only illustrates one pixel structure 6 and part of the driving circuit 41; in other locations, the display panel 10 may have more pixel structures 6 and driving circuits 41.

[0112] Exemplarily, the carrier plate 1 serves as a support substrate for the layers above it (e.g., drive circuit 41). The material of the carrier plate 1 may include polyimide (PI), polyethylene terephthalate (PET), paper, metal, ultra-thin glass, etc. It is understood that the carrier plate 1 may be a single material or a composite of multiple different materials. The carrier plate 1 may be a single-layer structure or a multi-layer structure; compared to a single-layer structure, a multi-layer structure allows the carrier plate 1 to have better thickness and strength.

[0113] In some embodiments, the carrier plate 1 may include a first surface 103 and a second surface 104 disposed opposite to each other. The first surface 103 and the second surface 104 may be arranged along the thickness direction of the carrier plate 1. The first surface 103 may be located on the side of the second surface 104 near the top surface 10a of the display panel 10. Exemplarily, the second surface 104 may be the bottom surface of the display panel 10.

[0114] As shown in Figures 3 and 4a, the driver chip 8 can be disposed on the second surface 104 of the carrier plate 1, that is, the surface of the carrier plate 1 away from the inorganic insulating layer 2. It is understood that, compared to the scheme where the driver chip 8 is disposed on the cover plate 20, in this embodiment, the driver chip 8 is disposed on the second surface 104 of the carrier plate 1 of the display panel 10. Along the thickness direction of the display panel 10, the driver chip 8 and the display area 101 of the display panel 10 can be disposed opposite each other, which is beneficial to reducing the non-display area of ​​the display module 100 and increasing the screen-to-body ratio of the display device.

[0115] As shown in Figure 4a, the inorganic insulating layer 2 can be disposed on the first surface 103 of the carrier plate 1. Exemplarily, the material of the inorganic insulating layer 2 can be an inorganic insulating material, such as SiNx (silicon nitride), SiO2 (silicon dioxide), Si (silicon), SiNxO (silicon oxynitride), Al2O3 (alumina), etc. It is understood that the material of the inorganic insulating layer 2 can be a single material or a composite of multiple different materials.

[0116] As shown in Figure 4a, the organic insulating layer 3 can be disposed on the surface of the inorganic insulating layer 2 away from the carrier plate 1. Exemplarily, the material of the organic insulating layer 3 can be an organic insulating material, such as polyimide (PI), or polyethylene terephthalate (PET). It is understood that the material of the organic insulating layer 3 can be a single material or a composite of multiple different materials.

[0117] As shown in Figure 4a, the pixel structure 6 can be disposed on the surface of the organic insulating layer 3 away from the inorganic insulating layer 2. The pixel structure 6 can be used to realize the display function of the display panel 10, and the pixel structure 6 is also called a light-emitting device. The area where the pixel structure 6 is located is the display area 101 of the display panel 10. It can be understood that the display panel 10 can include one or more pixel structures 6. As shown in Figure 3, the pixel structure 6 is represented by a square in Figure 3. When there are multiple pixel structures 6, the multiple pixel structures 6 can be arranged in an array within the plane of the display panel 10.

[0118] As shown in Figure 4a, the driving circuit 41 can be used to control the display panel 10 to display images. The driving circuit 41 can also be used to drive the pixel structure 6 to emit or turn off. The driving circuit 41 may include a first part 411, a second part 412, and a third part 413. The first part 411 of the driving circuit 41 may be disposed within the inorganic insulating layer 2, and may include functional devices such as capacitors, inductors, and thin-film transistors. The second part 412 and the third part 413 of the driving circuit 41 may be disposed within the organic insulating layer 3. The second part 412 of the driving circuit 41 may be electrically connected between the first part 411 of the driving circuit 41 and the driving chip 8. The third part 413 of the driving circuit 41 may be electrically connected between the first part 411 of the driving circuit 41 and the pixel structure 6.

[0119] It is understood that the first portion 411 of the driving circuit 41 is disposed within the inorganic insulating layer 2, and the second portion 412 and the third portion 413 of the driving circuit 41 are disposed within the organic insulating layer 3. The inorganic insulating layer 2 can be used for insulation protection of the first portion 411 of the driving circuit 41. The organic insulating layer 3 can be used for insulation protection of the second portion 412 and the third portion 413 of the driving circuit 41. Furthermore, the organic insulating layer 3 can also serve as a planarization layer (PLN) to facilitate the fabrication of devices, such as pixel structures 6, on the organic insulating layer 3 during the fabrication of the display panel 10.

[0120] As shown in Figure 4a, the electrical connection structure 5 can be used for signal transmission between the driver chip 8 and the driver circuit 41. Exemplarily, the electrical connection structure 5 may include a first conductive trace 51, a second conductive trace 52, and a third conductive trace 53. The first conductive trace 51 is disposed on the carrier plate 1. The second conductive trace 52 is disposed on the inorganic insulating layer 2 and is spaced apart within the inorganic insulating layer 2 and from the first portion 411 of the driver circuit 41 within the inorganic insulating layer 2. The first conductive trace 51 is electrically connected between the driver chip 8 and the second conductive trace 52. The third conductive trace 53 is disposed on the organic insulating layer 3. The third conductive trace 53 is electrically connected between the second conductive trace 52 and the second portion 412 of the driver circuit 41. The inorganic insulating layer 2 can also be used for insulation between the second conductive trace 52 and the first portion 411 of the driver circuit 41 within the inorganic insulating layer 2. The organic insulating layer 3 can also be used for insulation between the third conductive trace 53 and the pixel structure 6.

[0121] It is understood that in the embodiments of this application, the display panel 10, by providing the electrical connection structure 5, can realize the electrical connection between the driving circuit 41 and the driving chip 8 inside the display panel 10. The driving signal can be transmitted from the second surface 104 of the carrier plate 1 to the driving circuit 41 inside the display panel 10 through the electrical connection structure 5, without needing to pass through the side of the display panel 10. As shown in FIG1b, the technical solution of the embodiments of this application eliminates the flexible electrical connection structure 305, which is beneficial to reduce the area of ​​the non-display area 102 of the display panel 10, thereby achieving a narrow bezel of the display panel 10 and improving the screen ratio of the display panel 10. Furthermore, the electrical connection structure 5 of this application is directly disposed within the carrier plate 1, the inorganic insulating layer 2, and the organic insulating layer 3, without bending. Therefore, the electrical connection structure 5 is not prone to breakage, the electrical connection between the driving chip 8 and the driving circuit 41 has better reliability, and the display reliability of the display panel 10 is better. Furthermore, as shown in Figure 1b, compared to traditional technical solutions, the electrical connection structure 5 of this application is a newly added separate structure inside the display panel 10. It is arranged at intervals within the inorganic insulating layer 2 and the first part 411 of the driving circuit 41 within the inorganic insulating layer 2. Electrical connection is achieved between the organic insulating layer 3 and the driving circuit 41. No changes need to be made to the structure near the driving circuit 41. The structural modifications to the display panel 10 are minor, and the design and manufacturing difficulty of the display panel 10 is relatively low.

[0122] For example, the material of the first conductive trace 51 can be a conductive metal or other non-metallic conductive material, and this application does not impose any restrictions. The materials of the second conductive trace 52 and the third conductive trace 53 can be set with reference to the first conductive trace 51.

[0123] For example, the number of first conductive traces 51 can be one or more. When there are multiple first conductive traces 51, the multiple first conductive traces 51 can be arranged at intervals. The number of second conductive traces 52 and the number of third conductive traces 53 can be set with reference to the number of first conductive traces 51.

[0124] It is understandable that the number of first conductive traces 51, second conductive traces 52, and third conductive traces 53 can be the same, with one first conductive trace 51 electrically connected to one second conductive trace 52, and one second conductive trace 52 electrically connected to one third conductive trace 53. Alternatively, the number of first conductive traces 51, second conductive traces 52, and third conductive traces 53 can be different, with one first conductive trace 51 electrically connected to multiple second conductive traces. Different second conductive traces are electrically connected to different pixel structures 6. In this way, the driving signals of multiple pixel structures 6 can be aggregated, reducing the openings on the second surface 104 of the carrier plate 1, thereby reducing the path of light eroding the interior of the display panel 10 from the second surface 104 of the carrier plate 1.

[0125] In some embodiments, when there are multiple pixel structures 6, the electrical connection structure 5 can be located on one side of the multiple pixel structures 6. In this way, the structure at the location of the pixel structure 6 does not need to be changed during the fabrication of the display panel 10, and the internal structure of the display panel 10 is modified less, which helps to reduce the design and fabrication difficulty of the display panel.

[0126] In some embodiments, the driving circuit 41 may further include a fourth portion 414. The fourth portion 414 of the driving circuit 41 may be located within the organic insulating layer 3, and is electrically connected between the third conductive trace 53 and the second portion 412 of the driving circuit 41. The fourth portion 414 of the driving circuit 41 extends from the display area 101 to the non-display area 102. The electrical connection structure 5 may be located in the non-display area 102 of the display panel 10. Thus, the electrical connection structure 5 can be located in the non-display area 102 while still maintaining electrical connection with the first portion 411 of the driving circuit 41.

[0127] It is understandable that the electrical connection structure 5 can be located in the non-display area 102 of the display panel 10. The electrical connection structure 5 can be connected to the fourth part 414 of the driving circuit 41 in the non-display area 102, thereby electrically connecting to the second part 412 of the driving circuit 41, and further electrically connecting to the first part 411 of the driving circuit 41. Setting the electrical connection structure 5 in the non-display area 102 will not affect the device arrangement in the display area 101. During the fabrication of the display panel 10, the device arrangement in the display area 101 of the display panel 10 does not need to be changed, which helps to reduce the design and fabrication difficulty of the display panel 10. In addition, if the electrical connection structure 5 is set in the display area 101, during the fabrication of the display panel 10, it is necessary to make holes in the carrier plate 1 and the inorganic insulating layer 2, which will reduce the waterproof performance of the display area 101, and the pixel structure 6 will be easily corroded by moisture, thus affecting its light-emitting performance. In this embodiment, Figure 3 illustrates the positional relationship between the first conductive trace 51 of the electrical connection structure 5 and the display area 101. As can be seen from Figures 3 and 4a, by setting the electrical connection structure 5 in the non-display area 102, during the fabrication of the display panel 10, opening holes in the non-display area 102 to form the electrical connection structure 5 will not affect the waterproof performance of the display area 101. The pixel structure 6 is not easily corroded by water vapor, and the light emission reliability of the pixel structure 6 is better.

[0128] In other embodiments, the electrical connection structure 5 may be partially located in the non-display area 102 and partially located in the display area 101. For example, along the thickness direction of the display panel 10, the projection of the electrical connection structure 5 onto the carrier plate 1 may partially coincide with the projection of the pixel structure 6 onto the carrier plate 1.

[0129] In some embodiments, the fourth portion 414 of the driving circuit 41 may include a plurality of spaced first signal lines. Each first signal line may electrically connect to a plurality of pixel structures 6 and correspondingly connect to a third conductive trace 53. This reduces the number of third conductive traces 53, thereby reducing the area of ​​the non-display area 102. The driving chip 8 can control the lighting / turning off of the plurality of pixel structures 6 via a single third conductive trace 53.

[0130] In some embodiments, the third portion 413 of the driving circuit 41 may include a plurality of spaced second signal lines. One second signal line may be electrically connected to one pixel structure 6 or to multiple pixel structures 6. When one second signal line is electrically connected to multiple pixel structures 6, the driving signals of multiple pixel structures 6 can be further concentrated into a single switching thin-film transistor for control, which can reduce the number of third conductive traces 53.

[0131] It is understood that the number of first conductive traces 51, second conductive traces 52, and third conductive traces 53, as well as the number of first signal lines and second signal lines, can be adjusted according to requirements and are not limited to the one-to-one electrical connection relationship shown in Figure 4a.

[0132] In some embodiments, conductive ink 45 can be disposed on the second surface 104 of the carrier plate 1 and electrically connected between the first conductive trace 51 and the driver chip 8. An insulating protective layer 46 can be disposed on the second surface 104 of the carrier plate 1 and cover the conductive ink 45. The insulating protective layer 46 can be used for insulation and protection of the conductive ink 45. It is understood that the position of the driver chip 8 on the second surface 104 of the carrier plate 1 is not limited to the vicinity of the first conductive trace 515; the specific position can be designed according to the device arrangement on or near the second surface 104 of the carrier plate 1. When the driver chip 8 is far from the first conductive trace 51, the conductive ink 45 can be used to achieve an electrical connection between the first conductive trace 51 and the driver chip 8, making the placement of the driver chip 8 more flexible. When the display panel 10 is used in an electronic device 1000, the driver chip 8 is located inside the electronic device 1000, making the placement of the driver chip 8 more flexible, allowing for more choices in the internal device arrangement of the electronic device 1000, and allowing for design according to requirements. For example, the material of the conductive ink 45 can be conductive silver paste.

[0133] Figure 4b is a partial cross-sectional view of another embodiment of the display module 100 shown in Figure 3 at the BB line. Figure 4b only illustrates one pixel structure 6 and part of the driving circuit 41. At other locations on the BB line, the display module 100 may have more pixel structures 6 and driving circuits 41.

[0134] As shown in Figure 4b, the carrier plate 1 may include a first organic layer 11, a second organic layer 12, a first inorganic layer 13, a second inorganic layer 14, and a third inorganic layer 15. The first organic layer 11, the second organic layer 12, the first inorganic layer 13, the second inorganic layer 14, and the third inorganic layer 15 are stacked, with the second inorganic layer 14 located between the first inorganic layer 13 and the first organic layer 11, and the second organic layer 12 located between the first inorganic layer 13 and the third inorganic layer 15. The first organic layer 11 and the second organic layer 12 are made of organic materials, while the first inorganic layer 13, the second inorganic layer 14, and the third inorganic layer 15 are made of inorganic materials. For example, the material of the first organic layer 11 and the second organic layer 12 may be polyimide (PI). The material of the first inorganic layer 13, the second inorganic layer 14, and the third inorganic layer 15 may be silicon oxide, aluminosilicate oxide, etc. It is understood that Figure 4b shows an example of a laminated structure of the support plate 1. In other embodiments, the support plate 1 may include more or fewer layers. For example, the support plate 1 may include only a first organic layer 11, a second organic layer 12, and a first inorganic layer 13. Alternatively, the support plate 1 may also be a single-layer structure of a single material.

[0135] As shown in Figure 4b, the first conductive trace 51 may include a first trace 511 and a second trace 512. The first trace 511 may be disposed on the first organic layer 11 and the second inorganic layer 14. The second trace 512 may be disposed on the first inorganic layer 13, the second organic layer 12, and the third inorganic layer 15, and connected to the first trace 511. It can be understood that when the carrier plate 1 is a multilayer stack of organic and inorganic layers with a large thickness, the first conductive trace 51 can be configured as multiple traces connected sequentially along the thickness direction of the carrier plate 1. During the fabrication process of the display panel 10, the multiple traces of the first conductive trace 51 can be fabricated in different fabrication steps, reducing the etching depth of each step and reducing the fabrication difficulty.

[0136] In some embodiments, along the thickness direction of the carrier plate 1, the first trace 511 may be partially located between the first inorganic layer 13 and the first organic layer 11, and connected to the second trace 512. The second trace 512 may be partially located on the surface of the second organic layer 12 near the inorganic insulating layer 2, and connected to the second conductive trace.

[0137] For example, the first trace 511 includes a first segment 5111 and a second segment 5112 (schematically distinguished by dashed lines in FIG. 4b). The first segment 5111 of the first trace 511 is disposed within the first organic layer 11. The second segment 5112 of the first trace 511 is connected to the end of the first segment 5111 of the first trace 511 near the inorganic insulating layer 2 and is electrically connected to the first segment 5111. Along the thickness direction of the display panel 10, the second segment 5112 of the first trace 511 may be located between the second inorganic layer 14 and the first inorganic layer 13. In other words, along the thickness direction of the display panel 10, the first inorganic layer 13 may be located between the second segment 5112 of the first trace 511 and the second organic layer 12, such that the second segment 5112 of the first trace 511 is separated from the second organic layer 12. Along the thickness direction of the display panel 10, the second inorganic layer 14 can be located between the second segment 5112 of the first trace 511 and the first organic layer 11, so that the second segment 5112 of the first trace 511 and the first organic layer 11 are separated.

[0138] Understandably, compared to the scheme where the second segment 5112 of the first trace 511 is directly connected to the first organic layer 11, in this embodiment, the second inorganic layer 14 can be used to strengthen the connection between the first trace 511 and the first organic layer 11, reducing the risk of external moisture eroding the interior of the display panel 10 due to gaps between the first trace 511 and the first organic layer 11. Similarly, the first inorganic layer 13 can be used to strengthen the connection between the first trace 511 and the second organic layer 12, reducing the risk of external moisture eroding the interior of the display panel 10 due to gaps between the first trace 511 and the second organic layer 12.

[0139] In other embodiments, the carrier plate 1 may further include a fifth inorganic layer (not shown). Along a first direction, the fifth inorganic layer may connect the first segment 5111 of the first trace 511 and the first organic layer 11. The first direction is perpendicular to the thickness direction of the display panel 10. Thus, the fifth inorganic layer can be used to strengthen the connection between the first segment 5111 of the first trace 511 and the first organic layer 11, reducing the risk of external moisture eroding the interior of the display panel 10 due to gaps between the first trace 511 and the first organic layer 11.

[0140] In some embodiments, the second trace 512 may be partially located on the surface of the second organic layer 12 near the inorganic insulating layer 2 and connected to the second conductive trace 52. Exemplarily, the second trace 512 may include a first segment 5121 and a second segment 5122, schematically distinguished by dashed lines in FIG. 4b. The first segment 5121 of the second trace 512 is disposed within the first inorganic layer 13 and the second organic layer 12 and connects to the second segment 5112 of the first trace 511. The first segment 5121 of the second trace 512 is electrically connected to the second segment 5112 of the first trace 511. The second segment 5122 of the second trace 512 is connected to one end of the first segment 5121 of the second trace 512 near the inorganic insulating layer 2 and is electrically connected to the first segment 5121 of the second trace 512. Along the thickness direction of the display panel 10, the second segment 5122 of the second trace 512 is located between the second organic layer 12 and the inorganic insulating layer 2.

[0141] For example, along the thickness direction of the display panel 10, the projection of the first segment 5121 of the second trace 512 on the first organic layer 11 and the projection of the second segment 5112 of the first trace 511 on the first organic layer 11 at least partially overlap, while the projection of the first segment 5121 of the second trace 512 on the first organic layer 11 and the projection of the first segment 5111 of the first trace 511 on the first organic layer 11 are offset.

[0142] In this way, the positions of the first trace 511 within the first organic layer 11 and the second trace 512 within the second organic layer 12 are staggered. During the fabrication of the display panel 10, the positions where the first trace 511 passes through the first organic layer 11 and the second trace 512 pass through the second organic layer 12 are different, which helps to reduce the etching depth and reduce the fabrication cost.

[0143] For example, along the thickness direction of the display panel 10, the third inorganic layer 15 may be located between the second segment 5122 of the second trace 512 and the second organic layer 12. The second trace 512 is disposed on the third inorganic layer 15 and extends into the second organic layer 12. The third inorganic layer 15 serves to separate the second trace 512 and the second organic layer 12. In this way, the third inorganic layer 15 can be used to strengthen the connection between the second segment 5122 of the second trace 512 and the second organic layer 12, reducing the risk of external moisture eroding the interior of the display panel 10 due to gaps between the second trace 512 and the second organic layer 12.

[0144] For example, the carrier plate 1 may further include a fourth inorganic layer 16. Along the first direction, the fourth inorganic layer 16 may be located between the second organic layer 12 and the first segment 5121 of the second trace 512. The first segment 5121 of the second trace 512 is disposed between the first inorganic layer 13 and the second organic layer 12, and the fourth inorganic layer 16 serves to separate the second trace 512 from the second organic layer 12. Thus, the fourth inorganic layer 16 can enhance the connection strength between the first segment of the second trace 512 and the wall of the third through-hole 121, reducing the risk of external moisture eroding the interior of the display panel 10 due to gaps between the second trace 512 and the second organic layer 12.

[0145] For example, during the fabrication of the display panel 10, a first through-hole 111 can be provided in the first organic layer 11, the first through-hole 111 can penetrate the first organic layer 11, a fourth through-hole 141 can be provided in the second inorganic layer 14, the fourth through-hole 141 can penetrate the second inorganic layer 14 and connect to the first through-hole 111, and the first trace 511 can pass through the fourth through-hole 141 and enter the first through-hole 111; a second through-hole 131 can be provided in the first inorganic layer 13, the second through-hole 131 can penetrate the first inorganic layer 13, a third through-hole 121 can be provided in the second organic layer 12, the third through-hole 121 can penetrate the second organic layer 12, and a fifth through-hole 151 can be provided in the third inorganic layer 15, the fifth through-hole 151 can penetrate the third inorganic layer 15, and the second trace 512 can pass through the fifth through-hole 151 and the third through-hole 121 and enter the second through-hole 131, connecting to the first trace 511 and electrically connecting to the first trace 511.

[0146] It is understandable that during the fabrication of the display panel 10, after the third inorganic layer 15 is exposed and etched to form the fifth via 151, the fourth inorganic layer 16 is formed. The fourth inorganic layer 16 can be positioned in various ways within the carrier plate 1. For example, as shown in Figure 4b, the fourth inorganic layer 16 can be partially located within the fifth via 151, connecting to the third inorganic layer 15; partially located on the side of the third inorganic layer 15 away from the second inorganic layer 14, connecting to the third inorganic layer 15; and partially located within the third via 121, connecting to the second organic layer 12. After the second trace 512 is formed, the fourth inorganic layer 16 can be partially located between the second organic layer 12 and the second trace 512, and partially located between the third inorganic layer 15 and the second trace 512. Alternatively, the fourth inorganic layer 16 can be partially located within the fifth via 151. Within 51, the third inorganic layer 15 is connected, and a portion of it is within the third through-hole 121, connecting to the second organic layer 12. After the second trace 512 is formed, the fourth inorganic layer 16 can be partially located between the second organic layer 12 and the second trace 512, and partially located between the third inorganic layer 15 and the second trace 512; alternatively, the fourth inorganic layer 16 can be disposed solely within the third through-hole 121 of the second inorganic layer 14, connecting to the second organic layer 12. After the second trace 512 is formed, the fourth inorganic layer 16 is only connected between the second organic layer 12 and the second trace 512. The shape and position of the fourth inorganic layer 16 can be selectively configured according to requirements, and this application does not impose any restrictions.

[0147] During the formation of the second trace 512, by setting a fourth inorganic layer 16 on the wall of the third through hole 121, it is beneficial to fix the second trace 512 to the wall of the third through hole 121 and reduce the risk of the second trace 512 breaking during the deposition process.

[0148] Figure 5a is a partial structural diagram of module 100 from another angle. It is understood that, for ease of understanding, different lines are used in Figure 5a to represent the outlines of different structures.

[0149] As shown in Figures 4b and 5a, the display module 100 may further include a circuit board 44. The circuit board 44 may be fixedly connected to the second surface 104 of the carrier plate 1 by a non-conductive film (NCF) adhesive 47. Exemplarily, the circuit board 44 may include a copper layer 441, and conductive ink 45 may contact and electrically connect to the copper layer.

[0150] In some embodiments, the driver chip 8 can be electrically connected to the circuit board 44. Thus, the driver chip 8 can be electrically connected via the circuit board 44, conductive ink 45, and electrical connection structure 5. Exemplarily, the driver chip can be fixedly connected to the surface of the circuit board 44 away from the carrier plate 1. The driver chip 8 can be electrically connected to the copper layer 441 of the circuit board 44. The electrical connection structure 5 can be electrically connected to the copper layer 441 of the circuit board 44. The electrical connection structure 5 can achieve electrical connection with the driver chip 8 via conductive ink 45 and the copper layer 441 of the circuit board 44.

[0151] In some embodiments, the carrier plate 1 includes a first surface 103 and a second surface 104 disposed opposite to each other, and an inorganic insulating layer 2 is disposed on the first surface 103. The surface of the first conductive trace 51 away from the inorganic insulating layer 2 is flush with the second surface 104. The first conductive trace 51 can directly contact and connect to the second surface. In this way, the thickness of the conductive ink 45 is small in the direction perpendicular to the thickness of the display panel 10. During the fabrication of the display module 100, the electrical signal of the first conductive trace 51 is transmitted to the driver chip 8 through the conductive ink 45. The climbing height of the conductive ink 45 is small, and the conductive ink 45 is not easy to break. Therefore, the electrical connection reliability of the conductive ink 45 is better. It can be understood that the fact that the end of the first conductive trace 51 away from the inorganic insulating layer 2 is flush with the second surface 104 means that the surface of the first conductive trace 51 away from the inorganic insulating layer 2 and the second surface 104 are directly contacted and connected. Along the thickness direction of the display panel 10, there is no height difference or a small height difference at the connection position of the surface of the first conductive trace 51 away from the inorganic insulating layer 2 and the second surface 104.

[0152] For example, the inorganic insulating layer 2 may include one or more inorganic sublayers, which may be arranged along the thickness direction of the display panel 10. Different materials may be selected for different sublayers as needed.

[0153] In some embodiments, when the inorganic insulating layer 2 comprises multiple sublayers, the arrangement of the second conductive trace 52 can be the same as the arrangement of the first conductive trace 51 shown in FIG4b. For example, FIG4b illustrates that the inorganic insulating layer 2 comprises six inorganic sublayers, namely the first inorganic sublayer 21, the second inorganic sublayer 22, the third inorganic sublayer 23, the fourth inorganic sublayer 24, the fifth inorganic sublayer 25, and the sixth inorganic sublayer 26.

[0154] For example, the first portion 411 of the driving circuit 41 may include a plurality of spaced-apart first conductive blocks 401. The first conductive blocks 401 may extend in the XY plane. The plurality of first conductive blocks 401 may cooperate with each other to form functional devices such as capacitors, inductors, and thin-film transistors. The first portion 411 of the driving circuit 41 may also include a plurality of spaced-apart second conductive blocks 402. The second conductive blocks 402 may extend along a second direction, which forms an angle with the XY plane, for example, the second direction may be at 90°, 70°, 60°, 45°, 20°, etc. The second conductive blocks 402 are electrically connected to the first conductive blocks 401 and are exposed on the surface of the inorganic insulating layer 2 near the organic insulating layer 3. The second conductive blocks 402 may be used to transmit electrical signals of the functional devices to the organic insulating layer 3, or to introduce electrical signals that need to be transmitted to the functional devices from the organic insulating layer 3.

[0155] In some embodiments, the organic insulating layer 3 may include multiple organic sublayers. It is understood that when the organic insulating layer 3 includes multiple organic sublayers, the materials of the different organic sublayers may be the same or different. For example, the organic insulating layer 3 may include a first organic sublayer 31, a second organic sublayer 32, and a third organic sublayer 33 stacked sequentially. The first organic sublayer 31 may be disposed on the surface of the inorganic insulating layer 2 away from the carrier plate 1. The second organic sublayer 32 may be disposed on the surface of the first organic sublayer 31 away from the carrier plate 1. The third organic sublayer 33 may be disposed on the surface of the second organic sublayer 32 away from the first organic sublayer 31. The fourth portion 414 of the driving circuit 41 may be disposed within the first organic sublayer 31, and partially located on the surface of the first organic sublayer 31 away from the carrier plate 1. The second organic sublayer 32 may cover the fourth portion 414 of the driving circuit 41. The second signal line may be disposed in the first organic sublayer 31, the second organic sublayer 32, and the third organic sublayer 33, and spaced apart from the fourth portion 414 of the driving circuit 41. The third conductive trace 53 can be disposed within the first organic sublayer 31 and the second organic sublayer 32. The third organic sublayer 33 can cover the third conductive trace 53 to insulate the third conductive trace 53 from the pixel structure 6.

[0156] In some embodiments, when the organic insulating layer 3 includes multiple sublayers, the arrangement of the third conductive trace 53 can be the same as the arrangement of the first conductive trace 51 shown in FIG4b.

[0157] As shown in Figure 4b, the pixel structure 6 may include an anode 61, an emission layer 62, and a cathode 63 stacked sequentially. The emission layer 62 is located between the anode 61 and the cathode 63.

[0158] For example, the material of the anode 61 can be a transparent conductive material, such as indium tin oxide.

[0159] For example, the cathode 63 can be fabricated using a full-surface vapor deposition method, so the multiple cathodes 63 included in the multiple pixel structures 6 can be a continuous, single-layer structure. The continuous-layer structure can be partially disposed on the surface of the pixel definition layer 71 away from the organic insulating layer 3, and partially disposed on the surface of the light-emitting structure 62 away from the organic insulating layer 3. The cathode 63 can be made of a magnesium-silver alloy or other silver-containing alloys.

[0160] For example, the material of the luminescent structure 62 can be an organic material, including organic small molecule luminescent materials, coordination luminescent materials, and polymers.

[0161] As shown in Figure 4b, the display panel 10 may further include a pixel definition layer 71. The pixel definition layer 71 may be disposed on the surface of the organic insulating layer 3 away from the inorganic insulating layer 2. Pixel structures 6 may be embedded in the pixel definition layer 71. For example, multiple anodes 61 and multiple light-emitting structures 62 included in multiple pixel structures 6 may be embedded within the pixel definition layer 71. The pixel definition layer 71 may be composed of a light-shielding material and an insulating material, and may be used for insulation between multiple anodes 61; it may also be used for light shielding between multiple light-emitting structures 62, so that the light emitted by the light-emitting structures 62 can be emitted from the display surface of the display panel 10 as much as possible.

[0162] In some embodiments, the display panel 10 may further include a support structure 75 (PS). The support structure 75 may be disposed on the surface of the pixel definition layer 71 away from the organic insulating layer 3. The cathode 63 may be partially disposed on the surface of the pixel definition layer 71 away from the organic insulating layer 3 and partially disposed on the surface of the light-emitting structure 62 away from the organic insulating layer 3, and cover the support structure 75. It is understood that in the cathode 63 forming process, the support structure 75 may be used to support the cathode 63, so that the cathode 63 can be better formed into a continuous structure.

[0163] In some embodiments, the display panel 10 may further include an encapsulation layer 72. The encapsulation layer 72 may be disposed on the surface of the pixel definition layer 71 and the plurality of pixel structures 6 away from the organic insulating layer 3. Exemplarily, the encapsulation layer 72 includes a first encapsulation layer 721, a second encapsulation layer 722, and a flexible interlayer 723. The first encapsulation layer 721 is located on the surface of the cathode 63 away from the light-emitting structure 62. The flexible interlayer 723 is located between the first encapsulation layer 721 and the second encapsulation layer 722.

[0164] Understandably, since the material of the light-emitting structure 62 is organic, organic materials are easily oxidized when exposed to moisture and oxygen, leading to the failure of the light-emitting structure 62. In this case, the encapsulation layer 72 is used to encapsulate the pixel structure 6 of the display area 101, thus protecting the pixel structure 6 and preventing moisture and oxygen in the air from affecting the lifespan of the light-emitting structure 62. The flexible interlayer 723 can act as a water and oxygen buffer for the driving circuit 41, pixel structure 6, and other structures below the encapsulation layer 72, reducing encapsulation failure caused by foreign objects. The first encapsulation layer 721 and the second encapsulation layer 72 can also seal the flexible interlayer 723.

[0165] For example, the first encapsulation layer 721 and the second encapsulation layer 722 can be SiO2 layers or Si3N4 layers fabricated by chemical vapor deposition (CVD). The flexible interlayer 723 can be an acrylate or cured polyester polymer organic layer formed by inkjet printing (IJP) technology.

[0166] In some embodiments, the display panel 10 may further include a touch layer 73. The touch layer 73 may be located on the surface of the encapsulation layer 72 away from the carrier plate 1. Exemplarily, the touch layer 73 may be fixedly attached to the surface of the second encapsulation layer 72 away from the flexible interlayer 723 by an adhesive layer 74 (TBL).

[0167] In other embodiments, the display panel 10 may also include a polarizer layer. The polarizer layer may be located on the surface of the touch layer 73 away from the encapsulation layer 72. It is understood that FIG4a is only an example of one embodiment of the display panel 10, and in other embodiments, the display panel 10 may include more functional layers or fewer layer structures.

[0168] Figure 5b is a partial structural schematic diagram of the display module 100 at another angle. Figure 6a is a structural schematic diagram of another embodiment of the structure shown in Figure 5a. Figure 6b is a structural schematic diagram of another embodiment of the structure shown in Figure 5b. It is understood that, for ease of understanding, different lines are used to indicate the outlines of different structures in Figures 5b to 6b.

[0169] It is understood that, along the thickness direction of the display panel 10, the projection of the first through-hole 111 onto the first organic layer 11 is circular, elliptical, rectangular, or square. Figure 5a illustrates an elliptical projection of the first through-hole 111 onto the first organic layer 11 along the thickness direction of the display panel 10. Figure 6a illustrates a rectangular projection of the first through-hole 111 onto the first organic layer 11 along the thickness direction of the display panel 10. In other embodiments, the projection of the first through-hole 111 onto the first organic layer 11 along the thickness direction of the display panel 10 can also be other shapes, which are not limited in this application.

[0170] In some embodiments, the projection of the third through-hole 121 onto the first organic layer 11 along the thickness direction of the display panel 10 can be circular, elliptical, rectangular, or square. Figure 5b illustrates an elliptical projection of the third through-hole 121 onto the first organic layer 11 along the thickness direction of the display panel 10. Figure 6b illustrates a rectangular projection of the third through-hole 121 onto the first organic layer 11 along the thickness direction of the display panel 10. It is understood that the shapes of the first through-hole 111 and the third through-hole 121 can be the same or different.

[0171] The above description, in conjunction with the accompanying drawings, details one embodiment of the display panel 10. The following description, in conjunction with the accompanying drawings, details one method for manufacturing the display panel 10 in the above embodiment.

[0172] In some embodiments, the method for fabricating the display panel 10 may include: forming a substrate 901 to be processed and a first conductive line 51 on a substrate 91. The first conductive line 51 is disposed within the substrate 901 and exposed on the surface of the substrate 91 away from the substrate 91. An inorganic insulating layer 2, a first portion 411 of a driving circuit 41, and a second conductive line 52 are formed on the substrate 901 to be processed and the first conductive line 51. The inorganic insulating layer 2 is disposed on the substrate 901 to be processed. The first portion 411 of the driving circuit 41 is disposed within the inorganic insulating layer 2. The second conductive line 52 is disposed within the inorganic insulating layer 2 and spaced apart from the first portion 411 of the driving circuit 41 within the inorganic insulating layer 2. The second conductive line 52 is connected to and electrically connected to the first conductive line 51. An organic insulating layer 3, a second portion 412 of the driving circuit 41, and a third conductive line 53 are formed on the inorganic insulating layer 2, the first portion 411 of the driving circuit 41, and the second conductive line 52. The organic insulating layer 3 is disposed on the inorganic insulating layer 2. The second portion 412 of the driving circuit 41 and the third conductive line 53 are disposed on the organic insulating layer 3. One end of the third conductive line 53 is electrically connected to the second conductive line 52, and the other end of the third conductive line 53 is electrically connected to the second portion 412 of the driving circuit 41. The second portion 412 of the driving circuit 41 is electrically connected to the first portion 411 of the driving circuit 41. A pixel structure 6, a pixel definition layer 71, an encapsulation layer 72, and a touch layer 73 are formed on the organic insulating layer 3. The specific layer structure can be set according to the requirements of the display panel 10. After completing the layer structure of the organic insulating layer 3 on the side away from the inorganic insulating layer 2, the substrate 91 is removed, and then part of the carrier plate 901 to be processed is removed to form the carrier plate 1, so that the first conductive trace 51 can be exposed on the surface of the carrier plate 1 away from the inorganic insulating layer 2, so as to facilitate the subsequent electrical connection process with the driver chip 8.

[0173] The structure of the display module 100 shown in Figure 4b will be described as an example. Figures 7 to 20 are cross-sectional views of the product structure corresponding to one manufacturing method of the display module 100 shown in Figure 4b.

[0174] As shown in Figure 7, a first organic layer 92 and a second inorganic layer 93 to be processed are sequentially formed on a substrate 91. The first organic layer 92 to be processed is located between the second inorganic layer 93 to be processed and the substrate 91.

[0175] For example, the substrate 91 can be made of glass. The first organic layer 92 to be treated can be prepared by a coating process. The second inorganic layer 93 to be treated can be deposited by chemical vapor deposition (CVD).

[0176] As shown in Figures 7 and 8, the first organic layer 92 to be treated and the second inorganic layer 93 to be treated are exposed and developed to form a pre-treated first organic layer 921 and a second inorganic layer 14. The pre-treated first organic layer 921 is provided with a first groove 9211, the opening of the first groove 9211 facing away from the substrate 91. The second inorganic layer 14 is provided with a fourth through hole 141, the fourth through hole 141 penetrates the second inorganic layer 14 and connects to the first groove 9211.

[0177] For example, a first mask can be used to expose and develop the second inorganic layer 93 to be processed to form the second inorganic layer 14. The second inorganic layer 14 is then used as a mask to expose and develop the first organic layer 92 to be processed to form a pre-processed first organic layer 921. In this way, along the thickness direction of the pre-processed first organic layer 921, the projection of the fourth through-hole 141 onto the pre-processed first organic layer 921 can coincide with the first groove 9211.

[0178] First, the second inorganic layer 93 to be processed is exposed and developed to form the second inorganic layer 14. The second inorganic layer 14 is used as a mask to expose and develop the first organic layer 92 to be processed. This eliminates the need to design a separate mask for exposing the first organic layer 92 to be processed, which helps to reduce the number of masks and reduce the design difficulty of the display panel 10.

[0179] As shown in Figures 8 and 9, a first conductive layer 94 to be processed is formed on the pre-treated first organic layer 921 and second inorganic layer 14.

[0180] For example, the first conductive layer 94 to be treated is deposited by a physical vapor deposition (CVD) process.

[0181] For example, the material of the first conductive layer 94 to be processed can be a conductive metal or other conductive material.

[0182] As shown in Figures 9 and 10, the first conductive layer 94 to be treated is exposed and developed to form the first trace 511. A portion of the first trace 511 is located on the side of the second inorganic layer 14 away from the pretreated first organic layer 921, and a portion enters the first groove 9211 through the fourth through hole 141.

[0183] For example, a second mask can be used to expose and develop the first conductive layer 94 to be processed, forming the first trace 511. It is understood that by providing a second inorganic layer 14, which connects the first trace 511 and the first organic layer 11 along the thickness direction of the second inorganic layer 14, the second inorganic layer 14 can be used to enhance the connection strength between the first organic layer 11 and the first trace 511, reducing the risk of the first trace 511 detaching.

[0184] As shown in Figures 10 and 11, a first inorganic layer 95 to be processed, a second organic layer 96 to be processed, and a third inorganic layer 97 to be processed are sequentially formed on the second inorganic layer 14 and the first trace 511.

[0185] Exemplarily, the second organic layer 96 to be treated is prepared by a coating process. The first inorganic layer 95 and the third inorganic layer 97 to be treated are deposited by chemical vapor deposition (CVD).

[0186] As shown in Figures 11 and 12, the third inorganic layer 97 to be processed is exposed and developed to form the third inorganic layer 15. The third inorganic layer 15 is provided with a fifth through hole 151, which penetrates the third inorganic layer 15.

[0187] As shown in Figures 12 and 13, the second organic layer 96 to be treated is exposed and developed to form the second organic layer 12. The second organic layer 12 is provided with a third through hole 121, which penetrates the second organic layer 12 and is connected to a fifth through hole 151. The first inorganic layer 95 to be treated is exposed in the third through hole 121.

[0188] For example, the third inorganic layer 15 can be used as a mask to expose and develop the second organic layer 96 to be processed, forming the second organic layer 12. Along the thickness direction of the third inorganic layer 15, the projection of the fifth through-hole 151 on the second organic layer 12 can coincide with the third through-hole 121. In this way, it is not necessary to design a separate mask for exposing and developing the second organic layer 96 to be processed, which helps to reduce the number of masks and reduce the design difficulty of the display panel 10.

[0189] For example, along the thickness direction of the third inorganic layer 15, the projection of the fifth via 151 onto the pre-treated first organic layer 921 is offset from the first groove 9211. It is understood that the offset of the projection of the fifth via 151 onto the pre-treated first organic layer 921 and the first groove 9211 helps to reduce the etching depth of the subsequent second organic layer 12.

[0190] As shown in Figures 13 and 14, a fourth inorganic layer 98 is formed in the third through-hole 121 of the first inorganic layer 95 and the second organic layer 12 and on the third inorganic layer 15.

[0191] As shown in Figures 14 and 15, the fourth inorganic layer 98 and the first inorganic layer 95 to be processed are exposed and developed to form the fourth inorganic layer 16 and the first inorganic layer 13. The fourth inorganic layer 16 has a sixth through-hole 161, which connects to the third through-hole 121. The first inorganic layer 13 has a second through-hole 131, which connects to the sixth through-hole 161. The first trace 511 is exposed within the second through-hole 131. The pre-processed first organic layer 921, second organic layer 12, first inorganic layer 13, second inorganic layer 14, third inorganic layer 15, and fourth inorganic layer 16 constitute the carrier plate 901 to be processed.

[0192] For example, a third mask can be used to expose and develop the fourth inorganic layer 98 to be processed and the first inorganic layer 95 to be processed to form the fourth inorganic layer 16 and the first inorganic layer 13.

[0193] As shown in Figures 15 and 16, a second conductive layer 99 to be processed is formed on the fourth inorganic layer 16 and the first trace 511.

[0194] For example, the second conductive layer 99 to be treated is deposited by a physical vapor deposition (CVD) process.

[0195] For example, the material of the second conductive layer 99 to be processed can be a conductive metal or other conductive material.

[0196] As shown in Figures 16 and 17, the second conductive layer 99 to be processed is exposed and developed to form a second trace 512. The second trace 512 enters the second through-hole 131 through the fifth through-hole 151, the third through-hole 121, and the sixth through-hole 161, connecting to the first trace 511. The second trace 512 is electrically connected to the first trace 511. The first trace 511 and the second trace 512 can constitute the first conductive trace 51.

[0197] It is understandable that metals have a greater adhesion ability to the surface of inorganic materials than to the surface of organic materials. Therefore, when the second conductive layer 99 to be treated is made of a metallic material, by setting the third inorganic layer 15, the second conductive layer 99 is less prone to breakage during the deposition process, which is beneficial for forming a continuous second conductive layer 99. After exposure and development, the second conductive layer 99 forms fewer cracks in the second trace 512, resulting in better electrical connection reliability of the second trace 512. Similarly, by setting the fourth inorganic layer 16, it is beneficial for forming a continuous second conductive layer 99 within the third via 121, resulting in better electrical connection reliability of the formed second trace 512.

[0198] As shown in Figures 17 and 18, an inorganic insulating layer 2, a driving circuit 41 (not shown), and a second conductive line 52 are formed on the substrate 901 to be processed and the first conductive line 51. The inorganic insulating layer 2 is disposed on the substrate 901 to be processed. The first portion 411 of the driving circuit 41 is located within the inorganic insulating layer 2, and the second portion 412 may be located on the side of the inorganic insulating layer 2 away from the substrate 901 to be processed. The second conductive line 52 is disposed within the inorganic insulating layer 2, and is spaced apart from the driving circuit 41 within the inorganic insulating layer 2. The second conductive line 52 is connected to and electrically connected to the first conductive line 51.

[0199] It is understandable that Figure 18 only shows the inorganic insulating layer 2 near the second conductive trace 52, and does not show the driving circuit 41. The relationship between the inorganic insulating layer 2, the driving circuit 41, and the second conductive trace 52 can be specifically seen in Figure 4b.

[0200] As shown in Figures 18 and 19, an organic insulating layer 3 and a third conductive line 53 are formed on the inorganic insulating layer 2, the driving circuit 41, and the second conductive line 52. The organic insulating layer 3 is located on the side of the inorganic insulating layer 2 away from the substrate 901 to be processed, and covers the second portion 412 of the driving circuit 41. The third conductive line 53 is located within the organic insulating layer 3 and is electrically connected between the driving circuit 41 and the second conductive line 52. The prefabricated display panel includes a substrate 91, a substrate 901 to be processed, a driving circuit 41, an electrical connection structure 5, an inorganic insulating layer 2, and an organic insulating layer 3. The electrical connection structure 5 includes a first conductive line 51, a second conductive line 52, and a third conductive line 53.

[0201] As shown in Figures 19 and 20, the substrate 91 and part of the carrier plate 901 to be processed are removed to obtain the display panel 10 shown in Figure 4b. The display panel 10 includes a carrier plate 1, a driving circuit 41, an electrical connection structure 5, an inorganic insulating layer 2, and an organic insulating layer 3. The carrier plate 1 is obtained by processing the carrier plate 901 to be processed, and includes a first organic layer 11, a second organic layer 12, a first inorganic layer 13, a second inorganic layer 14, a third inorganic layer 15, and a fourth inorganic layer 16. A first conductive trace 51 is disposed on the carrier plate 1.

[0202] For example, a portion of the first organic layer 921 on the side of the first conductive trace 51 away from the inorganic insulating layer 2 is pretreated to expose the first conductive trace 51 on the second surface 104 of the carrier plate 1.

[0203] For example, the substrate 91 can be removed using a laser lift-off (LLO) process.

[0204] For example, a full-area ash process can be used to remove part of the pre-treated first organic layer 921. It is understood that, compared with the solution of using laser process to remove part of the substrate 901 to be treated, the full-area ash process does not require alignment and is not affected by the alignment accuracy. It can completely expose the end of the first conductive trace 51 away from the inorganic insulating layer 2 to facilitate subsequent electrical connection, which is beneficial to improving the manufacturing efficiency of the display panel 10.

[0205] It is understandable that during the fabrication of the display panel 10, the carrier plate 1 may include organic and inorganic layers stacked along the thickness direction. The inorganic layer can be etched first, and then used as a mask for etching the organic layer, thereby reducing the number of masks required. This helps to reduce the design complexity of the display panel and simplify the fabrication process. For example, as shown in Figures 7 to 20, when the display panel 10 includes two organic layers and four inorganic layers, at least three masks are needed to complete the fabrication of the carrier plate 1 and the first conductive trace 51.

[0206] It is understandable that the number of organic and inorganic layers included in the carrier plate 1 can be designed according to requirements. Correspondingly, the specific process steps in the fabrication of the carrier plate 1 and the first conductive trace 51 can be adjusted according to the actual situation. In some embodiments, the carrier plate 1 may also be provided with only one organic layer and one inorganic layer. For example, the carrier plate 1 may include a first organic layer 11 and a second inorganic layer 14. In the fabrication process of the display panel 10, the second inorganic layer 14 can not only serve as a mask to complete the etching of the first organic layer 11, but also be used to isolate the first conductive trace 51 and the first organic layer 11. The connection strength between the first conductive trace 51 and the second inorganic layer 14 is better than the connection strength between the first conductive trace 51 and the first organic layer 11. By providing the second inorganic layer 14, the risk of the first conductive trace 51 falling off can be reduced.

[0207] It is understandable that when the carrier plate 1 includes a small number of layers, the first conductive trace 51 may only include the first trace 511 and not include the second trace 512.

[0208] In some embodiments, after forming the organic insulating layer 3 and the third conductive trace 53, multiple pixel structures 6, a pixel definition layer 71, an encapsulation layer 72, and a touch layer 73 are formed on the organic insulating layer 3. The specific layer structure can be set according to the needs of the display panel 10.

[0209] In some embodiments, after removing the substrate 91 and part of the carrier plate 901 to be processed, conductive ink 45, an insulating protective layer 46, a circuit board 44, and a driver chip 8 are disposed on the bottom surface of the carrier plate 1 to form a display module 100. The bottom surface of the carrier plate 1 is the surface of the carrier plate 1 away from the inorganic insulating layer 2. The conductive ink 45 is electrically connected between the circuit board 44 and the first conductive trace 51. It is understood that the conductive ink 45, the insulating protective layer 46, and the circuit board 44 can also be referred to as a COF structure. Exemplarily, the conductive ink 45 can be conductive silver paste prepared by spraying. The driver chip 8 is electrically connected to the circuit board 44. The signal from the driver chip 8 can be transmitted to the driver circuit 41 through the circuit board 44, the conductive ink 45, the first conductive trace 51, the second conductive trace 52, and the third conductive trace 53. The driver circuit 41 can control multiple pixels of the display panel 10 to open or close according to the signal given by the driver chip 8, so that the display panel 10 can display an image.

[0210] In some embodiments, the same technical content as the manufacturing method of the display module 100 in the previous embodiments (as shown in Figures 7 to 20) will not be repeated. Figures 21 to 23 are partial cross-sectional views of the product structure corresponding to another manufacturing method of the display module 100 shown in Figure 4b.

[0211] In some embodiments, a first organic layer 92 to be treated is formed on the substrate 91, which may specifically include:

[0212] As shown in Figure 21, a first sub-organic layer 922, an etch stop layer 923, and a second sub-organic layer 924 to be processed are sequentially formed on a substrate 91, wherein the etch stop layer 923 is made of an inorganic material. For example, the etch stop layer 923 can be made of silicon oxide.

[0213] As shown in Figure 22, the second sub-organic layer 924 to be processed is exposed and developed to form the second sub-organic layer 925. The first groove 9211 is located on the second sub-organic layer 925 and penetrates through the second sub-organic layer 925. The first sub-organic layer 922, the etch stop layer 923, and the second sub-organic layer 925 constitute the pre-processed first organic layer 921.

[0214] As shown in Figures 20 and 23, during the process of removing part of the carrier plate 901 to be processed, the first sub-organic layer 922 and the etching stop layer 923 are removed, and the second sub-organic layer 924 is used to form the first organic layer 11, so that the display panel 10 structure shown in Figure 20 can be obtained.

[0215] Understandably, during the fabrication of the display panel 10, an etch stop layer 923 is provided in the first organic layer 92 to be processed. The etch stop layer 923 is an inorganic material. In the fabrication process of the display panel 10, the etching gases for organic and inorganic materials are different; the gas used to etch organic materials cannot etch inorganic materials. Therefore, during the exposure and development of the second sub-organic layer 924 to be processed, the etch stop layer 923 can protect the first sub-organic layer 922 from being etched, and can help control the etching depth. Furthermore, after removing the substrate 91, during the removal of the first organic layer 92 from the bottom side of the display panel 10 to expose the first trace 511, the etch stop layer 923 can be used to control the ashing depth, protecting the second sub-organic layer 925 from over-etching. Subsequently, the etch stop layer 923 can be removed using a laser process, allowing the first trace 511 to be exposed on the back side of the display panel 10.

[0216] In some embodiments, the same technical content as that of the display module 100 in the previous embodiments (as shown in FIG. 4b) will not be described again. FIG. 24 is a partial cross-sectional view of another embodiment of the display module 100 shown in FIG. 4b at point C.

[0217] As shown in Figure 24, the first segment 5121 of the second trace 512 may include a first part 5123 and a second part 5124. The first part 5123 is connected to the first trace 511. The second part 5124 is connected to the end of the first part 5123 away from the first trace 511. Both the first part 5123 and the second part 5124 are cylindrical. The outer diameter D1 of the first part 5123 is smaller than the outer diameter D2 of the second part 5124. It can be understood that during the deposition of the second trace 512, the shape of the contact surface between the support plate 1 (e.g., the first inorganic layer 13 and the fourth inorganic layer 16) and the second trace 512 can be changed to a stepped surface, so that the second trace 512 can be deposited along the stepped surface. This helps to reduce the height difference of the second trace 512 during the deposition process, making the second trace 512 less prone to breakage and improving the electrical connection reliability of the second trace 512.

[0218] It is understood that, in this embodiment, during the formation of the first inorganic layer 13 and the fourth inorganic layer 16, two masks can be used to etch and form the first inorganic layer 13 and the fourth inorganic layer 16 respectively, so that the aperture of the sixth via 161 of the fourth inorganic layer 16 can be larger than the aperture of the second via 131 of the first inorganic layer 13. In this way, a stepped surface can be formed by sequentially connecting the contact surfaces of the fourth inorganic layer 16, the first inorganic layer 13 and the second trace 512.

[0219] It is understandable that the relationship between the first part 5123 and the second part 5124 and the layers of the support plate 1 can be designed according to the actual situation. For example, in Figure 24, the first part 5123 can be disposed on the first inorganic layer 13, and the second part 5124 can be disposed on the second organic layer 12, the third inorganic layer 15, and the fourth inorganic layer 16. Several implementation methods of the first part 5123 and the second part 5124 will be introduced below with reference to the accompanying drawings.

[0220] In some embodiments, the same technical content as that of the display module 100 in the previous embodiments (as shown in FIG. 4b) will not be described again. FIG. 25 is another partial cross-sectional view of the display module 100 shown in FIG. 24.

[0221] As shown in Figure 25, the fourth inorganic layer 16 may include a first portion 163 and a second portion 164 (illustratively distinguished by dashed lines in the figure). Both the first portion 163 and the second portion 164 of the fourth inorganic layer 16 may be cylindrical. The second portion 164 of the fourth inorganic layer 16 is connected to the inner side of the first portion 163 of the fourth inorganic layer 16, and is connected to the side of the first portion 163 of the fourth inorganic layer 16 closer to the first inorganic layer 13. Along the thickness direction of the display panel 10, the height of the second portion 164 of the fourth inorganic layer 16 is less than the height of the first portion 163 of the fourth inorganic layer 16. Thus, a stepped surface can be formed at the connection point between the first portion 163, the second portion 164 of the fourth inorganic layer 16, and the second trace 512. Depositing the second trace 512 on the stepped surface further reduces the height difference of the second trace 512 during the deposition process, making the second trace 512 less prone to breakage and improving the electrical connection reliability of the second trace 512.

[0222] For example, the first portion 5123 of the first segment 5121 of the second trace 512 can be connected to the first portion 163 of the fourth inorganic layer 16. The second portion 5124 of the first segment 5121 of the second trace 512 can be connected to the second portion 164 of the fourth inorganic layer 16.

[0223] It is understandable that during the fabrication of the display panel 10, a single mask can be used to etch and form the first inorganic layer 13 and the fourth inorganic layer 16. The diameter of the sixth via 161 in the fourth inorganic layer 16 can be equal to the diameter of the second via 131 in the first inorganic layer 13, and smaller than D2, so that a stepped surface can be formed at the connection point between the fourth inorganic layer 16 and the second trace 512. Thus, compared to the fabrication method of the structure shown in FIG. 24, the fabrication method of this embodiment can save a mask and simplify the process flow.

[0224] For example, the first portion 5123 of the first segment 5121 of the second trace 512 may be disposed in the first inorganic layer 13 and the fourth inorganic layer 16. The second portion 5124 of the first segment 5121 of the second trace 512 may be disposed in the second organic layer 12 and the third inorganic layer 15.

[0225] In some embodiments, the same technical content as that of the display module 100 in the previous embodiments (as shown in FIG. 4b) will not be described again. FIG. 26 is another partial cross-sectional view of the display module 100 shown in FIG. 24.

[0226] As shown in Figure 26, the fourth inorganic layer 16 may further include a third portion 165, which may be cylindrical. The third portion 165 may be connected to the inner side of the second portion 164 and to the side of the second portion 164 closest to the first inorganic layer 13. Along the first direction, the third portion 165 may be connected between the second trace 512 and the second portion 164. Along the thickness direction of the display panel 10, the height of the third portion 165 is less than the height of the second portion 164. In this way, the surfaces where the second portion 164, the third portion 165, and the second trace 512 are connected can form a stepped surface. Compared with the structure shown in Figure 25, the structure of this embodiment can further reduce the height difference of the second trace 512 during the deposition process, making the second trace 512 less prone to breakage and improving the electrical connection reliability of the second trace 512.

[0227] For example, the first segment 5121 of the second trace 512 may further include a third portion 5125. Along the thickness direction of the display panel 10, the third portion 5125 of the first segment 5121 connects the first portion 5123 and the second portion 5124 of the first segment 5121. The outer diameter D3 of the third portion 5125 of the first segment 5121 is smaller than the outer diameter D1 of the first portion 5123 of the first segment 5121, and larger than the outer diameter D2 of the second portion 5124 of the first segment 5121.

[0228] Figures 27 and 28 are cross-sectional views of the product structure corresponding to one manufacturing method of the display module 100 shown in Figure 26. The technical content of the same manufacturing method as the display module 100 in the previous embodiments (as shown in Figures 7 to 20) will not be repeated.

[0229] As shown in Figures 14 and 27, a third mask is used to perform a first exposure and development on the fourth inorganic layer 98 to be processed, forming a fourth inorganic layer 981 to be processed a second time. The fourth inorganic layer 981 to be processed a second time is provided with a second groove 9811, the opening of which faces away from the first inorganic layer 95 to be processed.

[0230] As shown in Figures 27 and 28, a fourth mask is used to expose and develop the fourth inorganic layer 981 to be processed in the second step and the first inorganic layer 95 to be processed, forming the fourth inorganic layer 16 and the first inorganic layer 13. The fourth inorganic layer 16 has a third groove 9812, the opening of which is located at the bottom of the second groove 9811, and the third groove 9812 penetrates through the fourth inorganic layer 16. The diameter of the third groove 9812 is smaller than the diameter of the second groove 9811. The second groove 9811 and the third groove 9812 constitute a sixth through-hole 161. The first inorganic layer 13 has a second through-hole 131, which connects to the sixth through-hole 161, and the first trace 511 is exposed within the second through-hole 131.

[0231] Understandably, during the fabrication of the display panel 10, the sixth via 161 of the fourth inorganic layer 16 can be designed as a stepped via. That is, the wall of the sixth via 161 can form a stepped surface. The second trace 512 can be deposited on the stepped surface, which can further reduce the step difference during the deposition of the second trace 512 and reduce the risk of poor electrical connection reliability due to breakage of the second trace 512.

[0232] In some embodiments, the same technical content as that of the display module 100 in the previous embodiments (as shown in FIG. 4b) will not be described again. FIG. 29 is a partial cross-sectional view of another embodiment of the display module 100 shown in FIG. 4b.

[0233] As shown in Figure 29, the carrier plate 1 may have a groove 106, the opening of which is located on the second surface 104 of the carrier plate 1. The surface of the first conductive trace 51 away from the inorganic insulating layer 2 is located within the groove 106. It is understood that, compared to the structure shown in Figure 4b, in this embodiment, by providing the groove 106, the height of the first conductive trace 51 in the thickness direction of the display panel 10 is smaller. During the fabrication of the display panel 10, the etching amount of the carrier plate 1 is smaller when etching it.

[0234] For example, when the support plate 1 includes a first organic layer 11, a second organic layer 12, and a first inorganic layer 13, the groove 106 may be located in the first organic layer 11. The opening of the groove 106 may face away from the first inorganic layer 13.

[0235] Figures 30 to 36 are cross-sectional views of the product structure corresponding to one manufacturing method of the display module 100 shown in Figure 29. The technical content of the same manufacturing method as the display module 100 in the previous embodiments (as shown in Figures 7 to 20) will not be repeated.

[0236] As shown in Figure 30, a second padding layer 992 to be processed is formed on the substrate 91. As shown in Figures 30 and 31, the second padding layer 992 to be processed is exposed and developed to form the second padding layer 991. As shown in Figure 32, a first organic layer 92 to be processed and a second inorganic layer 93 to be processed are sequentially formed on the substrate 91 and the second padding layer 991. A portion of the first organic layer 92 to be processed is located between the second inorganic layer 93 to be processed and the substrate 91, and a portion is located between the second padding layer 991 and the second inorganic layer 93 to be processed. As shown in Figures 32 and 33, the first organic layer 92 to be processed and the second inorganic layer 93 to be processed are exposed and developed to form a pre-processed first organic layer 921 and a second inorganic layer 14. Along the thickness direction of the first organic layer 92 to be processed, the first groove 9211 and the second padding layer 991 are positioned opposite each other. Subsequent structures are sequentially formed on the pre-processed first organic layer 921 and the second inorganic layer 14 to obtain the structure shown in Figure 34. As shown in Figures 34 and 35, the second padding layer 991 is removed. As shown in Figures 35 and 36, the first organic layer 921 is preprocessed by removing the portion of the first trace 511 on the side furthest from the inorganic layer to obtain the display panel 10.

[0237] It is understood that during the fabrication of the display panel 10, by setting the second pad layer 991, the etching depth of the first organic layer 92 to be treated can be reduced, and finally, a groove 106 can be formed on the back side of the carrier plate 1 of the obtained display panel 10. Exemplarily, the second pad layer 992 to be treated can be made of a transparent material or a transparent composite material.

[0238] For example, the fixed connection between the second pad layer 991 and the first organic layer 92 to be treated can be released by laser processing, and the second pad layer 991 can be detached from the first organic layer 92 to be treated. The space where the second pad layer 991 was originally located can be used to form the groove 106.

[0239] In some embodiments, the same technical content as that used in the preparation method of the display module 100 (as shown in Figures 30 to 34) in the previous embodiments will not be repeated. Figure 37 is another cross-sectional view of the structure shown in Figure 34.

[0240] As shown in Figures 33 and 37, the second inorganic layer 14 is used as a mask to expose and develop the first organic layer 92 to be processed, forming the first organic layer 11. The first organic layer 11 has a first through hole 111, which penetrates the first organic layer 11, and the second padding layer 991 is exposed in the first through hole 111.

[0241] It is understood that, compared to the fabrication methods shown in Figures 30 to 34, in this embodiment, the first organic layer 11 can be formed before the first inorganic layer 13 is formed, and the second padding layer 991 is exposed within the first via 111. When the first trace 511 is subsequently formed, the first trace 511 can directly contact and connect to the second padding layer 991. After removing the second padding layer 991, the first trace 511 can be exposed, eliminating the need to remove the portion of the first organic layer 11 on the side of the first conductive trace 51 furthest from the inorganic layer. This simplifies the fabrication steps of the display panel 10 and reduces fabrication costs.

[0242] In some embodiments, the same technical content as that of the display module 100 in the previous embodiments (as shown in FIG. 4b) will not be described again. FIG. 38 is a partial cross-sectional view of another embodiment of the display module 100 shown in FIG. 4b at point C.

[0243] As shown in Figure 38, the carrier plate 1 of the display panel 10 may further include a first pad height 993. Along the thickness direction of the carrier plate 1, the first pad height 993 surrounds and connects to the first conductive trace 51. Exemplarily, when the first conductive trace 51 includes a first trace 511 and a second trace 512, along the thickness direction of the carrier plate 1, the first pad height 993 may be located on the side of the first trace 511 closest to the inorganic insulating layer 2, and surrounds and connects to the second trace 512. It is understood that along the thickness direction of the display panel 10, the first pad height 993 may be located between the first trace 511 and the first inorganic layer 13, or between the first inorganic layer 13 and the second organic layer 12. Therefore, when the first pad height 993 is located between the first inorganic layer 13 and the second organic layer 12, the first direction is perpendicular to the thickness direction of the display panel 10. Along the first direction, the first pad height 993 can be disposed opposite to the second organic layer 12; or, when the first pad height 993 can be located between the first trace 511 and the first inorganic layer 13, the first inorganic layer 13 can be disposed opposite to the second organic layer 12.

[0244] Understandably, the first padding layer 993 can be used to locally thin the second organic layer 12. Specifically, depending on the desired thickness reduction location of the second organic layer 12, the first padding layer 993 and the second organic layer 12 are positioned directly opposite each other along the thickness direction of the support plate 1. By setting the second padding layer 991, during subsequent etching of the second organic layer 12, the thickness of the second organic layer 12 at the location of the third via 121 is smaller, resulting in a shallower etching depth. This helps reduce etching time and accelerates the production efficiency of the display panel 10.

[0245] Figures 39 to 42 are cross-sectional views of the product structure corresponding to one manufacturing method of the display module 100 shown in Figure 38. The technical content of the same manufacturing method as the display module 100 in the previous embodiments (as shown in Figures 30 to 34) will not be repeated.

[0246] As shown in Figures 11 and 39, a first inorganic layer 95, a second organic layer 96, and a third inorganic layer 97 are sequentially formed on the second inorganic layer 14, the first trace 511, and the first padding layer 994 to be processed. Along the thickness direction of the third inorganic layer 15, the fifth through-hole 151 of the third inorganic layer 15 and the first padding layer 994 to be processed are positioned opposite each other. As shown in Figure 40, a fourth inorganic layer 98 is formed on the first inorganic layer 95 and the third inorganic layer 15 to be processed. As shown in Figures 40 and 41, a third mask can be used to expose and develop the fourth inorganic layer 98, the first inorganic layer 95, and the first padding layer 994 to be processed, forming a fourth inorganic layer 16, a first inorganic layer 13, and a first padding layer 993. The first inorganic layer 13 has a second through-hole 131, which connects to the sixth through-hole 161. The first pad layer 993 has a seventh through-hole 9931, which connects to the second through-hole 131. The first trace 511 is exposed in the seventh through-hole 9931. As shown in FIG42, the inorganic insulating layer 2, the second conductive trace 52, the organic insulating layer 3, the third conductive trace 53, and other structures are formed. As shown in FIG42 and FIG38, the portion of the first organic layer 921 away from the inorganic layer is removed from the substrate 91, the second pad layer 991, and the first trace 511 to obtain the display panel 10 shown in FIG38.

[0247] It is understandable that by setting the first pad layer 993, the thickness of the second organic layer 96 to be processed, which is directly opposite the first pad layer 993 along the thickness direction of the display panel 10, is smaller. During the process of etching the second organic layer 96 to be processed to form the third via 121, the etching depth is smaller, which helps to reduce the etching time and speed up the production efficiency of the display panel 10.

[0248] In other embodiments, when exposing and developing the first pad layer 994 to be processed, the entire first pad layer 994 can be etched, and the final display panel 10 may not include the first pad layer 993. In this case, the first inorganic layer 13 can be disposed opposite to the second organic layer 12.

[0249] It is understood that, without conflict, the embodiments and features in the embodiments of this application can be combined with each other, and any combination of features in different embodiments is also within the protection scope of this application. That is to say, the multiple embodiments described above can also be arbitrarily combined according to actual needs.

[0250] It is understood that all the above figures are exemplary illustrations of this application and do not represent the actual size of the product. Furthermore, the dimensional proportions between the components in the figures are not intended to limit the actual product of this application.

[0251] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A display panel (10), characterized by It includes a carrier plate (1), a driving circuit (41), an electrical connection structure (5), an inorganic insulating layer (2), and an organic insulating layer (3); The carrier plate (1), the inorganic insulating layer (2) and the organic insulating layer (3) are stacked in sequence. The first part (411) of the driving circuit (41) is disposed in the inorganic insulating layer (2), and the second part (412) of the driving circuit (41) is disposed in the organic insulating layer (3). The electrical connection structure (5) includes a first conductive trace (51), a second conductive trace (52), and a third conductive trace (53). The first conductive trace (51) is disposed on the carrier plate (1) and is used to electrically connect the driver chip (8) and the second conductive trace (52). The second conductive trace (52) is disposed on the inorganic insulating layer (2) and is spaced apart from the first part (411) of the driver circuit (41) within the inorganic insulating layer (2). The third conductive trace (53) is disposed on the organic insulating layer (3) and is electrically connected between the second conductive trace (52) and the second part (412) of the driver circuit (41). The second part (412) of the driver circuit (41) is electrically connected to the first part (411) of the driver circuit (41).

2. The display panel (10) as defined in claim 1, characterized in that The carrier plate (1) includes a first surface (103) and a second surface (104) arranged opposite to each other. The inorganic insulating layer (2) is disposed on the first surface (103) of the carrier plate (1). The surface of the first conductive trace (51) away from the inorganic insulating layer (2) is flush with the second surface (104) of the carrier plate (1).

3. The display panel (10) as defined in claim 1, characterized in that The support plate (1) includes a first surface (103) and a second surface (104) disposed opposite to each other, and the inorganic insulating layer (2) is disposed on the first surface (103) of the support plate (1); The support plate (1) is provided with a groove (106), the opening of the groove (106) is located on the second surface (104) of the support plate (1), and the surface of the first conductive trace (51) away from the inorganic insulating layer (2) is located in the groove (106).

4. The display panel (10) as defined in claim 1, characterized in that The carrier plate (1) includes a first organic layer (11), a second organic layer (12) and a first inorganic layer (13), the first organic layer (11), the first inorganic layer (13) and the second organic layer (12) are stacked in sequence, the inorganic insulating layer (2) is located on the surface of the first organic layer (11) away from the first inorganic layer (13), and the first conductive trace (51) includes a first trace (511) and a second trace (512); The first trace (511) is disposed on the first organic layer (11) for electrically connecting the driver chip (8). The second trace (512) is disposed on the first inorganic layer (13) and the second organic layer (12). The first trace (511) is partially located between the first inorganic layer (13) and the first organic layer (11) and is connected to the second trace (512). The second trace (512) is partially located on the surface of the second organic layer (12) near the inorganic insulating layer (2) and is connected to the second conductive trace (52).

5. The display panel (10) as defined in claim 4, characterized in that The first trace (511) includes a first segment (5111) and a second segment (5112). The first segment (5111) of the first trace (5111) is disposed in the first organic layer (11). The second segment (5112) of the first trace (5111) is connected to the end of the first segment (5111) of the first trace (5111) near the inorganic insulating layer (2) and is electrically connected to the first segment (5111) of the first trace (5111). Along the thickness direction of the display panel (10), the second segment (5112) of the first trace (5111) is located between the first organic layer (11) and the first inorganic layer (13). The second trace (512) includes a first segment (5121) and a second segment (5112). The first segment (5121) of the second trace (512) is disposed within the first inorganic layer (13) and the second organic layer (12) and is connected to the second segment (5112) of the first trace (511). The first segment (5121) of the second trace (512) is electrically connected to the second segment (5112) of the first trace (511). The second segment (5122) of the second trace (512) is connected to the end of the first segment (5121) of the second trace (512) near the inorganic insulating layer (2) and is electrically connected to the first segment (5121) of the second trace (512). Along the thickness direction of the display panel (10), the second segment (5122) of the second trace (512) is located between the second organic layer (12) and the inorganic insulating layer (2). Along the thickness direction of the display panel (10), the projection of the first segment (5121) of the second trace (512) on the first organic layer (11) and the projection of the second segment (5112) of the first trace (511) on the first organic layer (11) are at least partially coincident, and the projection of the first segment (5121) of the second trace (512) on the first organic layer (11) and the projection of the first segment (5111) of the first trace (511) on the first organic layer (11) are offset.

6. A display panel (10) as claimed in claim 4 or 5, characterized in that The carrier plate (1) further includes a third inorganic layer (15), which is disposed on the surface of the second organic layer (12) away from the first inorganic layer (13). Along the thickness direction of the display panel (10), the third inorganic layer (15) connects the second trace (512) and the second organic layer (12). The second trace (512) is disposed on the third inorganic layer (15) and extends into the second organic layer (12). The third inorganic layer (15) is used to separate the second trace (512) and the second organic layer (12).

7. The display panel (10) according to any one of claims 4 to 6, characterized in that The carrier plate (1) further includes a fourth inorganic layer (16). Along a first direction, the fourth inorganic layer (16) is connected between the second trace (512) and the second organic layer (12). The second trace (512) is disposed between the first inorganic layer (13) and the second organic layer (12). The fourth inorganic layer is used to separate the second trace (512) and the second organic layer (12). The first direction is perpendicular to the thickness direction of the display panel (10).

8. The display panel (10) as defined in claim 5, characterized in that The first segment (5121) of the second trace (512) includes a first part (5123) and a second part (5124). The first part (5123) of the first segment (5121) is connected to the second segment (5112) of the first trace (511), and the second part (5124) of the first segment (5121) is connected to the end of the first part (5123) of the first segment (5121) that is away from the first trace (511). The first part (5123) and the second part (5124) of the first segment (5121) are both cylindrical. The outer diameter D1 of the first part (5123) of the first segment (5121) is smaller than the outer diameter D2 of the second part (5124) of the first segment (5121).

9. The display panel (10) as claimed in any one of claims 5 to 8, characterized in that, The carrier plate (1) further includes a first pad layer (993). Along the thickness direction of the display panel (10), the first pad layer (993) is located on the side of the first trace (511) close to the inorganic insulating layer (2) and is arranged around the second trace (512). Along the first direction, the first pad layer (993) and the second organic layer (12) are disposed opposite to each other, or the first inorganic layer (13) and the second organic layer (12) are disposed opposite to each other, and the first direction is perpendicular to the thickness direction of the display panel (10).

10. The display panel (10) as claimed in any one of claims 1 to 9, characterized in that, The display panel (10) further includes a pixel structure (6), which is located on the side of the organic insulating layer (3) away from the inorganic insulating layer (2). The third part (413) of the driving circuit (41) is disposed in the organic insulating layer (3) and is electrically connected between the pixel structure (6) and the first part (411) of the driving circuit (41). The fourth part (414) of the driving circuit (41) is located within the organic insulating layer (3), and the fourth part (414) of the driving circuit (41) is electrically connected between the third conductive trace (53) and the first part (411) of the driving circuit (41).

11. A display module (100) characterized by Includes a cover plate (20) and a display panel (10) as claimed in any one of claims 1 to 10, wherein the cover plate (20) is stacked on the display panel (10); The display module also includes a driver chip (8), which is disposed on the surface of the carrier plate (1) away from the inorganic insulating layer (2).

12. The display module (100) according to claim 11, characterized in that The display module (100) further includes conductive ink (45) and an insulating protective layer (46). The conductive ink (45) and the insulating protective layer (46) are disposed on the surface of the carrier plate (1) away from the inorganic insulating layer (2). The conductive ink (45) is electrically connected between the first conductive trace (51) and the driver chip (8). The insulating protective layer (46) covers the conductive ink (45).

13. An electronic device (1000), characterized by, It includes a housing (200) and a display module (100) as described in claim 11 or 12, the display module (100) being mounted on the housing (200).

14. A method of manufacturing a display panel (10), characterized by, include: A first organic layer (92) to be treated and a second inorganic layer (93) to be treated are sequentially formed on a substrate (91), wherein the first organic layer (92) to be treated is located between the second inorganic layer (93) to be treated and the substrate (91); The second inorganic layer (93) to be processed is exposed and developed to form a second inorganic layer (14), wherein the second inorganic layer (14) has a fourth through hole (141) that penetrates the second inorganic layer (14). Using the second inorganic layer (14) as a mask, the first organic layer (92) to be processed is exposed and developed to form a pre-processed first organic layer (921). The pre-processed first organic layer (921) has a first groove (9211), the opening of the first groove (9211) faces away from the substrate (91), and the first groove (9211) is connected to the fourth through hole (141). A first conductive trace (51) is formed on the pre-treated first organic layer (921) and the second inorganic layer (14). The first conductive trace (51) enters the first groove (9211) through the fourth through hole (141). The first conductive trace (51) is used to electrically connect the driver chip (8) and the driver circuit (41). The substrate (91) and part of the pretreated first organic layer (921) are removed to form a first organic layer (11) such that the first conductive trace (51) is exposed in the first organic layer (11). The first organic layer (11) and the second inorganic layer (14) are used to form a carrier plate (1).

15. The production method according to claim 14, wherein Before forming the first organic layer (92) to be treated on the substrate (91), the preparation method further includes: A second pad layer (991) is formed on the substrate (91); The formation of the first organic layer (92) to be treated on the substrate (91) includes: The first organic layer (92) to be processed is formed on the substrate (91) and the second pad layer (991), wherein the second pad layer (991) and the first organic layer (92) to be processed are disposed opposite to each other along the second direction; The process of exposing and developing the first organic layer (92) to be treated to form a pre-treated first organic layer (921) includes: the first groove (9211) and the second pad layer (991) being disposed opposite to each other along the thickness direction of the first organic layer (92); After removing the substrate (91) and before removing a portion of the pretreated first organic layer (921), the preparation method further includes: Remove the second pad layer (991).

16. The production method according to claim 14 or 15, characterized by, The process of forming the first organic layer (92) to be treated on the substrate (91) includes: A first sub-organic layer (922), an etch stop layer (923), and a second sub-organic layer (924) to be processed are sequentially formed on the substrate (91), wherein the material of the etch stop layer (923) is an inorganic material; The step of using the second inorganic layer (14) as a mask to expose and develop the first organic layer (92) to be treated, forming a pre-treated first organic layer (921), includes: The second sub-organic layer (924) to be processed is exposed and developed to form a second sub-organic layer (925). The first groove (9211) is located on the second sub-organic layer (925) and penetrates the second sub-organic layer (925). The first sub-organic layer (922), the etching stop layer (923), and the second sub-organic layer (924) constitute the pre-processed first organic layer (921). The removal of the pretreated first organic layer (921) includes: Remove the first sub-organic layer (922) and the etching stop layer (923), and the second sub-organic layer (924) is used to form the first organic layer (11).

17. The production method according to any one of claims 14 to 16, wherein The removal of the pretreated first organic layer (921) includes: Part of the pretreated first organic layer (921) is removed by a full-surface ashing process.

18. A method of manufacturing a display panel (10), characterized by, include: A second pad layer (991) is formed on the substrate (91); A first organic layer (92) to be treated and a second inorganic layer (93) to be treated are sequentially formed on the substrate (91) and the second pad layer (991). The first organic layer (92) to be treated is located between the second inorganic layer (93) to be treated and the substrate (91). Along the second direction, the second pad layer (991) and the first organic layer (92) to be treated are disposed opposite to each other. The second inorganic layer (93) to be processed is exposed and developed to form a second inorganic layer (14), wherein the second inorganic layer (14) has a fourth through hole (141) that penetrates the second inorganic layer (14). Using the second inorganic layer (14) as a mask, the first organic layer (92) to be processed is exposed and developed to form a first organic layer (11). The first organic layer (11) has a first through hole (111), which penetrates the first organic layer (11) and is connected to the fourth through hole (141). The second pad layer (991) is exposed in the first through hole (111). A first conductive trace (51) is formed on the first organic layer (11) and the second inorganic layer (14). The first conductive trace (51) enters the first through hole (111) through the fourth through hole (141) and contacts the second pad layer (991). The first conductive trace (51) is used to electrically connect the driver chip (8) and the driver circuit (41). The first organic layer (11) and the second inorganic layer (14) are used to form a carrier plate (1). Remove the substrate (91) and the second pad layer (991) so that the first conductive trace (51) is exposed to the first organic layer (11).