Process for producing a photonic device comprising a plurality of hybrid waveguides capable of propagating an optical mode

The method addresses edge alteration and interface damage in III-V photonic component transfer by using a sacrificial layer and trench definition, enabling precise and efficient assembly of hybrid waveguides with disjoint ribbons, enhancing manufacturing precision and efficiency.

WO2026139182A1PCT designated stage Publication Date: 2026-07-02SCINTIL PHOTONICS

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
SCINTIL PHOTONICS
Filing Date
2025-11-28
Publication Date
2026-07-02

AI Technical Summary

Technical Problem

Existing methods for transferring III-V photonic components suffer from edge alteration during substrate separation, interface damage from etching solutions, generation of particles, and complex, lengthy assembly processes, particularly in microtransfer printing.

Method used

A method involving a sacrificial layer and trench definition to singularize vignettes, followed by selective removal of the base substrate, allowing precise alignment and assembly of hybrid waveguides with disjoint ribbons, avoiding sawing and complete substrate removal, and using stealth laser cutting for clean separation.

Benefits of technology

Ensures intimate contact and efficient transfer of hybrid waveguides with reduced damage and particle generation, facilitating collective assembly and improving manufacturing precision and efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a process for producing a photonic device. The process begins with provision of a donor substrate (SD), this being done by forming a sacrificial layer (SL) on a base substrate (SB). A surface stack (4e) is formed on the sacrificial layer. Trenches (T) are etched in the stack to the base substrate (SB), in order to define a plurality of patterns (V). In parallel, a component layer (2) is produced on a carrier substrate (1e), in which primary waveguides (2a) are formed with a predetermined arrangement. Transfer of the isolated pattern to the component layer includes precise alignment and assembly, followed by selective removal of the sacrificial layer (SL), allowing removal of the base substrate (SB). The transferred pattern is processed to form heterogeneous structures (4) thus facilitating propagation of an optical mode through the hybrid waveguides of the photonic device.
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Description

Method for preparing a photonic device comprising a plurality of hybrid waveguides capable of propagating an optical mode FIELD OF INVENTION

[0001] The present invention relates to a photonic device comprising a layer of components arranged on a support substrate. It also relates to a method for preparing such a photonic device, this method comprising preparing a donor substrate of materials constituting the components and transferring these materials onto the support substrate. TECHNOLOGICAL BACKGROUND OF THE INVENTION

[0002] The document by LUO XIANSHU ET AL: "Wafer-Scale Dies-Transfer Bonding Technology for Hybrid III / V-on-Silicon Photonic Integrated Circuit Application", IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, IEEE, USA, vol. 22, no. 6, November 1, 2016 (2016-11-01) discloses a III-V material chip transfer technology, in a plate-to-plate approach, in hybrid III / V-on-Silicon photonic integrated circuit applications.

[0003] US patent 7482184 proposes forming a photonic device by transferring a III-V material vignette onto the back face of a component layer including a waveguide. This vignette is then processed by lithography and etching to create active III-V photonic components, such as a light source (laser diode or micro-laser) or a detector. US patent 10884187 proposes a similar approach to transferring a III-V material vignette, but this time to collectively form a plurality of active photonic components within a single vignette.

[0004] Typically, image transfer involves the formation of a shallow stack consisting successively of a p-doped layer, an active layer, and an n-doped layer, on a base substrate. These layers are based on III-V materials. The base substrate can be equipped with a stop layer for etching, positioned directly beneath the shallow stack. The base substrate can be between 200 and 650 micrometers thick, and the shallow stack a few micrometers thick, for example, between 1 and 5 micrometers. This substrate and the layers of the shallow stack can be made of InP or InP-based materials. In this case, the stop layer can be made, for example, of InGaAs or InAlAs.The base substrate and the surface stack are then cut by sawing, for example into squares or rectangles where one side or length may have a dimension on the order of mm, the surface stack placed on each cut portion then forming a vignette.

[0005] To implement the transfer operation described in a previous paragraph, the vignettes are assembled on the back side of the component layer, and the base substrate supporting these vignettes is removed by wet etching. The etching solution is chosen to be selective with respect to the stop layer, which can itself be removed in a second etching step. Following this transfer operation, a plurality of active photonic components can be defined within each vignette through a sequence of lithography and etching processes on the surface stacks.

[0006] In detail, the transfer operation is described in the document by S. Menezo et al., "Advances on III-V on Silicon DBR and DFB Lasers for WDM Optical Interconnects and Associated Heterogeneous Integration 200mm-Wafer-Scale Technology", 2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), La Jolla, CA, USA, 2014, pp. 1-6 or in "III-V / Si photonics by die-to-wafer bonding" by G. Roelkens, Materials today, Volume 10, Issues 7–8, Page 36–43.

[0007] This vignette-based approach is not entirely satisfactory, however, because: during the separation of the base substrate and vignettes by sawing, the edges of these vignettes are altered. This alteration prevents intimate contact at the vignette edge with the component layer during assembly in the transfer operation. The solutions used in subsequent wet stages of the manufacturing process are then likely to seep into the interface and damage it; the dissolution of the vignette base substrate in the etching solution after the transfer operation does not allow for its recycling; the removal of the vignette base substrate also generates particles and hinders subsequent lithography / etching steps of the stacks.

[0008] Other approaches have been considered for transferring active III-V photonic components. This can be done, for example, using the microtransfer printing technique. A description of this technique and its use in photonics can be found in the paper by Camiel Op de Beeck, et al., "Heterogeneous III-V on silicon nitride amplifiers and lasers via microtransfer printing," Optica 7, 386-393 (2020). In short, with this technique, the photonic component is prepared on a temporary substrate. Using a stamp, this component is removed from its temporary substrate and transferred and assembled onto a target substrate, in this case, the front or back face of a component layer.

[0009] The paper by J. O'Callaghan et al., "Comparison of InGaAs and InAlAs sacrificial layers for release of InP-based devices," Opt. Mater. Express 7, 4408-4414 (2017), reveals, however, that the assembly surface of a photonic component (which corresponds to the surface of the component detached from the temporary substrate) is particularly rough. This roughness makes assembly, especially by molecular adhesion, and the transfer of the photonic component onto the component layer difficult. Furthermore, handling the component with the handle may require the use of a resin, which can generate polluting species that may make assembly by molecular adhesion more difficult. Moreover, this transfer step is not "collective," as it is performed component by component, making the process of transferring multiple components lengthy and complex. SUBJECT OF THE INVENTION

[0010] One aim of the invention is to remedy, at least in part, the problems just described. In particular, the invention aims to improve the sticker assembly step during its transfer. To this end, the invention seeks to overcome the problems associated with sawing the base substrate and the stickers. It also seeks to avoid using the microtransfer printing technique. The invention further aims to avoid the complete removal of the base substrate by engraving. BRIEF DESCRIPTION OF THE INVENTION

[0011] With a view to achieving one of these goals, the object of the invention proposes a method for preparing a photonic device comprising a plurality of hybrid waveguides capable of propagating an optical mode, each hybrid waveguide being formed of a primary waveguide at least partially overlaid by a heterogeneous structure, the method comprising the following steps: a step of preparing a donor substrate comprising the formation, on and in contact with a base substrate, of a sacrificial layer, then the formation, on and in contact with the sacrificial layer, of a surface stack comprising successively, from the sacrificial layer, a p-doped layer, an active layer, an n-doped layer; a step of defining a plurality of vignettes in the surface stack, the definition step comprising the making of trenches extending in depth in the surface stack down to the base substrate;a donor substrate singularization step to isolate at least one vignette; a component layer preparation step comprising the formation of a plurality of primary waveguides on a support substrate, the primary waveguides of the plurality of primary waveguides being distributed on the support substrate according to a predetermined arrangement; a transfer step comprising a substep of alignment and assembly of the isolated vignette and the component layer aimed at placing the vignette and the plurality of primary waveguides opposite each other, and a substep of selective removal of the sacrificial layer to allow removal of the vignette's base substrate;a step of forming a plurality of heterogeneous structures, the formation step comprising the processing of the vignette transferred onto the component layer to form a plurality of first metallic contacts and a plurality of second metallic contacts respectively in contact with the p-doped layer and the n-doped layer of the vignette.;

[0012] According to other advantageous and non-limiting features of the invention, taken alone or in any technically feasible combination: the creation of trenches during the step of defining a plurality of vignettes also includes the definition of a plurality of ribbons within the vignettes, the ribbons of the plurality of ribbons being disjoint and distributed according to the predetermined arrangement; the substep of alignment and assembly of the isolated vignette and the component layer is conducted so as to place opposite the plurality of ribbons and the plurality of primary waveguides; the step of forming a plurality of heterogeneous structures includes the definition of a plurality of ribbons within the vignette, the ribbons of the plurality of ribbons being disjoint and distributed according to the predetermined arrangement so as to reside opposite the plurality of primary waveguides;The plurality of first metallic contacts and the plurality of second metallic contacts are respectively in contact with the p-doped layer and the n-doped layer of the ribbons of the plurality of ribbons; the singularization step includes scanning the donor substrate with a laser beam; the component layer has a surface dielectric layer; the component layer preparation step includes: a substep of supplying a starting substrate comprising a temporary substrate, a buried dielectric layer disposed on and in contact with the temporary substrate and a surface layer disposed on and in contact with the buried dielectric layer; a substep of forming the plurality of primary waveguides in the surface layer, the primary waveguides of the plurality of primary waveguides being disposed on and in contact with the buried dielectric layer;a substep of depositing a covering material on the surface layer to bury the primary waveguides of the plurality of primary waveguides in the component layer; a substep of assembling the component layer to the support substrate and removing the temporary substrate, the buried dielectric layer becoming the surface dielectric layer of the component layer; the transfer step includes bringing the exposed face of the vignette into contact with the surface dielectric layer of the component layer; the component layer preparation step includes the local removal of the surface dielectric layer at the center parts of the primary waveguides of the plurality of primary waveguides in order to expose these center parts;The transfer step includes bringing the exposed face of the vignette into direct contact with the central parts of the primary waveguides of the plurality of primary waveguides; the component layer preparation step includes the formation of gapping layers on and in contact with the central parts of the primary waveguides of the plurality of waveguides and in which the transfer step includes bringing the vignette into contact with the dielectric gapping layers; the donor substrate preparation step includes the formation, on the n-doped layer of the surface stack, of an intercalated layer made of an undoped semiconductor material or a dielectric layer; the base substrate is InP, the sacrificial layer is InAlAs, the p-doped layer and the n-doped layer are InP and the active layer includes quantum wells;the base substrate is made of GaAs, the sacrificial layer of AlGaAs, the p-doped layer and the n-doped layer are made of GaAs, and the active layer includes quantum dots.

[0013] Other features and advantages of the invention will become apparent from the detailed description of the invention which follows with reference to the accompanying figures in which:

[0014] Figures 1a, 1b, and 1c and 1d each represent a photonic device that can be obtained using a preparation process according to the invention;

[0015] Figures 2a, 2b, 2c, 2d, 2e, 2f, 2g represent the steps in preparing a donor substrate according to different implementation methods;

[0016]

[0017] Figures 3a, 3b, 3c, 3d, 3e and 3f illustrate a step in preparing a layer of components;

[0018]

[0019] Figures 4a, 4b, 4c illustrate the steps of an integration sequence of the photonic device;

[0020]

[0021] Figures 5a and 5b represent the state of a photonic device during its integration using a dielectric layer between a vignette and a component layer;

[0022]

[0023] Figures 6a and 6b represent the state of a photonic device during its integration without any dielectric layer between a vignette and a component layer;

[0024]

[0025] Figures 7a and 7b represent the state of a photonic device during its integration, a vignette being formed from a plurality of ribbons;

[0026]

[0027] Laillustre a vignette featuring an alternative arrangement of ribbons. DETAILED DESCRIPTION OF THE INVENTION Photonic device

[0028] Figures 1a, 1b, and 1c and 1d each represent a DP photonic device that can be obtained using a preparation process according to the invention.

[0029] This device comprises a component layer 2 having a first surface resting on a support substrate 1e, which may be made of silicon. The component layer 2 includes, embedded in a coating material 2e, a plurality of waveguides 2a, called "primary waveguides"—four primary waveguides 2a in the examples shown. These may be edge waveguides, as in the examples shown, but this is not a necessary characteristic, and generally the primary waveguides 2a can be of any suitable type. The primary waveguides 2a are typically made of silicon, preferably monocrystalline, but may also be partially composed of crystalline silicon and amorphous and / or polycrystalline silicon. The coating material 2e may be made of silicon dioxide.Each primary waveguide 2a is flush with a second surface of the component layer 2, this second surface being opposite the first surface in contact with the support substrate 1e. A dielectric layer 1b, typically made of silicon dioxide, is disposed on and in contact with the second surface of the component layer 2.

[0030] The component layer 2 of the DP photonic device may include photonic components other than the primary waveguides 2a flush with its second surface. It may thus include one or more waveguides embedded in the covering material, for example, made of silicon nitride, one or more photodetectors, and contact structures embedded in the covering layer 2e in the form of metallic tracks or vias. In such a case, the DP photonic device could be equipped with through-vias that allow the contacts with the embedded contact structures to be transferred to the surface, at the level of metallic tracks.

[0031] The DP photonic device also includes, positioned above the primary waveguides 2a of the plurality of primary waveguides, a plurality of heterogeneous structures 4. A "heterogeneous structure" is defined as a stack of materials different in nature from the material constituting the primary waveguides 2a. A heterogeneous structure 4 and a waveguide 2a together form a hybrid waveguide of the DP photonic device in which an optical mode can propagate. The heterogeneous structures 4 can, in combination with the primary waveguides 2a they overlie, constitute optical amplifiers or laser emitters.

[0032] In the implementation mode of the, the heterogeneous structures 4 rest on, and are in contact with, the dielectric layer 1b.

[0033] In the implementation shown, the dielectric layer 1b has openings and does not extend above a central portion of the primary waveguides 2a. The heterogeneous structures 4 rest directly on, and are in contact with, the primary waveguides 2a. As illustrated in the figure, a cavity 20 or a plurality of cavities 20 can be provided in at least some of the primary waveguides 2a, the cavity or cavities of a primary waveguide 2a being at least partially closed by a heterogeneous structure 4. The bottom of a cavity 20 can be defined by a stop pattern 9 which, during cavity formation, allows for selective etching of the primary waveguide material 2a, without penetrating the covering material 2e. This stop pattern 9 can, in particular, be made of a silicide or a metal, such as TiN.

[0034] In the implementation modes of the and of the, a spacing layer 1f was placed in the openings made in the dielectric layer 1b at the center of the primary waveguides 2a. In some cases, this spacing layer 1f is of a thickness substantially equal to that of the dielectric layer 1b or less than that of the dielectric layer 1b. It may be silicon oxide or silicon nitride deposited over the entire exposed surface of the component layer (including the remaining portions of the dielectric layer 1b) or an undoped semiconductor material, for example InP, Al2O3, or AlN. Alternatively, the gap layer 1f may be formed of a layer of silicon oxide or silicon nitride, in contact with the central portion of the primary waveguide 2a, and a layer of an undoped semiconductor material deposited on the silicon oxide layer.

[0035] The spacing layer 1f, when present, is at least disposed under the heterogeneous structure 4, in contact with this structure and with the exposed surface and the central part of the primary waveguides 2a. Depending on the embodiment chosen, the spacing layer 1f can completely cover the exposed central part of the primary waveguides 2a, in the openings provided in the dielectric layer, as shown in the figure, or partially cover this central part, as shown in the figure.

[0036] The heterogeneous structures 4 are formed from a first n-doped layer, a 4W active layer consisting of a stack of III-V semiconductor layers arranged on top of and in contact with the n-doped layer, and a p-doped layer arranged on top of and in contact with the 4W active layer. For example, the p-doped layer and the n-doped layer can be made of InP, and the 4W active layer can include quantum wells. Alternatively, the p-doped layer and the n-doped layer can be made of GaAs, and the 4W active layer can include quantum dots. Preferably, the p-doped layer, the n-doped layer, and the 4W active layer are crystalline.

[0037] The heterogeneous structures 4 can include layers other than those presented above and illustrated in Figures 1a, 1b, 1c, and 1d. Thus, in all the implementations corresponding to these figures, and as already explained in relation to the implementations of Figures 1c and 1d, an intercalated layer 1f, formed of an unintentionally doped semiconductor material, can be placed on the doped layer 4n of a heterogeneous structure, on the side of a primary waveguide. This unintentionally doped layer can be of the same nature as the doped layer 4n, i.e., InP or GaAs, to reiterate the examples listed above. When such an intercalated layer 1f is present, it can constitute the gapping layer shown in Figure 1.

[0038] Regardless of how the heterogeneous structures 4 are based on the primary waveguides 2a, directly or indirectly, such a heterogeneous structure 4 generally takes the form of a ribbon with a lateral dimension (along the y-direction shown in Figures 1a, 1b, 1c, 1d) smaller than its longitudinal dimension (along the x-direction in Figures 1a, 1b, 1c, 1d). The general ribbon shape of a heterogeneous structure 4 can have a lateral dimension on the order of 5 micrometers at the active layer 4W, and is typically between 1 and 20 micrometers. Its longitudinal dimension can be on the order of 400 micrometers, and is typically between 100 and 4000 micrometers. Two adjacent heterogeneous structures 4 can be separated, in the lateral direction, by a spacing distance of the order of 150 micrometers, and more generally between 100 micrometers and 500 micrometers.

[0039] As can be clearly seen in the figures, the plurality of heterogeneous structures 4 comprises a plurality of first metallic contacts 5p and a plurality of second metallic contacts 5n respectively in contact with the exposed surfaces of the p-doped layers 4p and the n-doped layers 4n.

[0040] The DP photonic devices shown in Figures 1a, 1b, 1c, 1d comprise an encapsulation layer 6 arranged on top of the photonic component layer 2 and encapsulating the heterogeneous structures 4. This encapsulation layer 6 may, in particular, be made of silicon dioxide and / or silicon nitride. Metallic tracks 8 may be arranged on the encapsulation layer 6, in electrical contact with the heterogeneous structure 4, specifically with the first metallic contacts 5n and the second metallic contacts 5p, via a via penetrating the encapsulation layer 6. Other types of contact are naturally possible for electrically connecting the p-doped layer 4p and the n-doped layer 4n to metallic tracks 8.

[0041] The 8 tracks, vias, and 5n,5p metallic contacts allow current to be conducted and circulated through the 4W active layer, enabling, by pumping, the emission or optical amplification mechanism. Optical modes can thus be propagated in the hybrid waveguides, each hybrid waveguide being formed from a primary waveguide 2a and a heterogeneous structure 4.

[0042] We now present a method of implementing a preparation process in accordance with the invention of the photonic devices that have just been presented. Preparation of a donor substrate

[0043] Firstly, a preparation process according to the invention includes the preparation of a donor substrate SD. This substrate serves to prepare the materials necessary for the fabrication of the heterogeneous structures 4 of the photonic device DP, by a layer transfer technique. The step of preparing the donor substrate SD, which has been illustrated in Figure 1, includes the formation, on and in contact with a base substrate SB, of a sacrificial layer SL, then the formation, on and in contact with the sacrificial layer, of a surface stack 4e comprising successively, from the sacrificial layer SL, a p-doped layer 4p, an active layer 4W, and an n-doped layer 4n.This preparation step can consist of successively depositing on the base substrate SB, the sacrificial layer SL and the 4p,4W,4n layers composing the surface stack, using conventional deposition techniques (for example by MOCVD for "Metal-Organic Chemical Vapor Deposition", in French "Dépôt chimique en phase vapeur métal-organique", or by MBE for "Molecular Beam Eptiaxy", in French "Epitaxis par jet monétaire").

[0044] Also shown in this diagram, as a dashed line, is an optional 1f gap layer of the surface stack 4e, which may be present in an undoped semiconductor material. It may also be a silicon oxide or silicon nitride layer. This optional 1f gap layer may be present in all embodiments of the photonic device preparation process described herein.

[0045] When the surface 4e stack is InP-based, the base substrate SB can be a bulk InP substrate and the sacrificial layer SL can be made of or comprise InAlAs. When the surface 4e stack is GaAs-based, the base substrate SB can be a bulk GaAs substrate and the sacrificial layer SL can be made of or comprise AlGaAs.

[0046] In all cases, the sacrificial layer SL has a different nature from that of the base substrate SB and from that of the layers composing the surface stack 4e. This layer can then be selectively removed, using a selective etching solution as illustrated in a later section of this description, in order to detach the surface stack 4e from the base substrate SB. The etching solution can be, for example, a ferric chloride (FeCl3)-based mixture suitable for etching the sacrificial layer when it is made of InAlAs, without affecting the base substrate SB or the surface stack 4e.

[0047] In a second step of a preparation process according to the invention, shown in top view in Figures 2b and 2e, a plurality of vignettes V are defined in the donor substrate SD by etching trenches T in the surface layer 4 e , preferably by dry etching.

[0048] During this step, the donor substrate SD is therefore decomposed into vignettes V, here rectangular vignettes, whose length and width are typically between 1 mm and 2 mm, and more generally between 500 micrometers and 5 mm. In general, the vignettes V have sufficient dimensions to cover a plurality of waveguides 2a of the support substrate 1e, during a subsequent layer transfer operation.

[0049] Figures 2b and 2e show cutting paths d, arranged in the trenches T, allowing the vignettes V to be singled out in a later stage of the process.

[0050] In the implementation method, the creation of trenches T by etching is such that it also includes the definition of a plurality of disjoint strips M within the vignettes V. The strips M are distributed on each vignette V of the donor substrate SD according to a predetermined arrangement corresponding to the arrangement of the primary waveguides 2a on the support substrate 1e. This will allow, during a subsequent layer transfer operation, the strips M of a vignette V to be collectively transferred to the position of these waveguides 2a. Thus, trenches T can be provided between two strips M of the same vignette V, having a width between 50 micrometers and 500 micrometers, this trench width corresponding to the distance separating two adjacent primary waveguides 2a of the photonic device DP.

[0051] These ribbons can extend laterally, along the y-direction, to a width of approximately 100 micrometers, and typically between 20 and 200 micrometers. Longitudinally, along the x-direction shown in the figure, the M ribbons can extend to a length of approximately 100 micrometers to 1 mm, or even 4 mm, such as 700 micrometers.

[0052] As shown in the sections of Figures 2c, 2d (with reference to sections AA,BB of the) and Figures 2f, 2g (with reference to sections AA,BB of the) the trenches T extend throughout the thickness of the surface stack 4e and the sacrificial layer, the bottom of the trench thus exposing the basic substrate SB.

[0053] The step of defining the plurality of vignettes V, and, where applicable, ribbons M, may include applying a mask to the surface stack 4e of the donor substrate SD shown in Figure 1. The mask covers this stack 4e to define the shape of the vignettes V (and, where applicable, the ribbons M), leaving exposed portions of the stack 4e between these patterns. The definition step may then include etching the exposed portions of the stack 4e, for example, using dry etching, to form trenches T extending in depth, along the z-direction, into the base substrate SB.

[0054] In a subsequent singularization step, the donor substrate SD is cut along the cutting paths d to singularize the vignettes V. This step can be advantageously implemented using a stealth cutting technique (known as "stealth dicking" in the field) in which a laser beam is swept along the cutting paths d, at the bottom of the trenches T, to focus it within the base substrate SB. The beam induces cracks that extend between the upper and lower surfaces of the base substrate SB, along the cutting path. Then, forces are applied to the substrate SB, generating tensile stresses that cause the cracks to extend, thus singularizing the vignettes V from one another.

[0055] It is noted that this stealthy cutting is facilitated by the presence of deep trenches, penetrating into the base substrate SB. The cracks then develop in a single and homogeneous material; the extension of the cracks leading to the singularization of the vignettes V is not blocked by the presence of another material, for example that composing the sacrificial layer.

[0056] The presence of the trenches, regardless of the method used to cut the base substrate, ensures a clean and precise cut at the mounting face of the V-shaped vignettes, which is not possible with a more conventional cutting technique, as noted in the introduction to this application. Although the base substrate can be cut using any conceivable technique, the stealth laser cutting method is preferred, as it avoids or limits the generation of particles produced during conventional "mechanical" cutting.

[0057] At the end of these donor substrate preparation and singularization steps, we have at least one vignette V based on a portion of the base substrate (and generally a plurality of such vignettes V), this vignette V may or may not have a plurality of ribbons M separated by slices T and arranged according to the predetermined arrangement.

[0058] Preparation of the photonic component layer.

[0059] A process for preparing a DP photonic device also includes, before or after the donor substrate preparation step and the pattern plurality definition step, a component layer preparation step 2.

[0060] In general, this preparation step aims to form the plurality of primary waveguides 2a of the component layer 2 disposed on the support substrate 1e. The primary waveguides 2a extend over the support substrate to be covered by a vignette V and, where appropriate, are distributed over this support substrate 1e according to the same arrangement of the ribbons M on the surface of a vignette V when such ribbons have been well defined in the donor substrate SD.

[0061] In general, the preparation step aims to collectively fabricate numerous DP photonic devices on a single fabrication substrate, which naturally leads to the collective use of numerous vignettes V to complete their fabrication. For the sake of simplicity, the preparation of a DP photonic device using a single vignette V is shown in the figures and detailed in the remainder of this description, it being understood that this description applies equally when a plurality of such devices or a plurality of vignettes are used collectively.

[0062] There are multiple ways to implement this preparation step, the simplest being to define on a substrate, for example silicon or silicon-on-insulator type, the primary waveguides 2a using the usual microelectronic techniques (deposition, etching, photolithography, oxidation…).

[0063] With reference to figures 3a to 3f, a preferred approach for implementing this step of preparing the component layer 2 is presented.

[0064] In a first substep shown in Figure 1, a starting substrate 1 is provided. This substrate, for example of the silicon-on-insulator type, consists of a temporary substrate 1a, typically made of silicon and several hundred microns thick. A buried dielectric layer 1b, typically made of silicon oxide, is placed on and in contact with the temporary substrate 1a.

[0065] The starting substrate 1 also includes a surface layer 1c, generally semiconducting, arranged on and in contact with the buried dielectric layer 1b. This layer 1c can notably be formed of monocrystalline silicon and have a thickness between 50nm and 1000nm.

[0066] It should be noted that the buried dielectric layer 1b, particularly when composed of silicon dioxide, results from the high-temperature oxidation of the base substrate and / or a donor substrate from which the surface layer was extracted during the fabrication of the initial substrate. It therefore exhibits a high density, higher than that of a deposited dielectric layer. It is thus distinct from a coating layer (which will be described later), formed by deposition, even when both layers are of the same composition, typically silicon dioxide.

[0067] The buried dielectric layer 1b can be relatively thick, for example, greater than 20 nm, or 50 nm, 100 nm, or even one or more microns. The interfaces between the buried oxide layer 1b, the temporary substrate 1a on the one hand, and the surface layer 1b on the other are very smooth, less than 1 nm in peak-to-peak measurement.

[0068] In a second substep, illustrated in Figure 1, the starting substrate 1 is treated to form, within and on the surface layer 1c, a layer of photonic components 2, including the plurality of primary waveguides 2a. This layer of components 2 extends from a first exposed surface to a second surface, opposite the first, in contact with the buried dielectric layer 1b. Conventional technological steps (deposition, etching, photolithography) can be chained together to form, by treating the surface layer 1c of the starting substrate 1, the plurality of primary waveguides 2a and all the other photonic components that the layer of components 2 may contain. As already explained, the plurality of primary waveguides 2a is arranged on the temporary substrate in the same arrangement as that of the patterns M on the donor substrate.

[0069] Optionally, it may be envisaged that stopping patterns 9 will be formed on at least some of the primary waveguides 2a; these patterns will allow the formation of controlled depth cavities in these primary waveguides, as will be illustrated in a later section of this description.

[0070] The treatments carried out in this substep include the deposition of a coating material 2e, for example silicon dioxide, in order to encapsulate the assembly and finalize the formation of the component layer 2 resting on the base substrate 1a, via the buried dielectric layer 1b. At the end of this processing substep, the first exposed surface of the photonic component layer 2 may be polished to facilitate the subsequent transfer step.

[0071] Following this sub-processing step, and regardless of the components formed in and on the surface layer 1c, a layer of components 2 is available, extending from the first to the second surface. These components are encapsulated in a covering material 2e. The components of layer 2 comprise at least a plurality of primary waveguides 2a formed in the surface layer 1c and arranged on a support substrate 1e according to the determined arrangement. It should be noted that since these primary waveguides 2a were formed in the surface layer 1c, they rest on, and are in contact with, the buried dielectric layer 1b.

[0072] In a third substep shown in Figure 1, the component layer 2 is transferred onto a support substrate 1e. This transfer can be achieved using any suitable technique. This transfer generally involves assembling the component layer 2, carried by the temporary substrate 1a, with this support substrate 1e via the first surface. This could be, for example, an assembly by molecular adhesion.

[0073] Once the assembly is complete, and in a fourth thinning substep, the temporary substrate 1a is removed to expose the buried dielectric layer 1b. This removal can be achieved by dry or wet etching assisted grinding, with the buried dielectric layer 1b acting as a barrier to this etching. By choosing a suitably thick buried dielectric layer 1b, it is ensured that the removal step of the base substrate 1a does not lead to penetration or perforation of this buried dielectric layer 1b. This preserves the quality of the underlying layers, particularly the component layer 2 and the photonic components it contains.

[0074] Once the temporary substrate 1a is removed, the buried dielectric layer 1b is exposed and forms a surface dielectric layer of the component layer 2. We have shown on a the component layer 2, equipped with the surface dielectric layer 1b, transferred onto the support substrate 1e.

[0075] According to the main approach to implementing the component layer preparation step, shown in the figure, the dielectric layer 1b is preserved to completely cover the component layer 2. It can be thinned, for example by polishing or chemically, but not eliminated, even locally.

[0076] In a first implementation variant of the component layer preparation step, shown in Figure 1, this preparation step further includes a substep for the local and selective removal of the dielectric layer 1b. This substep aims to expose a central portion Zc of the primary waveguides 2a, while preserving the surface dielectric layer 1b at its peripheral contour Zb. The openings made in the surface dielectric layer 1b can be rectangular in shape and large enough to accommodate a ribbon M, as will be made apparent later in this description. The width of a central area Zc is thus typically between 30 micrometers and 1 mm, and its length is a few millimeters, for example, 2 mm or up to 2 mm. The peripheral contour Zb can, for example, have a width on the order of 10 micrometers, for example, between 5 and 30 micrometers.The local and selective removal of the surface dielectric layer 1b can be achieved by etching, for example using a wet HF-based solution, after the surface dielectric layer 1b has been coated with a resin that masks the areas to be preserved, in particular the peripheral contour Zb of the primary waveguides 2a. This prevents the etching solution from seeping around the sides of the primary waveguides 2a and damaging the adjacent overlay layer 2e. The exposed surfaces of the primary waveguides 2a, in the central zone Zc, exhibit low roughness, identical or close to that present at the interface between the surface layer 1c and the buried dielectric layer 1b of the starting substrate 1. This roughness was not affected by the etching solution used during the removal of the base substrate 1a.It therefore presents favorable characteristics, particularly in terms of roughness, cleanliness, and flatness, to receive, by assembly, an M-ribbon.

[0077] At this stage, optionally and during a complementary substep of the component layer preparation step, a cavity or a plurality of cavities 20 can be locally formed in at least some of the primary waveguides 2a, at their exposed central areas Zc. This formation can be carried out at the stop patterns 9 provided in the component layer 2, in contact with at least some of the waveguides, by selective etching. The cavities can facilitate the assembly of the component layer 2 with the strips M of a vignette M by allowing the evacuation of gaseous species that might be released from the assembly interface.

[0078] Figure 1 illustrates a second variant of the component layer preparation step. This variant includes, after the sub-step of local and selective removal of the dielectric layer 1b in the first variant, a sub-step of depositing a spacer layer 1f onto the free face of the component layer. This spacer layer 1f is formed on and in contact with the central parts Zc of the primary waveguides 2a. This deposition is therefore carried out in the openings made in the surface dielectric layer 1b. The spacer layer 1f can facilitate the assembly of the component layer 2 with the strips M of a vignette. In this second variant, it can be made of a dielectric such as silicon oxide or silicon nitride. It can have a thickness substantially equal to or less than that of the surface dielectric layer 1b. Finalization of the photonic device

[0079] Returning to the general description of the DP photonic device preparation process, we now present how a vignette V, possibly equipped with its ribbons M, and the component layer 2 arranged on the support substrate 1e are exploited.

[0080] Referring to Figures 4a to 4c, a first integration sequence is presented using a vignette V without a ribbon M. In this case, a component layer obtained by the main approach to implementing the preparation step is used. According to this main approach, the dielectric layer 1b is preserved to completely cover the component layer 2.

[0081] During a transfer step, a vignette V from the donor substrate SD is assembled with the component layer 2 so that the vignette is aligned with the primary waveguides 2a. This alignment and assembly are shown in Figure 1 when the component layer 2 is the one shown in Figure 2. The assembly can be achieved by molecular adhesion of the exposed faces of the surface stack 4e with the exposed face of the component layer, here the buried dielectric layer 1b. This adhesion can be promoted by exposing at least one of these faces to a plasma, for example, an oxygen plasma.

[0082] It is possible to plan to assemble during this transfer step a plurality of vignettes V on the component layer 2, especially when such a layer is configured to allow the collective fabrication of a plurality of photonic devices, as is usually the case.

[0083] After this alignment and assembly substep, the sacrificial layer SL is selectively removed, for example, using a selective etching solution for this layer, as detailed in a previous section of this description. Removing the sacrificial layer eliminates the base substrate SB from the surface stacking 4e that forms the vignette. Figure L illustrates the state of the structure after the transfer.

[0084] In a subsequent step, a plurality of ribbons M are defined within the vignette V, for example by etching. This etching step (which may be identical or similar to that presented for the preparation of the donor substrate) leads to the formation of a plurality of disjoint ribbons distributed so as to reside respectively at the right of the plurality of primary waveguides 2a.

[0085] Figure 1 illustrates the state of the structure after the first integration sequence just presented. It should be noted that this first integration sequence is perfectly compatible with a vignette in which the ribbons have been previously formed. These ribbons are arranged on vignette V according to the same predetermined arrangement in which the primary waveguides 2a are placed on the support substrate 2e, which allows for their precise positioning relative to one another. This configuration is also shown in Figure 2 after assembly of a vignette V onto the dielectric layer 1b and in Figure 3 after removal of the base substrate.

[0086] Figures 6a and 6b show another integration sequence using a vignette V equipped with a ribbon M. In this case, a component layer obtained according to the first implementation variant of the preparation step is used. According to this first variant, the dielectric layer 1b was locally and selectively removed to expose a central portion Zc of the primary waveguides 2a. In this other integration sequence, the vignette V and the component layer 2 are aligned and assembled to bring the ribbons and primary waveguides into contact, respectively. Then, the base substrate SB supporting the vignettes can be detached as a block by selectively etching the sacrificial layer, as previously described.

[0087] Figures 7a and 7b present yet another integration sequence using a vignette V equipped with ribbon M. In this case, a component layer obtained according to the second variant of implementation of the preparation step in which a gap layer 1f has been formed is exploited.

[0088] Regardless of the integration sequence chosen, the transfer step is followed by a heterogeneous structure formation step 4 from the M ribbons. This heterogeneous structure formation step includes processing the plurality of M ribbons arranged on the component layer 2, aiming to remove part of the p-doped 4p layer and part of the active 4W layer. This removal leads to the formation of a shoulder in the M motif, this shoulder exposing a surface of the n-doped layer. The heterogeneous structure formation step 4 also includes the deposition of the plurality of first metal contacts and the plurality of second metal contacts in contact with the p-doped 4p and n-doped 4n layers, respectively.

[0089] Optionally, a substep can be provided for the deposition of an encapsulation layer 6 and its possible planarization. In this case, metallic tracks 8 can also be formed on and within the encapsulation layer, which are electrically contacted with the heterogeneous structure 4, in particular with the first metallic contacts 5n and the second metallic contacts 5p, via penetrating vias.

[0090] Figures 1a, 1b, 1c and 1d show the DP photonic devices obtained after the application of this heterogeneous structure formation step 4, including their encapsulation in the encapsulation layer 6, according to the different variants of the DP photonic device preparation process that have just been presented.

[0091] In all these variants, the problems arising from sawing the vignettes and removing the base substrate by dissolution, as described in the introduction to this application, are avoided. In the proposed process, the vignettes V are singled out at predefined trenches T in the donor substrate, these trenches T passing through the sacrificial layer SL. Furthermore, the vignettes are transferred by bonding the doped layer n 4n or, where applicable, the gapping layer 2f, which have not undergone chemical etching and therefore do not exhibit excessive roughness. For these two reasons, the step of assembling the vignette V onto the component layer is of good quality, which is not the case in prior art approaches.

[0092] Of course the invention is not limited to the embodiments described and alternative embodiments can be made without departing from the scope of the invention as defined by the claims.

[0093] Thus, a vignette V can comprise any number of motifs M, arranged according to the predetermined arrangement as defined by the structure of the photonic device. Vignettes V of approximately square shape are thus represented, each vignette bearing 8 motifs arranged in two rows of 4 motifs.

Claims

A method for preparing a photonic device (PD) comprising a plurality of hybrid waveguides capable of propagating an optical mode, each hybrid waveguide being formed of a primary waveguide (2a) at least partially overlain by a heterogeneous structure (4), the method comprising the following steps: a step of preparing a donor substrate (SD) comprising the formation, on and in contact with a base substrate (SB), of a sacrificial layer (SL), then the formation, on and in contact with the sacrificial layer (SL), of a surface stack (4e) comprising successively, from the sacrificial layer (SL), a p-doped layer (4p), an active layer (4W), an n-doped layer (4n); a step of defining a plurality of vignettes (V) in the surface stack (4e), the definition step comprising the creation of trenches (T) extending in depth in the surface stack (4e) down to the base substrate (SB);a donor substrate singularization step (SD) to isolate at least one vignette (V); a component layer preparation step (2) comprising the formation of a plurality of primary waveguides (2a) on a support substrate (1e), the primary waveguides of the plurality of primary waveguides (2a) being distributed on the support substrate (1e) according to a predetermined arrangement; a transfer step comprising a substep of alignment and assembly of the isolated vignette (V) and the component layer (2) aimed at placing the vignette (V) and the plurality of primary waveguides (2a) opposite each other, and a substep of selective removal of the sacrificial layer (SL) to allow the removal of the base substrate (SB) of the vignette (V);a step of forming a plurality of heterogeneous structures (4), the formation step comprising the processing of the vignette (V) transferred onto the component layer (2) to form a plurality of first metallic contacts (5p) and a plurality of second metallic contacts (5n) respectively in contact with the p-doped layer (4p) and the n-doped layer (4n) of the vignette (V). Preparation method according to the preceding claim wherein the making of trenches (T) during the step of defining a plurality of vignettes (V) also includes the definition of a plurality of ribbons (M) within the vignettes (V), the ribbons (M) of the plurality of ribbons being disjoint and distributed according to the predetermined arrangement. Preparation method according to the preceding claim wherein the substep of alignment and assembly of the isolated vignette (V) and the component layer (2) is conducted so as to place opposite the plurality of ribbons (M) and the plurality of primary waveguides (2a). Preparation method according to claim 1 wherein the step of forming a plurality of heterogeneous structures (4) comprises defining a plurality of ribbons (M) within the vignette (V), the ribbons (M) of the plurality of ribbons being disjoint and distributed according to the predetermined arrangement so as to reside opposite the plurality of primary waveguides (2a). Preparation method according to any one of the preceding claims 2 to 4 wherein the plurality of first metallic contacts (5p) and the plurality of second metallic contacts (5n) are respectively in contact with the doped layer p (4p) and the doped layer n (4n) of the ribbons (M) of the plurality of ribbons. A preparation method according to any one of the preceding claims, wherein the singularization step comprises scanning the donor substrate (SD) with a laser beam. Preparation method according to any one of the preceding claims wherein the component layer (2) has a surface dielectric layer (1b). A preparation method according to the preceding claim, wherein the preparation step of the component layer (2) comprises: a substep of supplying a starting substrate (1) comprising a temporary substrate (1a), a buried dielectric layer (1b) disposed on and in contact with the temporary substrate (1a) and a surface layer (1c) disposed on and in contact with the buried dielectric layer (1b); a substep of forming the plurality of primary waveguides (2a) in the surface layer (1c), the primary waveguides (2a) of the plurality of primary waveguides being disposed on and in contact with the buried dielectric layer (1b); a substep of depositing a covering material (2e) on the surface layer (1c) to bury the primary waveguides (2a) of the plurality of primary waveguides in the component layer (2);a substep of assembling the component layer (2) to the support substrate (1e) and removing the temporary substrate (1a), the buried dielectric layer becoming the surface dielectric layer (1b) of the component layer (2).; Preparation method according to one of the two preceding claims wherein the transfer step includes bringing the exposed face of the vignette (V) into contact with the surface dielectric layer (1c) of the component layer (2). Preparation method according to any one of claims 7 and 8 wherein the preparation step of the component layer (2) includes the local removal of the surface dielectric layer (1) at the center parts (Zc) of the primary waveguides (2a) of the plurality of primary waveguides in order to expose these center parts (Zc). Preparation method according to the preceding claim wherein the transfer step includes bringing the exposed face of the vignette (V) into direct contact with the central parts (Zc) of the primary waveguides (2a) of the plurality of primary waveguides. Preparation method according to claim 11 wherein the preparation step of the component layer (2) comprises the formation of spacing layers (1f) on and in contact with the central parts (Zc) of the primary waveguides (2a) of the plurality of waveguides and wherein the transfer step comprises bringing the vignette (V) into contact with the dielectric spacing layers (1f). A preparation method according to any one of the preceding claims, wherein the donor substrate (SD) preparation step comprises the formation, on the doped n (4n) layer of the surface stack, of an interlayer made of an undoped semiconductor material or a dielectric layer. A preparation method according to any one of the preceding claims, wherein the base substrate is InP, the sacrificial layer is InAlAs, the p-doped layer and the n-doped layer are InP, and the active layer comprises quantum wells. A preparation method according to any one of claims 1 to 13 wherein the base substrate is made of AsGa, the sacrificial layer of AlGaAs, the p-doped layer and the n-doped layer are made of AsGa, and the active layer comprises quantum dots.