Method for optimizing high frequency power supply circuitry
The method enhances high-voltage, high-frequency power electronics by using advanced switching techniques to manage variable inductance, reducing component count and cost while maintaining efficient power transfer and stability.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- N T TAO LTD
- Filing Date
- 2025-12-23
- Publication Date
- 2026-07-02
AI Technical Summary
Conventional high-voltage, high-frequency power electronics circuits face limitations due to component saturation and overheating, leading to increased size, cost, and complexity, which hinder their adoption in portable and dynamic applications, particularly in systems with rapidly changing inductance.
A method involving semiconductor-based switches configured with control circuits to operate at frequencies significantly higher than conventional limits, using near-zero-voltage switching and adaptive frequency tuning to manage variable inductance, allowing efficient power transfer with reduced components.
Enables compact, cost-effective power delivery with stable performance under rapidly varying inductive loads, minimizing electromagnetic interference and thermal stress, and extending component lifespan.
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Figure IL2025051146_02072026_PF_FP_ABST
Abstract
Description
[0001] METHOD FOR OPTIMIZING HIGH FREQUENCY POWER
[0002] SUPPLY CIRCUITRY
[0003] FIELD OF INVENTION
[0004] This invention relates in general to power electronics (converting and managing high-power electrical flows), and more particularly to high frequency alternating current circuitry in particular.
[0005] BACKGROUND OF THE INVENTION
[0006] The supply of high voltage alternating current is a requirement for a range of different technologies, including: particle accelerators; plasma generators; welding systems; X-ray or electron beams; high power lasers; and even detonators for explosives in mining operations. The circuitry required to provide this supply, like all power electronics circuits, typically includes: a power transformation stage containing energy storage elements the charging of which is cycled; a means of controlling the cycling of said elements; an input filter to regulate the signal received by the power transformation stage; and an output filter to regulate the signal the power transformation stage produces. The very high output voltage required for the aforementioned applications necessitate power electronics’ circuits whose power transformation stage and filters are composed of components capable of handling said power, either by optimizing for efficiency (i.e. to prevent overheating that aggregates over time) or maximizing physical size. An important parameter related to the overheating of components is the breakdown voltage (BVD), the voltage at which sustained use of an electrical component will produce failure. The ability of the component to dissipate heat is a crucial parameter in BVD, among other measures of component failure. Similar to BVD is the saturation limit of current, which reflects a physical electronic limit above which a component will be unable to sustain increased current, and instead will show in an increase in voltage. Both BVD and saturation limits fundamentally limit the type and number of components that can be integrated into power electronics circuits. For high voltage and high currentapplications, these limits present significant barriers to affordability which the present invention teaches a method and system to overcome.
[0007] In standardized electrical engineering practice, these limitations are not only intrinsic material limits but are formally treated within IEEE literature through defined comparisons between a component’s peak current duty and its saturation capability. For example, standards such as IEEE C57.13 and IEEE C37.110 specify that components — particularly magnetically reactive elements and switching devices — must maintain operation without entering saturation when subjected to the first-cycle asymmetrical peak current, which is calculated using standardized factors reflecting system X / R ratios. This peak current, expressed in terms of the required secondary or terminal voltage needed to reproduce the current waveform, must remain below the component’s saturation limit to avoid distortion, overheating, or catastrophic failure. These IEEE -standardized comparisons illustrate that as operating frequency and fault-current asymmetry increase, components reach their saturation boundaries sooner, reducing the feasible operating envelope of conventional high-voltage, high-frequency power-electronic designs
[0008] Typically, electrical engineers designing power electronics circuits within the constraints discussed above opt for a combination of physical size and transformation efficiency at steady state ensuring for long term operability, while both of which incur significant financial costs. Additionally, the large size of components significantly limits portable applications for high voltage devices, preventing the adoption of said technologies in a number of crucial fields.
[0009] Conventional electrical engineering practice emphasizes derating factors and conservative current margins to ensure long-term component survivability. As reflected in the aforementioned publications IEEE C57.13, IEEE C37.110, etc, switching devices and magnetically reactive components are not driven near saturation limits or first-cycle asymmetrical current peaks, and engineers are discouraged from operating at conditions where dv / dt or di / dt become unpredictable. As a consequence, engineers regress to a design in dogma in which they consistently select larger physical components or more specialized materials rather than reconfigure standard components to tolerate drastically higher dynamic conditions. For most applications this design dogma is suitable, but for some - as discussed below -this dogma represents a significant limitation to the commercial and technical capability of existing technology.
[0010] In applications where a significant change in inductance accompanies the operation of a device, such as in plasma generation, the ability of conventional power electronic circuitry to maintain the transfer of power to the device is significantly hindered. This can occur for a number of reasons, including a mismatch in the resonance conditions of the power electronic circuitry and the device itself; a sharp change in reactive component behaviour (e.g. inductive resistance); a disruption to the storage cycling of components, among many other risks and mechanisms of disruption. The conventional approach to maintaining the supply of power to devices such as these is simply brute force: increase the amount of the components operating in parallel (increasing the BoM cost) such that no significant limitations are incurred to the ability of power electronic circuitry to maintain supply over a relatively long time. However, these limitations are in themselves a function of the frequency of the alternating current provided, while nature of these circuits with low ohmic resistance and relatively high inductance lead to high sensitivity to parameter variation. Inductive reactance is directly proportional to frequency, which in turn significantly affects impedance, the effect of both being that even minor changes in the inductance to the circuity of a device at high frequency can significantly limit the ability of power electronics circuity to supply continuous power, and in doing so to reduce the efficacy of energy coupling. By way of comparison, conventional high voltage devices operating at frequencies in the Hz and kHz ranges do not encounter such limitation to energy coupling enabling the parallel operation of many components using conventional control circuitry having relatively broad tracking and feedback parameters.
[0011] At higher frequencies, such as those used in substantially constant plasma generation, faster switching is required to overcome the effect produced by changes in inductance. At these higher switching frequencies, switching devices become significantly more complicated, and in their complexity incur a number of risks for the power electronics circuitry in which they are disposed. Configuring such high frequency high voltage applications under optimal conditions, with respect to cost, size, efficacy, efficiency, durability, and control, remains a pertinent need in the field of power electronics engineering.In some limited examples of the problem describe above, resonant converters - either operating a zero voltage switching or zero current switching mechanism - might be applied to provide power, which can be configured to apply pulses of power. Resonant power converters typically allow for power circuitry systems that minimize energy losses incurred by switching operations, though these systems require very fine tuning that traditionally preclude their use in systems with a range of resonances. Additionally, the control of switching frequencies is itself highly complex and can - when powering devices which produce massive changes in inductance - be effectively impossible to achieve whilst maintaining the efficiency resonant converters might normally operate at. Therefore, controlling resonance in response to time-varying inductance of a powered device, by way of control and feedback means (i.e. tracking the instantaneous resonant frequency of the resistive, inductive and capacitive load and maintaining a desired phase relationship between inverter voltage and current over a wide operating range) is desirable.
[0012] Furthermore, outside of configurations of resonant converters for high power high frequency switching, the conventional options available to electrical engineers bear significant limitations. Vacuum tube devices might operate at voltages on the order of 100 kilowatts and 1000 MHz, but their low efficiency generates excessive amounts of heat, in turn degrading their lifespan and requiring extensive cooling equipment. Other more efficient high frequency switching devices produce significant electromagnetic interference (EMI) which can preclude the proper operation of the devices powered by the power electronics circuit in which said switches are employed. Some of these switching devices require their own gate drive circuits to supply sufficient current to operate the switch, without which they would quickly be destroyed by overheating.
[0013] Switching devices rated for lower voltage applications quickly become overheated and fail at higher voltages. High power semi-conductor based devices require specialized heat sinks or active cooling systems to manage temperature at their junctions. Exotic materials such as silicon carbide are advantageous over conventional silicon-based semiconductors in this respect, but are cost-prohibitive. More conventional semiconductors devices, such as silicon controlled rectifiers (SCRs), are rated to operate at much lower switching frequencies than that required by high power applications. Theseratings assume an industry standard of switching frequencies in the Hz range. Employing a number of such devices together to produce a high voltage alternating current requires a network to equalize voltage, but also uniform switching speeds, because the slowest-switching device will be forced to withstand a disproportionate share of the total voltage, which it will likely be destroyed by.
[0014] Modem semiconductor device datasheets typically characterize switching devices under highly constrained test conditions that are intended to illustrate intrinsic device behavior rather than systemlevel operability. For example, output characteristic curves such as drain current as a function of drainsource voltage (IDS = f(VDS)) parameterized by gate voltage (VGS), and specified at a fixed junction temperature and a short pulse width (e.g., tp = 20 ps), describe the response of an isolated device to a single, non-repetitive or sparsely repetitive excitation. Such curves are expressly intended to avoid significant self-heating and cumulative thermal effects, and therefore do not represent sustained or cyclic operation. As a result, while these datasheet characteristics may indicate that a device can momentarily tolerate very high current or voltage during an isolated short pulse, they do not teach how such pulses may be repeated at a defined operating frequency without exceeding thermal, electrical, or magnetic limits over time.
[0015] In practical high-power applications, however, useful power delivery is not achieved through isolated pulses alone, but through repetitive high-frequency operation, wherein switching events recur at a controlled rate and the cumulative effects of energy dissipation, reactive energy exchange, and thermal loading dominate system behavior. Conventional datasheet information does not address how short-duration high-current pulses may be sequenced, synchronized, or controlled so as to form a stable, repetitive alternating current suitable for driving real loads, particularly where the electrical characteristics of the load vary dynamically during operation. Nor do such datasheets provide guidance on how switching frequency may be adapted in response to changes in effective inductance or resonance so as to maintain efficient energy transfer across successive cycles, nor do they account for the electrical phenomena associated with said components being part of power circuitry that powers devices with high levels of inductance.Accordingly, there exists a distinction between demonstrated single-pulse device capability, as reflected in datasheet curves, and system-level methods that enable the deliberate and repeatable use of such capability at high frequency. The present invention addresses this distinction by teaching control architectures and operating methods that define a repetitive switching frequency and coordinated pulse timing, allowing short-duration overload operation to be exploited cyclically while maintaining control over cumulative stress, resonance, and power delivery — capabilities that are neither taught nor implied by device datasheets alone.
[0016] Thus, an object of the present invention to provide high voltage high frequency alternating high current with fewer and more compact electronic components than are conventionally employed in high voltage high frequency power electronics applications and control means. Another object of the present invention is to exploit existing electrical components’ operational ratings to reduce both costs and complexity of configuring power electronics circuitry for high voltage high frequency applications.
[0017] SUMMARY OF INVENTION
[0018] The following embodiments and aspects thereof are described and illustrated in conjunction with systems, devices and methods which are meant to be exemplary and illustrative and not limiting in scope. In various embodiments, one or more of the above -described problems or objectives have been reduced or eliminated, while other embodiments are directed to other advantages or improvements. A first aspect of the invention suggests a method for providing high frequency high voltage alternating high current to a powered device the operation of which may generate a substantial change in inductance, comprising the following steps: (a) configuring a DC power source containing a positive and negative terminal, wherein at least one energy storage device is configured therebetween; (b) configuring at least one pair of switches wherein each switch is assigned: (i) steady state current maximum; (ii) peak current limit; (iii) saturation limit; and (iv) peak time, wherein the connection therebetween constitutes a live wire, and wherein one of the pair is in communication with the positive terminal and the other in in communication with the negative terminal; (c) configuring at least onecontrol circuit in high fidelity communication with the switches in said at least one pair; (d) providing a signal from the control circuit to the said at least one pair of switches to alternate switching in a frequency within an assigned range ; and e) reversibly adjusting the signal provided by the control circuit and increasing operating current to a value at least 5x the peak limit but below the saturation limit, whereby at least one pair of switches produce an alternating current with a controllable frequency from a DC current in a current more than 5x the peak limit value of assigned range of steady state operating parameters, wherein said controllable frequency ensures the current does not exceed the peak current limit duration.
[0019] The term “peak current” or “peak limit”, as used herein, refers to the maximum rated value of current attributed to a commercial electronic component. In cases where a continuous current value and a repetitive current value are given, the latter being a higher value, the latter value is determined to be the true value. When a component is rated with a repetitive peak current value, it is also attributed a “peak time ” limit, for how long the operating current can be maintained at the repetitive peak current.
[0020] According to another aspect of the invention, the at least one pair of switches operate at close to zero voltage switching at the operating current and voltage .It being appreciated that by employing near-zerovoltage and near-zero-current switching, the method of the present invention minimizes the instantaneous overlap of voltage and current, thereby reducing switching losses proportional to the integral JV(t) I(t)dt. By ensuring that transitions occur when V~0 or I~0. the circuit suppresses the high dv / dt and di / dt values typically associated with hard switching, limiting voltage slew rates (dv / dt) and current slew rates (di / dt) to benign levels. This soft-switching behavior reduces voltage overshoot, electromagnetic interference, and thermal stress, enabling substantially higher operating frequencies and currents. Consequently, the system maintains efficient and stable performance even under rapidly varying inductive loading conditions.
[0021] By operating the switches as part of the circuit herein described at significantly high voltages and higher frequencies than defined by said assigned range of operating parameters, the negative effect that the change in inductance produced by the powered device has on the efficiency of the power transfer is significantly mitigated. By combining the massive increase in voltage above what might be consideredthe maximum value for the at least one pair of switches with a proportional increase in the frequency -similarly far above what might be considered the maximum according to said assigned ranges - the risk of overcharging and overheating is also significantly mitigated.
[0022] According to another aspect of the invention, the DC power source is also configured with a midpoint terminal.
[0023] According to another aspect of the invention, the method further comprises a step prior to step (d): configuring at least one transformer between the live wire and the midpoint terminal, wherein the outputs constitute a higher voltage live terminal and neutral terminal.
[0024] According to another aspect of the invention, the higher voltage live and neutral terminal provide alternating current to at least one powered device whose inductance is highly variable.
[0025] According to another aspect of the invention, the frequency signal provided by the control circuit is adapted in relation to the variable inductance of the at least one powered device.
[0026] According to another aspect of the invention, the method further comprises a step prior to step (d): configuring at least one electrolytic capacitor between the positive terminal and the midpoint terminal, and configuring at least one electrolytic capacitor between the negative terminal and the midpoint terminal.
[0027] According to another aspect of the invention, the energy storage device is a capacitor.
[0028] According to another aspect of the invention, the pair(s) of switches are semiconductor-based.
[0029] According to another aspect of the invention, the semiconductor-based switches are silicon control rectifier (SCR) devices.
[0030] According to another aspect of the invention, the semiconductor-based switches are insulator gate bipolar transistors (IGBT).
[0031] According to another aspect of the invention, the semiconductor-based switches are metal-oxide-semiconductor field-effect transistor (MOSFET).According to another aspect of the invention, the semiconductor-based switches are silicon carbide field-effect transistor (SiCFET) or gallium nitride field-effect transisotr (GaNFET),
[0032] According to another aspect of the invention, the semiconductor-based switches are bipolar junction transistor (BJT).
[0033] According to another aspect of the invention, the means of high fidelity communication is an optical communication, wherein the control circuit provides a signal received by the at least one pair of switches. According to another aspect of the invention, the optical communication is enclosed in at least one fiber optic cable.
[0034] BRIEF DESCRIPTION OF THE FIGURES
[0035] Some embodiments of the invention are described herein with reference to the accompanying figures. The description, together with the figures, makes apparent to a person having ordinary skill in the art how some embodiments may be practiced. The figures are for the purpose of illustrative description and no attempt is made to show structural details of an embodiment in more detail than is necessary for a fundamental understanding of the invention.
[0036] In the Figures:
[0037] FIG. 1 constitutes a circuit diagram configurable by the method of the present invention, according to some embodiments.
[0038] FIG. 2A, 2B & 2C constitute three versions of a circuit diagram configurable by the method of the present invention, according to some embodiments.
[0039] FIG. 3A and 3B constitute experimental plots showing the effect of using the method of the present invention on a commercial transistor.DETAILED DESCRIPTION OF SOME EMBODIMENTS:
[0040] In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the invention. However, it will be understood by those skilled in the art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, and components, modules, units and / or circuits have not been described in detail so as not to obscure the invention. Some features or elements described with respect to one embodiment may be combined with features or elements described with respect to other embodiments. For the sake of clarity, discussion of same or similar features or elements may not be repeated.
[0041] Unless explicitly stated, the method embodiments described herein are not constrained to a particular order or sequence. Additionally, some of the described method embodiments or elements thereof can occur or be performed simultaneously, at the same point in time, or concurrently.
[0042] The term “gate drive arrangement” as used herein, refers to the physical, electrical, and logical configuration by which control signals are delivered to the control terminals of semiconductor switching devices (e.g., gate-emitter of an IGBT, gate-source of a MOSFET) so as to determine when, how fast, and under what conditions each switch turns on and off. In the context of the present invention, the gate drive arrangement includes one or more of: a gate driver circuit associated with a switch or a small group of switches; the signal path (electrical, optical, or hybrid) conveying timing information from a control circuit to the gate driver; the gate impedance network (gate resistors, clamps, Miller clamps, or equivalent elements) that sets the switching slew rates (dv / dt, di / dt); the degree of isolation and locality of the driver relative to the switch (e.g., optically isolated, physically co-located with the switch); the synchronization strategy ensuring that multiple switches receive substantially simultaneous drive commands.The term “parallel switch pairs ”, as used herein, refers to two or more semiconductor switching devices that are electrically connected in parallel such that they jointly form a single effective switching element, sharing the same load current path while being commanded to switch in a coordinated manner. Parallel switch pairs may define the topology of a system, wherein the gate drive arrangement defines the control and actuation infrastructure, i.e. that the former describes what is being switched, whilst the latter defines how that switching is performed.
[0043] The term “tuning frequency”, as used herein, refers to the deliberate adjustment of the switching frequency of a power electronic circuit itself in response to changes in the electrical characteristics of a powered device or load, such that the timing of successive switching events is altered to maintain a desired operating condition. Tuning frequency may define an operating strategy of a system, wherein the switching frequency is varied to track a time-varying resonant condition or phase relationship, thereby determining when switching transitions occur relative to the electrical state of the load.
[0044] The term “modulation” , as used herein, refers to the variation of one or more parameters of a switching waveform about a nominal or base switching frequency in order to shape the magnitude, duty, phase, or temporal envelope of power delivered to a load, without fundamentally redefining the switching frequency itself. Modulation may define a power-regulation technique of a system, wherein the manner or extent of energy delivery is controlled, while tuning frequency defines the underlying temporal alignment of the switching events.
[0045] Tuning frequency and modulation may define distinct control aspects of a system, wherein tuning frequency defines the temporal alignment of switching events with the electrical characteristics of a load, i.e. when switching transitions occur, whilst modulation defines the manner in which those switching events are varied or shaped to regulate power delivery, i.e. how the switching is applied without redefining the switching frequency.
[0046] The term “driver ”, as used herein, refers to the circuitry that directly interfaces between a control circuit and a semiconductor switching device, and that provides the electrical signals and energy required to cause the switch to turn on and off in a controlled manner.Reference is made to FIG. 1, which constitutes a circuit diagram configurable by the method of the present invention, according to some embodiments. A DC power source 110 is provided to a power circuit 101 containing a capacitor bank 150 of three capacitors 151-3, then to three pairs of transistors 121-3 feeding three transformers 131-3, wherein the switching frequency of each of the pairs of transistors are controlled by a control circuit 141-3 in optical communication therewith, wherein said control circuits are timing controlled by an input 140. The transistors in the circuit are configured to convert the DC power input 110 to AC power to be fed into the transformers, and are rated to a frequency between 1-100 kHz at a particular voltage, but by operating the control circuitry according to the method of the present invention, said particular voltage can be dramatically surpassed, and the effective frequency of switching can be raised to above 10 MHz, producing a high voltage high amp output 160. Reference is made to FIGs. 2A-2C, which constitute three versions of a circuit diagram configurable by the method of the present invention, according to some embodiments.
[0047] In FIG. 2A, a circuit 200 configurable by the method of the present invention is shown, with some components omitted for the purposes of brevity, wherein two capacitors 210 and 211 are configured in communication with two IGBT transistors, the junction therebetween in communication with an inductive device 230, itself in further series communication with a third capacitor 240 and a resistor 250. The control circuitry for the two IGBT transistors 220 and 221 is not shown, but operates either alternatively at a high frequency tunable for the specific properties of said transistors. Said tunability is provided optionally by way of modulation.
[0048] Whilst the steady state rating of these transistors, such as - by way of example - the Infineon IGBT module PN FF1800R17IP5 - may be in the range of 1-1.5 kA, the present invention configures such components in a way that minimizes their period of action and allows use up to 12 kA without compromising safety, according to some embodiments of the invention. This technical effect is facilitated by the method of the present invention by the deliberate and structural configuration alternate to conventional uses of said components, wherein steady state operation is dutifully avoided. According to some embodiments, the energy density afforded to the power circuitry shown in FIG. 2A is between3 and 10 times higher than that of conventional power circuitry circuits where components, such as the Infineon IGBT transistor, are used according to their ratings for steady state operation.
[0049] In FIG. 2B, a circuit 201 configurable by the method of the present invention is shown, with some components omitted for the purposes of brevity, wherein a single capacitor 212 separates connections to two IGBT transistors 221 and 220, the junction therebetween in communication with an inductive device 230, a second capacitor 240 and a resistor 250. The control circuitry for the two IGBT transistors 220 and 221 is not shown, but operates either alternatively at a high frequency tuneable for the specific properties of said transistors, wherein said high frequency tunability is optionally performed by way of modulation.
[0050] In FIG. 2C, a circuit 202 configurable by the method of the present invention is shown, with some components omitted for the purposes of brevity, wherein a single capacitor 212 separates connections to a pair of IGBT transistors 222 and 223, and a pair of MOSFET transistors 224 and 225, the junction between the former pair in communication with a resistor 250, the junction between the latter pair in communication with an inductive device 230, a second capacitor 240, and ultimately the resistor 250 whose other terminal connects to the former pair. Due to the use of two different types of transitors, the circuit shown in FIG. 2C is in fact a hybrid system. The control circuitry for the two IGBT transistors 220 and 221 is not shown, but operates either alternatively at a high frequency tuneable for the specific properties of said transistors.
[0051] According to the embodiments illustrated in FIGs. 2A-2C, the switches configured by the method of the present invention are IGBT transistors. According to other embodiments, different kinds of switches may be employed, each maintained at periodic use with a low ratio of “on time ” to ensure operating parameters do no constitute steady state operation.
[0052] Reference is drawn to FIG. 3A and 3B, which constitute experimental graphs showing the effect of using the method of the present invention on a commercial transistor. In FIG. 3A, a time-domain plot 310 is shown in which a waveform 320 for the operating current through a commercial transistor is presented over a succession of high-energy oscillations. At the maximum region 330 for the oscillationshown, a maximum current 340 of 10.62 kilamperes is recorded. The commercial transistor has a rated peak current (repetitive use) of just 3.2 kiloamperes and a peak time of 1 ms (millisecond). The super peak time 350, which is the time the transistor is operated at a current higher than the peak in a cycle, is just 11 ps (microsecond, i.e. 0.011 ms). In this way the method of the present invention maintains constant use of a component at a current much higher than its rating. The repeated sequence of rise, inflection, collapse, and decay demonstrates that the transistor, when controlled in accordance with the present invention, tolerates significant cycle-to-cycle variation in load impedance while maintaining stable commutation despite kiloampere-scale current flow.
[0053] In FIG. 3B, a corresponding voltage-current trajectory 331 is illustrated, derived from the peak portion of the oscillation shown in FIG. 3A. The plotted characteristic 331 departs markedly from the elliptical form associated with a linear inductive element, and instead exhibits a near-vertical segment 332 at high current, indicating an interval during which the effective inductance approaches zero and the device behaves momentarily as a low-impedance conductor. A hysteretic return path 333 is shown as the current reverses, thereby demonstrating nonlinear inductance, load-state transitions, and the redistribution of stored magnetic energy through the power-electronic switches. Together, FIG. 3A and 3B illustrate that the present invention enables safe operation of commercial transistors under extreme current and rapidly changing inductive conditions.
[0054] According to some embodiments of the present invention, power circuitry designed for applications where a significant change in inductance accompanies the operation of a device (such as pulsed-laser), excitation may employ a staged-conduction approach in which different semiconductor switch pairs are handed control of the load at different points in the inductive transition. In this arrangement, the circuit anticipates the flashlamp or plasma tube’s collapse in inductance and routes current through switch pairs whose pulsed-current strength and thermal tolerance best match the instantaneous operating condition. This handoff reduces electrical stress and allows the energy pulse to maintain its prescribed temporal shape.
[0055] According to some embodiments of the present invention, the switching network may be integrated with predictive timing algorithms that estimate when a pulsed device — such as a plasma dischargecell — will shift from a high-impedance inductive state to a low -impedance conduction state. The controller may reference stored profiles of previous pulses, evaluating statistical deviations to forecast when the inductance will collapse. Based on this prediction, the system may adjust switch -pair activation to mitigate stress on the semiconductor components while maintaining the required pulse energy.
[0056] According to some embodiments of the present invention, the power circuity on which the method is operated is a compact pulse-forming module that is directly mounted to the pulsed device. By minimizing the distance between the switching devices and the load, parasitic inductance is reduced, thereby lessening the magnitude of the voltage spikes generated when the load inductance undergoes abrupt change. This embodiment is particularly useful for Q-switched or cavity-dumped lasers, where mechanical alignment constraints limit the distance between optical components but do not restrict electronic integration.
[0057] According to some embodiments of the present invention, the power stage may incorporate a hybrid switching network combining MOSFETs for fast initial conduction with IGBTs for slower, high-current follow-through, as demonstrated in the hybrid system shown in FIG. 2. According to some embodiments, MOSFETs may include silicon carbide MOSFETs. The MOSFETs may be activated during the early phase of the pulse — when the inductive load strongly resists current rise — while the IGBTs are triggered once the inductance collapses and higher currents are demanded. Such hybrid configurations utilize the strengths of each device technology, allowing the circuit to adapt gracefully to the evolving electrical characteristics of the pulsed device.
[0058] According to yet other embodiments of the present invention, a driver may include an energy-recovery mechanism that routes excess magnetic energy — released when the inductance collapses — into a secondary capacitor bank rather than dissipating it as heat. In this embodiment, the switch pairs operated in accordance with the invention can temporarily tolerate the associated current surge, enabling the energy-recovery loop to operate without requiring bulky components.According to some embodiments of the present invention, the method may be operated on a power circuit in which a distributed gate -drive arrangement is to be employed across multiple switch pairs. This approach is particularly attractive in embodiments involving several parallel switch groups (which are a subset of distributed gate-drive arrangement which enable....), where ensuring balanced current sharing is essential to prevent localized overstress during inductance collapse events.
[0059] According to some embodiments of the present invention, the invention may be implemented in circuity supplying power to pulsed-laser systems, including machining systems (micro -drilling, surface structuring, etc) where energy precision is critical. The described architecture enables the power circuit to produce highly repeatable pulse shapes even when the plasma discharge develops differently from pulse to pulse. For instance, by tolerating extreme current peaks safely, the switch network preserves repeatability of the laser output, which directly improves machining accuracy in fine ablation processes such as micro-drilling and surface structuring.
[0060] According to some embodiments of the present invention, the described techniques may be incorporated into pulsed systems used for scientific diagnostics, including Thomson scattering lasers, terahertz generation stages, and plasma waveguides. These systems often experience unpredictable plasma formation behaviors, and the inductance of the discharge path can vary by an order of magnitude in microseconds. The method taught in the present invention effectively distributes stress among multiple switch pairs and ensures that even such extreme variability can be tolerated. In further examples, similar advantages may be realized in pulsed-power gas breakdown experiments, Z-pinch plasma devices, compact neutron generators, or electromagnetic shock sources, each of which produces rapid impedance transitions during discharge. Such systems rely heavily on precise control over short, intense bursts of current and the disclosed architecture allows stable, repeatable operation even in the presence of severe inductance collapse and high di / dt conditions.
[0061] According to some embodiments of the present invention, the architecture may include an embedded measurement subsystem capable of storing high-resolution current and voltage waveforms for later analysis. When combined with the inductance -inference techniques described earlier, the stored datacan be used to refine control algorithms for future pulses, producing a self-optimizing system capable of adjusting to component aging, electrode erosion, or environmental variations.
[0062] According to some embodiments of the present invention, the system may include temperature -sensing elements embedded within the switch modules so that the controller can determine how much pulsed overload margin remains for upcoming pulses. If the monitored temperature exceeds a preset threshold, the controller may adjust the pulse repetition rate, reduce pulse energy, or selectively disable certain switch pairs. The modular nature of the design ensures that the system remains operational even when the available overload margin is temporarily reduced Additionally, the temperature sensing functionality can be further integrated for allowing adaptation of the controllable frequency under different thermal conditions to optimize for safety. Similarly, alternative physical layouts to those demonstrated in FIG.
[0063] 2 may employ coaxial conductor geometries, integrated copper-polymer composites, or multi-layer flex-rigid interconnects to further suppress parasitic loop inductance in ultra-compact pulsed drivers. In such embodiments, the spatial arrangement of conductors is selected to enforce symmetrical magnetic fields around each switch pair, thereby enhancing both temporal alignment and current balancing when driving loads whose inductance collapses abruptly. Such layout techniques are especially useful in applications like compact pulsed-laser heads, portable plasma generators, and micro-pulse acoustic transducers, where minimizing geometric inductance is essential for containing voltage spikes and ensuring safe operation under highly transient conditions.
[0064] According to some embodiments of the present invention, the switching network may be fabricated using a laminated bus structure designed to minimize stray inductance between parallel switch pairs. The laminated geometry improves current sharing and dramatically reduces voltage overshoot when the load inductance drops suddenly. Because the method of the present invention allows each switch to operate safely under short-duration overload conditions, the laminated bus works synergistically with the overload-tolerant control strategy to maintain stable and predictable behavior even during aggressive pulsed operation.
[0065] According to some embodiments of the present invention, response to time-varying inductance of a powered device, by way of control and feedback means (i.e. tracking the instantaneous resonantfrequency of the resistive, inductive and capacitive load and maintaining a desired phase relationship between inverter voltage and current over a wide operating range) is obtained: the powered device and its coupling network may be modeled, for purposes of control, as an equivalent series RLC load whose parameters vary during pulsed operation. The resistance R(t), inductance L(t) and capacitance C(t) of this equivalent network may be represented as R(t) = Ro + AR(t), L(t) = Lo + AL(t) and C(t) = Co + AC(t), where Ro, Lo and Co are nominal values and AR(t), AL(t), AC(t) capture the time-varying behavior associated with, for example, plasma formation, laser discharge, or other transient processes within the powered device. In such embodiments, the high-frequency power stage of the present invention may be implemented as a half-bridge or full-bridge inverter supplied from a DC power source with an energy storage device, such as one or more capacitors, connected between the positive and negative terminals and, in some cases, a midpoint terminal to which resonance modulation is applied.
[0066] When resonance modulation is applied during operation, the inverter switches are driven so that the AC-side current and the voltage across the equivalent capacitance of the load are approximately sinusoidal at an instantaneous switching frequency co_s(t). Under near-resonant conditions, the current i(t) and capacitor voltage v_C(t) may be expressed in terms of slowly varying magnitudes and phases, and a control circuit may derive phase variables indicative of the instantaneous deviation from resonance. For example, the control circuit may determine a phase difference q>_i(t) between the inverter output voltage and the current supplied to the powered device, using zero-crossing detection or other suitable methods, and may seek to regulate this phase difference toward a target value associated with resonant operation.
[0067] In some embodiments, the control circuit employs a reduced-order envelope model of the RLC network, stored in digital memory, which relates the evolution of the phase variable to the difference between the switching frequency co_s(t) and an estimated instantaneous resonant frequency coo(t) = l (L(t)C(t)). The controller may implement a nonlinearity-compensation unit that inverts this relationship, generating a frequency-command signal such that, from the perspective of an outer linear regulator, the phase variable behaves substantially as an integrator disturbed by modeling error and parameter drift. A proportional-integral regulator may then act on the phase error to drive the system toward resonance.According to some embodiments of the present invention, these control structures are applied in conjunction with the overload operating regime defined elsewhere in this specification. Thus, while the controller adjusts co_s(t) in response to changes in effective inductance so as to maintain near-resonant operation and thereby facilitate near-zero-voltage or near-zero-current switching, the switches themselves are still operated at currents at least five times their rated peak current and for durations not exceeding one hundredth of the rated peak time. In embodiments where a transformer is interposed between the inverter and the powered device, as in FIG. 1, the same equivalent RLC modeling may be applied on the reflected side of the transformer. The adaptive frequency control based on the time-varying RLC parameters thereby serves to maintain efficient energy transfer and benign switching conditions, enabling the implementation of the invention described herein to extract high instantaneous power from commercially rated components while preserving their long-term reliability.
[0068] According to some embodiments of the invention, switches can be operated at a level at least ten times their rated peak current, for durations not exceeding one hundredth of the rated peak time.
[0069] According to some embodiments of the invention, switches can be operated at a level at least twenty times their rated peak current, for durations not exceeding one hundredth of the rated peak time. According to some embodiments of the invention, switches can be operated at a level at least fifty times their rated peak current, for durations no exceeding one hundredth of the rated peak time.
[0070] According to some embodiments of the present invention, the invention may be configured for pulsed acoustic transducers, electromagnetic launchers, and medical lithotripters and other applications outside of the systems discussed by way of example in this description above.
[0071] Although the present invention has been described with reference to specific embodiments, this description is not meant to be constmed in a limited sense. Various modifications of the disclosed embodiments, as well as alternative embodiments of the invention will become apparent to persons skilled in the art upon reference to the description of the invention. It is, therefore, contemplated that the appended claims will cover such modifications that fall within the scope of the invention.
Claims
CLAIMS:
1. A method for providing high frequency high voltage alternating high current to at least one powered device the operation of which generates a substantial change in inductance, comprising the following steps:a. configuring a DC power source containing a positive and negative terminal, wherein at least one energy storage device is configured therebetween;b. configuring at least one pair of switches, wherein each switch has assigned:i. steady state current maximum;ii. peak current limit;iii. saturation limit; andiv. peak time,wherein the connection therebetween constitutes a live wire, and wherein one switch in each of the at least one pair of switches is in communication with the positive terminal and the other in in communication with the negative terminal; c. configuring at least one control circuit in high fidelity communication with both of the switches in said at least one pair;d. providing a signal from the control circuit to the said at least one pair of switches to alternate switching in a frequency within said assigned range; ande. reversibly adjusting the signal provided by the control circuit and increasing operating current to a value at least 5x the peak limit but below the saturation limit, whereby at least one pair of switches produce an alternating current with a controllable frequency from a DC current in both a current and voltage more than 5x the peak limit value of assigned range of steady state operating parameters,wherein said controllable frequency ensures the current doesn’t exceed the peak current limit duration.
2. The method of claim 1, wherein the at least one pair of switches operate at close to zero voltage switching at the operating current and voltage.
3. The method of claim 2, wherein the at least one pair of switches operate at close to zero current switching at the operating current and voltage.
4. The method of claim 1, wherein the DC power source is also configured with a midpoint terminal.
5. The method of claim 1, further comprising a step prior to step (e): configuring at least one transformer between the live wire and the midpoint terminal, wherein the outputs constitute a higher voltage live terminal and neutral terminal.
6. The method of claim 3, wherein the higher voltage live and neutral terminal provide alternating current to at least one powered device whose inductance is highly variable.
7. The method of claim 1, wherein the frequency signal provided by the control circuit is adapted in relation to the variable inductance of the at least one powered device.
8. The method of claim 1, further comprising a step prior to step (e): configuring at least one electrolytic capacitor between the positive terminal and the midpoint terminal, and configuring at least one electrolytic capacitor between the negative terminal and the midpoint terminal.
9. The method of claim 1, wherein the energy storage device is a capacitor.
10. The method of claim 1, wherein the pair of switches are semiconductor-based.
11. The method of claim 8, wherein the semiconductor-based switches are silicon control rectifier (SCR) devices.
12. The method of claim 8, wherein the semiconductor-based switches are insulator gate bipolar transistors (IGBT).
13. The method of claim 8, wherein the semiconductor-based switches are metal -oxide - semiconductor field-effect transistor (MOSFET).
14. The method of claim 8, wherein the semiconductor-based switches are silicon carbide fieldeffect transistor (SiCFET) or gallium nitride field-effect transistor (GaNFET).
15. The method of claim 8, wherein the semiconductor-based switches are bipolar junction transistor (BJT).
16. The method of claim 1, wherein the means of high fidelity communication is an optical communication, wherein the control circuit provides a signal received by the at least one pair of switches.
17. The method of claim 14, wherein the optical communication is enclosed in at least one fiber optic cable.