Silicon wafer manufacturing method, and silicon wafer
A two-step heat treatment process for silicon wafers, combining RTO and RTA, addresses the challenge of reducing surface oxygen concentration and preventing slippage, resulting in improved semiconductor device performance.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- GLOBALWAFERS JAPAN
- Filing Date
- 2025-11-27
- Publication Date
- 2026-07-02
AI Technical Summary
Conventional silicon wafer manufacturing methods struggle to reduce oxygen concentration on the surface layer while preventing slippage during Rapid Thermal Annealing (RTA), leading to potential defects in semiconductor devices.
A method involving a two-step heat treatment process: first, forming an oxide film on both the front and back surfaces of the silicon wafer in an oxidizing atmosphere (RTO), followed by removing the oxide film from the front surface and performing a second heat treatment in a non-oxidizing atmosphere (RTA) while maintaining the oxide film on the back surface, thereby reducing oxygen concentration on the surface layer and preventing slippage.
The method effectively reduces oxygen concentration on the surface layer to 1 × 10⁻¹⁶ atoms/cm³, suppresses slippage during RTA, and minimizes variations in oxygen concentration, enhancing the quality of silicon wafers for semiconductor devices.
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Figure JP2025041318_02072026_PF_FP_ABST
Abstract
Description
Method for manufacturing silicon wafers and silicon wafers
[0001] The present invention relates to a method for manufacturing a silicon wafer suitable for use as a substrate for semiconductor devices, and to a silicon wafer manufactured by this manufacturing method.
[0002] For example, in image sensor devices, it is desirable to use silicon wafers with extremely low oxygen concentrations in the surface layer, which is the device's active region, in order to prevent the generation of oxygen-related defects that result in poor afterimage characteristics. On the other hand, if the oxygen concentration is too low, crystal defects such as slips may occur during the device process, so it is desirable to manufacture the wafers with a target low oxygen concentration without variation.
[0003] Therefore, in recent years, research has been underway to develop techniques for reducing oxygen concentration as intended in crystal growth using the Czochralski method (CZ method).
[0004] Patent Document 1 discloses a "method for manufacturing a silicon wafer" that combines the following steps: a first step of heat treatment performed in an oxidizing gas atmosphere under predetermined conditions (maximum temperature of 1300°C to 1380°C) using a raw silicon wafer with a predetermined oxygen concentration sliced from a silicon single crystal ingot grown by the CZ method; a second step of peeling off the oxide film from the front and back surfaces (including the edges) of the silicon wafer; and a third step of heat treatment performed in a non-oxidizing gas atmosphere under predetermined conditions (maximum temperature of 1200°C to 1380°C). This method makes it possible to obtain a silicon wafer with a sufficiently reduced oxygen concentration on the surface.
[0005] Japanese Patent Publication No. 2016-195211
[0006] In the above-mentioned Patent Document 1, by performing a third step of heat treatment in a non-oxidizing atmosphere (RTA: Rapid Thermal Annealing), the oxygen concentration on the surface layer of the silicon wafer (front and back surfaces) that increased during the first step of heat treatment in an oxidizing atmosphere (RTO: Rapid Thermal Oxidation) can be reduced.
[0007] In other words, conventional silicon wafer manufacturing methods have achieved a certain degree of effectiveness in terms of oxygen concentration, as they have been able to reduce the oxygen concentration on the wafer surface as intended.
[0008] However, if the oxide film on the front and back surfaces (the entire surface of the silicon wafer) is removed after RTO, which is a heat treatment in an oxidizing atmosphere, and then RTA, which is a heat treatment in a non-oxidizing atmosphere, is performed on the silicon wafer after the oxide film has been removed, slippage is more likely to occur in the silicon wafer held in the susceptor.
[0009] The present invention has been made in view of the above problems, and aims to provide a method for manufacturing a silicon wafer and a silicon wafer that can suppress slippage during RTA while reducing the oxygen concentration of the surface layer on the surface side of the silicon wafer.
[0010] The present invention relates to a method for manufacturing a silicon wafer, comprising: a first heat treatment step of heating a silicon wafer, prepared by slicing a silicon single crystal ingot grown by the CZ method, to a first maximum temperature of 1250°C to 1400°C in an oxidizing gas atmosphere, holding it at the first maximum temperature for a predetermined time, and then cooling it down to form an oxide film on both the front and back surfaces of the wafer; a surface oxide film removal step of removing the oxide film formed on the wafer surface (front side) of the silicon wafer after the first heat treatment step, while leaving the oxide film formed on the back side of the wafer; and a second heat treatment step of heating the silicon wafer after the surface oxide film removal step to a second maximum temperature of 800°C to 1350°C in a non-oxidizing gas atmosphere, holding it at the second maximum temperature for a predetermined time, and then cooling it down to reduce the oxygen concentration on the surface layer of the wafer surface.
[0011] In this process, the first heat treatment step is performed using a single-wafer heat treatment apparatus, and the second heat treatment step is performed using either a single-wafer heat treatment apparatus or a batch-type heat treatment apparatus. The holding time at the first maximum temperature is preferably 1 second or more and 60 seconds or less. The holding time at the second maximum temperature is preferably 1 second or more and 60 seconds or less in the case of a single-wafer apparatus, and preferably 1 minute or more and 240 minutes or less in the case of a batch-type apparatus.
[0012] For example, in the silicon wafer manufacturing method according to the present invention described above, the oxygen concentration of the wafer surface layer is increased to 1 × 10 by the heat treatment in the second heat treatment step. 17 atoms / cm 3 It is preferable to reduce the concentration to the following level. Furthermore, in the first heat treatment step, it is preferable to form an oxide film of 10 to 50 nm on the front and back surfaces of the wafer.
[0013] Furthermore, in the silicon wafer manufacturing method according to the present invention, in the surface oxide film removal step, hydrofluoric acid is supplied to the wafer surface (front side) and pure water is supplied to the wafer back side using a spin cleaning device, and in the second heat treatment step, heat treatment is performed with the oxide film formed in the first heat treatment step remaining on the wafer back side. In addition, it is preferable that the silicon wafer manufacturing method according to the present invention further includes a back side oxide film removal step to remove the oxide film remaining on the back side of the silicon wafer after the second heat treatment step.
[0014] Thus, in the silicon wafer manufacturing method according to the present invention, by performing a series of processes consisting of a first heat treatment step (RTO), a surface oxide film removal step (removing only the oxide film from the wafer surface (front side) and leaving the oxide film on the wafer back side), and a second heat treatment step (RTA), the oxygen concentration of the wafer surface layer, which is the device active region, can be reduced, and furthermore, variations in oxygen concentration caused by the CZ method can be suppressed.
[0015] Further, in the method for manufacturing a silicon wafer according to the present invention, since the heat treatment by the second heat treatment step (RTA) is carried out while leaving the oxide film formed in the first heat treatment step (RTO) on the back surface (contact region with the susceptor), that is, since the heat treatment is carried out while maintaining the strength of the wafer back surface, the occurrence of slips can be suppressed.
[0016] Further, the silicon wafer according to the present invention manufactured by the above manufacturing method has a low oxygen region in the surface layer on the wafer surface side where the oxygen concentration is reduced to 1×10 17 atoms / cm 3 or less, a high oxygen region in the surface layer on the wafer back surface side where the oxygen concentration is 7×10 17 atoms / cm 3 or more, and a medium oxygen region where the oxygen concentration is higher than 1×10 17 atoms / cm 3 and lower than 7×10 17 atoms / cm 3 and in which BMD (Bulk Microdefect) nuclei are formed.
[0017] By reducing the oxygen concentration in the surface layer on the wafer surface side, an imaging device using the silicon wafer according to the present invention can suppress oxygen-related defects that cause afterimage characteristic defects. Further, since the oxygen concentration on the back surface side of the silicon wafer according to the present invention is increased, that is, since the strength on the back surface side is maintained, slips during RTA implementation can also be suppressed in the device process.
[0018] According to the method for manufacturing a silicon wafer according to the present invention, it is possible to suppress slips during RTA implementation while reducing the oxygen concentration in the surface layer on the silicon wafer surface side.
[0019] Figure 1 is a cross-sectional conceptual diagram showing an example of a single-wafer RTP apparatus used for heat treatment in the silicon wafer manufacturing method according to the present invention. Figure 2 is a flowchart showing an example of the silicon wafer manufacturing method according to the present invention. Figure 3 is a schematic diagram showing the silicon wafer manufacturing process according to the present invention. Figure 4 is an image diagram showing an example of heat treatment. Figure 5 is a schematic diagram showing the layer structure of a silicon wafer manufactured by the silicon wafer manufacturing method according to the present invention. Figure 6 is a flowchart showing a modified example of the silicon wafer manufacturing method according to the present invention.
[0020] Hereinafter, a silicon wafer manufacturing method and embodiments of the silicon wafer according to the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to these embodiments. Furthermore, in the specification and drawings of this application, elements that can be similarly described are denoted by the same reference numerals, thereby omitting redundant explanations.
[0021] <Summary of Manufacturing Method> The manufacturing method of silicon wafers according to the present invention comprises a first heat treatment step (RTO) in which a silicon wafer (hereinafter sometimes simply referred to as "wafer") obtained by slicing a silicon single crystal ingot grown by the CZ method is heated in an oxidizing gas atmosphere to a first maximum temperature of 1250°C to 1400°C, held at the first maximum temperature for a predetermined time, and then cooled at a cooling rate of 25°C / second to 250°C / second to form an oxide film on the front and back surfaces of the wafer, and silicon The process includes a surface oxide film removal step, in which the oxide film formed on the wafer surface (front side) of the wafer is removed (peeled), while the oxide film formed on the back side of the wafer is left intact; and a second heat treatment step (RTA), in which the silicon wafer after the oxide film on the wafer surface (front side) has been removed is heated in a non-oxidizing gas atmosphere to a second maximum temperature of 800°C to 1350°C, held at the second maximum temperature for a predetermined time, and then cooled to reduce the oxygen concentration on the surface layer of the wafer surface.
[0022] In this embodiment, the oxygen concentration is 3.0 × 10⁻⁶ by the CZ method. 17 atoms / cm 3 The above 1.9 x 1018 atoms / cm 3 The following silicon single crystal ingots will be grown. The oxygen concentration of the grown silicon single crystal ingots will be 7 × 10⁻¹⁶. 17 atoms / cm 3 If the following conditions are met, the oxygen concentration in the bulk portion will remain low even after RTO and RTA in this embodiment, making it more desirable as a wafer for CIS applications. For example, using the FZ method (Floating Zone method), 3.0 × 10 17 atoms / cm 3 You may grow silicon single crystal ingots smaller than a certain size.
[0023] Furthermore, in this embodiment, an oxide film of 10 μm to 50 μm in thickness is formed on the front and back surfaces of the wafer by RTO, and the oxygen concentration of the surface layer on the wafer surface side (1 to 3 μm deep from the wafer surface (front side)) is set to 1 × 10⁻¹⁶ by RTA. 17 atoms / cm 3 Reduce the concentration to the following levels.
[0024] Specifically, by performing a series of processes consisting of RTO, a surface oxide film removal process (removing only the oxide film from the wafer surface (front side) and leaving the oxide film on the wafer back side), and RTA, the oxygen concentration of the wafer surface layer, which is the device active region, is increased to 1 × 10⁻¹⁶. 17 atoms / cm 3 The concentration can be reduced to the following levels, and furthermore, the oxygen concentration of the intermediate layer can be made higher than that of the surface layer on the wafer's front side, and higher than that of the surface layer on the wafer's back side.
[0025] <RTP Apparatus> Figure 1 is a cross-sectional conceptual diagram showing an example of a single-wafer RTP apparatus used in the heat treatment (RTP: Rapid Thermal Process) in the silicon wafer manufacturing method according to the present invention.
[0026] The RTP apparatus 10 shown in Figure 1 comprises a reaction chamber 20 for housing a wafer W and performing heat treatment, a wafer holding section 30 provided within the reaction chamber 20 for holding the wafer W, and a heating section 40 for heating the wafer W. When the wafer W is held in the wafer holding section 30, a first space 20a is formed, which is a space enclosed by the inner wall of the reaction chamber 20 and the surface (front surface: device formation surface) W1 of the wafer W, and a second space 20b is formed, which is a space enclosed by the inner wall of the reaction chamber 20 and the back surface W2 of the wafer W facing the surface W1.
[0027] The reaction chamber 20 contains atmospheric gas F in the first space 20a and the second space 20b. A The supply port 22 that supplies (solid arrow) and the supplied atmospheric gas F A It has an outlet 26 for discharging from the first space 20a and the second space 20b. The reaction chamber 20 is made of, for example, quartz.
[0028] The wafer holding section 30 includes a ring-shaped susceptor 32 that holds the outer periphery of the back surface W2 of the wafer W, and a rotating body 34 that holds the susceptor 32 and rotates the susceptor 32 around the center of the wafer W as an axis. The susceptor 32 is made of, for example, SiC, and its surface is coated with an oxide film.
[0029] The heating unit 40 heats the wafer W from both sides by lamp heating through light irradiation from a plurality of halogen lamps 50 located outside the reaction chamber 20, above the surface W1 and below the back surface W2 of the wafer W held in the wafer holding unit 30.
[0030] When performing heat treatment using the RTP apparatus 10 shown in Figure 1, the wafer W is introduced into the reaction chamber 20 from a wafer inlet (not shown) provided in the reaction chamber 20, and the outer periphery of the back surface W2 of the wafer W is held on the ring-shaped susceptor 32 in the wafer holding section 30. Then, the atmospheric gas F A The wafer W is heated by the heating unit 40 while the wafer W is rotated.
[0031] <Details of the Manufacturing Method> Next, embodiments of the silicon wafer manufacturing method according to the present invention will be specifically described with reference to the drawings. Figure 2 is a flowchart showing an example of the silicon wafer manufacturing method according to the present invention, and Figure 3 is a schematic diagram showing the silicon wafer manufacturing process according to the present invention.
[0032] As shown in Figure 2, the silicon wafer manufacturing method in this embodiment includes a growth step (step S1) of growing a silicon single crystal ingot by the CZ method, a slicing step (step S2) of slicing the grown silicon single crystal ingot to produce a disc-shaped wafer W, a grinding step (step S3) of performing a planarization treatment on the front and back surfaces of the disc-shaped wafer W, the first heat treatment step (RTO: step S4), the surface oxide film removal step (step S5), the second heat treatment step (RTA: step S6), a back surface oxide film removal step (step S7) of removing (peeling off) the oxide film formed on the back surface of the wafer, a final polishing step (step S8) of mirror polishing at least the wafer surface (front surface) which will be the semiconductor device formation surface, and a final cleaning step (step S9) of performing single-wafer spin cleaning on the wafer W after mirror polishing.
[0033] In other words, in this embodiment, the heat treatment by the first heat treatment process (RTO) is performed on the wafer W after the grinding process. In the growth process of this embodiment, as an example, the oxygen concentration is 3.0 × 10⁻¹⁶ by the CZ method. 17 atoms / cm 3 The above 1.9 x 10 18 atoms / cm 3 The following silicon single crystal ingots are grown. The grinding process also includes a lapping process, which involves rough polishing to a certain thickness while removing cutting damage formed during slicing, and an etching process, which involves chemical etching to remove minute distortions and scratches introduced during the lapping process.
[0034] In the silicon wafer manufacturing method of this embodiment shown in Figure 2, in the first heat treatment step (RTO: step S4), the wafer W after the grinding step (step S3) (see Figure 3(a)) is heated in an oxidizing gas atmosphere to a first maximum temperature of 1250°C to 1400°C, held at the first maximum temperature for a period of 1 second to 60 seconds, and then cooled at a cooling rate of 25°C / second to 250°C / second.
[0035] Figure 4 is an illustrative diagram showing an example of heat treatment, where the vertical axis represents temperature (°C) and the horizontal axis represents time (sec). In Figure 4, the first heat treatment process (RTO) is indicated by section X. In this first heat treatment process (RTO), for example, by maintaining a maximum attainable temperature T1 (1250°C to 1400°C) for a predetermined time t1 (1 second to 60 seconds), an oxide film 61 of 10 to 50 μm is formed on both sides of the wafer (see Figure 3(b)). This makes it possible to obtain a wafer W with excellent strength. In the first heat treatment process (RTO), as an example, the RTP apparatus 10 shown in Figure 1 is used. In addition, any known gas can be used as the oxidizing gas without particular restriction, but oxygen is usually used. Furthermore, the atmospheric gas during heat treatment does not have to be 100% oxygen gas; for example, any gas with an oxygen partial pressure in the range of 0.5 to 100% is acceptable.
[0036] Furthermore, by performing RTO, void defects such as COP (Crystal Originated Particle) and oxygen precipitates present on the wafer surface after the grinding process can be eliminated, while BMD (Bulk Microdefect) nuclei can be formed in the bulk region.
[0037] Furthermore, RTO with a first maximum temperature of less than 1250°C is undesirable because the oxide film on the inner wall of the COP is difficult to dissolve, and the COP elimination effect may not be sufficient, and the elimination effect of oxygen precipitates may also be insufficient. Also, if the first maximum temperature exceeds 1400°C, slip is more likely to occur, which is undesirable.
[0038] After the first heat treatment process (RTO), in the surface oxide film removal process (step S5), the oxide film formed on the wafer surface (front side) is removed (peeled). At this time, the oxide film is removed by performing hydrofluoric acid cleaning on the wafer surface (hydrofluoric acid cleaning is not performed on the back side of the wafer). Specifically, by single-wafer spin cleaning (cleaning using a spin cleaning device), a cleaning solution with a hydrofluoric acid concentration of 0.1 to 20% by mass, preferably 1 to 10% by mass, is supplied to the wafer surface to remove the oxide film, and at the same time, pure water is supplied to the back side of the wafer to perform pure water cleaning and leave the oxide film. That is, in this embodiment, considering the uniformity of oxygen concentration, the oxide film is removed from the entire wafer surface, including the bevel portion on the front side, and the oxide film 61a is left on the entire back side of the wafer, including the bevel portion on the back side, to suppress slippage (see Figure 3(c)). Here, the oxide film may be removed from the entire bevel portion, or the oxide film may be left on the entire bevel portion. It is sufficient for an oxide film to remain at least in the area that contacts the susceptor on the back side of the wafer. However, to suppress variations in oxygen concentration on the surface layer on the front side of the wafer, it is desirable that the oxide film on the bevel portion on the surface side be removed.
[0039] Furthermore, hydrofluoric acid cleaning with a hydrofluoric acid concentration of less than 0.1% by mass is undesirable because it results in a low etching rate of the oxide film and takes a long time. In addition, while hydrofluoric acid cleaning is preferable in the surface oxide film removal process considering productivity and quality, if it is acceptable to reduce productivity and / or quality, the oxide film on the wafer surface (front side) may be removed by polishing. However, the purpose is solely to remove the oxide film, and not to polish the wafer surface itself.
[0040] After the surface oxide film removal step, in the second heat treatment step (RTA: step S6), the wafer W (see Figure 3(c)) from which the oxide film on the wafer surface (front side) has been removed is heated in a non-oxidizing gas atmosphere to a second maximum temperature of 800°C to 1350°C, held at the second maximum temperature for 1 second to 60 seconds, and then cooled. The cooling rate is 25°C / second to 250°C / second, preferably 75°C / second to 150°C / second. In Figure 4, the second heat treatment step (RTA) is shown in section Y. In this second heat treatment step (RTA), for example, the maximum temperature T2 (800°C to 1350°C) is held for a predetermined time t2 (1 second to 60 seconds). This makes it possible to reduce the oxygen concentration of the surface layer on the wafer surface side that was raised by the first heat treatment step (RTO). Specifically, the oxygen concentration in the surface layer (1-3 μm from the wafer surface (front side)) is set to 1 × 10⁻¹⁶ only on the wafer surface side. 17 atoms / cm 3 The oxygen concentration is reduced to the following levels (see Figure 3(d)). On the other hand, the oxygen concentration in the surface layer on the back side of the wafer (1 to 3 μm deep from the back side of the wafer) remains elevated due to RTO. Since an oxide film is formed on the back side of the wafer during RTA, oxygen does not diffuse outward, and therefore the oxygen concentration does not decrease. Consequently, in wafer W of this embodiment, the oxygen concentration on the surface side of the wafer becomes lower than before RTO, while the oxygen concentration on the back side of the wafer becomes higher than before RTO. Furthermore, by performing heat treatment in the second heat treatment process (RTA), it is also possible to eliminate the COP remaining on the surface layer on the wafer surface side.
[0041] In the second heat treatment (RTA) process, as an example, the RTP apparatus 10 shown in Figure 1 is used. Furthermore, while any known gas that does not oxidize the wafer W can be used as the non-oxidizing gas, argon is used, for example, because it does not form films such as nitride films or cause other chemical reactions.
[0042] The oxygen concentration in the wafer surface layer, which is reduced by the heat treatment in the second heat treatment process (RTA), is determined by the second highest temperature reached and its holding time (heat treatment conditions). Therefore, even if variations in oxygen concentration occur in the crystal length direction or in the crystal plane direction due to the CZ method, if the heat treatment conditions are constant, variations in oxygen concentration caused by the CZ method can be suppressed.
[0043] Furthermore, in the second heat treatment process (RTA), the oxide film 61 (oxide film 61a) formed in the first heat treatment process (RTO) is left on the back surface (the area in contact with the susceptor 32) while the heat treatment is performed (see Figures 3(c) and (d)). In other words, the heat treatment is performed while the strength of the back surface of the wafer is maintained, which suppresses the occurrence of slip from the back surface of the wafer.
[0044] Furthermore, a second heat treatment (RTA) process in which the second maximum temperature reached is less than 800°C is undesirable because the slow diffusion rate of oxygen makes it time-consuming to reduce the oxygen concentration on the surface layer of the wafer, thus reducing the production efficiency of the final silicon wafer W. Also, if the second maximum temperature reaches more than 1350°C, a unique defect in which silicon is elevated may occur on the wafer surface (front side), which is also undesirable.
[0045] Furthermore, in this embodiment, the heat treatment in the first heat treatment process (RTO) and the second heat treatment process (RTA) are carried out in succession using a single-wafer RTP device 10 (see Figure 1), but this is not limited to this, and for example, different RTP devices 10 may be used for RTO and RTA. When heat treatment is carried out using two RTP devices, heat treatment can be performed without reducing throughput.
[0046] Furthermore, in the second heat treatment process (RTA), a batch-type heat treatment apparatus may be used to simultaneously heat-treat several tens to around 100 wafers W at once. In this case, multiple wafers W are heated in a non-oxidizing gas atmosphere to a second maximum temperature of 800°C to 1350°C, held at the second maximum temperature for a period of 1 minute to 240 minutes, and then cooled. The cooling rate is 2°C / second to 30°C / second, preferably 5°C / second to 15°C / second.
[0047] After RTA is performed, in the backside oxide film removal process (step S7), the oxide film 61a that remained formed on the backside of the wafer is removed (peeled) (see Figure 3(e)). At this time, the oxide film 61a is removed by performing hydrofluoric acid cleaning on the backside of the wafer (hydrofluoric acid cleaning is not performed on the frontside of the wafer). Specifically, hydrofluoric acid cleaning is performed on the backside of the wafer using a cleaning solution with a hydrofluoric acid concentration of 0.1 to 20% by mass, preferably 1 to 10% by mass, by single-wafer spin cleaning, and pure water cleaning is performed on the frontside of the wafer. However, gas may be blown instead of pure water to prevent the hydrofluoric acid cleaning from spreading to the wafer surface (front side). Alternatively, hydrofluoric acid may be supplied only to the backside of the wafer for hydrofluoric acid cleaning, and nothing may be supplied to the frontside of the wafer.
[0048] In this embodiment, by carrying out the silicon wafer manufacturing method described above (steps S1 to S9), the oxygen concentration of the surface layer on the wafer surface side (1 to 3 μm deep from the wafer surface (front side)) is increased to 1 × 10⁻¹⁶ 17 atoms / cm 3 A wafer W with a reduced concentration to the following level can be obtained.
[0049] <Silicon Wafer> Figure 5 is a schematic diagram showing the layer structure of a silicon wafer manufactured by the silicon wafer manufacturing method according to the present invention. In the wafer W manufactured by the above-described manufacturing method, the oxygen concentration on the surface layer on the wafer side is reduced by heat treatment in the second heat treatment process (RTA), but on the other hand, the oxygen concentration on the surface layer on the back side of the wafer is not reduced because the remaining oxide film 61a suppresses outward diffusion of oxygen. On the contrary, oxygen is supplied from the oxide film 61a into the wafer interior, resulting in 7 × 10 17 atoms / cm 3 That concludes the explanation.
[0050] In other words, as shown in Figure 5, the wafer W manufactured by the manufacturing method of this embodiment has an oxygen concentration of 1 × 10⁻⁶ 17 atoms / cm 3 The low-oxygen region (DZ (Denuded Zone) layer: defect-free region) D1 on the surface layer of the wafer surface, with an oxygen concentration of 7 × 10⁻⁶ 17 atoms / cm 3 The above describes the high-oxygen region D2 on the surface layer of the back side of the wafer, and the oxygen concentration of 1 × 10⁻⁶ 17 atoms / cm 3 Higher than 7 x 10 17 atoms / cm 3 It has a three-layer structure consisting of a mid-oxygen region (bulk region) D3 that is lower and in which BMD nuclei are formed.
[0051] Thus, the oxygen concentration on the surface layer of the wafer is set to 1 × 10⁻⁶. 17 atoms / cm 3 By manufacturing wafers W with reduced concentrations to the following levels, image sensor devices manufactured using these wafers W can suppress oxygen-related defects that result in poor afterimage characteristics.
[0052] Furthermore, as shown in Figure 5, the wafer W manufactured by the manufacturing method of this embodiment has an oxygen concentration of 7 × 10 on the surface layer of the back side of the wafer. 17 atoms / cm 3 Because the concentration is increased to the above level, that is, because the strength of the back side is maintained, slippage during RTA (Real-Time Attention) testing can be suppressed even in the device process.
[0053] <Effects, etc.> As described above, the silicon wafer manufacturing method of this embodiment includes: a first heat treatment step (RTO) in which a silicon wafer W, made by slicing a silicon single crystal ingot grown by the CZ method, is heated in an oxidizing gas atmosphere to a first maximum temperature of 1250°C to 1400°C, held at the first maximum temperature for a predetermined time, and then cooled to form an oxide film 61 on the front and back surfaces of the wafer; a surface oxide film removal step in which the oxide film formed on the wafer surface (front surface) after the first heat treatment step is removed, while the oxide film formed on the back surface of the wafer is left intact; and a second heat treatment step (RTA) in which the silicon wafer W after the oxide film removal step is heated in a non-oxidizing gas atmosphere to a second maximum temperature of 800°C to 1350°C, held at the second maximum temperature for a predetermined time, and then cooled to reduce the oxygen concentration on the surface layer on the wafer surface side.
[0054] In this process, the first heat treatment (RTO) is performed using a single-wafer RTP device 10, and the second heat treatment (RTA) is performed using either a single-wafer RTP device or a batch-type heat treatment device. The holding time at the first maximum temperature is preferably 1 second or more and 60 seconds or less. The holding time at the second maximum temperature is preferably 1 second or more and 60 seconds or less in the case of a single-wafer device, and preferably 1 minute or more and 240 minutes or less in the case of a batch-type device.
[0055] For example, in the silicon wafer manufacturing method of this embodiment, the oxygen concentration of the surface layer on the wafer surface side is increased to 1 × 10 by heat treatment in the second heat treatment step (RTA). 17 atoms / cm 3 It is preferable to reduce the concentration to the following levels. Furthermore, in the first heat treatment step (RTO), it is preferable to form an oxide film 61 of 10 to 50 nm on the front and back surfaces of the wafer.
[0056] Furthermore, in the silicon wafer manufacturing method of this embodiment, in the surface oxide film removal step, hydrofluoric acid cleaning is performed on the wafer surface (front side) and pure water cleaning is performed on the wafer back side, and in the second heat treatment step (RTA), heat treatment is performed with the oxide film 61 (oxide film 61a) formed in the first heat treatment step (RTO) remaining on the wafer back side. In addition, it is preferable that the silicon wafer manufacturing method of this embodiment further includes a back side oxide film removal step to remove the oxide film 61a remaining on the back side of the silicon wafer W after the second heat treatment step (RTA).
[0057] Thus, in the silicon wafer manufacturing method of this embodiment, by performing a series of processes consisting of a first heat treatment step (RTO), a surface oxide film removal step (removing only the oxide film on the wafer surface (front side) and leaving the oxide film 61a on the back side of the wafer), and a second heat treatment step (RTA), the oxygen concentration of the surface layer on the wafer side, which is the device active region, can be reduced, and furthermore, variations in oxygen concentration caused by the CZ method can be suppressed.
[0058] Furthermore, in the silicon wafer manufacturing method of this embodiment, the heat treatment by the second heat treatment (RTA) is performed with the oxide film 61 formed in the first heat treatment (RTO) remaining on the back surface (the area in contact with the susceptor 32). In other words, the heat treatment is performed while the strength of the back surface of the wafer is maintained, thus suppressing the occurrence of slip.
[0059] Furthermore, the silicon wafer of this embodiment manufactured by the above manufacturing method has an oxygen concentration of 1 × 10⁻⁶ 17 atoms / cm 3 The low-oxygen region D1 on the surface layer of the wafer surface, where the oxygen concentration has been reduced to the following level, and the oxygen concentration of 7 × 10 17 atoms / cm 3 The above describes the high-oxygen region D2 on the surface layer of the back side of the wafer, and the oxygen concentration of 1 × 10⁻⁶ 17 atoms / cm 3 Higher than 7 x 10 17 atoms / cm 3 It has a mid-oxygen region D3 that is lower than and in which a BMD nucleus is formed.
[0060] By reducing the oxygen concentration in the surface layer on the wafer surface side, the image sensor device using the silicon wafer W of this embodiment can suppress oxygen-related defects that result in poor afterimage characteristics. Furthermore, since the silicon wafer W of this embodiment has a high oxygen concentration on the back side, that is, the strength of the back side is maintained, slippage during RTA (Real-Time Attention) testing can be suppressed during the device manufacturing process.
[0061] It should be noted that the present invention is not limited to the embodiments described above. The embodiments described above are illustrative, and any configuration that has substantially the same technical idea as described in the claims and produces similar effects is included within the technical scope of the present invention.
[0062] <Modifications of the Manufacturing Method> Next, modifications of the silicon wafer manufacturing method according to the present invention will be specifically explained with reference to the drawings. Figure 6 is a flowchart showing modifications of the silicon wafer manufacturing method according to the present invention. Here, we will explain a process that differs from the silicon wafer manufacturing method shown in Figure 2.
[0063] In the silicon wafer manufacturing method shown in Figure 6, the wafer W after the grinding process (step S3) is mirror-polished (final polishing process: step S8), and the wafer W, which has a highly flat, mirror-finished surface, is subjected to the first heat treatment process (RTO: step S4) described above.
[0064] Subsequently, similar to the manufacturing method shown in Figure 2, the oxide film is removed by a surface oxide film removal step (step S5), and heat treatment is performed by a second heat treatment step (RTA: step S6). Finally, single-wafer spin cleaning is performed on the wafer W after RTA (final cleaning step: step S9). In the modified example shown in Figure 6, a silicon wafer W with the oxide film 61a remaining on the back surface of the wafer is obtained without removing the oxide film 61a (see Figure 3(d)).
[0065] In other words, according to this modification, the wafer has an oxide film 61a on the back surface, and the oxygen concentration of the surface layer on the wafer surface side is 1 × 10 17 atoms / cm 3A wafer W with a reduced concentration to the following level can be obtained.
[0066] Next, the method for manufacturing a reconstituted wafer according to the present invention will be further described based on examples. However, the present invention is not limited to the following examples.
[0067] <Example 1> By the CZ method, the oxygen concentration was 7 × 10 17 atoms / cm 3 A silicon single crystal ingot was grown, and then a well-known planarization process, including slicing and grinding, was performed to prepare five silicon wafers with a diameter of 300 mm.
[0068] Next, using a single-wafer RTP apparatus, RTO was performed on the prepared silicon wafer in an oxygen gas atmosphere under the following first heat treatment conditions to form an oxide film on both the front and back surfaces of the wafer. • First heat treatment conditions: Maximum temperature reached → 1300°C; Holding time at maximum temperature → 20 seconds; Heating rate → 75°C / second; Cooling rate → 75°C / second
[0069] Next, single-wafer spin cleaning was performed on the silicon wafers after RTO (Recovery Time Occlusion). Specifically, hydrofluoric acid cleaning was performed on the wafer surface (front side) using a cleaning solution with a hydrofluoric acid concentration of 10% by mass, and pure water cleaning was performed on the wafer back side to remove the oxide film formed on the wafer surface.
[0070] Next, using a single-wafer RTP apparatus, RTA was performed on a silicon wafer with an oxide film remaining on the back surface in an argon gas atmosphere under the second heat treatment conditions described below, and the oxygen concentration in the surface layer on the wafer surface side (3 μm deep from the wafer surface (front side)) was set to 7 × 10⁻¹⁰ 16 atoms / cm 3 The concentration was reduced to this level. On the other hand, the oxygen concentration on the surface layer of the back side of the wafer (3 μm deep from the back side of the wafer) was 1.2 × 10⁻⁶. 18 atoms / cm 3 Without reducing the concentration, the oxygen concentration was slightly increased from the concentration before heat treatment. • Second heat treatment conditions: Maximum temperature reached → 1250°C; Holding time at maximum temperature → 30 seconds; Heating rate → 40°C / second; Cooling rate → 70°C / second
[0071] Next, single-wafer spin cleaning was performed on the silicon wafers after RTA. Specifically, hydrofluoric acid cleaning was performed on the back surface of the wafer using a cleaning solution with a hydrofluoric acid concentration of 10% by mass, and pure water cleaning was performed on the front surface of the wafer to remove the oxide film remaining on the back surface of the wafer.
[0072] Subsequently, the silicon wafer, after oxide film removal, underwent final polishing and final cleaning, resulting in an oxygen concentration of 7 × 10⁻¹⁰ on the surface layer of the wafer. 16 atoms / cm 3 Therefore, the oxygen concentration on the surface layer of the back side of the wafer is 1.2 × 10⁻⁶. 18 atoms / cm 3 Therefore, the oxygen concentration is 1 × 10⁻⁶ 17 atoms / cm 3 Higher than 7 x 10 17 atoms / cm 3 A silicon wafer of Example 1 was obtained, having a bulk portion that was lower than the BMD nucleus and in which BMD nuclei were formed.
[0073] The silicon wafer from Example 1 was inspected using SIMS (Secondary Ion Mass Spectrometry), and it was confirmed that there was little variation in oxygen concentration and no problems. Furthermore, the occurrence of slip during RTA was suppressed. In addition, it was confirmed that the image sensor device manufactured using the silicon wafer from Example 1 also showed suppressed slip and degradation of afterimage characteristics and was free of problems.
[0074] <Example 2> Using the CZ method, the oxygen concentration was 10 × 10 17 atoms / cm 3 A silicon single crystal ingot was grown, and then a well-known planarization process including slicing and grinding was performed to prepare five silicon wafers with a diameter of 300 mm. Subsequently, the same process as in Example 1 was performed on the prepared silicon wafers, and as a result, the oxygen concentration of the surface layer on the wafer surface side was 1 × 10⁻⁶. 17 atoms / cm 3 Therefore, the oxygen concentration on the surface layer of the back side of the wafer is 1.5 × 10 18 atoms / cm 3 Therefore, the oxygen concentration is 1 × 10⁻⁶ 17 atoms / cm3 higher than 7×10 17 atoms / cm 3 A silicon wafer of Example 2 having a bulk portion with a lower oxygen concentration than that and having BMD nuclei formed was obtained.
[0075] As a result of inspecting the silicon wafer of Example 2 using SIMS, it was confirmed that the oxygen concentration variation was small and there were no problems. Also, the occurrence of slip during RTA was suppressed. Also, for the imaging device manufactured using the silicon wafer of Example 2, it was confirmed that slip and degradation of afterimage characteristics were suppressed and there were no problems.
[0076] <Example 3> A silicon single crystal ingot with an oxygen concentration of 7×10 17 atoms / cm 3 was grown, and then a well-known planarization process including a slicing process and a grinding process was performed to prepare five silicon wafers with a diameter of 300 mm. Thereafter, the same processes as in Example 1 were performed on the prepared silicon wafers, except that the maximum temperature reached by RTO was 1350°C and the maximum temperature reached by RTA was 800°C. As a result, the oxygen concentration on the surface layer side of the wafer surface was 6×10 16 atoms / cm 3 and the oxygen concentration on the surface layer side of the back surface of the wafer was 1.2×10 18 atoms / cm 3 and a silicon wafer of Example 3 having a bulk portion with an oxygen concentration higher than 1×10 17 atoms / cm 3 and lower than 7×10 17 atoms / cm 3 and having BMD nuclei formed was obtained.
[0077] As a result of inspecting the silicon wafer of Example 3 using SIMS, it was confirmed that the oxygen concentration variation was small and there were no problems. Also, the occurrence of slip during RTA was suppressed. Also, for the imaging device manufactured using the silicon wafer of Example 3, it was confirmed that slip and degradation of afterimage characteristics were suppressed and there were no problems.
[0078] <Example 4> Using the CZ method, a single-crystal silicon ingot with an oxygen concentration of 7×10 17 atoms / cm 3 was grown, and then a well-known planarization process including a slicing process and a grinding process was performed to prepare five silicon wafers with a diameter of 300 mm. Thereafter, the same treatment as in Example 1 was performed on the prepared silicon wafers, except that the batch heat treatment had a maximum temperature of 1000°C, a holding time at the maximum temperature of 120 minutes, a heating rate of 5°C / second, and a cooling rate of 5°C / second. As a result, the oxygen concentration on the surface side surface layer of the wafer was 5×10 16 atoms / cm 3 and the oxygen concentration on the back side surface layer of the wafer was 1.2×10 18 atoms / cm 3 and a silicon wafer of Example 4 having a bulk portion with an oxygen concentration higher than 1×10 17 atoms / cm 3 and lower than 7×10 17 atoms / cm 3 and in which BMD nuclei were formed was obtained.
[0079] As a result of inspecting the silicon wafer of Example 4 using SIMS, it was confirmed that the oxygen concentration variation was small and there were no problems. Also, the occurrence of slip during RTA implementation was suppressed. Also, regarding the imaging device device manufactured using the silicon wafer of Example 4, it was confirmed that slip and deterioration of afterimage characteristics were suppressed and there were no problems.
[0080] <Example 5> Using the CZ method, a single-crystal silicon ingot with an oxygen concentration of 4×10 17 atoms / cm 3 was grown, and then a well-known planarization process including a slicing process and a grinding process was performed to prepare five silicon wafers with a diameter of 300 mm. Thereafter, the same treatment as in Example 1 was performed on the prepared silicon wafers. As a result, the oxygen concentration on the surface side surface layer of the wafer was 4×10 16 atoms / cm 3 and the oxygen concentration on the back side surface layer of the wafer was 9×10 17 atoms / cm 3 and the oxygen concentration was 1×1017 atoms / cm 3 Higher than 7 x 10 17 atoms / cm 3 A silicon wafer of Example 5 was obtained, having a bulk portion that was lower than the BMD nucleus and in which BMD nuclei were formed.
[0081] Inspection of the silicon wafer from Example 5 using SIMS confirmed that there was little variation in oxygen concentration and no problems. Furthermore, slippage during RTA was suppressed. Additionally, the image sensor device manufactured using the silicon wafer from Example 5 also showed suppressed slippage and degradation of afterimage characteristics, confirming that there were no problems.
[0082] <Comparative Example 1> By the CZ method, the oxygen concentration was 7 × 10 17 atoms / cm 3 A silicon single crystal ingot was grown, and then a well-known planarization process including slicing and grinding was performed to prepare five silicon wafers with a diameter of 300 mm. Subsequently, the prepared silicon wafers were subjected to the same process as in Example 1, except that the oxide film on the entire wafer surface (front and back) was removed after RTO, and the oxygen concentration on the surface layer of the front and back sides of the wafer was reduced to 7 × 10⁻⁶. 16 atoms / cm 3 A silicon wafer for Comparative Example 1 was obtained.
[0083] Inspection of the silicon wafer of Comparative Example 1 using SIMS confirmed that there was little variation in oxygen concentration and no problems. However, slippage occurred on the back surface of 3 out of 5 wafers during RTA.
[0084] <Comparative Example 2> By the CZ method, the oxygen concentration was 10 × 10 17 atoms / cm 3 A silicon single crystal ingot was grown, and then a well-known planarization process, including slicing and grinding, was performed to prepare five silicon wafers with a diameter of 300 mm.
[0085] Next, the prepared silicon wafer was subjected to the same treatment as in Comparative Example 1, and the oxygen concentration of the surface layer on both the front and back sides of the wafer was reduced to 1 × 10⁻⁶. 17atoms / cm 3 A silicon wafer for Comparative Example 2 was obtained.
[0086] Inspection of the silicon wafer of Comparative Example 2 using SIMS confirmed that there was little variation in oxygen concentration and no problems. However, slippage occurred on the back surface of 2 out of 5 wafers during RTA.
[0087] 10 RTP apparatus 20 Reaction chamber 20a First space 20b Second space 22 Supply port 26 Discharge port 30 Wafer holder 32 Susceptor 34 Rotating body 40 Heating unit 50 Halogen lamp 61 Oxide film 61a Oxide film
Claims
1. A method for manufacturing a silicon wafer, comprising: a first heat treatment step of heating a silicon wafer, prepared by slicing a silicon single crystal ingot grown by the CZ method, to a first maximum temperature of 1250°C to 1400°C in an oxidizing gas atmosphere, holding it at the first maximum temperature for a predetermined time, and then cooling it down to form an oxide film on both the front and back surfaces of the wafer; a surface oxide film removal step of removing the oxide film formed on the wafer surface of the silicon wafer after the first heat treatment step, while leaving the oxide film formed on the back surface of the wafer; and a second heat treatment step of heating the silicon wafer after the surface oxide film removal step to a second maximum temperature of 800°C to 1350°C in a non-oxidizing gas atmosphere, holding it at the second maximum temperature for a predetermined time, and then cooling it down to reduce the oxygen concentration on the surface layer of the wafer surface.
2. The method for manufacturing a silicon wafer according to claim 1, characterized in that the first heat treatment step is performed using a single-wafer type heat treatment apparatus, and the second heat treatment step is performed using a single-wafer type heat treatment apparatus or a batch type heat treatment apparatus.
3. The method for manufacturing a silicon wafer according to claim 2, characterized in that the holding time at the first highest temperature reached is 1 second or more and 60 seconds or less, and the holding time at the second highest temperature reached is 1 second or more and 60 seconds or less in the case of a single-wafer type, and 1 minute or more and 240 minutes or less in the case of a batch type.
4. The oxygen concentration of the wafer surface layer is increased to 1 × 10⁻¹⁶ by the heat treatment in the second heat treatment step. 17 atoms / cm 3 A method for manufacturing a silicon wafer according to claim 1, characterized by reducing the concentration to the following level.
5. The method for manufacturing a silicon wafer according to claim 1, characterized in that an oxide film of 10 to 50 nm is formed on the front and back surfaces of the wafer in the first heat treatment step.
6. The method for manufacturing a silicon wafer according to claim 1, characterized in that, in the surface oxide film removal step, hydrofluoric acid is supplied to the wafer surface and pure water is supplied to the wafer back surface using a spin cleaning device, and in the second heat treatment step, the heat treatment is performed while the oxide film formed in the first heat treatment step remains on the wafer back surface.
7. The method for manufacturing a silicon wafer according to claim 6, further comprising a backside oxide film removal step for removing the oxide film remaining on the back surface of the silicon wafer after the second heat treatment step.
8. A silicon wafer produced by slicing a silicon single crystal ingot grown by the CZ method, comprising a low oxygen region in the surface layer on the wafer surface side where the oxygen concentration is reduced to 1 × 10 17 atoms / cm 3 or less, a high oxygen region in the surface layer on the back side of the wafer where the oxygen concentration is 7 × 10 17 atoms / cm 3 or more, and a medium oxygen region where the oxygen concentration is higher than 1 × 10 17 atoms / cm 3 and lower than 7 × 10 17 atoms / cm 3 and in which a BMD (Bulk Microdefect) nucleus is formed.