Heterogeneous wafer defect inspection system and method
The heterogeneous wafer defect inspection system addresses the challenge of inspecting diverse wafers by employing resistivity-based module settings, ensuring effective inspection of wafers with high dopant content and enhancing throughput.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- NEXUS1
- Filing Date
- 2025-01-21
- Publication Date
- 2026-07-02
AI Technical Summary
Existing wafer defect inspection systems struggle to inspect various types of wafers in a single system, particularly those with high dopant content, and cannot perform transmission inspection using Near-Infrared (NIR) wavelength light sources effectively.
A heterogeneous wafer defect inspection system and method that utilizes resistivity value information to automatically set wafer defect inspection modules, including a first module for Automatic Wafer Inspection (AWI) and a second module for X-ray inspection, capable of inspecting wafers with different resistivity values, enabling comprehensive defect detection.
The system allows for efficient inspection of multiple wafer types, including those with high dopant content, by optimizing light source illuminance based on resistivity, thereby improving throughput and accuracy.
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Figure KR2025001114_02072026_PF_FP_ABST
Abstract
Description
Heterogeneous wafer defect inspection system and method
[0001] The present invention relates to a system and method capable of inspecting pinholes in various types of wafers in a single system, and more particularly to a heterogeneous wafer defect inspection system and method capable of automatically setting wafer defect inspection modules corresponding to various types of wafers using resistivity value information regarding the wafers.
[0002] Generally, semiconductor devices are manufactured by performing various unit processes on a silicon wafer used as a semiconductor wafer to form an electrical circuit containing electrical components on the silicon wafer.
[0003] In addition, identification marks, such as wafer management numbers, are marked on the front or back of the wafer using a laser or the like for wafer production management and data management. These wafer markings can be recognized by a wafer marking recognition device, and by recognizing the markings on the wafer before or after the process, wafer management, including production management, can be efficiently executed.
[0004] A wafer marking recognition device as described above may include an optical character reader (OCR) for recognizing markings, and may be provided with a notch detection sensor for detecting a notch cut in the shape of a 'v' or 'u' on the edge of the wafer.
[0005] Meanwhile, as the integration density of semiconductor devices increases, the yield and reliability of these devices are significantly affected by the quality of the wafers on which they are fabricated. Wafer quality is determined by the number of defects generated throughout the entire process of wafering, which involves fabricating the wafer during crystal growth.
[0006] These wafer defects can be classified into crystal defects occurring during ingot growth and defects caused by external contaminants. Among these, external contaminants such as dust are easily removed by etching or cleaning processes; however, crystal defects such as COP (Crystal Originated Particles), FPD (Flow Pattern Defect), OiSF (Oxygen-induced Stacking Fault), BMD (Bulk Micro Defect), and LDP (Large Dislocation Pit) remain unremoved by cleaning processes and affect the yield and quality of semiconductor devices; therefore, their occurrence must be suppressed during the wafer fabrication process. Accordingly, verifying and inspecting the precise distribution and density of these defects prior to implementing semiconductor devices on the wafer is crucial for yield management.
[0007] In other words, wafers used in the manufacture of semiconductor devices are prepared by thinly slicing silicon ingots; during the growth of the ingot, impurities are mixed in due to the high growth temperature, and oxygen from the quartz crucible 10 7 ~10 8 They coexist in atom / cm³ single crystals. During the growth of these ingots, voids or crystal defects caused by silicon atoms, such as those resulting from rotational speed or oxygen levels, can lead to the formation of air pockets. These air pockets are transferred directly to the wafers sliced from the ingot. Wafers containing defects such as air pockets are mostly discarded. Furthermore, wafers are subjected to thermal or physical stress during multiple processes. At this time, if even minor defects such as cracks are present on the wafer, new cracks may develop or semiconductor device products may fail due to thermal or physical stress during the process, potentially leading to a decrease in yield.
[0008] A wafer defect inspection device for inspecting defects on the surface or inside of a wafer as described above is known. In such an inspection device, for example, light is irradiated from one side of the wafer and an image of the wafer is taken from the other side, and the wafer defects are inspected by performing image analysis processing on the captured image.
[0009] The defects of the wafer may include pinholes existing on or inside the wafer, as well as hole defects (through-holes) that completely penetrate the wafer in the thickness direction.
[0010] In addition, the wafer defect inspection device is usually operated in cassette units as a receiving container, and 10 to 25 wafers of various types with different resistivity ranges are received in one cassette.
[0011] The above wafer defect inspection device typically utilizes a highly sensitive camera with a wide camera sensor dynamic range based on light source transmittance. Consequently, if the wafer contains through-holes, strong light passes through them. In this case, the strong light causes smearing in the highly sensitive camera, making it impossible to accurately detect defects.
[0012] Furthermore, research on semiconductor device inspection using X-rays has recently been developed, and X-ray diffraction (XRD) and X-ray fluorescence (XRF) are being applied. X-ray diffraction can analyze the crystal structure of a sample by measuring the intensity of X-rays diffracted from the sample, utilizing the characteristic that the intensity of X-rays increases at specific angles of incidence and diffraction depending on the crystal structure and orientation of the sample. Additionally, X-ray fluorescence can measure the type and amount of materials constituting the sample by detecting fluorescence energy generated from the energy transfer of electrons within the sample.
[0013] An example of such technology is disclosed in the following patent documents 1 to 3, etc.
[0014] For example, Patent Document 1 (US Published Patent Application US 2024 / 0302301 A1, published September 12, 2024) discloses an inspection system comprising an X-ray illumination source installed on a first side of a stacked structure (sample) of a semiconductor memory and logic structure to generate X-ray illumination light incident on the stacked structure, and an imaging detector provided on a second side opposite to one side of the stacked structure to detect an image of scattered light angle-resolved from the stacked structure, wherein the system performs measurements of the stacked semiconductor array memory and logic structure based on X-ray transmission scatterometer measurement data used to determine the characteristics of the stacked structure based on one or more diffraction orders of the scattered light.
[0015] In addition, Patent Document 2 (Republic of Korea Registered Patent Publication No. 10-2381642, registered on March 29, 2022) discloses an X-ray device for wafer inspection that includes a first robot arm for transferring a wafer from a FOUP (Front Opening Unified Pod) into which a wafer is fed, a buffer space in which the wafer transferred from the first robot arm is loaded, a second robot arm for transferring the wafer from the buffer space to a chuck module in which the wafer is fixed and positioning the wafer, and an X-ray inspection module for acquiring an X-ray image of the wafer aligned with the chuck module, wherein the X-ray inspection module includes an X-ray tube, a first detector for detecting X-rays emitted from the X-ray tube, and a second detector having a detection angle with respect to the X-ray tube different from that of the first detector.
[0016] Meanwhile, Patent Document 3 (Korean Published Patent Application No. 2024-0112682, published July 19, 2024) discloses a semiconductor device measurement device using X-ray diffraction, comprising a light source unit configured to generate X-rays and irradiate said X-rays onto a sample, a detector unit configured to detect X-rays diffracted from said sample by said X-rays, and a processor configured to measure the thickness of a metal film disposed on said sample, wherein said sample includes a wafer, said detector unit detects X-rays diffracted from a plurality of said samples having different thicknesses of said metal films, and said processor measures the thickness of said metal film disposed on the plurality of said samples based on the intensity of said X-rays diffracted from said wafers.
[0017] Patent document 1, as described above, discloses a technique for determining the characteristics of a stacked structure based on one or more diffraction orders of scattered light, but does not disclose a technique for utilizing the transmission power of a bare wafer rather than a sample of a stacked structure.
[0018] In addition, the above patent document 2 discloses a technology that secures inspection reliability while enabling the detection of various types of defects that may occur on a wafer by acquiring wafer images using X-rays in vertical and oblique directions, and the above patent document 3 discloses a technology using X-ray diffraction capable of measuring the thickness of a metal film, but a technology for performing inspection of various types of wafers in a single system was not disclosed.
[0019] The objective of the present invention is to solve the problems described above by providing a heterogeneous wafer defect inspection system and method capable of inspecting various types of wafers in a single system using resistivity values recognized through a wafer identification code (ID).
[0020] Another objective of the present invention is to provide a heterogeneous wafer defect inspection system and method capable of solving the problem that transmission inspection of wafers with high dopant content cannot be performed using a Near-Infrared (NIR) wavelength light source.
[0021] Another objective of the present invention is to provide a heterogeneous wafer defect inspection system and method capable of realizing improved throughput by automatically setting the light source illuminance due to differences in dopant content by wafer type, thereby reducing the setting time.
[0022] To achieve the above objective, the heterogeneous wafer defect inspection system according to the present invention is a system capable of inspecting various types of wafers in a single system, and is characterized by comprising a first wafer defect measurement module for inspecting defects of a first wafer, a second wafer defect measurement module for inspecting defects of a second wafer, and a control module for controlling the movement of the first wafer or the second wafer to the first wafer defect measurement module or the second wafer defect measurement module according to the resistivity value of the wafer.
[0023] In addition, in the heterogeneous wafer defect inspection system according to the present invention, the first wafer defect measurement module performs an Automatic Wafer Inspection (AWI) inspection on the first wafer, and the second wafer defect measurement module performs an X-ray inspection on the second wafer.
[0024] In addition, in the heterogeneous wafer defect inspection system according to the present invention, the first wafer and the second wafer are characterized as being bare wafers.
[0025] In addition, in the heterogeneous wafer defect inspection system according to the present invention, the second wafer is characterized by having a resistivity value (Ω㎝) of less than 0.005.
[0026] In addition, in the heterogeneous wafer defect inspection system according to the present invention, the second wafer defect measurement module is characterized by comprising: an inspection table including a driving unit that drives an alignment tray, which is provided with a wafer fixing part for mounting the second wafer, in the X, Y, and Z axis directions; an X-ray tube mounted on the lower part of the alignment tray and generating X-rays for the second wafer; a detector that receives X-rays transmitted through the second wafer and converts them into visible light to obtain an X-ray image of the second wafer; and a CCD camera that converts the visible light obtained from the detector into digital data.
[0027] In addition, in a heterogeneous wafer defect inspection system according to the present invention, the control module comprises a collection unit for collecting information about a wafer, a recognition unit for recognizing a resistivity value of a wafer from the wafer information collected by the collection unit, a first judgment unit for determining a first wafer and a second wafer corresponding to the resistivity value of the wafer recognized by the recognition unit, and a first control unit for controlling the first wafer or the second wafer to move to the first wafer defect measurement module or the second wafer defect measurement module according to the judgment of the first judgment unit.
[0028] In addition, in the heterogeneous wafer defect inspection system according to the present invention, the collection unit is characterized by including an optical character reader (OCR) that identifies a wafer ID provided on the wafer.
[0029] In addition, in the heterogeneous wafer defect inspection system according to the present invention, the optical character reader is characterized by being mounted on any one of the wafer load module, wafer transfer module, and wafer edge area inspection module.
[0030] In addition, to achieve the above objective, the heterogeneous wafer defect inspection method according to the present invention is a method capable of inspecting various types of wafers in a single system, and is characterized by comprising: (a) a step of collecting information about a wafer; (b) a step of recognizing the resistivity value of the wafer from the wafer information collected in step (a); (c) a step of determining whether the resistivity value of the wafer recognized in step (b) is less than 0.005 Ω cm; and (d) a step of transferring the wafer to a first wafer defect measurement module or a second wafer defect measurement module according to the determination in step (c).
[0031] In addition, in the heterogeneous wafer defect inspection method according to the present invention, the first wafer defect measurement module performs defect measurement on the first wafer determined to have a resistivity value of 0.005 Ω cm or more in step (c), and the second wafer defect measurement module performs defect measurement on the second wafer determined to have a resistivity value of less than 0.005 Ω cm in step (c).
[0032] In addition, in the heterogeneous wafer defect inspection method according to the present invention, the first wafer defect measurement module performs an Automatic Wafer Inspection (AWI) inspection on the first wafer, and the second wafer defect measurement module performs an X-ray inspection on the second wafer.
[0033] In addition, in the heterogeneous wafer defect inspection method according to the present invention, the defect measurement for the second wafer is characterized by being performed by receiving X-rays that have passed through the second wafer.
[0034] In addition, in the heterogeneous wafer defect inspection method according to the present invention, the wafer information collection in step (a) is characterized by being performed by identifying a wafer ID provided on the wafer using an optical character reader (OCR).
[0035] As described above, according to the heterogeneous wafer defect inspection system and method of the present invention, by providing a second wafer defect measurement module that performs X-ray inspection on the wafer, the effect of being able to perform transmission inspection of a wafer with a high dopant content is obtained.
[0036] In addition, according to the heterogeneous wafer defect inspection system and method of the present invention, by providing a first wafer defect measurement module for inspecting defects of a first wafer and a second wafer defect measurement module for inspecting defects of a second wafer in a single system, the effect of being able to inspect various types of wafers is also obtained.
[0037] FIG. 1 is a block diagram of a heterogeneous wafer defect inspection system according to the present invention,
[0038] FIG. 2 is a configuration diagram of the heterogeneous wafer defect inspection system shown in FIG. 1,
[0039] FIG. 3 is a front perspective view of a first wafer defect measurement module applied to the present invention,
[0040] FIG. 4 is a rear perspective view of a first wafer defect measurement module applied to the present invention,
[0041] FIG. 5 is a front perspective view of a second wafer defect measurement module applied to the present invention,
[0042] FIG. 6 is a configuration diagram of the second wafer defect measurement module for X-ray inspection shown in FIG. 5.
[0043] FIG. 7 is a perspective view of the wafer edge region inspection module illustrated in FIG. 1,
[0044] FIG. 8 is a drawing for explaining an example of a wafer ID applied to the present invention,
[0045] FIG. 9 is a block diagram showing the configuration of the control module illustrated in FIG. 1,
[0046] FIG. 10 is a flowchart illustrating a heterogeneous wafer defect inspection process according to the present invention.
[0047] The above and other objects and novel features of the present invention will become more apparent from the description in this specification and the accompanying drawings.
[0048] In the description of the present invention, when a part is described as "comprising" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components. Furthermore, since the size and thickness of each component shown in the description and drawings of the present invention are depicted arbitrarily for convenience of explanation, the present invention is not necessarily limited to what is depicted.
[0049] Additionally, the terms “part,” “module,” or “part” used herein may perform at least one function or operation and may be implemented as hardware or software consisting of mechanical or electrical / electronic configurations, or as a combination of hardware and software; and, excluding the “part,” “module,” or “part” that need to be implemented in specific hardware, the plurality of “parts,” “modules,” or “parts” may be integrated into at least one module and implemented by at least one processor.
[0050] Meanwhile, the term "wafer" as used herein generally refers to a substrate formed of semiconductor or non-semiconductor materials, non-limiting examples of semiconductor materials include single-crystal silicon, gallium arsenide, and indium phosphide, and such substrates can be typically processed in semiconductor manufacturing facilities, and the substrate may be made of glass, sapphire, or other insulating materials, and "notch" refers to a cutout in a semiconductor wafer that specifies the direction to indicate the crystal orientation.
[0051] Additionally, as used herein, "left-right direction and front-back direction" refers to the X-axis and Y-axis directions as directions parallel to the surface on which the wafer is mounted, and "up-down direction" refers to the Z-axis direction as a direction perpendicular to the horizontal direction formed by the X-axis and Y-axis, and "wafer defect" may include defects such as cracks, defects, or damage in the edge region of the wafer, defects on the surface of the wafer, etc., and "wafer defect measurement" may include inspection of the wafer edge region, detection of the wafer surface and detection of defect depth, measurement of the type of defect, size of the defect, depth of the defect, and defect image.
[0052] Meanwhile, there are generally differences in the dopant content depending on the type of wafer, and as the dopant content increases, the resistivity and light transmittance decrease. Table 1 below shows an example of resistivity values according to the type of wafer.
[0053] Wafer Type Resistivity (Ω㎝) N & P-1~30N & P0.03~1N & P+0.01~0.03N & P++0.005~0.01N & P+++< 0.005
[0054] In conventional AWI (Automatic Wafer Inspection) equipment (Pin-Hole inspection), among the wafers shown in Table 1 above, it is possible to inspect wafers of types "N&P-" to "N&P++", but wafers of type "N&P+++" cannot be inspected. In other words, the present invention solves the problem that transmission inspection of wafers of type "N&P+++" with a high dopant content is impossible using a NIR (Near-Infrared) wavelength light source.
[0055] Hereinafter, an embodiment according to the present invention will be described with reference to the drawings.
[0056] FIG. 1 is a block diagram of a heterogeneous wafer defect inspection system according to the present invention, and FIG. 2 is a configuration diagram of the heterogeneous wafer defect inspection system illustrated in FIG. 1. That is, the heterogeneous wafer defect inspection system and method according to the present invention can automatically set wafer defect inspection modules corresponding to various types of wafers by utilizing resistivity value information regarding the wafer.
[0057] The heterogeneous wafer defect inspection system according to the invention is a system capable of inspecting various types of wafers in a single system, wherein the wafer (W) can be divided into a first wafer and a second wafer, and as illustrated in FIGS. 1 and 2, it may include a first wafer defect measurement module (100) for inspecting defects of the first wafer, a second wafer defect measurement module (200) for inspecting defects of the second wafer, a wafer load module (300) provided for inspecting and storing wafers, a wafer transfer module (400) for transferring the wafer (W) of the wafer load module by a single robot arm (410), a wafer edge region inspection module (500) for inspecting the edge region of the wafer (W) transferred by the single robot arm (410), and a control module (600) for controlling the movement of the first wafer or the second wafer to the first wafer defect measurement module or the second wafer defect measurement module according to the recognition of the wafer identification code and the resistivity value of the wafer and each module of the heterogeneous wafer defect inspection system.
[0058] Accordingly, in the heterogeneous wafer defect inspection system according to the present invention, moving to a defect measurement module for defect inspection of a wafer (W), controlling the roughness value, inspecting the wafer edge area, and detecting the wafer surface and defect depth, can be performed sequentially and continuously to measure the type of defect, the size of the defect, the depth of the defect, and the defect image. That is, for convenience of explanation, FIG. 2 shows the state in which the first wafer and the second wafer (W) are seated on each of the first wafer defect measurement module (100), the second wafer defect measurement module (200), the wafer load module (300), and the wafer edge area inspection module (500).
[0059] The first wafer defect measurement module (100), the second wafer defect measurement module (200), the wafer load module (300), and the wafer edge area inspection module (500) may be located within the stroke area of a single robot arm (310) of the wafer transfer module (400). That is, the main body of the wafer transfer module (400) may be movable left and right within the system along a rail (420), and the single robot arm (410) provided on the main body may be movable up and down on the main body and may be movable left and right, forward and backward within the stroke area.
[0060] Additionally, the first wafer defect measurement module (100) can perform an Automatic Wafer Inspection (AWI) inspection on the first wafer, and the second wafer defect measurement module (200) can perform an X-ray inspection on the second wafer.
[0061] For example, the first wafer may be a wafer of the "N&P-" to "N&P++" type as described in the table above, that is, a wafer having a resistivity value (Ωcm) of 0.005 to 30, and the second wafer may be a wafer of the "N&P+++" type having a resistivity value (Ωcm) of less than 0.005.
[0062] In addition, the first wafer and the second wafer may be bare wafers.
[0063] The first wafer defect measurement module (100) described above will be explained with reference to FIGS. 3 and FIGS. 4.
[0064] FIG. 3 is a front perspective view of a first wafer defect measurement module applied to the present invention, and FIG. 4 is a rear perspective view of a first wafer defect measurement module applied to the present invention.
[0065] The first wafer defect measurement module (100) can sequentially measure defects in the first wafer (1) as a substrate transported by a single robot arm (410), as shown in FIGS. 3 and 4.
[0066] The first wafer defect measurement module (100) may include a first main body (10) and a first gantry (20) as a structure for installing a measurement device, such as a camera, on the first main body (10). Also, as shown in FIGS. 2 to 4, the first wafer defect measurement module (100) may include a first surface detection module (110) for detecting the surface condition of the first wafer (1) and a first defect depth detection module (120) for detecting the defect depth of the first wafer (1).
[0067] The first main body (10) may be provided, for example, as an aluminum plate. As shown in FIGS. 3 and 4, the first gantry (20) may be provided in the shape of first and second support plates on each side of the first main body (10), and may be formed as an upper plate connecting the upper portions of the first and second support plates. That is, the first gantry (20) may be provided in a roughly "C" shape when viewed in a planar view from above.
[0068] A square-shaped bracket (21) for a first line camera is coupled to the interior of the upper plate of the first gantry (20), and a bracket (22) for a first Z-axis drive camera is coupled to the side of the bracket (21) for the first line camera, and a first surface detection module (110) for detecting the surface condition of the first wafer (1) is mounted inside the bracket (21) for the first line camera, and a first defect depth detection module (120) for detecting the defect depth of the first wafer (1) can be mounted on the bracket (22) for the first Z-axis drive camera.
[0069] As described above, a first main table (30) movable along the Y-axis is provided on the upper part of the first main body (10) of the first wafer defect measurement module (100), and a first sub table (40) movable along the X-axis is provided on the upper part of the first main table (30).
[0070] Additionally, the first sub-table (40) is equipped with a first screen plate (50) formed in a roughly circular shape to block light that may be applied from the outside of the first wafer (1) during inspection of the first wafer (1), and a plurality of first wafer supports (60) that support the first wafer (1) along the periphery of the first screen plate (50) may be equipped.
[0071] On both sides of the first main body (10), a structure is provided in which a first linear servo (70) and a first LM guide (71) support the first main table (30) inside the space between the first and second support plates of the first gantry (20) so that the first main table (30) can be moved along the Y-axis. That is, the first linear servo (70) is provided to drive the first main table (30) along the Y-axis, and the first LM guide (71) is provided to support the first main table (30) that can be moved along the Y-axis. That is, the first linear servo (70) and the first LM guide (71) are mounted on both sides of the first main body (10), and the first main table (30) can be mounted on the upper part of the first linear servo (70) and the first LM guide (71) so that it can be moved along the Y-axis.
[0072] As described above, in the heterogeneous wafer defect inspection system according to the present invention, the size of the first wafer defect measurement module (100) can be reduced by providing a structure in which a first linear servo (70) and a first LM guide (71) support the first main table (30) at the bottom of the first main table (30) so that the first main table (30) can move along the Y-axis inside the first gantry (20).
[0073] As shown in FIG. 4, the first sub-table (40) is configured to be movable along the X-axis by being driven by a first servo actuator (80), and the first servo actuator (80) can be operated by being coupled to a first clean cable carrier (81) which is used as a pneumatic tube and wire passage.
[0074] The first screen plate (50) may be configured to be movable up and down on the first sub-table (40) by means of a first up-down cylinder (90) that can be operated by pneumatic or hydraulic pressure. Accordingly, the first screen plate (50) may be configured to be movable up and down inside a plurality of first wafer supports (60) to block light that may be applied from the outside during the inspection process of the first wafer (1). To this end, a cutout for the movement of the first screen plate (50) may be provided inside the plurality of first wafer supports (60).
[0075] As shown in FIGS. 3 and 4, the plurality of first wafer supports (60) are arranged in a structure with three of them spaced at 120-degree intervals, but are not limited thereto and may be arranged in four or more depending on the type of wafer.
[0076] The first surface detection module (110) is provided for surface inspection to check the size, position, dimensions of the wafer and whether there are microcracks, pinholes, stains (foreign substances), etc. on the surface or back of the wafer, and as shown in FIGS. 3 and 4, it may include a first line camera control unit (111), three first line scan cameras (112), a first lens (113) for the line scan cameras, a first line camera illumination unit (114), and a line illumination unit (115) composed of near-infrared (NIR) light.
[0077] That is, the first surface detection module (110) can detect defects such as foreign substances, cracks, scratches, and pinholes present on the surface or inside of the first wafer (1) by using transmitted light that passes through the first wafer (1), for example, infrared light of 1050 nm to 1100 nm, to acquire an image through three first line scan cameras (112) in which imaging elements are arranged in a strip shape, and can inspect the through-hole of the first wafer (1) by irradiating visible light that does not pass through the wafer, for example, visible light in the wavelength range of 500 nm to 700 nm, toward the first wafer (1), acquiring an image of the first wafer (1) using a through-hole camera on the other side of the first wafer (1), and determining whether light is transmitted, and can re-determine whether there is a defect by re-acquiring an image of the defect through a review camera at the defect location detected through the first line scan camera (112). Additionally, the size of the line lighting unit (115) can be reduced by applying a halogen lamp or an LED lamp to the first surface detection module (110). That is, the first line camera lighting unit (114) and / or the line lighting unit (115) may use an infrared lamp with a wavelength of 1050 nm to 1100 nm or a halogen lamp with a wavelength of 400 nm to 1700 nm.
[0078] The first defect depth detection module (120) includes a depth detection camera and a first depth measurement lighting unit (121) that detect the location of the defect (hereinafter referred to as "depth") relative to the thickness of the wafer detected through the first surface detection module (110). The depth detection camera is designed to have a focal depth relatively smaller than the thickness of the wafer, so that it can accurately measure defects of size 1㎛ to 4000㎛ present in the wafer. That is, the first defect depth detection module (120) can automatically locate the surface of the wafer (1) and detect the location of the defect in the wafer (1) by taking 30 shots at intervals of 25㎛ in the depth direction, for example.
[0079] The structure of the second wafer defect measurement module (200) is described with reference to FIGS. 5 and FIGS. 6.
[0080] FIG. 5 is a front perspective view of a second wafer defect measurement module applied to the present invention, and FIG. 6 is a configuration diagram of a second wafer defect measurement module for X-ray inspection shown in FIG. 5.
[0081] The above second wafer defect measurement module (200) is a defect measurement method using penetration power rather than a diffraction order method for a bare wafer, and can be provided to perform X-ray inspection on a second wafer (2) which is a wafer of the "N&P+++" type with a resistivity value (Ω㎝) of less than 0.005.
[0082] That is, the second wafer defect measurement module (200) may include an inspection table (210), an X-ray tube (220), a detector (230), and a CCD camera (240), as shown in FIGS. 5 and 6.
[0083] The inspection table (210) may include a driving unit that drives an alignment tray (212), which is provided with a wafer fixing part (211) for mounting the second wafer (2), in the X, Y, and Z axis directions. That is, the wafer fixing part (211) can partition the X-ray transmission area emitted from the X-ray tube (220), and the alignment tray (212) can specify the inspection area of the second wafer (2) according to movement in the X and Y axes, and can adjust the inspection magnification according to movement in the Z axis.
[0084] The above X-ray tube (220) is an X-ray generating device and may be installed in a structure that is movable along the X, Y, and Z axes, and may also be a digital microfocus X-ray tube. That is, the above X-ray tube (220) is a light source unit, and for example, the light source unit (100) may include a particle accelerator source, a liquid anode source, a rotating anode source, a stationary solid anode source, a microfocus source, a microfocus rotating anode source, an inverse Compton source, and a monochromator capable of adjusting the wavelength.
[0085] The detector (230) receives X-rays that have passed through the second wafer (2) and converts them into visible light to obtain an X-ray image of the second wafer (2), and may use an image intensifier or a flat panel detector.
[0086] The CCD camera (240) can convert visible light obtained from the detector (230) into digital data. The detector (230) and the CCD camera (240) may be provided as an integrated unit, as shown in FIG. 6.
[0087] In addition, the second wafer defect measurement module (200) may be provided inside a gantry with a roughly "C" shape, similar to the first wafer defect measurement module (100) shown in FIG. 3, to prevent interference that may occur between the first wafer defect measurement modules (100).
[0088] As illustrated in FIGS. 1 and 2, the wafer load module (300) may include an inspection load section (310) and a storage load section (320), each having a wafer receiving container and a load port for receiving and stacking each wafer (W) in a vertical direction. That is, in the inspection load section (310), an inspection wafer receiving container, on which a plurality of wafers, for example 25 wafers (W), to be inspected in the heterogeneous wafer defect inspection system according to the present invention are placed, may be mounted on the first load port, and in the storage load section (320), a storage wafer receiving container, on which a plurality of wafers, for example 25 wafers, whose inspection of wafers (W) has been completed according to the present invention are placed, may be mounted on the second load port. For example, a FOUP (Front Opening Unified Pod) transported from an OHT (Overhead Hoist Transport) may be used as the wafer receiving container.
[0089] The wafer transfer module (400) is equipped with a robot arm (410) that is mounted on the inspection load portion (310) of the wafer load module (300) to load and unload the wafer (W) to be inspected to the wafer edge region inspection module (500), the first wafer defect measurement module (100), and the second wafer defect measurement module (200). The robot arm (410) may be provided with an edge grip portion for holding the wafer or a vacuum suction portion such as a vacuum chuck.
[0090] The robot arm (410) is provided with multiple joints and can be extended in a horizontal direction and can move left and right or forward and backward within a single robot driving stroke range. That is, since the centerline of the first wafer defect measurement module (100), the centerline of the second wafer defect measurement module (200), the centerline of the inspection load section (310), and the centerline of the storage load section (320) are within the robot driving stroke range of the wafer transfer module (400), wafer handling within the entire system is possible by the wafer transfer module (400), thereby achieving minimization of the inspection stage.
[0091] The wafer edge region inspection module (500) described above is explained with reference to FIG. 7. FIG. 7 is a perspective view of the wafer edge region inspection module shown in FIG. 1.
[0092] The wafer edge region inspection module (500) is a device for inspecting the edge region of a wafer (W) to inspect defects such as cracks, defects, or damage in the edge region of the wafer and to align a notch (N), as shown in FIG. 7, and may include a vacuum suction unit (510) provided on a base (501) and equipped with a vacuum chuck that vacuum suctions the wafer in a non-contact state, a support (520) that supports the wafer (W), a wafer mounting position inspection unit (530) equipped with a camera for recognizing the mounting position of the wafer (W), a rotating unit that rotates the vacuum suction unit (510) that vacuum suctions the wafer to continuously inspect the edge region of the wafer (W), and an edge inspection line scan unit provided on the same plane as the wafer (W) and inspecting the edge region and notch (N) position of the wafer that is rotated by the rotating unit.
[0093] The above vacuum adsorption unit (510) may include, for example, a vacuum chuck exposed at the top of the base (501) for vacuum adsorbing a wafer (W), and an air supply unit for exhausting and sucking air to vacuum adsorb the wafer (W) to the vacuum chuck.
[0094] In addition, the base (501) may be provided with a structure in which an X-axis driving unit for moving the vacuum chuck in the X direction, a Y-axis driving unit for moving the vacuum chuck in the Y direction, and a Z-axis driving unit for moving the vacuum chuck in the Z direction are sequentially stacked.
[0095] The above support (520) is provided to temporarily hold a wafer that is loaded and unloaded in correspondence with the diameter of the wafer (W). That is, the support (520) is provided at 120-degree intervals and consists of three support members having a roughly "C" shape, and the edge portion of the wafer is placed on the upper edge portion of these three support members. By providing the support (520) with three "C" shaped support members, it is possible to easily enter and exit the vacuum chuck without obstruction of the support members, and the wafer can be stably held only at the edge portion of the wafer.
[0096] A wafer ID may be provided at the lower portion near the notch (N) formed on the wafer (W), as shown in FIG. 8. FIG. 8 is a drawing for explaining an example of a wafer ID applied to the present invention.
[0097] Figure 8 shows an example of a Wafer ID (SEMI-M13), where the wafer ID is "7G087354WA15.581G3". In the wafer ID, "7G087354" represents Identification, "WA" represents Vendor, "15.5" represents Resistivity, "8" represents Dopant, "1" represents Crystal Orientation, and "G3" represents Check Characters. That is, the wafer ID in Figure 8, which is shown as an example of the present invention, indicates that the resistivity is 15.5 Ω cm.
[0098] Meanwhile, FIG. 7 shows an example in which an optical character reader (OCR, 440) is applied as a collection unit for collecting information about a wafer (W), which identifies a wafer ID provided on the wafer (W). That is, the optical character reader (440) is mounted on the lower part of the wafer (W) on one side of the wafer edge area inspection module (500) to collect a wafer ID as shown in FIG. 8.
[0099] Also, in FIG. 7, the optical character reader (440) is shown separated from the base (401), but for convenience of explanation, it can be fixed to one side of the base (401), such as the wafer mounting position inspection unit (430).
[0100] Next, with reference to FIG. 9, the configuration of a control module (600) that controls the inspection of defects (Pin-Hole) of wafers by distinguishing between the first wafer (1) and the second wafer (2) in a heterogeneous wafer defect inspection system according to the present invention will be described.
[0101] FIG. 9 is a block diagram showing the configuration of the control module illustrated in FIG. 1.
[0102] As illustrated in FIG. 9, the control module (600) according to the present invention comprises: a collection unit (610) for collecting information about a wafer (W); a recognition unit (620) for recognizing the resistivity value of the wafer from the wafer information collected by the collection unit (610); a first judgment unit (630) for determining a first wafer (1) and a second wafer (2) corresponding to the resistivity value of the wafer recognized by the recognition unit (620); a first control unit (640) for controlling the movement of the first wafer (1) or the second wafer (2) to the first wafer defect measurement module (100) or the second wafer defect measurement module (200) according to the judgment of the first judgment unit (630); a second control unit (650) for controlling the lighting unit of the first wafer defect measurement module (100) to output an illuminance value corresponding to the resistivity value of the wafer recognized by the recognition unit (520); and an image acquired from a camera according to the illuminance value, a gray level value It may include a second judgment unit (660) for checking whether it is within a range, a storage unit (670) for storing information on an illuminance value corresponding to the resistivity value of the wafer, and a setting unit (680) for automatically resetting the illuminance value according to the information stored in the storage unit (670) when the judgment result of the second judgment unit (660) deviates from the error range of the gray level.
[0103] Meanwhile, FIG. 7 shows an example in which an optical character reader (540) is provided in the wafer edge area inspection module (500) as a collection unit (610), but it is not limited thereto and may be provided in the wafer load module (300) or the wafer transfer module (400).
[0104] In addition, the above collection unit (610) can collect wafer information from a barcode reader that recognizes a barcode provided in the FOUP (Front Opening Unified Pod).
[0105] Meanwhile, the collection unit (610) may also collect information about the wafer by setting it so that the wafer is classified into DSP (Double Side Polished) / SSP (Single Side Polished) and inspected according to the recipe setting from a separate system where information about the wafer is stored. That is, even if the resistivity values of the DSP / SSP wafers are the same, the gray level at the same illuminance value differs slightly due to reasons such as light refraction and scattering, so the collection unit (610) can collect wafer information by distinguishing between the DSP / SSP wafers.
[0106] The above recognition unit (620) recognizes the resistivity (resistivity value) from the wafer information (Wafer ID) as illustrated in FIG. 9, which is collected by the collection unit (610), for example. That is, it recognizes the resistivity value of the corresponding wafer as 15.5 Ω cm in the "15.5" portion, which is the resistivity area.
[0107] The first judgment unit (630) can determine that the first wafer (1) is recognized by the recognition unit (620) if the resistivity value is 0.005 Ω cm or higher, and determine that the second wafer (2) is recognized if the resistivity value is less than 0.005 Ω cm.
[0108] The first control unit (640) can control the wafer transfer module (400) so that the first wafer (1) is transferred to the first wafer defect measurement module (100) and the second wafer (2) is transferred to the second wafer defect measurement module (100) according to the result of the judgment in the first judgment unit (630).
[0109] Additionally, the second control unit (650) can control a line camera lighting unit and / or a line lighting unit as a lighting unit of the first wafer defect measurement module (100) to output an illuminance value corresponding to the resistivity value of the wafer recognized by the recognition unit (620). Such control can be executed according to the correlation between the resistivity value of the wafer and the illuminance value stored in the storage unit (670).
[0110] Meanwhile, the second judgment unit (660) checks whether the image acquired from the line scan camera is within the gray level value range according to the illuminance value described above, and if the result of the judgment by the second judgment unit (660) is outside the error range of the gray level, the setting unit (680) can automatically reset the illuminance value according to the information stored in the storage unit (670).
[0111] In addition, although the above description describes the configurations of the recognition unit (520), the first judgment unit (630), the first control unit (640), the second control unit (650), the second judgment unit (660), and the setting unit (680) separately, they are not limited thereto and can be executed continuously by a program configured with a microprocessor or the like provided in the control module (600). Also, the storage unit (670) may be composed of semiconductor memory such as RAM or ROM and may be configured to operate by a program.
[0112] Next, a method for inspecting defects in heterogeneous wafers according to the present invention will be described with reference to FIG. 10. FIG. 10 is a flowchart illustrating a process for inspecting defects in heterogeneous wafers according to the present invention.
[0113] In order to perform a heterogeneous wafer defect inspection according to the present invention, first, information about the wafer is collected from a collection unit (610) for a wafer for wafer defect inspection (S10). The wafer information collection in step S10 can be performed by identifying a wafer ID provided on the wafer with an optical character reader (440), recognizing a barcode provided on a FOUP (Front Opening Unified Pod), or from a system in which information about the wafer is stored.
[0114] In the wafer information collected in step S10 above, the recognition unit (620) recognizes the resistivity value of the wafer (S20), and the first judgment unit (630) determines whether the resistivity value recognized by the recognition unit (620) is less than 0.005 Ω cm (S30).
[0115] If the resistivity value is 0.005Ωcm or higher in step S30 above, the first judgment unit (640) determines that it is the first wafer (1), and the first control unit (640) controls the wafer transfer module (400) to transfer the first wafer (1) to the first wafer defect measurement module (100), and can perform defect measurement on the first wafer at the first wafer defect measurement module (100) (S40).
[0116] Next, the second control unit (650) outputs an illuminance value corresponding to the resistivity value of the wafer recognized in step S40 to the line camera lighting unit and / or line lighting unit (S50). The output of the illuminance value in step S50 can be executed according to the correlation between the resistivity value of the wafer and the illuminance value stored in the storage unit (670).
[0117] Next, according to the illuminance value output in step S50 above, the line scan camera of the first wafer defect measurement module (100) can acquire an image of the surface of the first wafer (1) (S60).
[0118] Regarding the image obtained in step S60 above, the second judgment unit (660) determines whether it is within the error range of the gray level (S70), and if the image obtained in step S70 above exceeds the error range of the gray level, the setting unit (680) automatically resets the illuminance value by referring to the resistivity value stored in the storage unit (670) as described above (S80).
[0119] Based on the resetting of the illuminance value in step S80 above, proceed to step S50 above and repeat the process described above.
[0120] If the image obtained in step S70 above is within the error range of the gray level, the defect inspection process for the first wafer (1) is terminated, and the process described above can be executed by proceeding to step S10 for a newly loaded wafer for defect inspection of a heterogeneous wafer.
[0121] Meanwhile, if the resistivity value recognized by the recognition unit (620) in step S30 is less than 0.005Ωcm, the first judgment unit (640) determines that it is the second wafer (2), and the first control unit (640) controls the wafer transfer module (400) to transfer the second wafer (2) to the second wafer defect measurement module (200), and can perform defect measurement on the second wafer (20) at the second wafer defect measurement module (200) (S90).
[0122] Additionally, when an image of the second wafer (2) is obtained by the CCD camera (240) in step S90, the defect inspection process for the second wafer (1) is terminated, and the process described above can be executed by proceeding to step S10 for a newly loaded wafer for defect inspection of a heterogeneous wafer.
[0123] Although the invention made by the inventors has been specifically described according to the above embodiments, the present invention is not limited to the above embodiments and can be modified in various ways without departing from the gist thereof.
[0124] By using the heterogeneous wafer defect inspection system and method according to the present invention, transmission inspection of wafers with high dopant content can be performed in a single system.
Claims
1. As a system capable of inspecting various types of wafers in a single system, A first wafer defect measurement module for inspecting defects in a first wafer, A second wafer defect measurement module for inspecting defects in the second wafer, A heterogeneous wafer defect inspection system characterized by including a control module that controls the movement of the first wafer or the second wafer to the first wafer defect measurement module or the second wafer defect measurement module according to the resistivity value of the wafer.
2. In Paragraph 1, The first wafer defect measurement module performs an Automatic Wafer Inspection (AWI) inspection on the first wafer, and A heterogeneous wafer defect inspection system characterized in that the second wafer defect measurement module performs an X-ray inspection on the second wafer.
3. In Paragraph 3, A heterogeneous wafer defect inspection system characterized in that the first wafer and the second wafer are bare wafers.
4. In Paragraph 3, A heterogeneous wafer defect inspection system characterized in that the second wafer has a resistivity value (Ω㎝) of less than 0.
005.
5. In Paragraph 4, The above second wafer defect measurement module is An inspection table comprising a driving unit that drives an alignment tray, which is provided with a wafer fixing part for seating the second wafer, in the X, Y, and Z axis directions. An X-ray tube mounted on the lower part of the alignment tray and generating X-rays for the second wafer, A detector that receives X-rays transmitted through the second wafer and converts them into visible light to obtain an X-ray image of the second wafer, A heterogeneous wafer defect inspection system characterized by including a CCD camera that converts visible light obtained from the detector into digital data.
6. In Paragraph 5, The above control module is A collection unit that collects information about a wafer, A recognition unit that recognizes the resistivity value of a wafer from wafer information collected by the above-mentioned collection unit, A first determination unit that determines a first wafer and a second wafer corresponding to the resistivity value of the wafer recognized by the above recognition unit, A heterogeneous wafer defect inspection system characterized by including a first control unit that controls the movement of the first wafer or the second wafer to the first wafer defect measurement module or the second wafer defect measurement module according to the judgment of the first judgment unit.
7. In Paragraph 6, A heterogeneous wafer defect inspection system characterized by the above-mentioned collection unit including an optical character reader (OCR) that identifies a wafer ID provided on the wafer.
8. In Paragraph 1, A heterogeneous wafer defect inspection system characterized in that the above-described optical character reader is mounted on any one of a wafer load module, a wafer transfer module, or a wafer edge area inspection module.
9. As a method for inspecting various types of wafers in a single system, (a) A step of collecting information about the wafer, (b) a step of recognizing the resistivity value of the wafer from the wafer information collected in step (a) above, (c) A step of determining whether the resistivity of the wafer recognized in step (b) is less than 0.005 Ω cm, (d) A method for inspecting defects in heterogeneous wafers, characterized by including the step of transferring the wafer to a first wafer defect measurement module or a second wafer defect measurement module based on the judgment in step (c) above.
10. In Paragraph 9, The first wafer defect measurement module performs defect measurement on the first wafer determined to have a resistivity value of 0.005 Ω cm or more in step (c), and A heterogeneous wafer defect inspection method characterized in that the second wafer defect measurement module performs defect measurement on the second wafer determined to have a resistivity value of less than 0.005 Ω cm in step (c).
11. In Paragraph 10, The first wafer defect measurement module performs an Automatic Wafer Inspection (AWI) inspection on the first wafer, and A heterogeneous wafer defect inspection method characterized in that the second wafer defect measurement module performs an X-ray inspection on the second wafer.
12. In Paragraph 11, A heterogeneous wafer defect inspection method characterized by performing defect measurement on the second wafer by receiving X-rays that have passed through the second wafer.
13. In Paragraph 10, A heterogeneous wafer defect inspection method characterized by collecting wafer information in step (a) above by identifying a wafer ID provided on the wafer using an optical character reader (OCR).