Light-emitting element

Abstract

The present invention relates to a light-emitting element. A light-emitting element according to an embodiment of the present invention comprises: a first semiconductor layer doped with a first dopant; a blocking layer disposed on the first semiconductor layer; an active layer disposed on the blocking layer; and a second semiconductor layer disposed on the active layer and doped with a second dopant. The blocking layer may include indium. The blocking layer and the active layer may include a flat region and an approach region. The approach region may include an inclined region. In addition, the approach region may include first inclined surfaces and second inclined surfaces facing each other, and include intersection points where the first inclined surfaces and the second inclined surfaces meet. The intersection points may include a first intersection point disposed farthest from the first semiconductor layer and a second intersection point disposed closest to the first semiconductor layer.

Description

light-emitting element

[0001] The present invention relates to a light-emitting element.

[0002] In general, nitrides of group 2 elements such as gallium nitride (GaN) and aluminum nitride (AlN) have excellent thermal stability and a direct transition energy band structure, so they are receiving a lot of attention as materials for light-emitting diodes.

[0003] Light-emitting diodes utilizing these gallium nitride-based compound semiconductors are being used in various applications, such as large-scale display devices, backlight sources, traffic lights, indoor lighting, and optical communication.

[0004] However, considering economic feasibility, heterogeneous substrates such as sapphire substrates are used for the growth of nitride-based semiconductor layers. In the case of nitride-based semiconductor layers grown using heterogeneous substrates, strain occurs due to the difference in lattice constants between the substrate and the growth layer, and crystal defects may occur as a result.

[0005] The problem to be solved by the present invention is to improve the luminous efficiency of a light-emitting device by reducing non-radiative recombination.

[0006] Another problem to be solved by the present invention is to prevent the light output of a light-emitting element from being reduced by the penetration potential by adjusting the size of the approach area.

[0007] Another problem that the present invention aims to solve is to improve the light uniformity of the light-emitting device by scattering the light emitted from the approach region of the active layer.

[0008] According to one embodiment of the present invention, a light-emitting element is provided comprising a first semiconductor layer doped with a first dopant, a blocking layer disposed on the first semiconductor layer, an active layer disposed on the blocking layer, and a second semiconductor layer disposed on the active layer and doped with a second dopant. The blocking layer may include indium. The blocking layer and the active layer may include a flat region and an approach region. The approach region may include an inclined region. Additionally, the approach region may include first inclined surfaces and second inclined surfaces facing each other, and may include intersection points where the first inclined surfaces and the second inclined surfaces meet. The intersection points may include a first intersection point disposed furthest from the first semiconductor layer and a second intersection point disposed closest to the first semiconductor layer. A straight line passing through the first intersection point and the second intersection point may be spaced apart from intersection points disposed between the first intersection point and the second intersection point.

[0009] The straight line passing through the first intersection point and the second intersection point may be inclined with respect to the flat area.

[0010] The bottom of the above approach area may be located in a part of the first semiconductor layer.

[0011] The indium content of the blocking layer is equal to or lower than the indium content of the active layer, and may be higher than the indium content of the first semiconductor layer.

[0012] The blocking layer may include a first blocking layer disposed on the first semiconductor layer and a second blocking layer disposed on the first blocking layer.

[0013] The above blocking layer may be provided with a plurality of the above second blocking layers.

[0014] The indium content of the first blocking layer is equal to or lower than the indium content of the active layer, and the indium content of the second blocking layer may be lower than the indium content of the first blocking layer.

[0015] The area between the first inclined surface and the second inclined surface forming the first intersection of the approach area may have symmetrical sides with respect to the straight line passing through the first intersection and the second intersection.

[0016] The area between the first inclined surface and the second inclined surface forming the first intersection of the approach area may be asymmetrical on both sides with respect to the straight line passing through the first intersection and the second intersection.

[0017] One of the first dopant and the second dopant may be an n-type dopant, and the other may be a p-type dopant.

[0018] According to another embodiment of the present invention, a light-emitting element is provided comprising a first semiconductor layer doped with a first dopant, a blocking layer disposed on the first semiconductor layer, an active layer disposed on the blocking layer, and a second semiconductor layer disposed on the active layer and doped with a second dopant. The blocking layer may include indium. The blocking layer and the active layer may include an approach region and a flat region having inclined surfaces. The approach region may include first inclined surfaces and second inclined surfaces facing each other. Additionally, scattered rays may be formed in an inner region which is a region between the first inclined surfaces and the second inclined surfaces.

[0019] The above scattered radiation may have a structure in which at least one region is bent.

[0020] The first inclined surface and the second inclined surface of the active layer may have multiple inclinations based on the scattering line.

[0021] The maximum separation distance between the first inclined surface and the second inclined surface of the approach area may vary depending on the thickness direction.

[0022] The indium content of the blocking layer is equal to or lower than the indium content of the active layer, and may be higher than the indium content of the first semiconductor layer.

[0023] The blocking layer may include a first blocking layer disposed on the first semiconductor layer and a second blocking layer disposed on the first blocking layer.

[0024] The indium content of the first blocking layer is equal to or lower than the indium content of the active layer, and the indium content of the second blocking layer may be lower than the indium content of the first blocking layer.

[0025] The intersection points of the approach area may include a first intersection point positioned furthest from the first semiconductor layer and a second intersection point positioned closest to the first semiconductor layer. Additionally, the region between the first inclined surface and the second inclined surface forming the first intersection point may be asymmetrical with respect to a straight line passing through the first intersection point and the second intersection point, with a first inner region formed on one side and a second inner region formed on the other side. The longer length of the scattered ray may be located in the wider of the first inner region and the second inner region.

[0026] A light-emitting device according to an embodiment of the present invention can improve light-emitting efficiency by preventing dopants from migrating to the active layer, thereby reducing non-radiative recombination in the active layer.

[0027] A light-emitting element according to an embodiment of the present invention can improve light-emitting efficiency by controlling the size of the approach region to prevent the light output of the light-emitting element from being reduced by the penetration potential.

[0028] A light-emitting element according to an embodiment of the present invention can improve the light uniformity of the light-emitting element by scattering light emitted from the approach region of the active layer.

[0029] FIG. 1 is a cross-sectional view schematically illustrating one region of a light-emitting element according to a first embodiment of the present invention.

[0030] Figure 2 is an enlarged view of area A of Figure 1.

[0031] Figure 3 is a graph showing the component composition content of a portion of the light-emitting element of Figure 1.

[0032] FIG. 4 is a cross-sectional view schematically illustrating one region of a light-emitting element according to a second embodiment of the present invention.

[0033] Figure 5 is an enlarged view of area B of Figure 4.

[0034] FIG. 6 is a cross-sectional view schematically illustrating one region of a light-emitting element according to a third embodiment of the present invention.

[0035] Figure 7 is an enlarged view of area C of Figure 6.

[0036] FIG. 8 is a cross-sectional view schematically illustrating one region of a light-emitting element according to a fourth embodiment of the present invention.

[0037] FIG. 9 is a schematic cross-sectional view of a light-emitting package according to an embodiment of the present invention.

[0038] In the following description, numerous specific details are described for the purpose of explanation and to provide a complete understanding of the various embodiments or implementations of the present disclosure. As used herein, “Embodiments” and “Implementations” are interchangeable terms indicating non-limiting examples of devices or methods utilizing one or more of the concepts of the invention disclosed herein. However, it will be apparent that various embodiments may be implemented without utilizing these specific details or by utilizing one or more equivalent arrangements. In other examples, known structures and devices are illustrated in block diagram form to avoid unnecessarily obscuring the various embodiments. Furthermore, while various embodiments may differ from one another, they do not need to be exclusive. For example, specific shapes, configurations, and characteristics of an embodiment may be used or implemented in other embodiments without departing from the scope of the concept of the invention.

[0039] Unless otherwise specified, the illustrated embodiments should be understood as providing exemplary features of varying details in some ways in which the concept of the present invention can actually be realized. Therefore, unless otherwise specified, features, components, modules, layers, membranes, panels, regions and / or modes of various embodiments (hereinafter referred to individually or collectively as “elements”) may be combined, separated, interchanged, and / or rearranged differently without departing from the scope of the concept of the present invention.

[0040] The use of cross-hatching and / or shading in the attached drawings is generally provided to clarify the boundaries between adjacent elements. As such, the presence or absence of cross-hatching or shading, unless otherwise specified, does not imply or indicate any preference or requirement regarding the specific material, material properties, dimensions, proportions, commonalities between the exemplified elements, or any other features, attributes, and characteristics of the elements. Additionally, in the attached drawings, the size and relative size of the elements may be exaggerated for clarity and / or illustrative purposes. When embodiments are implemented differently, specific process sequences may be performed differently from the described order. For example, two consecutively described processes may be performed substantially simultaneously or in an order opposite to the described order. Also, the same reference numerals indicate the same elements.

[0041] When an element such as a layer is referred to as being "on", "connected to," or "coupled to" another element or layer, said element may be directly on, connected to, or coupled to the other element or layer, or an interposed element or layer may exist. However, when an element or layer is referred to as being "directly on", "directly connected to," or "directly coupled to" another element or layer, no interposed element or layer exists. To this end, the term "connected" may refer to a physical, electrical, and / or fluid connection with or without an interposed element. Furthermore, the DR1-axis, DR2-axis, and DR3-axis are not limited to the three axes of an orthogonal coordinate system, such as the x, y, and z axes, and may be interpreted in a broader sense. For example, the DR1-axis, DR2-axis, and DR3-axis may be perpendicular to each other, or they may represent different directions that are not perpendicular to each other. For the purposes of this disclosure, “one or more of X, Y, and Z” and “one or more selected from the group consisting of X, Y, and Z” may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as, for example, XYZ, XYY, YZ, and ZZ. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed articles.

[0042] Although terms such as “first,” “second,” etc., may be used herein to describe various forms of elements, these elements shall not be limited by these terms. These terms are used to distinguish one element from another. Therefore, the first element discussed below may be named the second element without departing from the teachings of the present disclosure.

[0043] Spatially relative terms such as “below,” “under,” “immediately below,” “lower,” “above,” “upper,” “upper,” “higher,” and “side” (e.g., as in “side wall”) may be used for descriptive purposes and thereby to describe the relationship between one element and another element(s) as illustrated in the drawings. Spatially relative terms are intended to include different orientations of the device in use, operation, and / or manufacture in addition to the orientations illustrated in the drawings. For example, if the device in the drawings is inverted, the element described as “below” or “under” another element or feature will be oriented “above” the other element or feature. Therefore, the exemplary term “below” may include both upper and lower orientations. Additionally, the device may be oriented differently (e.g., rotated 90° or oriented in a different orientation), and thus, spatially relative descriptors used herein may also be interpreted accordingly.

[0044] The technical terms used in this specification are intended to describe specific embodiments and are not limiting. The singular form used in this specification also includes the plural form unless the context clearly indicates otherwise. Additionally, the terms “comprising,” “comprising,” “comprising,” and / or “comprising” used in this specification specify the presence of the mentioned features, integers, steps, operations, elements, components, and / or groups thereof, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. Furthermore, the terms “substantially,” “about,” and other similar terms used in this specification are used to indicate approximation rather than degree, and are used to describe inherent deviations of measured, calculated, and / or provided values ​​that may be recognized by a person of ordinary knowledge in the art.

[0045] Various embodiments are described below with reference to cross-sectional and / or exploded drawings, which are schematic examples of idealized embodiments and / or intermediate structures. As such, variations from the shapes in the drawings may be expected, for example, as a result of manufacturing techniques and / or tolerances. Therefore, the embodiments disclosed herein should not be interpreted as being limited to the shapes of specific illustrated regions, but should be interpreted to include, for example, variations in shape resulting from manufacturing. In this way, the regions illustrated in the drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and thus are not intended to have a limiting meaning.

[0046] As is customary in the art, some embodiments may be illustrated and described in the accompanying drawings in terms of functional blocks, units, and / or modules. Those skilled in the art will understand that these blocks, units, and / or modules are physically implemented by electronic (or optical) circuits, such as logic circuits, discrete components, microprocessors, wiring circuits, memory elements, and wiring connections, formed using semiconductor-based manufacturing technology or other manufacturing technology. Where blocks, units, and / or modules are implemented by microprocessors or other similar hardware, they may be programmed and controlled using software (e.g., microcode) to perform the various functions discussed herein, and may optionally be driven by firmware and / or software. Additionally, each block, unit, and / or module may be implemented by dedicated hardware, or as a combination of dedicated hardware for performing some functions and a processor for performing other functions (e.g., one or more programmed processors and associated circuits). Additionally, each of the blocks, units, and / or modules of some embodiments may be physically separated into two or more interacting and individual blocks, units, and / or modules without departing from the scope of the concept of the present invention. Additionally, the blocks, units, and / or modules of some embodiments may be physically combined into more complex blocks, units, and / or modules without departing from the scope of the concept of the present invention.

[0047] Unless otherwise defined, all terms used herein (including technical or scientific terms) have the same meaning as commonly understood by those skilled in the art to which this disclosure pertains. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with that meaning in the context of the relevant technology, and should not be interpreted in an ideal or overly formal sense unless explicitly defined in this specification.

[0048] Subsequently, a light-emitting element according to an embodiment of the present invention will be described in detail through drawings.

[0049] FIGS. 1, FIGS. 4, FIGS. 6, and FIGS. 8 are drawings for explaining various embodiments of the light-emitting element of the present invention. FIGS. 1, FIGS. 4, FIGS. 6, and FIGS. 8 schematically illustrate only a portion of the light-emitting elements according to each embodiment. However, the internal configuration of the light-emitting elements according to the embodiments of the present invention is not limited to the configuration illustrated in the drawings and may further include known internal configurations such as electrodes and insulating layers.

[0050] FIGS. 1 to 3 are drawings for explaining a light-emitting element according to a first embodiment of the present invention.

[0051] FIG. 1 is a cross-sectional view schematically illustrating a region of a light-emitting element according to a first embodiment of the present invention. FIG. 2 is an enlarged view of region A of FIG. 1. In addition, FIG. 3 is a graph showing the component composition content of a part of the light-emitting element of FIG. 1.

[0052] Referring to FIG. 1, a light-emitting element (100) according to a first embodiment may include a substrate (110) and a semiconductor layer (115). Additionally, the semiconductor layer (115) may include a first semiconductor layer (120), a blocking layer (130), an active layer (140), and a second semiconductor layer (150).

[0053] The substrate (110) can be configured in various ways as a substrate for growing the semiconductor layer (115). For example, the substrate (110) may be one of a sapphire (Al2O3) substrate, a silicon carbide (SiC) substrate, a gallium arsenide (GaAs) substrate, a gallium nitride (GaN) substrate, a zinc oxide (ZnO) substrate, a silicon (Si) substrate, a gallium phosphide (GaP) substrate, an indium phosphide (InP) substrate, an aluminum nitride (AlN) substrate, and a germanium (Ge) substrate. In FIG. 1, the light-emitting element (100) includes the substrate (110), but the substrate (110) may be removed after the semiconductor layer (115) is formed.

[0054] The first semiconductor layer (120) may be disposed on the substrate (110). The first semiconductor layer (120) may be formed from a compound semiconductor such as a Group III-V or Group II-VI semiconductor. Furthermore, the first semiconductor layer (120) may include a nitride semiconductor layer such as (Al, Ga, In)N. For example, the first semiconductor layer (120) may include a GaN layer. Additionally, the first semiconductor layer (120) may be a semiconductor layer doped with a first dopant. In the present embodiment, the first dopant may be an n-type dopant. Accordingly, the first semiconductor layer (120) may be an n-type semiconductor layer doped with an n-type dopant. For example, the n-type dopant may be Si, and the doping concentration is approximately 1E17 atoms / cm² 3 Up to about 3E18 atoms / cm² 3 It may be possible. The first semiconductor layer (120) may be grown at a temperature of about 800°C to about 900°C.

[0055] A blocking layer (130) and an active layer (140) may be disposed on the first semiconductor layer (120). Additionally, according to the present embodiment, the blocking layer (130) and the active layer (140) may be formed with a structure including a groove-shaped approach area (V1).

[0056] A blocking layer (130) may be placed on the first semiconductor layer (120) to prevent non-luminescent elements from moving to the active layer (140). For example, the blocking layer (130) may be placed between the first semiconductor layer (120) and the active layer (140) to prevent the dopant used when forming the first semiconductor layer (120) from diffusing and being injected into the active layer (140).

[0057] The blocking layer (130) may include a nitride semiconductor layer containing indium. Additionally, the blocking layer (130) may be formed in a stacked structure of multiple layers. The blocking layer (130) may include a first blocking layer (131) and a second blocking layer (132) having a lower indium composition ratio than that of the first blocking layer (131).

[0058] The first blocking layer (131) may have the highest indium composition ratio among the plurality of layers constituting the blocking layer (130). For example, the first blocking layer (131) may be an InGaN layer. In this case, the first blocking layer (131) may be formed to have an indium composition ratio of about 1% to about 10%. Additionally, the first blocking layer (131) may be doped with an n-type dopant. For example, the dopant doped in the first blocking layer (131) may be Si, and the doping concentration may be about 1E17 atoms / cm² 3 Up to about 3E18 atoms / cm² 3 It could be.

[0059] Additionally, the second blocking layer (132) may include a plurality of layers. Furthermore, the second blocking layer (132) may have a structure in which at least two layers having different bandgap energies or different compositions are repeatedly stacked. For example, the second blocking layer (132) may have a structure in which a pair of layers consisting of an InGaN layer and a GaN layer are repeatedly stacked.

[0060] According to an embodiment of the present invention, the blocking layer (130) can prevent a non-luminous element from being injected into the active layer (140), thereby preventing a decrease in the luminous efficiency in the active layer (140). That is, the blocking layer (130) prevents the dopant from moving to the active layer (140), thereby reducing non-radiative recombination in the active layer (140) and improving the luminous efficiency of the light-emitting element (100).

[0061] Additionally, according to an embodiment of the present invention, the blocking layer (130) can adjust the width and area of ​​the approach area (V1). More specifically, the blocking layer (130) can adjust the maximum width between the inner sides of the approach area (V1) and the area of ​​the region between the inner sides.

[0062] The active layer (140) can be placed on the blocking layer (130). The active layer (140) can generate light through the recombination of electrons and holes injected through the first semiconductor layer (120) and the second semiconductor layer (150).

[0063] The active layer (140) can be formed as any one of a single well structure, a multi-well structure, a single quantum well structure, a multi-quantum well (MQW) structure, a quantum dot structure, or a quantum wire structure.

[0064] The active layer (140) of the light-emitting element (100) according to the present embodiment may be a multi-quantum well structure in which a quantum well layer (141) and a barrier layer (142) are alternately and repeatedly stacked. For example, the active layer (140) may include an active region composed of a pair of quantum well layers (141) and a barrier layer (142), and the active region may be stacked in multiple layers. Referring to FIGS. 1 and 2, the thickness of the active region may be about 10 nm to about 13.5 nm. The barrier layer (142) of the active region may be composed of a single layer or multiple layers.

[0065] The quantum well layer (141) may include a nitride semiconductor layer having a narrower energy bandgap than the barrier layer (142). For example, the active layer (140) may include an InGaN layer. Additionally, the barrier layer (142) may include a nitride semiconductor layer having a wider energy bandgap than the quantum well layer (141). For example, the barrier layer (142) may be composed of at least one nitride semiconductor among GaN, InGaN, AlGaN, AlN, or AlInGaN. For example, the barrier layer (142) may include at least one layer among a GaN layer, an AlGaN layer, or an AlN layer.

[0066] The wavelength of light emitted from the active layer (140) may vary depending on the composition ratio of the components forming the quantum well layer (141). A light-emitting device (100) according to an embodiment of the present invention may emit blue light as the quantum well layer (141) includes an InGaN layer and the barrier layer (142) includes a GaN or AlGaN layer.

[0067] Additionally, the quantum well layer (141) and barrier layer (142) of the active layer (140) may be formed as undoped layers that are not doped with a dopant to improve the crystal quality of the active layer (140). However, the present invention is not limited thereto. The active layer (140) may be doped with a dopant in some regions or the entire region to lower the forward voltage.

[0068] Light generated in the active layer (140) can be emitted to the outside of the semiconductor layer (115) through the side and top surfaces of the semiconductor layer (115). Additionally, light generated in the active layer (140) can be emitted to the outside of the semiconductor layer (115) through the bottom surface of the semiconductor layer (115).

[0069] Referring to FIGS. 1 and 2, the active layer (140) and the blocking layer (130) may each include a flat area (F) and an inclined area (S) as the approach area (V1) is formed. Here, the inclined area (S) becomes the approach area. Additionally, the inclined surface of the inclined area (S) may be the side of the approach area (V1). Referring to FIG. 2, the inner surface of the approach area (V1) corresponds to the upper surface of the active layer (140), and the space formed by the inner surface of the approach area (V1) may be filled with a second semiconductor layer (150). Additionally, the outer surface of the approach area (V1) corresponds to the lower surface of the blocking layer (130) and may face the first semiconductor layer (120). Additionally, in the approach area, the inclined area (S), the inclined surfaces of each layer having the structure of the approach area (V1) may be the upper or lower surfaces of each layer forming the active layer (140) and the blocking layer (130). Although one approach area (V1) is shown in the blocking layer (130) and the active layer (140) in FIG. 1, it is not limited thereto. Multiple approach areas (V1) may be formed in the blocking layer (130) and the active layer (140).

[0070] According to the present embodiment, the flat area (F) may include a first flat area (F1) located on one side of the slope area (S) and a second flat area (F2) located on the other side of the slope area (S). Additionally, the slope area (S) may include a first slope area (S1) and a second slope area (S2) having different slope directions. The first slope area (S1) is located between the first flat area (F1) and the second slope area (S2), and the second slope area (S2) is located between the first slope area (S1) and the second flat area (F2). The first slope area (S1) has a slope that faces downward as it moves from the first flat area (F1) toward the second slope area (S2), and the second slope area (S2) has a slope that faces upward as it moves from the first slope area (S1) toward the second flat area (F2).

[0071] Additionally, referring to FIG. 2, each layer including the approach region (V1) may have different thicknesses in the flat region (F) and the sloped region (S). Furthermore, each layer having the approach region (V1) may have a thinner thickness in the sloped region (S) than in the flat region (F). Thus, the tunneling probability of holes and the movement speed of holes can be increased by the sloped region (S) of the barrier layer (142) which is relatively thin.

[0072] According to the present embodiment, the quantum well layer (141) and the barrier layer (142) of the active layer (140) may each have a thickness in the inclined region (S) that is thinner than the thickness in the flat region (F). For example, the difference (T) between the thickness in the flat region (F) and the thickness in the inclined region (S) of the quantum well layer (141). FW -T SW ) may be greater than about 2 nm and less than about 6 nm. If the thickness difference between the flat region (F) and the sloped region (S) of the quantum well layer (141) is too small, the velocity difference of electrons between the flat region (F) and the sloped region (S) decreases, which may reduce the electron diffusion efficiency. In addition, if the thickness difference between the flat region (F) and the sloped region (S) is too large, a region where the quantum well layer (141) is broken may occur. Therefore, T FW -T SW When the value is greater than approximately 2 nm and less than approximately 6 nm, the electron diffusion efficiency can be increased and the luminescence efficiency can be increased.

[0073] In addition, the difference in thickness (T) between the flat region (F) and the sloped region (S) of the barrier layer (142). FB -T SB ) may be greater than about 0.5 nm and less than about 3 nm. In addition, (T) is the ratio of the difference in thickness between the flat region (F) and the sloped region (S) of the quantum well layer (141) to the difference in thickness between the flat region (F) and the sloped region (S) of the barrier layer (142). FW -T SW ) / (T FB-T SB ) may be greater than about 0.08 and less than about 1.5. If the difference in thickness between the flat region (F) and the sloped region (S) of the barrier layer (142) is too small, the diffusion efficiency of holes may decrease. In addition, if the difference in thickness between the flat region (F) and the sloped region (S) of the barrier layer (142) is too large, the connection between the flat region (F) and the sloped region (S) of the barrier layer (142) may be severed. Therefore, (T FW -T SW ) / (T FB -T SB When ) is greater than about 0.08 and less than about 1.5, hole diffusion efficiency can be improved and the quality of the thin film can be improved.

[0074] Additionally, the quantum well layer (141) has a ratio (T) of the thickness of the inclined region (S) to the thickness of the flat region (F). SW / T FW ) may be greater than about 0.25 and less than about 0.8. If the thickness ratio of the flat region (F) and the sloped region (S) of the quantum well layer (141) is too small, the electron velocity difference between the flat region (F) and the sloped region (S) decreases, which may reduce the electron diffusion efficiency. In addition, if the thickness ratio of the flat region (F) and the sloped region (S) is too large, the connection between the flat region (F) and the sloped region (S) of the quantum well layer (141) may be severed. Therefore, T SW / T FW When the value is greater than approximately 0.25 and less than approximately 0.8, the electron diffusion efficiency can be increased and a sufficient light-emitting region can be secured.

[0075] Additionally, the barrier layer (142) has a ratio (T) of the thickness of the sloped region (S) to the thickness of the flat region (F). SB / T FB) may be greater than approximately 0.45 and less than approximately 0.78. If the thickness ratio of the flat region (F) and the sloped region (S) of the barrier layer (142) is too small, the tunneling efficiency of holes in the flat region (F) may decrease. In addition, if the thickness ratio of the flat region (F) and the sloped region (S) is too large, the connection between the flat region (F) and the sloped region (S) of the barrier layer (142) may be severed. Therefore, T SB / T FB When the value is greater than approximately 0.45 and less than approximately 0.78, the diffusion efficiency of holes can be increased and a sufficient light-emitting region can be secured.

[0076] In addition, the difference (T) between the ratio of the thickness of the inclined region (S) and the flat region (F) of the quantum well layer (141) and the ratio of the thickness of the inclined region (S) and the flat region (F) of the barrier layer (142). SW / T FW )-(T SB / T FB ) may be greater than about -0.02 and less than about 0.2. In this case, the number of holes entering the quantum well layer (141) can be increased.

[0077] Additionally, in each of the flat region (F) and the sloped region (S), the quantum well layer (141) of the active layer (140) may have a thinner thickness than the barrier layer (142). For example, in the sloped region (S), the ratio (T) of the thickness of the quantum well layer (141) to the thickness of the barrier layer (142) SW / T SB ) may be greater than about 0.14 and less than about 0.4. Additionally, in the flat region (F), the ratio (T) of the thickness of the quantum well layer (141) to the thickness of the barrier layer (142) is FW / T FB ) may be greater than about 0.22 and less than about 0.44. In addition, (T) is the difference between the ratio of the thickness of the quantum well layer (141) and the barrier layer (142) in the flat region (F) and the ratio of the thickness of the quantum well layer (141) and the barrier layer (142) in the sloped region (S). FW / T FB )-(T SW / T SB) may be greater than about 0.04 and less than about 0.3. Therefore, the probability that holes injected from the second semiconductor layer (150) will reach the quantum well layer (141) positioned close to the first semiconductor layer (120) can be increased. Additionally, electrons injected from the first semiconductor layer (120) can be prevented from reaching the second semiconductor layer (150).

[0078] Each layer forming the blocking layer (130) and the active layer (140) has a first inclined surface (145) located in the first inclined area (S1) and a second inclined surface (146) located in the second inclined area (S2). Additionally, each layer included in the blocking layer (130) and the active layer (140) has an intersection point where the first inclined surface (145) and the second inclined surface (146) meet. In this embodiment, among the intersection points of the layers forming the blocking layer (130) and the active layer (140) in the approach area (V1), the uppermost intersection point is the first intersection point (N1), and the lowest intersection point is the second intersection point (N2). That is, the first intersection point (N1) is located on the upper surface of the active layer (140) in the inclined area (S), which is the approach area, and the second intersection point (N2) is located on the lower surface of the blocking layer (130) in the inclined area (S). Additionally, the second intersection point (N2) can be the bottom of the approach area (V1).

[0079] Referring to FIG. 2, the approach area (V1) may have a symmetrical structure with respect to the virtual line (L) connecting the first intersection point (N1) and the second intersection point (N2) of the present embodiment. Additionally, the points where the flat surface and the inclined surface of each layer forming the blocking layer (130) and the active layer (140) meet may be located on the same line in each of both directions. Accordingly, the angle (θ1) of the first inclined surface (145) and the angle (θ2) of the second inclined surface (146) may be the same with respect to the virtual line (L) in the approach area (V1). Furthermore, the approach area (V1) may have a symmetrical structure and the same area on both sides with respect to the virtual line (L). Accordingly, the inner area (R) of the approach area (V1), which is surrounded by the first slope (145) and the second slope (146) of the approach area (V1), may have equal areas on both sides based on the virtual line (L). Here, the inner area (R) of the approach area (V1) is the area between the first slope (145) and the second slope (146), which are the inner surfaces of the approach area (V1). The area surrounded by the first slope (145) of the approach area (V1) and the virtual straight line (L) is the first inner area (R1), and the area surrounded by the second slope (146) of the approach area (V1) and the virtual straight line (L) may be the second inner area (R2). For example, the areas of the first inner area (R1) and the second inner area (R2) may be the same. However, the structure of the approach region (V1) of the light-emitting element (100) of the present invention is not limited to this. The approach region (V1) of the light-emitting element (100) of the present invention may have asymmetrical regions, and the point where the flat surface and the inclined surface of each layer meet may not be located on the same line in each direction.

[0080] A region with relatively high resistance and a high energy band gap can be formed on the side of the approach region (V1).

[0081] In the approach region (V1) of the active layer (140), light of the wavelength range targeted by the light-emitting element (100) may not be generated. Additionally, if a dopant is introduced into the active layer (140) in the slope region (S), which is the approach region, non-radiative recombination may occur due to the dopant, thereby reducing the light-emitting efficiency of the light-emitting element (100). Therefore, the light-emitting element (100) of the present embodiment can reduce non-radiative recombination by preventing a dopant that causes non-radiative recombination from entering the approach region (V1) of the active layer (140) through a blocking layer (130) formed between the first semiconductor layer (120) and the active layer (140).

[0082] Referring to FIGS. 1 and 2, the second intersection point (N2), which is the bottom of the approach area (V1), may be located in a part of the first semiconductor layer (120). That is, in this embodiment, the approach area (V1) may be formed to have a size such that the second intersection point (N2), which is the bottom, is located inside the first semiconductor layer (120).

[0083] According to an embodiment of the present invention, the approach area (V1) can be sized by the blocking layer (130). That is, the width and area of ​​the approach area (V1) can be sized by the blocking layer (130). More specifically, the maximum separation distance between the inner surfaces of the approach area (V1) and the area of ​​the inner region (R) of the approach area (V1) can be sized by adjusting the indium content of the first blocking layer (131).

[0084] In the light-emitting element (100) according to an embodiment of the present invention, when forming a semiconductor layer (115) on a substrate (110), scattered rays (160) can be formed by utilizing the difference between the lattice structure of the substrate (110) and the lattice structure of the semiconductor layer (115). The scattered rays (160) can be formed in the first semiconductor layer (120), pass through the superlattice layer and the active layer (140), and extend to the inner region (R) of the approach region (V1). Here, the inner region (R) of the approach region (V1) is the region between the inner surfaces of the approach region (V1) and can be filled with a second semiconductor layer (150).

[0085] In the inner region (R) of the approach area (V1), scattered rays (160) can scatter light emitted from the active layer (140) in various directions. The active layer (140) may include a groove structure, a flat region (F), and an inclined region (S). Since the flat region (F) and the inclined region (S) have different inclination angles, the angle of light emitted from each region is also different. Additionally, the flat region (F) and the inclined region (S) have different angles relative to the scattered rays (160) located in the inner region (R) of the approach area (V1). Accordingly, the direction of propagation of light emitted from the flat region (F) of the active layer (140) and refracted by the scattered rays (160) and the direction of propagation of light emitted from the inclined region (S) of the active layer (140) and refracted by the scattered rays (160) may be different. Accordingly, the light-emitting element (100) of the present embodiment can emit light uniformly in various directions, including light emitted from the flat region (F) and light emitted from the inclined region (S) of the active layer (140), as well as light refracted from scattered rays (160).

[0086] In addition, according to the present embodiment, the scattered radiation (160) does not travel in a single direction and may have a structure in which at least one region is bent. Furthermore, the scattered radiation (160) may have a structure in which it is bent in various directions in multiple regions. Thus, the scattered radiation (160) may have various angles with respect to the inclined region (S) and may also have various angles with respect to the flat region (F). That is, the first inclined surface (145) and the second inclined surface (146) of the active layer (140) may have multiple degrees of inclination with respect to the scattered radiation (160). Accordingly, light emitted from the inclined region (S) of the active layer (140) may also be refracted in various directions depending on the part that strikes the scattered radiation (160), and light emitted from the flat region (F) may also be refracted in various directions depending on the part that strikes the scattered radiation (160). Accordingly, the light-emitting element (100) of the present embodiment can improve light uniformity by means of scattered rays (160) of a structure bent in various directions.

[0087] If the indium content of the first blocking layer (131) increases, the width between the inner surfaces of the approach area (V1) increases, and accordingly, the area of ​​the inner region (R) of the approach area (V1) can increase.

[0088] If the approach area (V1) is small enough that the second intersection point (N2) is located on the upper part of the first semiconductor layer (120), the size of the approach area (V1) is reduced, and the area of ​​the inner region (R) where the scattered rays (160) can be formed can be reduced.

[0089] However, if the approach area (V1) has a large enough size for the second intersection point (N2) to be located in a part of the first semiconductor layer (120) as in the present embodiment, the area of ​​the inner region (R) where the scattered rays (160) can be formed can be increased. Accordingly, the light-emitting element (100) of the present embodiment can secure a sufficient area for the scattered rays (160) to be formed by the large size of the approach area (V1), and accordingly, the scattered rays (160) can be generated more effectively.

[0090] FIG. 3 is a graph of the component composition of the first semiconductor layer (120), blocking layer (130), and active layer (140) of a light-emitting element (100 of FIG. 1) according to the first embodiment. According to the present embodiment, the blocking layer (130) includes a first blocking layer (131) and a second blocking layer (132), and the second blocking layer (132) is composed of three layers. This is merely an example of the light-emitting element (100) of the present invention, and the light-emitting element (100) of the present invention is not limited thereto. The number of layers forming the first blocking layer (131) and the second blocking layer (132) of the blocking layer (130) can be varied.

[0091] Referring to FIG. 3, in the light-emitting element (100) according to the present embodiment, the indium content of each layer of the blocking layer (130) may be equal to or lower than the indium content of the active layer (140) and may be higher than the indium content of the first semiconductor layer (120). Additionally, the indium content of the first blocking layer (131) may be equal to or lower than that of the active layer (140) and may be higher than that of the second blocking layers (132). That is, the indium content of the first blocking layer (131) may be higher than the indium content of the second blocking layer (132) and equal to or lower than the indium content of the active layer (140).

[0092] According to an embodiment of the present invention, among the plurality of layers included in the blocking layer (130), the first blocking layer (131) closest to the first semiconductor layer (120) may have a relatively large indium composition ratio and thickness. Such a first blocking layer (131) can increase the maximum width of the approach area (V1) of the active layer (140) to effectively generate scattered rays (160).

[0093] The blocking layer (130) of the light-emitting element (100) of the present embodiment includes one first blocking layer (131) and three second blocking layers (132), but is not limited thereto. The number of second blocking layers (132) of the light-emitting element (100) of the present embodiment may vary. Additionally, the light-emitting element (100) of the present embodiment may not include the second blocking layer (132). That is, the blocking layer (130) of the light-emitting element (100) of the present embodiment may include only one or more first blocking layers (131).

[0094] The second semiconductor layer (150) may be disposed on the active layer (140). Additionally, the second semiconductor layer (150) may be formed to fill the approach area (V1) of the active layer (140) and have an upper surface that is generally flat.

[0095] The second semiconductor layer (150) may be formed from a compound semiconductor such as a III-V or II-VI group. Furthermore, the second semiconductor layer (150) may include a nitride semiconductor layer such as (Al, Ga, In)N. For example, the second semiconductor layer (150) may include a GaN layer. Additionally, the second semiconductor layer (150) may be a semiconductor layer doped with a second dopant. In the present embodiment, the second semiconductor layer (150) may be a p-type semiconductor layer doped with a p-type dopant. For example, the p-type dopant may be Mg.

[0096] Depending on the type of composition forming the first semiconductor layer (120), the second semiconductor layer (150), and the active layer (140), the type of light generated in the light-emitting element (100) may vary. The light-emitting element (100) according to the present embodiment may emit blue light.

[0097] FIGS. 4 and FIGS. 5 are drawings for explaining a light-emitting element according to a second embodiment of the present invention. FIG. 4 is a cross-sectional view schematically illustrating one region of a light-emitting element according to a second embodiment of the present invention. FIG. 5 is an enlarged view of region B of FIG. 4.

[0098] The light-emitting element (200) according to the second embodiment of the present invention has other components that are identical to the components of the light-emitting element (100 of FIG. 1) of the previous embodiment, except for the structure of the approach region (V2). Therefore, for a detailed description of the components other than the approach region (V2) of the light-emitting element (200) according to the second embodiment, please refer to the description of the light-emitting element (100 of FIG. 1) of the previous embodiment.

[0099] The light-emitting element (200) according to the present embodiment may include a substrate (110) and a semiconductor layer (115). Additionally, the semiconductor layer (115) may include a first semiconductor layer (120), a blocking layer (130), an active layer (140), and a second semiconductor layer (150). Additionally, the blocking layer (130) and the active layer (140) may be formed with a structure including an approach region (V2).

[0100] Referring to FIGS. 4 and 5, the approach area (V2) may be formed with a structure that is asymmetric on both sides. Referring to FIG. 5, the approach area (V2) may include a first intersection point (N1) at the upper surface of the active layer (140) where both sides of the approach area (V2) meet, and a second intersection point (N2) at the lower surface of the blocking layer (130) where both sides of the approach area (V2) meet. The approach area (V2) may be divided into a first slope area (S1) and a second slope area (S2) based on a virtual line (L) connecting the first intersection point (N1) and the second intersection point (N2).

[0101] In the light-emitting element (200) according to the present embodiment, the first inclined surface (145) of the first inclined region (S1) and the second inclined surface (146) of the second inclined region (S2) may have different angles with respect to the virtual line (L). Additionally, the first inclined region (S1) and the second inclined region (S2) of the approach region (V2) may have different areas. Accordingly, the first inner region (R1) and the second inner region (R2) surrounded by the approach region (V2) may have different areas. According to the present embodiment, the angle (θ1) of the first inclined surface (145) with respect to the virtual line (L) may be greater than the angle (θ2) of the second inclined surface (146). Additionally, the area of ​​the first inclined region (S1) may be larger than the area of ​​the second inclined region (S2). Additionally, the area of ​​the first inner region (R1) may be larger than the area of ​​the second inner region (R2). For example, the area of ​​the first inner region (R1) may exceed the area of ​​the second inner region (R2) and be 1.4 times or less the area of ​​the second inner region (R2). Conversely, in the approach region (V2) of the light-emitting element (200), the angle (θ2) of the second inclined surface (146) with respect to the virtual line (L) may be larger than the angle (θ1) of the first inclined surface (145). Additionally, the area of ​​the second inclined region (S2) may be larger than the area of ​​the first inclined region (S1). Additionally, the area of ​​the second inner region (R2) may be larger than the area of ​​the first inner region (R1). For example, the area of ​​the second inner region (R2) may exceed the area of ​​the first inner region (R1) and be 1.4 times or less the area of ​​the first inner region (R1).

[0102] According to an embodiment of the present invention, the inner region (R) of the approach area (V2) has different areas for one region and the other region based on the virtual line (L). Accordingly, the scattered rays (160) may be formed relatively longer in the wider region between the one region and the other region of the inner region (R) of the approach area (V2). For example, among the first inner region (R1) and the second inner region (R2) of the approach area (V2), the formation of the scattered rays (160) may occur more in the first inner region (R1), which has a relatively wider area. Additionally, since the area of ​​the first inner region (R1) is larger than the area of ​​the second inner region (R2), the scattered rays (160) may have a relatively longer length of their total length located in the first inner region (R1). That is, the length of the scattered rays (160) formed in the first inner region (R1), which has a relatively larger area, may be longer than the length of the scattered rays (160) formed in the second inner region (R2), which has a relatively smaller area. Accordingly, the scattered rays (160) may be formed longer than when the approach region (V2) has a symmetrical structure with respect to the virtual line (L). Additionally, as the length of the scattered rays (160) increases, the scattered rays (160) may be formed to have a wider variety of angles with respect to the inner surface of the approach region (V2), thereby improving light extraction efficiency.

[0103] Accordingly, the light scattering effect by the scattered rays (160) of the light-emitting element (200) of the present embodiment can be further enhanced by the structure of the inner region (R) of the approach region (V2) described above, and the light uniformity can be improved.

[0104] FIGS. 6 and 7 are drawings for explaining a light-emitting element according to a third embodiment of the present invention. FIG. 6 is a cross-sectional view schematically illustrating one region of a light-emitting element according to a third embodiment of the present invention. FIG. 7 is an enlarged view of region C of FIG. 6.

[0105] The light-emitting element (300) according to the third embodiment of the present invention has other configurations that are identical to those of the light-emitting elements of previous embodiments (100 in FIG. 1 and 200 in FIG. 4), except for the structure of the approach region (V3). Therefore, for a detailed description of the other configurations of the light-emitting element (300) according to the third embodiment, excluding the approach region (V3), please refer to the description of the light-emitting elements of previous embodiments (100 in FIG. 1 and 200 in FIG. 4).

[0106] The light-emitting element (300) according to the present embodiment may include a substrate (110) and a semiconductor layer (115). Additionally, the semiconductor layer (115) may include a first semiconductor layer (120), a blocking layer (130), an active layer (140), and a second semiconductor layer (150). Additionally, the blocking layer (130) and the active layer (140) may be formed with a structure including an approach region (V3).

[0107] Referring to FIGS. 6 and 7, the approach region (V3) of the present embodiment may be formed with an asymmetric structure on both sides, similar to the approach region (V2) of the light-emitting element (200) of the second embodiment of FIGS. 4 and 5.

[0108] In the approach area (V3) of the present embodiment, the intersection point of at least one layer among the plurality of layers constituting the approach area (V3) may be located outside the virtual straight line (L) connecting the first intersection point (N1) and the second intersection point (N2). Furthermore, in the light-emitting element (300) according to the present embodiment, the intersection points of each layer constituting the approach area (V3) may be irregularly located as shown in FIG. 7.

[0109] That is, the approach area (V3) may include mutually facing slopes for each layer and may include intersection points where mutually facing slopes meet. Additionally, the intersection points may include a first intersection point (N1) positioned furthest from the first semiconductor layer (120) and a second intersection point (N2) positioned closest to the first semiconductor layer (120). Furthermore, a straight line (L) passing through the first intersection point (N1) and the second intersection point (N2) may be spaced apart from other intersection points positioned between the first intersection point (N1) and the second intersection point (N2).

[0110] Additionally, among the multiple layers constituting the approach area (V3), the location of the boundary point between the flat area (F) and the sloped area (S) of at least one layer may differ from that of the other layers. Furthermore, the boundary points between the flat area (F) and the sloped area (S) of each layer constituting the blocking layer (130) and the active layer (140) may not be located on a single line but may be located irregularly as shown in FIG. 7. Also, since the location of the boundary points of each layer constituting the blocking layer (130) and the active layer (140) is irregular, at least one of the sloped surfaces may have a different length. Furthermore, the sloped surfaces of each layer constituting the blocking layer (130) and the active layer (140) may have different lengths. Accordingly, the light-emitting element (300) of the present embodiment is provided with multiple layers having different angles of sloped surfaces, so that the angle of refraction of light passing through the active layer (130) and the blocking layer (130) becomes diverse and the range of the angle of refraction can be widened. Accordingly, the light-emitting element (300) of the present embodiment can emit a large amount of light to the outside at various angles.

[0111] FIG. 8 is a cross-sectional view schematically illustrating one region of a light-emitting element according to a fourth embodiment of the present invention.

[0112] Referring to FIG. 8, a light-emitting element (400) according to a fourth embodiment of the present invention may include a substrate (110) and a semiconductor layer (415). Additionally, the semiconductor layer (415) may include a first buffer layer (460), a first semiconductor layer (120), a blocking layer (130), an active layer (440), and a second semiconductor layer (150). Additionally, the blocking layer (130) and the active layer (440) may be formed with a structure including an approach region (V).

[0113] The light-emitting element (400) according to the fourth embodiment of the present invention has the same configuration as the light-emitting elements of previous embodiments (100 in FIG. 1, 200 in FIG. 4, and 300 in FIG. 6), except for the first buffer layer (460) and the active layer (440). Therefore, the description of the light-emitting element (400) according to the fourth embodiment will focus on the differences from the light-emitting elements of previous embodiments (100 in FIG. 1, 200 in FIG. 4, and 300 in FIG. 6). For a detailed description of the configurations that have been omitted, refer to the description of the light-emitting elements of previous embodiments (100 in FIG. 1, 200 in FIG. 4, and 300 in FIG. 6).

[0114] According to an embodiment of the present invention, a first buffer layer (460) may be disposed between a substrate (110) and a first semiconductor layer (120). The first buffer layer (460) can relieve stress and strain due to the difference in lattice constant and coefficient of thermal expansion between the substrate (110) and the first semiconductor layer (120). Accordingly, the first buffer layer (460) can prevent and minimize the occurrence of cracks and warping and the generation of dislocations within the first semiconductor layer (120). For example, the first buffer layer (460) may be formed of undoped GaN.

[0115] According to an embodiment of the present invention, the active layer (440) may include a quantum well layer (141), a barrier layer (142), and a second buffer layer (470). Referring to FIG. 8, the second buffer layer (470) may be placed between the quantum well layer (141) and the barrier layer (142). The second buffer layer (470) may be formed by including aluminum (Al) to relieve stress and strain caused by the difference in lattice constant and thermal expansion coefficient between the quantum well layer (141) and the barrier layer (142). Thus, the second buffer layer (470) can prevent cracks and warping within the active layer (440). The active layer (440) may have a structure in which an active region consisting of a pair of quantum well layers (141) and a barrier layer (142) is stacked in multiple layers. At this time, the second buffer layer (470) may be formed between the quantum well layer (141) and the barrier layer (142) of at least one of the plurality of active regions. Alternatively, the second buffer layer (470) may be formed between the quantum well layer (141) and the barrier layer (142) for each active region.

[0116] According to an embodiment of the present invention, the second buffer layer (470) may include a second-1 buffer layer (471) and a second-2 buffer layer (472). The second-1 buffer layer (471) may be disposed on the quantum well layer (141), and the second-2 buffer layer (472) may be disposed on the second-1 buffer layer (471). For example, the second-1 buffer layer (471) may be formed of AIN, and the second-2 buffer layer (472) may be formed of AlGaN.

[0117] Additionally, the second-1 buffer layer (471) may be formed thinner than the second-2 buffer layer (472). For example, the second-1 buffer layer (471) may be formed with a thickness of about 1 nm or less, and the second-2 buffer layer (472) may be formed with a thickness of about 1 nm to about 2 nm. Additionally, the second buffer layer (470) may omit the second-1 buffer layer (471) and include only the second-2 buffer layer (472).

[0118] FIG. 9 is a schematic cross-sectional view of a light-emitting package according to an embodiment of the present invention.

[0119] Referring to FIG. 9, the light-emitting package (1) may include a circuit board (10), a housing (20), a light-transmitting resin, and a light-emitting element (40). The light-emitting element (40) may be a light-emitting element (100, 200, 300, 400) according to the first to fourth embodiments described above.

[0120] The circuit board (10) supports the housing (20) on which the light-emitting element (40) is mounted, and can supply voltage and current applied from the outside to the light-emitting element (40).

[0121] Although not illustrated in FIG. 9, the circuit board (10) may include a base and a plurality of spaced-apart conductive patterns. The base may be formed from an insulating material. For example, it may be formed from at least one material selected from phenol, epoxy, polyimide, and ceramic. Alternatively, the base may include a metal layer and an insulating layer formed on the surface of the metal layer. For example, the insulating layer may be an insulating resin or an oxide. That is, the base may be formed from an insulating material or formed in a structure that can be insulated from the conductive patterns. Conductive patterns may be formed on the upper and lower parts of the base. Additionally, conductive patterns may be further formed on the interior or side of the base to electrically connect the conductive pattern formed on the upper part of the base with the conductive pattern formed on the lower part of the base. The conductive patterns may be formed from any material having conductivity. For example, the conductive patterns may be formed from metal. Such a circuit board (10) can supply voltage and current applied from the outside through the conductive patterns to the light-emitting element (40).

[0122] The housing (20) may be formed from an insulating material. For example, the housing (20) may be formed by including at least one material among ceramic resin, silicone resin, epoxy resin, polyimide resin, and urethane resin.

[0123] Additionally, the housing (20) may have a cavity (21) formed to have a predetermined depth from the upper surface toward the lower direction. A light-emitting element (40) may be disposed in the cavity (21) of the housing (20). Furthermore, the inner surface of the housing (20) forming the cavity (21) may be formed to have an incline to reflect light emitted from the light-emitting element (40) toward the upper direction.

[0124] Although not illustrated in FIG. 9, the housing (20) may include a plurality of conductive patterns. The conductive patterns of the housing (20) may be exposed in the cavity (21) and may be exposed through at least one surface of the side or bottom of the housing (20). Additionally, the conductive pattern exposed in the cavity (21) and the conductive pattern exposed on the surface of the housing (20) may be electrically connected to each other.

[0125] The light-emitting element (40) disposed in the cavity (21) of the housing (20) may be one of the light-emitting elements (100, 200, 300 and 400) described through FIGS. 1 to 8. In this case, the light-emitting element (40) may include a first electrode (181) electrically connected to a first semiconductor layer (120) and a second electrode (182) electrically connected to a second semiconductor layer (150).

[0126] When the light-emitting element (40) is placed in the cavity (21) of the housing (20), the first electrode (181) and the second electrode (182) of the light-emitting element (40) can be electrically connected to conductive patterns that are exposed in the cavity (21) and spaced apart from each other. The first electrode (181) and the second electrode (182) of the light-emitting element (40) can be electrically connected to the conductive patterns through a conductive material such as a bump (50). At this time, the light-emitting element (40) may be fixed to the cavity (21) of the housing (20) by the conductive material.

[0127] Referring to FIG. 9, the light-emitting element (40) of the present embodiment has a horizontal structure in which the first electrode (181) and the second electrode (182) are arranged in the same direction. However, the structure of the light-emitting element (40) applied to the light-emitting package (1) of the present invention is not limited to this. As another example, the light-emitting element (40) may have a vertical structure in which the first electrode (181) and the second electrode (182) are arranged in different directions. As yet another example, the light-emitting element (40) may have a structure in which the first electrode (181) and the second electrode (182) are arranged in the same direction, and the upper or lower surface of the first electrode (181) and the second electrode (182) are located at the same height.

[0128] In this way, various structures of light-emitting elements (40) can be applied to the light-emitting package (1) of the present invention, and the method of electrically connecting to the conductive patterns of the housing (20) can also be varied depending on the structure of the light-emitting element (40). As another example, the light-emitting element (40) may have both the first electrode (181) and the second electrode (182) electrically connected to the conductive patterns of the housing (20) through a wire. As yet another example, one of the first electrode (181) and the second electrode (182) of the light-emitting element (40) may be electrically connected by contacting the conductive pattern of the housing (20), while the other electrode may be electrically connected to the conductive pattern of the housing (20) through a wire.

[0129] The light-transmitting layer (30) can be formed in the cavity (21) of the housing (20) to cover the light-emitting element (40). The light-transmitting layer (30) can cover the light-emitting element (40) to fix the light-emitting element (40) to the cavity (21) of the housing (20) and can also protect it from external substances or external impacts.

[0130] The light-transmitting layer (30) may be formed of a material through which light emitted from the light-emitting element (40) is transmitted. For example, the light-transmitting layer (30) may be formed by including at least one material among polymer resin, glass, or ceramic. Additionally, the light-transmitting layer (30) may further include materials capable of converting the wavelength of light or varying the direction of light propagation, such as a wavelength-converting material, a scattering material, or a reflective material.

[0131] Additionally, in FIG. 9, the light-transmitting layer (30) has a flat upper surface. However, the structure of the light-transmitting layer (30) is not limited to this. As another example, the light-transmitting layer (30) may be formed such that at least a portion of the upper surface includes a convex curved surface or a concave curved surface. In this way, the light-transmitting layer (30) may be formed in various structures to control the directional angle or the direction of propagation of light of the light-emitting package (1).

[0132] The light-emitting element (100, 200, 300, 400) according to an embodiment of the present invention can be applied not only to a light-emitting package (1) but also to various light-emitting modules such as lighting, vehicle lamps, and display devices.

[0133]

[0134] As explained above, the detailed description of the present invention has been made through embodiments with reference to the attached drawings, but since the above-described embodiments are merely preferred examples of the present invention, the present invention should not be understood as being limited only to the above-described embodiments, and the scope of the rights of the present invention should be understood as the claims set forth below and equivalent concepts.

Claims

1. A first semiconductor layer doped with a first dopant; A blocking layer disposed on the first semiconductor layer and comprising indium; An active layer disposed on the above-mentioned blocking layer; and A second semiconductor layer disposed on the above active layer and doped with a second dopant; comprising The above blocking layer and active layer include a flat region and an approach region, and The above approach area includes a sloped area, and The above approach area includes first inclined surfaces and second inclined surfaces facing each other, and includes intersection points where the first inclined surfaces and the second inclined surfaces meet. The above intersection points include a first intersection point positioned furthest from the first semiconductor layer and a second intersection point positioned closest to the first semiconductor layer, and A straight line passing through the first intersection point and the second intersection point is a light-emitting element spaced apart from the intersection points arranged between the first intersection point and the second intersection point.

2. In Claim 1, The straight line passing through the first intersection point and the second intersection point is a light-emitting element tilted with respect to the flat region.

3. In Claim 1, The lower part of the above approach region is a light-emitting element located in a part region of the first semiconductor layer.

4. In Claim 1, A light-emitting device in which the indium content of the blocking layer is equal to or lower than the indium content of the active layer and higher than the indium content of the first semiconductor layer.

5. In Claim 4, The above blocking layer is a light-emitting element comprising a first blocking layer disposed on the first semiconductor layer and a second blocking layer disposed on the first blocking layer.

6. In Claim 5, The above blocking layer is a light-emitting element having a plurality of the above second blocking layers.

7. In Claim 5, A light-emitting device in which the indium content of the first blocking layer is equal to or lower than the indium content of the active layer, and the indium content of the second blocking layer is lower than the indium content of the first blocking layer.

8. In Claim 1, A light-emitting element in which the region between the first inclined surface and the second inclined surface forming the first intersection is symmetrical with respect to the straight line passing through the first intersection and the second intersection.

9. In Claim 1, A light-emitting element in which the region between the first inclined surface and the second inclined surface forming the first intersection is asymmetric with respect to the straight line passing through the first intersection and the second intersection.

10. In Claim 1, A light-emitting device in which one of the first dopant and the second dopant is an n-type dopant and the other dopant is a p-type dopant.

11. A first semiconductor layer doped with a first dopant; A blocking layer disposed on the first semiconductor layer and comprising indium; An active layer disposed on the above-mentioned blocking layer; and A second semiconductor layer disposed on the above active layer and doped with a second dopant; comprising The above blocking layer and the above active layer include an approach area and a flat area having an inclined surface, and The above approach area includes first inclined surfaces and second inclined surfaces facing each other, and A light-emitting element in which scattered rays are formed in an inner region, which is the region between the first inclined surfaces and the second inclined surfaces.

12. In Claim 11, The above scattered radiation is a light-emitting element having a structure in which at least one region is bent.

13. In Claim 12, The first inclined surface and the second inclined surface of the active layer are light-emitting elements having a plurality of inclinations based on the scattered rays.

14. In Claim 11, A light-emitting element in which the maximum separation distance between the first inclined surface and the second inclined surface of the approach area varies according to the thickness direction.

15. In Claim 14, A light-emitting device in which the indium content of the blocking layer is equal to or lower than the indium content of the active layer and higher than the indium content of the first semiconductor layer.

16. In Claim 15, The above blocking layer is a light-emitting element comprising a first blocking layer disposed on the first semiconductor layer and a second blocking layer disposed on the first blocking layer.

17. In Claim 16, A light-emitting device in which the indium content of the first blocking layer is equal to or lower than the indium content of the active layer, and the indium content of the second blocking layer is lower than the indium content of the first blocking layer.

18. In Claim 11, The above intersection points include a first intersection point positioned furthest from the first semiconductor layer and a second intersection point positioned closest to the first semiconductor layer, and A light-emitting element in which the region between the first inclined surface and the second inclined surface forming the first intersection is asymmetric with respect to a straight line passing through the first intersection and the second intersection, with the first inner region formed on one side and the second inner region formed on the other side.

19. In Claim 18, The above scattered radiation is a light-emitting element in which the longer length of the total length is located in the wider area between the first inner region and the second inner region.

Images