Transistors and display devices including transistors

A transistor with a double-doped active layer using boron and fluorine dopants addresses the negative shift in threshold voltage and extends the channel length, improving reliability and reducing power consumption in small display panels.

JP2026101609APending Publication Date: 2026-06-22LG DISPLAY CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
LG DISPLAY CO LTD
Filing Date
2025-10-31
Publication Date
2026-06-22

AI Technical Summary

Technical Problem

The challenge is to provide a transistor with improved reliability and reduced power consumption, particularly in small display panels, by minimizing the negative shift in threshold voltage (Vth) and maximizing the channel length, while addressing the issue of offset regions in transistors with short channel lengths.

Method used

A transistor structure is designed with a first active layer that includes a double-doped portion between the conductive and channel portions, doped with both first and second dopants, such as boron and fluorine, to enhance resistance and carrier concentration, thereby suppressing the negative shift in threshold voltage and extending the channel length.

Benefits of technology

The double-doping structure effectively prevents the negative shift in threshold voltage, maximizes the channel length, and reduces power consumption, enhancing the reliability and performance of the transistor and display device.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2026101609000001_ABST
    Figure 2026101609000001_ABST
Patent Text Reader

Abstract

This transistor structure provides a mechanism to suppress the phenomenon of the threshold voltage Vth of a small transistor with a relatively short channel length shifting to the negative side. [Solution] The device includes a first gate electrode, a first active layer overlapping the first gate electrode, a first source electrode and a first drain electrode in contact with the first active layer, wherein the first active layer includes a first channel portion located in the portion overlapping the first gate electrode, first conductive portions located on both sides of the first channel portion and doped with a first dopant, and in contact with the first source electrode and the first drain electrode, and a double-doping portion located between the first conductive portion and the first channel portion and doped with both the first dopant and the second dopant.
Need to check novelty before this filing date? Find Prior Art