Method for manufacturing multilayer structure by using crystal direction free control, and multilayer structure manufactured using same

Abstract

The present invention relates to: a method for manufacturing a multilayer structure by using crystal direction free control enabling a multilayer structure to be formed through free adjustment of a crystal orientation of a semiconductor layer; and a multilayer structure manufactured using same, the method comprising: a substrate preparation step of preparing a substrate; a seed layer formation step of forming a seed layer on the substrate, the seed layer being formed through an off-axis sputtering process in which a sputtering process is performed after the substrate is arranged off-axis on a target; a semiconductor layer formation step of forming a semiconductor layer on the seed layer through an epitaxial process; and a step of sequentially and repeatedly forming the seed layer and the semiconductor layer on the semiconductor layer.

Description

Method for manufacturing a multilayer structure using free control of crystal direction and a multilayer structure manufactured by the method

[0001] [Cross-reference to related applications]

[0002] This application claims priority to Korean Patent Application No. 10-2025-0003918 filed on January 10, 2025, the entire contents of which are incorporated by reference into this application.

[0003] The present invention relates to a method for manufacturing a multilayer structure using crystal direction free control and a multilayer structure manufactured by the method. More specifically, the invention relates to a method for manufacturing a multilayer structure using crystal direction free control that enables the formation of a multilayer structure by freely controlling the crystal direction of a semiconductor layer, and a multilayer structure manufactured by the method.

[0004] [National R&D projects that supported this invention]

[0005] [Project ID] 2710002790

[0006] [Assignment No.] 00257003

[0007] [Ministry Name] Ministry of Science and ICT

[0008] [Name of Project Management (Specialized) Agency] National Research Foundation of Korea

[0009] [Research Project Name] Development of Next-Generation Intelligent Semiconductor Technology (Devices)

[0010] [Project Title] Development of Low-Temperature Process-Based Fabrication Technology for Si / Ge Channel Top Application Devices for Next-Generation Large-Area 3D Monolithic Integration and Circuit / Architecture Implementation

[0011] [Name of Project Performing Organization] Korea University Industry-Academic Cooperation Foundation

[0012] [Research Period] 2024.01.01 ~ 2024.12.31

[0013] Through Silicon Via (TSV) and Monolithic 3D (M3D) are both 3D semiconductor integration technologies that play a very important role in improving the performance and integration density of semiconductors.

[0014] TSV is a technology that provides vertical connections between chips by drilling vertical holes in a wafer and filling them with metal to electrically connect the top chip and the bottom chip.

[0015] These TSVs support more I / O compared to conventional wire bonding and can reduce signal latency, power consumption, etc.

[0016] However, TSV has the problem that the process is complex and expensive.

[0017] Meanwhile, M3D is a 3D integration technology within a single wafer that forms semiconductor devices layer by layer and electrically connects them.

[0018] Unlike TSV, it is not necessary to drill separate vias, and since interlayer connections are made through ultrafine nano vias, more layers can be stacked compared to conventional methods, enabling higher integration density.

[0019] In M3D, the upper layer (upper component) is additionally formed after the lower layer (lower component) is completed; however, when manufacturing the upper component, a high-temperature process may be required, and there is a problem in that this high-temperature process degrades the performance of the lower component.

[0020] In addition, the structure in which layers are stacked on a single wafer has a problem in that heat generated from the upper stacked device is transferred to the lower device, causing a cumulative rise in device temperature that can adversely affect the reliability and performance of the entire system.

[0021] Meanwhile, when forming the upper device layer in the M3D structure, the single-crystal substrate of the lower device layer can be used as a seed for crystal growth.

[0022] Such seed-based crystallization technology can induce high-quality crystallization only around the seed region, and outside the seed region, there is a high possibility that the crystal structure will be formed as amorphous or polycrystalline due to density differences during crystallization. Consequently, high-quality devices can only be realized in some areas, which leads to the problem of not being able to efficiently utilize the entire area of ​​the silicon wafer.

[0023] In addition, when crystal growth begins in the seed region, the crystal direction of the upper device layer is determined by the crystal direction of the lower substrate (single crystal substrate), so there is a problem in that the crystal direction cannot be controlled.

[0024] The present invention has been devised to solve the conventional problems described above, and aims to provide a method for manufacturing a multilayer structure using crystal direction free control that enables the formation of a multilayer structure by freely controlling the crystal direction of a semiconductor layer, and a multilayer structure manufactured by said method.

[0025] A method for manufacturing a multilayer structure using free control of crystal direction according to an embodiment of the present invention for achieving the aforementioned purpose comprises: a substrate preparation step of preparing a substrate; a seed layer formation step of forming a seed layer on the substrate, wherein the seed layer is formed through an off-axis sputtering process in which the substrate is positioned off-axis from a target and then a sputtering process is performed; a semiconductor layer formation step of forming a semiconductor layer on the seed layer through an epitaxial process; and a step of sequentially repeating the formation of the seed layer and the semiconductor layer on the semiconductor layer.

[0026] In addition, in a method for manufacturing a multilayer structure using free control of crystal direction according to one embodiment of the present invention, the semiconductor layer formed on one of the seed layers is characterized by having a different crystal direction from the semiconductor layer formed on another seed layer depending on the forming material.

[0027] In addition, in a method for manufacturing a multilayer structure using crystal direction free control according to one embodiment of the present invention, the seed layer is characterized by being formed of magnesium oxide (MgO) or beryllium oxide (BeO).

[0028] In addition, in a method for manufacturing a multilayer structure using free control of crystal direction according to one embodiment of the present invention, the semiconductor layer is characterized by being formed from any one of a group IV material, a group III-V material, a two-dimensional material (2D materials), or an oxide semiconductor.

[0029] In addition, a method for manufacturing a multilayer structure using crystal direction free control according to another embodiment of the present invention for achieving the aforementioned purpose comprises: a substrate preparation step of preparing a substrate; a first seed layer formation step of forming a first seed layer on the substrate, wherein the first seed layer is formed through an off-axis sputtering process in which the substrate is positioned off-axis from a target and then a sputtering process is performed; a first semiconductor layer formation step of forming a first semiconductor layer on the first seed layer through an epitaxial process; an insulating layer formation step of forming an insulating layer on the first semiconductor layer; a second seed layer formation step of forming a second seed layer on the insulating layer through an off-axis sputtering process; and a second semiconductor layer formation step of forming a second semiconductor layer on the second seed layer through an epitaxial process.

[0030] In addition, in a method for manufacturing a multilayer structure using crystal direction free control according to another embodiment of the present invention, the first seed layer and the second seed layer are characterized by being formed of magnesium oxide (MgO) or beryllium oxide (BeO).

[0031] In addition, in a method for manufacturing a multilayer structure using free control of crystal direction according to another embodiment of the present invention, the second seed layer is characterized by being formed to have a crystal direction different from that of the first seed layer.

[0032] In addition, in a method for manufacturing a multilayer structure using free control of crystal direction according to another embodiment of the present invention, the second seed layer is characterized by being formed to have the same crystal direction as the first seed layer.

[0033] In addition, in a method for manufacturing a multilayer structure using crystal direction free control according to another embodiment of the present invention, the first semiconductor layer and the second semiconductor layer are characterized by being formed from any one of a group IV material, a group III-V material, a two-dimensional material (2D materials), or an oxide semiconductor.

[0034] In addition, in a method for manufacturing a multilayer structure using crystal direction free control according to another embodiment of the present invention, the insulating layer is characterized by being formed from any one of SiO2, Si3N4, HfO2, Al2O3, and ZrO2.

[0035] Specific details of other embodiments are included in "Specific details for implementing the invention" and the attached "drawings".

[0036] The advantages and / or features of the present invention and the methods for achieving them will become clear by referring to the various embodiments described below in detail together with the accompanying drawings.

[0037] However, it should be understood that the present invention is not limited to the configurations of each embodiment disclosed below, but may be implemented in various different forms, and that each embodiment disclosed in this specification is provided merely to make the disclosure of the present invention complete and to fully inform those skilled in the art of the scope of the present invention, and that the present invention is defined only by the scope of each claim of the claims.

[0038] According to the present invention, a multilayer structure can be formed by freely adjusting the crystal direction of a semiconductor layer, and the crystal direction of a seed layer formed below the insulating layer and a seed layer formed above the insulating layer can be independently controlled through the insulating layer, thereby enabling the realization of a high-performance, high-integration semiconductor device.

[0039] FIG. 1 is a drawing illustrating a method for manufacturing a multilayer structure using free control of the crystal direction according to one embodiment of the present invention.

[0040] Figure 2 is a diagram illustrating a general sputtering process.

[0041] Figure 3 is a diagram showing an exemplary material film formed through a general sputtering process.

[0042] Figure 4 is a diagram illustrating the off-axis sputtering process applied to the present invention.

[0043] FIG. 5 is a diagram exemplarily showing a material film formed through an off-sputtering process applied to the present invention.

[0044] FIGS. 6 and 7 are exemplary drawings showing a material film formed on a substrate through an off-axis sputtering process applied to the present invention.

[0045] FIGS. 8 to 10 are drawings illustrating exemplary multilayer structures manufactured according to a method for manufacturing a multilayer structure using free control of the crystal direction according to an embodiment of the present invention.

[0046] FIG. 11 is a flowchart illustrating a method for manufacturing a multilayer structure using crystal direction free control according to another embodiment of the present invention.

[0047] FIGS. 12 to 14 are drawings illustrating exemplary multilayer structures manufactured according to a method for manufacturing a multilayer structure using crystal direction free control according to another embodiment of the present invention.

[0048] Before describing the present invention in detail, it should be understood that the terms and words used in this specification should not be interpreted as being limited to their ordinary or dictionary meanings, and that the inventor of the present invention may appropriately define and use the concepts of various terms to best describe their invention, and furthermore, that these terms and words should be interpreted in a meaning and concept consistent with the technical spirit of the present invention.

[0049] In other words, it should be understood that the terms used in this specification are used merely to describe preferred embodiments of the present invention and are not intended to specifically limit the content of the present invention, and that these terms are defined in consideration of the various possibilities of the present invention.

[0050] In addition, it should be noted that in this specification, singular expressions may include plural expressions unless the context clearly indicates a different meaning, and that even if they are expressed in a similarly plural form, they may include the meaning of the singular.

[0051] Throughout this specification, where it is stated that a component "includes" another component, unless specifically stated otherwise, this may mean that it does not exclude any other component but may include any other component.

[0052] Furthermore, it should be noted that in cases where it is stated that a component "exists inside or is installed in connection with" another component, this component may be installed in direct connection or contact with the other component, or it may be installed at a certain distance apart, and in the case where it is installed at a certain distance apart, there may be a third component or means for fixing or connecting the component to the other component, and a description of this third component or means may be omitted.

[0053] On the other hand, if it is stated that one component is "directly connected" or "directly connected" to another component, it should be understood that there is no third component or means.

[0054] Likewise, other expressions describing the relationship between each component, such as “between” and “right between”, or “adjacent to” and “directly adjacent to”, should be interpreted as having the same intent.

[0055] In addition, it should be understood that in this specification, terms such as “one side,” “other side,” “one side,” “other side,” “first,” “second,” etc., are used to clearly distinguish one component from another component, and that the meaning of the component is not restricted by such terms.

[0056] In addition, position-related terms such as "up," "down," "left," and "right" used in this specification should be understood as indicating the relative position of the corresponding component in the drawing, and unless an absolute position is specified, these position-related terms should not be understood as referring to an absolute position.

[0057] Furthermore, it should be understood that in the specification of the present invention, terms such as “…part,” “…unit,” “module,” and “device,” when used, refer to a unit capable of handling one or more functions or operations, and that this may be implemented in hardware or software, or a combination of hardware and software.

[0058] Furthermore, in specifying the reference numerals for each component of each drawing in this specification, the same component has the same reference numeral even if it is shown in different drawings; that is, the same reference numeral throughout the specification indicates the same component.

[0059] In the drawings attached to this specification, the size, position, connection relationships, etc., of each component constituting the present invention may be described in a partially exaggerated, reduced, or omitted manner for the convenience of explanation or to sufficiently clearly convey the concept of the present invention, and therefore, the proportions or scale may not be strictly accurate.

[0060] In addition, in describing the present invention below, detailed descriptions of components that are deemed to unnecessarily obscure the essence of the invention, such as known technologies including prior art, may be omitted.

[0061]

[0062] Hereinafter, with reference to the attached drawings, a method for manufacturing a multilayer structure using free control of crystal direction according to a preferred embodiment of the present invention and a multilayer structure manufactured by said method will be described in detail.

[0063] FIG. 1 is a drawing illustrating a method for manufacturing a multilayer structure using free control of the crystal direction according to one embodiment of the present invention.

[0064] First, in step S10, a substrate (10) is prepared.

[0065] The substrate (10) may include a base film (13) and an insulating film (15). Here, the base film (13) may be made of silicon (Si), and the insulating film (15) may be amorphous silicon oxide (SiO). x It can be implemented as ), but is not limited to this.

[0066] In step S20, a seed layer (20) can be formed on the substrate (10) prepared in step S10 above.

[0067] In the above-mentioned step S20, the seed layer (20) can be formed through an off-axis sputtering process in which the substrate (10) is placed off-axis from the target (100) and then the sputtering process is performed.

[0068] A typical sputtering process is performed with the substrate (10) aligned (on-axis) directly below the target (100), as shown in FIG. 2.

[0069] In this way, when the sputtering process is performed with the substrate (10) and the target (100) aligned, the distribution of the deposited material is random as shown in FIG. 3 and it is difficult to control the direction.

[0070] On the other hand, the off-axis sputtering process applied to the present invention performs the sputtering process by arranging the target (100) and the substrate (10) in an off-axis direction without aligning them with each other, as shown in FIG. 4.

[0071] In this off-axis sputtering process, the incident angle and directionality of the deposition atoms are controlled so that the deposition atoms reaching the substrate surface are deposited at a specific angle, thereby allowing the in-plane (substrate plane direction) crystal direction of the thin film to be uniformly aligned as shown in Fig. 5.

[0072] In an embodiment of the present invention, the incident angle of the target material on the substrate (10) may be approximately 6.45° to 9.14°.

[0073] In addition, in an embodiment of the present invention, the target material for the substrate (10) may be formed of magnesium oxide (MgO) or beryllium oxide (BeO).

[0074] During the crystal growth process, the crystal is induced to grow toward a plane with low surface energy. Magnesium oxide (MgO) has a rock-salt structure, and beryllium oxide (BeO) has a hexagonal structure. The (001) plane of magnesium oxide (MgO) has an atomic arrangement in which magnesium (Mg) atoms and oxygen (O) atoms alternate, resulting in low surface energy.

[0075] Therefore, magnesium oxide (MgO) and beryllium oxide (BeO) have the characteristic of growing on an amorphous substrate in the (001) plane, which has the lowest surface energy, i.e., the vertical plane (out-of-plane).

[0076] That is, when a material film is formed through a non-sputtering process using magnesium oxide (MgO) or beryllium oxide (BeO), the in-plane crystal orientation can be controlled, but the out-of-plane plane is maintained as the (001) plane.

[0077] FIGS. 6 and 7 are exemplary drawings showing a material film formed on a substrate through an off-axis sputtering process applied to the present invention, wherein the insulating film (SiO₂) of the substrate (10) is shown in FIGS. 6 and 7. x The in-plane crystal direction of the material film formed on the substrate (10) is an insulating film (SiO2) regardless of the direction of the substrate (10) according to the sputtering direction. x It can be confirmed that most of the MgO crystals of the material film formed on ) are aligned in the

[0100] direction.

[0078] In addition, depending on the sputtering direction, an insulating film (SiO) is formed regardless of the orientation of the substrate (10). xIt can be confirmed that the out-of-plane plane of the material film formed on ) is formed as a (001) plane.

[0079] As mentioned above, a material film formed from magnesium oxide (MgO) or beryllium oxide (BeO) through a non-sputtering process is a highly crystalline thin film formed in a crystal direction desired by the producer, and can be used as a seed layer.

[0080] And the seed layer formed of magnesium oxide (MgO) or beryllium oxide (BeO) can serve as an interlayer dielectric (ILD) due to its characteristics such as high thermal conductivity and low dielectric constant.

[0081] In addition, a seed layer formed of magnesium oxide (MgO) or beryllium oxide (BeO) can control the crystal growth direction of the thin film deposited on top, suppress defects, and relieve stress.

[0082] Afterwards, in step S30, a semiconductor layer (30) can be formed on the seed layer (20) formed through the above-mentioned step S20.

[0083] In the above-mentioned step S30, the semiconductor layer (30) can be formed through an epitaxial process.

[0084] Since the semiconductor layer (30) formed through the above-described step S30 is formed through an epitaxial process on a highly crystalline seed layer (20), the crystal direction of the semiconductor layer (30) can be grown in the same crystal direction as the seed layer (20) or in a direction desired by the producer, and when the seed layer (20) is highly crystalline, the semiconductor layer (30) also has a high-quality crystal structure with few lattice defects or amorphous regions, thereby improving electrical and optical properties.

[0085] The semiconductor layer (30) formed through the above-described step S30 is a material capable of heterogeneous epitaxial growth with the seed layer (20), such as Si, Ge, Si x Ge1-x Group IV materials such as AlAs, GaAs, Al x Ga 1-x It can be formed from any one of group III-V materials such as AS, two-dimensional materials (2D materials), and oxide semiconductors, but is not limited thereto.

[0086] Afterwards, in step S40, a seed layer (20) and a semiconductor layer (30) can be sequentially and repeatedly formed on the semiconductor layer (30) formed through the above-mentioned step S30.

[0087] In the above-mentioned step S40, the seed layer (20) can be formed through a non-sputtering process, and the semiconductor layer (30) can be formed through an epitaxial process.

[0088] As described above, in one embodiment of the present invention, a multilayer structure can be formed by sequentially repeating the formation of a seed layer and a semiconductor layer.

[0089] FIGS. 8 and 9 are exemplary drawings showing a multilayer structure manufactured according to a method for manufacturing a multilayer structure using crystal direction free control according to an embodiment of the present invention. As shown in FIG. 8, if the process of forming a Si semiconductor layer on a seed layer formed of MgO is repeated sequentially, a multilayer structure can be formed in which the seed layer and the semiconductor layer have the same in-plane crystal direction. Here, due to crystallographic interactions and energetic stability between MgO and Si, the in-plane crystal direction of the Si semiconductor layer can be aligned with the in-plane crystal direction of the MgO seed layer.

[0090] And as shown in Fig. 9, when a Ge semiconductor layer is formed on a seed layer formed of MgO and a Si semiconductor layer is formed on a seed layer formed of MgO, the crystal direction of the semiconductor layer Ge is rotated 45° relative to the crystal direction of the seed layer MgO and aligned due to the difference in crystal structure and lattice constant between the seed layer MgO and the semiconductor layer Ge.

[0091] Here, the reason the crystal orientation of Ge is rotated 45° relative to MgO is to optimize lattice matching and minimize interfacial energy. When Ge is rotated 45° relative to the lattice arrangement of MgO, the

[0110] orientation of Ge aligns with the

[0100] orientation of MgO.

[0092] In this way, in one embodiment of the present invention, when a multilayer structure is formed by sequentially repeating the formation of a seed layer and a semiconductor layer, the semiconductor layer formed on one of the plurality of seed layers can be formed to have a different crystal orientation from the semiconductor layer formed on another seed layer depending on the forming material.

[0093] As described above, the method for manufacturing a multilayer structure using crystal direction free control according to one embodiment of the present invention is highly suitable for forming an NMOS (N-type MOS field-effect transistor) or PMOS (P-type MOS field-effect transistor) of the GAA (Gate All Around) structure shown in FIG. 10.

[0094] The GAA structure is an important structure in next-generation transistor design, in which the gate completely surrounds the channel.

[0095] This structure significantly improves power efficiency and performance by precisely controlling the current. Forming a GAA structure requires a very sophisticated process, and selective etching is one of the key technologies.

[0096] Etching selectivity indicates how much better a specific material is removed compared to another material during the etching process. The higher the selectivity, the more effectively one material is removed while the other is hardly damaged, making it possible to realize a precise structure.

[0097] Since the etching rate of the MgO seed layer with respect to water (H2O) is higher than that of semiconductor layers such as Si and Ge, it can be etched relatively easily by reaction with water (H2O). Due to this difference, the MgO seed layer can play an important role in protecting the semiconductor layer or maintaining its structure.

[0098] In forming a GAA structure, a portion of the sacrificial layer must be selectively removed while the remaining semiconductor layer region is left intact. Since MgO is easily etched by water, it can protect the semiconductor layer or serve as a guiding layer.

[0099] Therefore, the difference in etching selectivity between the MgO seed layer and the semiconductor layer during the selective etching process prevents excessive removal or damage to the semiconductor layer, thereby ensuring the uniformity and stability of the GAA structure.

[0100] Consequently, the multilayer structure produced by the present invention is suitable for forming a GAA structure without damaging the semiconductor layer.

[0101] FIG. 11 is a flowchart illustrating a method for manufacturing a multilayer structure using crystal direction free control according to another embodiment of the present invention.

[0102] First, in step S110, a substrate (10) is prepared.

[0103] Here, the substrate (10) may include a base film (13) and an insulating film (15). Here, the base film (13) may be made of silicon (Si), and the insulating film (15) may be amorphous silicon oxide (SiO). x It can be implemented as ), but is not limited to this.

[0104] In step S120, a first seed layer (20) can be formed on the substrate (10) prepared in step S110 above.

[0105] In the above-described step S120, the first seed layer (20) can be formed through an off-axis sputtering process in which the substrate (10) is placed off-axis from the target and then the sputtering process is performed.

[0106] In an embodiment of the present invention, the incident angle of the target material on the substrate (10) may be approximately 6.45° to 9.14°.

[0107] In addition, in an embodiment of the present invention, the target material for the substrate (10) may be formed of magnesium oxide (MgO) or beryllium oxide (BeO).

[0108] As mentioned above, a material film formed from magnesium oxide (MgO) or beryllium oxide (BeO) through a non-sputtering process is a highly crystalline thin film formed in a crystal direction desired by the producer, and can be used as a seed layer.

[0109] And a seed layer formed of magnesium oxide (MgO) or beryllium oxide (BeO) can serve as an ILD, and can control the crystal growth direction of the thin film deposited on top, suppress defects, and relieve stress.

[0110] Afterwards, in step S130, a first semiconductor layer (30) can be formed on the first seed layer (20) formed through the above-mentioned step S120.

[0111] In the above-mentioned step S130, the first semiconductor layer (30) can be formed through an epitaxial process.

[0112] Since the first semiconductor layer (30) formed through the above-described step S130 is formed through an epitaxial process on the highly crystalline first seed layer (20), the crystal direction of the first semiconductor layer (30) can be grown in the same crystal direction as the first seed layer (20) or in a direction desired by the producer.

[0113] The first semiconductor layer (30) formed through the above-described step S130 is a material capable of heterogeneous epitaxial growth with the first seed layer (20), such as Si, Ge, Si x Ge 1-x Group IV materials such as AlAs, GaAs, Al x Ga 1-x It can be formed from any one of group III-V materials such as AS, two-dimensional materials (2D materials), and oxide semiconductors, but is not limited thereto.

[0114] And in step S140, an insulating layer (40) can be formed on the first semiconductor layer (30) formed through the above-mentioned step S130.

[0115] The insulating layer (40) formed through the above-described step S140 performs an insulating function and plays a role in enabling the crystallization direction of the lower first seed layer (20) and the upper second seed layer (50) to be controlled independently.

[0116] The insulating layer (40) formed through the above-described step S140 may be formed from any one of SiO2, Si3N4, HfO2, Al2O3, and ZrO2, which are amorphous, polycrystalline, or single-crystal insulating materials, but is not limited thereto.

[0117] Subsequently, in step S150, a second seed layer (50) can be formed on the insulating layer (40) formed through the above-mentioned step S140.

[0118] In the above-described step S150, the second seed layer (50) can be formed through a non-sputtering process, similar to the first seed layer (20) of the above-described step S120.

[0119] The second seed layer (50) formed on the insulating layer (40) through the non-sputtering process in the above-described step S150 can be formed to have the same crystal direction as the first seed layer (20) formed through the above-described step S120, or can be formed to have a different crystal direction from the first seed layer (20).

[0120] Here, when the second seed layer (50) is formed to have a different crystal direction from the first seed layer (20), the second seed layer (50) can be formed to have a different crystal direction from the first seed layer (20) without interference from the first seed layer (20) by the insulating layer (40).

[0121] Subsequently, in step S160, a second semiconductor layer (60) can be formed on the second seed layer (50) formed through the above-mentioned step S150.

[0122] In the above-mentioned step S160, the second semiconductor layer (60) can be formed through an epitaxial process, just like the first semiconductor layer (30) in the above-mentioned step S130.

[0123] In the embodiment of the present invention, the case in which a first seed layer (20) and a first semiconductor layer (30) are each formed on the lower part of the insulating layer (40) and a second seed layer (50) and a second semiconductor layer (60) are each formed on the upper part of the insulating layer (40) has been described as an example; however, the first seed layer (20) and the first semiconductor layer (30) can be formed sequentially and repeatedly on the lower part of the insulating layer (40), and the second seed layer (50) and the second semiconductor layer (60) can be formed sequentially and repeatedly on the upper part of the insulating layer (40).

[0124] FIGS. 12 and 13 are exemplary drawings showing a multilayer structure manufactured according to a method for manufacturing a multilayer structure using free control of crystal direction according to another embodiment of the present invention. As shown in FIG. 12, a second seed layer (50) formed on top of an insulating layer (40) can be formed to have a different crystal direction from that of a first seed layer (20).

[0125] Accordingly, a multilayer structure can be formed in which the in-plane crystal direction of the first semiconductor layer (30) and the in-plane crystal direction of the second semiconductor layer (60) are different.

[0126] And as shown in FIG. 13, a plurality of first seed layers (20) and first semiconductor layers (30) formed below the insulating layer (40) can be formed, and a plurality of second seed layers (50) and second semiconductor layers (60) formed above the insulating layer (40) can be formed. Here, each second seed layer (50) can be formed to have a different crystal direction from the first seed layer (20), and a multilayer structure can be formed in which the in-plane crystal direction of the first semiconductor layer (30) and the in-plane crystal direction of the second semiconductor layer (60) are different from each other.

[0127] The control method of a multilayer structure using free control of the crystal direction according to another embodiment of the present invention of this configuration is very suitable for forming a CFET (Complementary Field-Effect Transistor) formed by vertically stacking NMOS and PMOS as shown in FIG. 13.

[0128] That is, as shown in FIG. 13, when a CFET is formed by vertically stacking an NMOS and a PMOS, the semiconductor layer is formed in the NMOS in a direction in which electrons can move well, and the semiconductor layer is formed in the PMOS in a direction in which holes can move well, thereby improving the characteristics of the semiconductor device.

[0129] In addition, a control method for a multilayer structure using free control of the crystal direction according to another embodiment of the present invention can implement a heterogeneous integrated structure by configuring the semiconductor layer into logic, memory, CIS (CMOS Image Sensor), etc., as shown in FIG. 14.

[0130] As such, according to the present invention, a target and a substrate are not aligned with each other but are arranged in an off-axis direction, and then a sputtering process is performed using magnesium oxide (MgO) or beryllium oxide (BeO) to form a highly crystalline seed layer, and a process of forming a semiconductor layer on the seed layer through an epitaxial process is repeated sequentially, thereby allowing the crystal direction of the semiconductor layer to be freely controlled to form a multilayer structure.

[0131] In addition, through the insulating layer, the crystal direction of the first seed layer formed at the bottom of the insulating layer and the second seed layer formed at the top of the insulating layer can be controlled independently.

[0132] Accordingly, the present invention enables the realization of high-performance, high-integration semiconductor devices.

[0133] Although various preferred embodiments of the present invention have been described above with some examples, the descriptions of various embodiments described in the "Specific details for carrying out the invention" section are merely illustrative, and those skilled in the art to which the present invention pertains will understand that the present invention can be modified in various ways or equivalent embodiments can be carried out based on the above description.

[0134] In addition, since the present invention can be implemented in various other forms, the present invention is not limited by the description above. The above description is provided merely to make the disclosure of the present invention complete and to fully inform those skilled in the art of the scope of the present invention, and it should be understood that the present invention is defined only by each claim of the claims.

[0135] [Explanation of the symbol]

[0136] 10. Substrate,

[0137] 13. Base membrane,

[0138] 15. Insulating film,

[0139] 20, 50. Seed layer,

[0140] 30, 60. Semiconductor layer,

[0141] 40. Insulating layer,

[0142] 100. Target

Claims

1. Substrate preparation step for preparing the substrate; A seed layer formation step comprising forming a seed layer on the substrate, wherein the seed layer is formed through an off-axis sputtering process in which the substrate is positioned off-axis from a target and then a sputtering process is performed; A semiconductor layer formation step of forming a semiconductor layer on the seed layer through an epitaxial process; and A method for manufacturing a multilayer structure using crystal direction free control, characterized by including the step of sequentially and repeatedly forming the seed layer and the semiconductor layer on the semiconductor layer.

2. In Paragraph 1, A method for manufacturing a multilayer structure using crystal direction free control, characterized in that a semiconductor layer formed on one of the seed layers is formed to have a different crystal direction from a semiconductor layer formed on another seed layer depending on the forming material.

3. In Paragraph 1, The above seed layer is, A method for manufacturing a multilayer structure using crystal orientation free control, characterized by being formed of magnesium oxide (MgO) or beryllium oxide (BeO).

4. In Paragraph 1, The above semiconductor layer is, A method for manufacturing a multilayer structure using crystal direction free control, characterized by being formed from any one of group IV materials, group III-V materials, two-dimensional materials (2D materials), and oxide semiconductors.

5. A method for forming a GAA (Gate All Around) structure in which the channel structure is wrapped in all directions by the gate by utilizing the difference in etching selectivity between the seed layer and the semiconductor layer in a multilayer structure formed by the manufacturing method of a multilayer structure using free control of the crystal direction described in any one of claims 1 to 4.

6. Substrate preparation step for preparing the substrate; A first seed layer formation step, wherein a first seed layer is formed on the substrate, and the first seed layer is formed through an off-axis sputtering process in which the substrate is positioned off-axis from the target and then a sputtering process is performed; A first semiconductor layer formation step of forming a first semiconductor layer on the first seed layer through an epitaxial process; An insulating layer forming step for forming an insulating layer on the first semiconductor layer; A second seed layer formation step of forming a second seed layer on the insulating layer through an off-sputtering process; and A method for manufacturing a multilayer structure using crystal direction free control, characterized by including a second semiconductor layer formation step of forming a second semiconductor layer on the second seed layer through an epitaxial process.

7. In Paragraph 6, The first seed layer and the second seed layer are A method for manufacturing a multilayer structure using crystal orientation free control, characterized by being formed of magnesium oxide (MgO) or beryllium oxide (BeO).

8. In Paragraph 6, The above second seed layer is, A method for manufacturing a multilayer structure using crystal direction free control, characterized by being formed to have a crystal direction different from the first seed layer.

9. In Paragraph 6, The above second seed layer is, A method for manufacturing a multilayer structure using crystal direction free control, characterized by being formed to have the same crystal direction as the first seed layer.

10. In Paragraph 6, The first semiconductor layer and the second semiconductor layer are A method for manufacturing a multilayer structure using crystal direction free control, characterized by being formed from any one of group IV materials, group III-V materials, two-dimensional materials (2D materials), and oxide semiconductors.

11. In Paragraph 6, The above insulating layer is, A method for manufacturing a multilayer structure using crystal direction free control, characterized by being formed from any one of SiO2, Si3N4, HfO2, Al2O3, and ZrO2.

12. A multilayer structure manufactured by a method for manufacturing a multilayer structure using free control of the crystal direction described in any one of claims 1 to 4 and claims 6 to 11.

Images