Nanoinformatics TRIZ Cases

Selective oxidation forms dielectric layers on nanowire sidewalls to reduce parasitic capacitance in horizontal gate-all-around transistors.

Fluorine surfactant gradient lowers mold release force, resolving pattern defects during photo-nanoimprint demolding.

A semiconductor process forms NVM cells and logic transistors using metal nanocrystals and high-k gate dielectrics.

Gate-all-around nanowires improve electrostatic control during aggressive gate length scaling.

A carbazole compound with high electron affinity acts as a charge blocking layer in photoelectric conversion devices.

Single crystal silicon pellicles overcome low transmittance and oxidation issues in EUV lithography through porous support structures.

A measurement device detects mold and substrate marks in a non-contact state to enable precise alignment control.

Non-selective etch creates metal gate cuts and recessed power rails, resolving accuracy issues in conventional mask-based decoupling methods.

Segmented gates and insulating material isolate quantum dots in a well stack, resolving the trade-off between precise control and array scalability.

Scanning an alignment radiation beam detects intensity changes from template marks to resolve manufacturing cost and precision trade-offs.

A doped nucleation layer enables selective backside silicon etching to isolate nanoribbon sub-fins in advanced integrated circuit structures.

Antiparallel shield structure decouples electroplated layers from ferromagnetic films to minimize hysteresis and reduce noise during read operations.

Segmented inner spacers resolve manufacturing precision limits to improve semiconductor reliability.

Segmented metal silicide liners reduce middle-of-line contact resistance in advanced CMOS devices without increasing device complexity.

Two-phase thermal synthesis produces cadmium sulfide quantum dots with narrow size distribution and high photoluminescence efficiency.

A bulk heterojunction layer combines a polymer n-type semiconductor with a fullerene network and a low molecular weight p-type material.

Chemical mechanical polishing and etching back interlayer dielectrics improve thickness uniformity of isolation layers in vertical semiconductor devices.

A composite electron injection layer uses crown ether-grafted conjugated polymers to facilitate charge transport.

Segmented absorber layers reduce critical dimension bias during extreme ultraviolet mask fabrication.

Titanium nitride resonators suppress parasitic two-level systems to maintain high quality factors at low field levels.

Dissimilar materials enable Seebeck-driven heat redistribution, allowing precise hot spot positioning within nanoheaters for thermal recording.

Tunneling field effect transistors replace thermionic emission with quantum tunneling, achieving subthreshold swings below 60 millivolts per decade.

Sweeping a temperature zone across self-assembled polymer layers reduces defect rates caused by incomplete alignment during annealing.