An asset server shares a single graphics texture with multiple applications to reduce memory redundancy in the graphics processor.
Key-based transactional memory conflict detection uses customizable sets to group memory locations logically.
A hardware synchronous engine executes synchronization primitives via unified shared memory to accelerate parallel processing.
Subdividing a hash chain into subchains enables concurrent processing that reduces copy overhead while maintaining data integrity across version updates.
A read write lock mechanism tracks active reader processes using named event objects to maintain synchronization accuracy.
Address table mechanism updates specific memory locations across interconnected computers, reducing network traffic and improving computing speed.
Conversion blocks translate exclusive access commands between PCIe and AXI specifications, enabling secure resource sharing across different bus architectures.
Augmenting speculative lock elision with hardware interrupts and a lock predictor cache reduces transactional abort rates caused by resource contention.
Synchronization module controls compute and exchange phases across processing units using a common clock for deterministic data transmission.
A method detects enqueue failures by monitoring queue states to determine likely causes for unsuccessful request processing.