An n-doped substrate and control electrode improve charge extraction, signal-to-noise ratio, and high-temperature TOF sensing.
A back-side reflector and flip-chip assembly boost long-wavelength APD sensitivity while preserving fast response in a thin silicon substrate.
Back-mounted electronics and a molding base shrink a multi-lens camera module while limiting deformation and contamination in thin devices.
Rear-mounted components and integral molding shrink camera module footprint while isolating interference and preserving thermal reliability.
CMOS avalanche photon arrays use quenching elements and optical trenches to detect single photons with lower crosstalk, dark current, and cost.
A field-reduction layer and deep pixel isolation suppress edge breakdowns in APD arrays while preserving fill factor and small-pixel sensitivity.
Segmented solder and conductive areas shrink CMOS camera module width while preserving electrical connection in compact portable devices.
A single package combines visible, NIR, and SWIR sensor arrays with shared optics and processing to cut size, power, and cost in near-eye imaging.
Using low-index and high-k isolation layers, this case cuts pixel cross-talk and noise while keeping deep isolation manufacturable.
Symmetric transfer and drainage MOS transistor placement equalizes charge transfer paths, improving distance measurement accuracy.
A stacked APD layout places the anode between the cathode and isolation region to cut crosstalk and dark count rate in photon detection.
Tapered reflective light pipes and microlenses widen pixel light acceptance angles while preserving resolution and limiting crosstalk.
Electrically non-conductive isolation walls separate pixel regions to suppress cross-talk and support smaller-pixel image sensors.
Multiple trench capacitor contact points reduce parasitic capacitance and contact resistance variation in miniaturized imaging pixels.
A rigid reinforcement substrate with a yield point limits bending in flexible radiation detectors, preventing conversion layer detachment.
By switching dummy pixels in parallel with a target pixel, the sensor adjusts amplifier gain through input capacitance without added capacitors.
Segmented deep isolation extensions between adjacent photoelectric regions improve charge transfer and boost pixel charge storage in CMOS sensors.
Pixel openings in an insulating layer isolate detector pixels without etching the absorber, cutting damage, defects, and SWIR detector cost.
A vertically stacked bypass capacitor layer removes discrete capacitors and wire bonds, cutting FPA size, heat load, and signal loss.
Oxide semiconductor amplification in a stacked pixel circuit improves pixel signal transfer from photoelectric films while limiting manufacturing cost.
A stacked substrate layout with a penetrating transmission gate shortens signal paths to cut pixel noise and preserve photoelectric conversion efficiency.
Changing vertical gate electrode diameter with depth strengthens the electric field and improves charge readout from deep substrate regions.
A temporary handle and adhesive interlayer enable collective transfer and precise bending of microelectronic components onto curved supports.
A split pixel array uses a feedback region for run-time ToF calibration, improving depth accuracy while limiting sensor size and power use.
Different silicon nitride film stress and thickness reduce stacked substrate warpage, preventing bonding voids and misalignment.
Photodiodes at two depths share charge accumulation paths to preserve dual-direction focus detection while increasing saturation charge.
Varying insulating-layer thickness across segmented photoelectric conversion regions enables full charge depletion, cleaner transfer, and lower kTC noise.
A second organic compound layer improves hole transfer while blocking electron backflow, boosting sensitivity, response speed, and noise control.
A light-shield and color-filter layout smooths pixel-density transitions between display areas, reducing visible boundaries without complicating fabrication.