Chip pin multiplexing circuit and method

Abstract

The present invention relates to the field of chip design, and specifically discloses a chip pin multiplexing circuit and method. By setting a general function control unit, a special function control unit and other function modules, the multiplexed pins can be used as normal functions at any time; when a special function is needed, such as an online debugging function, after connecting a hardware debugger, it can be switched to the debugging function, and the running code will not affect the debugging signal and function; after the debugging is completed, after removing the hardware debugger, it can be restored to the normal function. The beneficial effect is: the chip pin multiplexing is realized, which not only saves pin resources, but also does not affect the use of normal functions.

Description

Technical Field

[0001] The present invention relates to the field of chip design, and in particular to a chip pin multiplexing circuit and method. Background Art

[0002] In the chip design process, the pins of the chip are a scarce resource, so multiple functions need to be multiplexed on the same pin. Normally, a pin can only multiplex one function at the same time, such as GPIO (general purpose input and output), ADC (analog-to-digital converter), CMP (single chip multiprocessor), etc., but in some special scenarios, it is necessary to multiplex two or more functions on the same pin, such as online debugging function. There are several methods of pin multiplexing at present: 1. Some pins are fixedly used as online debugging function, which will waste pin resources; 2. Some pins are multiplexed for online debugging and other functions. When the system starts, the online debugging function is used by default. The software can switch these pins to other functions as needed. Although this method will save pin resources, the system starts by default and the online debugging function cannot be used for other functions. After the software switches the function, debugging cannot be performed; 3. Some pins are multiplexed for online debugging and other functions. When the system starts, it determines whether to multiplex the online debugging function according to the level state of the pin. Although this method also saves pin resources, there are requirements for the level of these pins when the system starts, which affects the normal function use, and the debugging function cannot be switched after the system starts. Summary of the invention

[0003] The present invention provides a chip pin multiplexing circuit and method, and solves the technical problem that the existing pin multiplexing method wastes pin resources and affects the use of normal functions. In order to solve the above technical problems, the present invention provides a chip pin multiplexing circuit, including a multiplexing pin, one end of the multiplexing pin is connected to a general function control unit, and the other end is connected to a special function control unit, and the general function control unit is connected to the special function control unit;

[0004] The multiplexed pin is used to connect to an external device and receive general function signals and special function signals;

[0005] The universal function control unit is used to detect the universal function signal input and control whether to output the universal function signal;

[0006] The special function control unit is used to detect the input of the special function signal and control whether to output the special function signal.

[0007] Further, the general function control unit includes: an input unit connected to the multiplexing pin, a first output unit, a first output control switch connected to the first output unit, and the first output control switch is also connected to the multiplexing pin;

[0008] The input unit is used to detect the level value on the multiplexed pin at any time and store the level value;

[0009] The first output unit is used to store a first output level and output the first output level to the first output control switch and the special function control unit;

[0010] The first output control switch is used to determine whether the general function signal is allowed to be output according to the first output level.

[0011] Further, the special function control unit includes: an operation unit connected to the multiplexing pin and the first output unit, an input detection unit connected to the operation unit, a second output unit, a second output control switch connected to the second output unit, and the second output control switch is also connected to the multiplexing pin;

[0012] The operation unit is used to calculate the difference between the multiplexed pin level and the first output level, and compare the difference with the first output level to determine whether a special function signal is input;

[0013] The input detection unit is used to detect the level value of the operation unit at any time and store the level value;

[0014] The second output unit is used to store the second output level and output the second output level to the second output control switch;

[0015] The second output control switch is used to determine whether the special function signal is allowed to be output according to the second output level.

[0016] Furthermore, the input unit includes a Schmitt trigger, and a first input data register connected to the Schmitt trigger;

[0017] The first output unit includes a first output data register, and a first output driving circuit connected to the first output data register;

[0018] The Schmitt trigger is used to detect the level value on the multiplexed pin at any time and store the level value in the first input data register;

[0019] The first output data register is used to store the first output level;

[0020] The first output driving circuit is used to output the first output level to the first output control switch.

[0021] Furthermore, the input detection unit includes a Schmitt trigger, and a second input data register connected to the Schmitt trigger;

[0022] The output unit includes a second output data register, and a second output driving circuit connected to the second output data register;

[0023] The Schmitt trigger is used to detect the level value on the operation unit at any time and store the level value in the second input data register;

[0024] The second output data register is used to store the second output level;

[0025] The second output driving circuit is used to output the second output level to the second output control switch.

[0026] Furthermore, when the difference between the difference and the first output level is greater than a first numerical value, the input detection unit determines that a special function signal high level input is present; when the difference between the general function unit output level and the difference is less than a second numerical value, the input detection unit determines that a special function signal low level input is present. The first numerical value and the second numerical value are configured through a chip register, and the effective range is 1V to 3V.

[0027] Furthermore, the general function control unit and the special function control unit are also connected to other functional modules, and the other functional modules include but are not limited to GPIO general input / output port, ADC digital-to-analog converter, UART universal asynchronous receiver-transmitter, and I2C bus.

[0028] The present invention also provides a chip pin multiplexing method, characterized in that it comprises the steps of:

[0029] S1. The general function control unit detects the level value of the multiplexed pin to determine whether the general function signal is input, and the special function control unit detects the level value of the multiplexed pin to determine whether the special function signal is input;

[0030] S2. If the special function control unit determines that a special function signal is input at a high level, the process jumps to step S4. If the general function control unit determines that a general function signal is input, and the special control unit determines that a special function signal is input at a low level, the process jumps to step S3.

[0031] S3. The first output control switch controls the output of the general function signal. At the same time, the operation unit calculates the difference between the multiplexed pin level and the first output level, and compares the difference with the first output level to determine whether there is a high-level input of a special function signal. If there is a high-level input of a special function signal, the process jumps to step S4. If there is a low-level input of a special function signal, the general function control unit maintains the output of the general function signal.

[0032] S4. The second output control switch receives the second output level and controls the output of the special function signal, while the first output control switch controls the general function signal to prohibit output;

[0033] S5. When the special function signal is outputted, the second output control switch prohibits the special function signal from being outputted, while the first output control switch allows the general function signal to be outputted.

[0034] Further, when the difference between the difference and the output level value of the general function unit is greater than a first value, the input detection unit determines that a special function signal has a high level input; when the difference between the output level of the general function unit and the difference is less than a second value, the input detection unit determines that a special function signal has a low level input, and the first value and the second value are configured through the chip register, and the effective range is 1V to 3V.

[0035] The present invention provides a chip pin multiplexing circuit and method. By setting a general function control unit, a special function control unit and other function modules, the multiplexed pins can be used as normal functions at any time; when a special function is needed, such as an online debugging function, after connecting a hardware debugger, it can be switched to the debugging function, and the running code will not affect the debugging signal and function; after the debugging is completed, after removing the hardware debugger, it can be restored to the normal function. The beneficial effect is: the chip pin multiplexing is realized, which not only saves pin resources, but also does not affect the use of normal functions. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 A chip pin multiplexing circuit structure diagram provided by an embodiment of the present invention;

[0037] Figure 2 A circuit structure diagram of an input unit provided in an embodiment of the present invention;

[0038] Figure 3 A circuit structure diagram of a first output unit provided in an embodiment of the present invention;

[0039] Figure 4 A circuit structure diagram of an input detection unit provided in an embodiment of the present invention;

[0040] Figure 5 A circuit structure diagram of a second output unit provided in an embodiment of the present invention;

[0041] Figure 6 A flow chart of a chip pin multiplexing method provided by an embodiment of the present invention;

[0042] Figure 7 A diagram of a general function usage scenario provided by an embodiment of the present invention;

[0043] Figure 8 A diagram of a usage scenario of a special function provided by an embodiment of the present invention; DETAILED DESCRIPTION

[0044] The following specifically illustrates the implementation mode of the present invention in conjunction with the accompanying drawings. The embodiments are provided for illustrative purposes only and cannot be understood as limiting the present invention. The accompanying drawings are provided for reference and illustration only and do not constitute a limitation on the scope of patent protection of the present invention, because many changes can be made to the present invention without departing from the spirit and scope of the present invention.

[0045] like Figure 1 As shown, a chip pin multiplexing circuit structure diagram provided in an embodiment of the present invention includes a multiplexing pin, one end of the multiplexing pin is connected to a general function control unit, and the other end is connected to a special function control unit, the general function control unit is connected to the special function control unit, and the general function control unit and the special function control unit are also connected to other functional modules.

[0046] The universal function control unit includes: an input unit connected to the multiplexing pin, a first output unit, and a first output control switch connected to the first output unit, wherein the first output control switch is also connected to the multiplexing pin.

[0047] The special function control unit includes: an operation unit connected to the multiplexing pin and the first output unit, an input detection unit connected to the operation unit, a second output unit, and a second output control switch connected to the second output unit, and the second output control switch is also connected to the multiplexing pin.

[0048] Figure 2 FIG. 1 is a circuit diagram of an input unit in a universal function control unit, wherein the input unit includes a Schmitt trigger and a first input data register connected to the Schmitt trigger. Figure 3 As shown, the first output unit includes a first output data register and a first output driving circuit connected to the first output data register.

[0049] Figure 4FIG. 1 is a circuit diagram of an input detection unit of a special function control unit, wherein the input detection unit includes a Schmitt trigger and a second input data register connected to the Schmitt trigger. Figure 5 As shown, the output unit includes a second output data register and a second output driving circuit connected to the second output data register.

[0050] The general function control unit can detect the level value on the pin at any time through the Schmitt trigger (whose trigger level can be configured through the chip register) and store it in the first input data register of the chip; through the first output drive circuit, the first output level can be output to the pin according to the first output level stored in the first output register, and the first output control switch can control whether to allow the output of the general function signal according to the value of the first output level (the value can be determined according to requirements). When the multiplexed pin is used as a general function output, the first output control switch can turn on the output function; when the multiplexed pin is used for general function input, special function input or special function output, the output function can be turned off.

[0051] The special function control unit includes a similar structure, and can detect the level value on the multiplexed pin at any time through a Schmitt trigger (whose trigger level can be configured through a chip register) and store it in the second input data register. Unlike the general function control unit, the special function control unit includes an additional calculation unit, which can calculate the difference (denoted as Vsi) between the pin level and the general function unit output level (denoted as Vgo), so that when the general function unit output is enabled, the input signal for the special function on the pin (such as the debug signal sent by the debugger) can also be correctly received.

[0052] When Vsi is greater than a certain value of Vgo (this value can be configured through the chip register, and the effective range is 1V to 3V), it is considered that there is a high-level input of a special function signal;

[0053] When Vsi is less than a certain value of Vgo (this value can be configured through the chip register, and the valid range is 1V~3V), it is considered that there is a low-level input of a special function signal.

[0054] Through the second output driving circuit, the second output level can be output to the pin according to the second output level stored in the second output register. The second output control switch can control whether to allow the output of the special function signal according to the value of the second output level (the value can be determined according to the requirements). When the multiplexed pin is used as a special function output, the second output control switch can turn on the output function. When the multiplexed pin is used for special function input, general function input or general function output, the output function can be turned off. When the output is enabled, the output function of the general function control unit can also be disabled by controlling the output control signal of the general function control unit so that the correct signal can be output to the outside world.

[0055] The output enabling scenarios of the general function control unit and the special function control unit are shown in Table 1:

[0056] Table 1

[0057]

[0058] Both the general function control unit and the special function control unit can cooperate with other function modules to complete more complex functions, such as adding a debugger for debugger debugging.

[0059] like Figure 6 As shown, a flow chart of a chip pin multiplexing method provided by an embodiment of the present invention includes the following steps:

[0060] S1. The general function control unit detects the level value of the multiplexed pin to determine whether the general function signal is input, and the special function control unit detects the level value of the multiplexed pin to determine whether the special function signal is input;

[0061] S2. If the special function control unit determines that a special function signal is input at a high level, the process jumps to step S4. If the general function control unit determines that a general function signal is input, and the special control unit determines that a special function signal is input at a low level, the process jumps to step S3.

[0062] S3. The first output control switch controls the output of the general function signal. At the same time, the operation unit calculates the difference between the multiplexed pin level and the first output level, and compares the difference with the first output level to determine whether there is a high-level input of a special function signal. If there is a high-level input of a special function signal, the process jumps to step S4. If there is a low-level input of a special function signal, the general function control unit maintains the output of the general function signal.

[0063] S4. The second output control switch receives the second output level and controls the output of the special function signal, while the first output control switch controls the general function signal to prohibit output;

[0064] S5. When the special function signal is outputted, the second output control switch prohibits the special function signal from being outputted, while the first output control switch allows the general function signal to be outputted.

[0065] When the difference between the difference and the output level value of the general function unit is greater than a first value, the input detection unit determines that a special function signal has a high level input; when the difference between the output level of the general function unit and the difference is less than a second value, the input detection unit determines that a special function signal has a low level input. The first and second values ​​are configured through the chip register, and the effective range is 1V to 3V.

[0066] Through the present invention, at any time when the general function control unit is working normally, an external device (such as a hardware debugger) can send specific information (such as a customized high, low, high, low pulse, which can be regarded as a communication protocol and defined by the special function module) to the special function control unit to activate the special function control unit. When the special function control unit recognizes the protocol information defined by the special function module, the output of the general function control unit can be disabled so that it can correctly output a signal that can be recognized by the outside world.

[0067] Embodiment 1

[0068] Taking the MCU online debugging function as an example, the invention allows the chip to enter the debugging state at any time and automatically releases the pin occupation after the debugging is completed.

[0069] a) When the general function control unit is in input mode:

[0070] i. The special function control unit is also in input mode. In this mode, the unit receives and analyzes the input signal on the multiplexed pin in real time to determine whether there is a signal and protocol input related to online debugging. At this time, the special function control unit directly detects whether there is a signal and protocol input related to online debugging, and the operation unit does not need to calculate the difference;

[0071] ii. If the protocol input is parsed, the special function control unit switches the multiplexed pin (not limited to this pin) to output mode to facilitate protocol communication with the debugger;

[0072] iii. After the output is completed, disable the output mode of the special function control unit so as not to affect the general function.

[0073] b) When the general function control unit is in output mode:

[0074] i. The special function control unit is in input mode. In this mode, the unit receives and analyzes the input signal on the multiplexed pin in real time, and compares it with the output level of the general function control unit to determine whether there is any signal and protocol input related to online debugging;

[0075] ii. If the protocol input is parsed, the special function control unit switches the multiplexed pin (not limited to this pin) to output mode. If necessary, the output function of the general function control unit can be disabled to facilitate protocol communication with the debugger;

[0076] iii. After the output is completed, disable the output mode of the special function control unit, and then unlock the output function of the general function so as not to affect the general function.

[0077] The above scenario can be used for Figure 7 and Figure 8 In the technical solution shown, when functioning normally, the two pins can be used as general GPIO outputs to control the LED lights; when online debugging is required, a hardware debugger is connected, and a protocol (defined by the chip) is input on the pins to turn off the general GPIO output function and support the debugger function instead.

[0078] The present invention provides a chip pin multiplexing circuit and method. By setting a general function control unit, a special function control unit and other function modules, the multiplexed pins can be used as normal functions at any time; when a special function is needed, such as an online debugging function, after connecting a hardware debugger, it can be switched to the debugging function, and the running code will not affect the debugging signal and function; after the debugging is completed, after removing the hardware debugger, it can be restored to the normal function. The beneficial effect is: the chip pin multiplexing is realized, which not only saves pin resources, but also does not affect the use of normal functions.

[0079] The above embodiments are preferred implementation modes of the present invention, but the implementation modes of the present invention are not limited to the above embodiments. Any other changes, modifications, substitutions, combinations, and simplifications that do not deviate from the spirit and principles of the present invention should be equivalent replacement methods and are included in the protection scope of the present invention.

Claims

1. A chip pin multiplexing circuit, characterized in that: It includes a multiplexing pin, one end of which is connected to a general function control unit, and the other end of which is connected to a special function control unit, and the general function control unit is connected to the special function control unit; The multiplexed pin is used to connect to an external device and receive general function signals and special function signals; The universal function control unit is used to detect the universal function signal input and control whether to output the universal function signal; The special function control unit is used to detect the input of the special function signal and control whether to output the special function signal; The universal function control unit comprises: an input unit connected to the multiplexing pin, a first output unit, a first output control switch connected to the first output unit, and the first output control switch is also connected to the multiplexing pin; The input unit is used to detect the level value on the multiplexed pin at any time and store the level value; The first output unit is used to store a first output level and output the first output level to the first output control switch and the special function control unit; The first output control switch is used to determine whether the general function signal is allowed to be output according to the first output level; The special function control unit includes: an operation unit connected to the multiplexing pin and the first output unit, an input detection unit connected to the operation unit, a second output unit, and a second output control switch connected to the second output unit, wherein the second output control switch is also connected to the multiplexing pin; The operation unit is used to calculate the difference between the multiplexed pin level and the first output level, and compare the difference with the first output level to determine whether a special function signal is input; The input detection unit is used to detect the level value of the operation unit at any time and store the level value; The second output unit is used to store the second output level and output the second output level to the second output control switch; The second output control switch is used to determine whether the special function signal is allowed to be output according to the second output level; When the special function control unit identifies the protocol information defined by the special function module, the output of the general function control unit is disabled.

2. A chip pin multiplexing circuit as claimed in claim 1, characterized in that: The input unit includes a Schmitt trigger and a first input data register connected to the Schmitt trigger; The first output unit includes a first output data register, and a first output driving circuit connected to the first output data register; The Schmitt trigger is used to detect the level value on the multiplexed pin at any time and store the level value in the first input data register; The first output data register is used to store the first output level; The first output driving circuit is used to output the first output level to the first output control switch.

3. A chip pin multiplexing circuit as claimed in claim 2, characterized in that: The input detection unit includes a Schmitt trigger, and a second input data register connected to the Schmitt trigger; The output unit includes a second output data register, and a second output driving circuit connected to the second output data register; The Schmitt trigger is used to detect the level value on the operation unit at any time and store the level value in the second input data register; The second output data register is used to store the second output level; The second output driving circuit is used to output the second output level to the second output control switch.

4. A chip pin multiplexing circuit as claimed in claim 1, characterized in that: When the difference between the difference and the first output level is greater than a first value, the input detection unit determines that a special function signal has a high level input; when the difference between the general function unit output level and the difference is less than a second value, the input detection unit determines that a special function signal has a low level input. The first and second values ​​are configured through the chip register, and the effective range is 1V~3V.

5. A chip pin multiplexing circuit as claimed in claim 1, characterized in that: The general function control unit and the special function control unit are also connected to other function modules, which include GPIO general input / output port, ADC digital-to-analog converter, UART universal asynchronous receiver-transmitter, and I2C bus.

6. A chip pin multiplexing method, characterized in that: The method is applied to the chip pin multiplexing circuit as claimed in any one of claims 1 to 5, comprising the following steps: S1. The general function control unit detects the level value of the multiplexed pin to determine whether the general function signal is input, and the special function control unit detects the level value of the multiplexed pin to determine whether the special function signal is input; S2. If the special function control unit determines that a special function signal is input at a high level, the process jumps to step S4. If the general function control unit determines that a general function signal is input, and the special control unit determines that a special function signal is input at a low level, the process jumps to step S3. S3. The first output control switch controls the output of the general function signal. At the same time, the operation unit calculates the difference between the multiplexed pin level and the first output level, and compares the difference with the first output level to determine whether there is a high-level input of a special function signal. If there is a high-level input of a special function signal, the process jumps to step S4. If there is a low-level input of a special function signal, the general function control unit maintains the output of the general function signal. S4. The second output control switch receives the second output level and controls the output of the special function signal, while the first output control switch controls the general function signal to prohibit output; S5. When the special function signal is outputted, the second output control switch prohibits the special function signal from being outputted, while the first output control switch allows the general function signal to be outputted.

7. A chip pin multiplexing method as claimed in claim 6, characterized in that: When the difference between the difference and the output level value of the general function unit is greater than a first value, the input detection unit determines that a special function signal has a high level input; when the difference between the output level of the general function unit and the difference is less than a second value, the input detection unit determines that a special function signal has a low level input. The first and second values ​​are configured through the chip register, and the effective range is 1V~3V.

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