Phase / frequency tracking transceiver

Abstract

A radio frequency (RF) transceiver includes a reference signal source to generate a reference signal, a local RF source to generate a local RF signal, and a mixed signal phase / frequency detector to compare the reference signal to the local RF signal and generate a difference signal from the comparison, wherein the difference signal includes a modulation component and an error component. The transceiver further includes a receiver front end to receive an angle modulated RF signal and downconvert the angle modulated RF signal to a baseband signal, and a quadrature modulator configured to angle modulate the reference signal source with the baseband signal.

Description

Technical Field

[0001] This disclosure relates to phase / frequency tracking radio frequency transceivers, and in particular, to low-power transceivers for constant envelope modulation standards. Background Technology

[0002] Constant envelope phase / frequency modulation standards (e.g., Bluetooth Low Energy (BLE) and IEEE 802.15.4 ZigBee) are optimized for low power consumption, cost, and complexity in wireless connectivity, and these modulation standards have enabled the deployment of wireless Internet of Things (IoT) technologies. A key component of IoT chipsets is the radio transceiver (TRX), where power consumption significantly impacts battery life.

[0003] Conventional methods on the receiver (RX) side use a digital / voltage-controlled oscillator (D / VCO) as the local oscillator (LO) in a narrow-bandwidth analog phase-locked loop (APLL) to track the frequency of the received radio frequency (RF) carrier. The control voltage generated for the D / VCO includes frequencies outside the loop bandwidth corresponding to the phase modulation on the RF carrier, which can be demodulated to recover the received data. However, this RX topology suffers from frequency pulling from strong interference and poor sensitivity from phase noise from the down-conversion LO. On the transmitter (TX) side, conventional methods use a D / VCO in a digital PLL (DPLL) to lock the D / VCO to a multiple of the stable reference oscillator frequency. This method requires a wide-bandwidth loop to modulate the D / VCO with the TX data, which increases phase noise. Furthermore, these methods do not provide the phase coherence required for some applications, such as high-precision distance measurement (HADM) in the Bluetooth standard, when switching between RX and TX modes. Summary of the Invention

[0004] This disclosure describes exemplary apparatus, systems, and methods for coherent reception and transmission of constant envelope radio frequency signals in a phase / frequency transceiver.

[0005] In one example, a radio frequency (RF) transceiver includes: a reference signal source configured to generate a reference signal; a local RF source configured to generate a local RF signal; and a mixed-signal phase / frequency detector configured to compare the reference signal with the local RF signal and generate a difference signal based on the comparison, wherein the difference signal includes a modulation component and an error component.

[0006] In one example, the RF transceiver further includes: a receiver front end configured to receive an angle-modulated RF signal and down-convert the angle-modulated RF signal to a baseband signal; and a quadrature modulator coupled to the receiver front end and a reference signal source, wherein the quadrature modulator is configured to angle-modulate the reference signal source with the baseband signal.

[0007] In one example of an RF transceiver, the mixed-signal phase / frequency detector includes a fractional-N type Δ-Σ phase / frequency detector (ΔΣ-PFD) configured to divide a local RF signal, wherein the difference signal is obtained by comparing the zero-crossing point of an angle-modulated reference signal with the zero-crossing point of the divided local RF signal, and wherein the modulation component includes a digitized baseband signal and the error component includes a fractional control sequence.

[0008] In one example of an RF transceiver, the local RF source includes a digitally controlled oscillator (DCO), and the RF transceiver also includes: an adder coupled to a ΔΣ-PFD, wherein the adder is configured to generate a digital frequency error based on the difference between a fractional control sequence and a fractional control number; an accumulator coupled to the adder, wherein the accumulator is configured to generate a digital phase error based on the digital frequency error; and a digital loop filter (DLF), wherein the DLF is configured to select a digital phase error suitable for phase-locking the DCO to a reference signal.

[0009] In one example, the RF transceiver also includes a digital demodulator coupled to a ΔΣ-PFD, wherein the digital demodulator is configured to decode the digitized baseband signal to recover the stream of received data bits.

[0010] In one example of an RF transceiver, the local RF source includes a digitally controlled oscillator (DCO) configured to be angle-modulated by a digitized baseband signal.

[0011] In one example of an RF transceiver, the mixed-signal phase / frequency detector includes a fractional-N type Δ-Σ phase / frequency detector (ΔΣ-PFD) configured to divide an angle-modulated local RF signal, wherein the difference signal is obtained by comparing the zero-crossing point of a reference signal with the zero-crossing point of the angle-modulated local RF signal, and wherein the modulation component includes a digitized baseband signal and the error component includes a fractional control sequence.

[0012] In one example, the RF transceiver further includes: a first adder coupled to the ΔΣ-PFD, the first adder being configured to generate a digital frequency error based on the difference between the fractional control sequence and the fractional control number; an accumulator coupled to the first adder, the accumulator being configured to generate a digital phase error based on the digital frequency error; and a digital loop filter (DLF), the DLF being configured to select the digital phase error, wherein the digital phase error is suitable for phase-locking the DCO to a reference signal.

[0013] In one example, the RF transceiver further includes: a digital modulator coupled to a first adder and a second adder, the second adder being coupled between the DLF and the DCO, wherein the digital modulator is configured to encode a sequence of transmit data bits into a digital baseband signal, wherein the digital baseband signal from the ΔΣ-PFD is canceled in the first adder by a digital baseband signal from the digital modulator, and wherein the digital baseband signal from the digital modulator is added to a digital phase error signal in the second adder to modulate the DCO with the digital baseband signal.

[0014] In one example, the RF transceiver also includes a power amplifier (PA) coupled to the DCO to amplify the signal from the digital baseband modulated DCO.

[0015] In one example, a method in an RF transceiver includes: comparing a reference signal from a reference source with a local radio frequency (RF) signal in a mixed-signal phase / frequency detector; generating a difference signal based on the comparison, wherein the difference signal includes a modulation component and an error component; and phase-locking the local RF signal to the reference signal with the error component to perform angle demodulation for RF reception and angle modulation for RF transmission.

[0016] In one example, the method further includes: receiving an angle-modulated RF signal at a receiver front end and down-converting the angle-modulated RF signal to a baseband signal; and angle-modulating a reference source with the baseband signal to generate an angle-modulated reference signal.

[0017] In one example of the method, the mixed-signal phase / frequency detector includes a fractional-N type Δ-Σ phase / frequency detector (ΔΣ-PFD) configured to divide the local RF signal, wherein the difference signal is obtained by comparing the zero-crossing point of the angle-modulated reference signal with the zero-crossing point of the divided local RF signal.

[0018] In one example of this method, the modulation component comprises a digitized baseband signal, and the error component comprises a fractional control sequence.

[0019] In one example of the method, the local RF signal is generated by a digitally controlled oscillator (DCO), and the method further includes: generating a digital frequency error based on the difference between a fractional control sequence and a fractional control number; accumulating the digital frequency error to generate a digital phase error; and selecting the digital phase error with a digital loop filter (DLF), wherein phase-locking the local RF signal to a reference signal includes tuning the DCO with the digital phase error.

[0020] In one example, the method also includes demodulating the digital baseband signal to recover the stream of received data bits.

[0021] In one example, the method in the RF transceiver includes angle modulation of a local RF signal source with a digitized baseband signal to generate a local RF signal.

[0022] In one example of the method, the mixed-signal phase / frequency detector includes a fractional-N type Δ-Σ phase / frequency detector (ΔΣ-PFD) configured to divide a local RF signal, wherein the difference signal is obtained by comparing the zero-crossing point of a reference signal with the zero-crossing point of the angle-modulated local RF signal divided by the frequency, and wherein the modulation component includes a digitized baseband signal and the error component includes a fractional control sequence.

[0023] In one example of the method, the local RF signal source includes a digitally controlled oscillator (DCO), and the method further includes: generating a digital frequency error based on the difference between a fractional control sequence and a fractional control number; accumulating the digital frequency error to generate a digital phase error; and selecting the digital phase error with a digital loop filter (DLF), wherein phase-locking the local RF signal to a reference signal includes tuning the DCO with the digital phase error.

[0024] In one example of the method, angle modulation of a local RF signal source includes: encoding a stream of data bits in a digital modulator to generate a digital baseband signal; combining the digital baseband signal with a digital phase error at the digital control input of the DCO; and tuning the DCO with the digital baseband signal.

[0025] In one example, the method further includes: amplifying the angle-modulated local RF signal; and transmitting the amplified angle-modulated local RF signal.

[0026] In one example, the RF transceiver system includes any of the exemplary RF transceivers described above, which are coupled to an antenna configured to transmit and receive angle-modulated RF signals. Attached Figure Description

[0027] To gain a more complete understanding of the various examples, reference is now made to the following specific embodiments in conjunction with the accompanying drawings, in which similar identifiers correspond to similar elements:

[0028] Figure 1 This is a block diagram illustrating an exemplary transceiver according to the present disclosure;

[0029] Figure 2 This shows the receiving mode. Figure 1 A block diagram of an exemplary transceiver;

[0030] Figure 3A It is shown in the first firing mode Figure 1 A block diagram of an exemplary transceiver;

[0031] Figure 3B It is shown in the second launch mode Figure 1 A block diagram of an exemplary transceiver;

[0032] Figure 4 This is a block diagram illustrating an exemplary transceiver according to the present disclosure;

[0033] Figure 5 This is a flowchart illustrating an exemplary method for implementing a receiver in a phase / frequency tracking transceiver according to the present disclosure; and

[0034] Figure 6 This is a flowchart illustrating an exemplary method for implementing a transmitter in a phase / frequency tracking transceiver according to the present disclosure. Detailed Implementation

[0035] This disclosure describes examples of systems and methods for coherently modulating and demodulating angle-modulated (i.e., constant envelope) radio frequency signals using a phase / frequency tracking transceiver.

[0036] Figure 1 This is a block diagram illustrating an exemplary phase / frequency tracking transceiver 100 according to the present disclosure. The transceiver 100 is coupled to an antenna 101 to transmit and receive angle-modulated RF carrier signals (signals 102A and 102B, respectively). The antenna 101 is connected to a first transmit / receive switch (TR1) 102 that selects between transmit and receive modes. The receive chain (receiver front end) includes a low-noise amplifier (LNA) 103, a digitally controlled local oscillator (DCO) 104, a mixer 105, and a channel selection filter (CSF) 106. The frequency of the DCO 104 is selected and controlled to generate a zero (or low-frequency) intermediate frequency (IF) baseband signal 105A at the output of the mixer 105. The CSF 106 is configured to filter out unwanted noise and interference from the baseband signal.

[0037] The output of CSF 106 is coupled to a quadrature phase modulator, which includes a 90-degree phase shifter 107, mixers 108 and 109, a 0 / 90-degree phase shifter 110, and an adder 111.

[0038] In receive mode, a stable (e.g., crystal-controlled) reference oscillator 112 is used to provide a reference signal (f) via a 0 / 90 degree phase shifter 110. ref ), reference signal (f ref The baseband signal is modulated by a quadrature modulator. As a result of quadrature mixing, the output S at the output of adder 111... ref (t) at the frequency (f) of the reference oscillator 112 ref Angle modulation of the original RF input signal at point ).

[0039] The output S of adder 111 ref (t) is limited by limiter 113 to generate a constant amplitude pulse sequence corresponding to the zero-crossing point of the phase shift of the reference oscillator 112 that is tracked by the angle modulation. In receive mode, the second transmit / receive switch (TR2) 114 connects the output of limiter 113 to one input of a mixed-signal (e.g., mixed analog / digital) phase / frequency detector, which may be a fractional N-type Δ-Σ phase / frequency detector (ΔΣ-PFD) 115. ΔΣ-PFD 115 includes a phase-frequency detector (PFD) 116, a charge pump (CP) 117, a ΔΣ analog-to-digital converter (ΔΣ-ADC) 118, an adder 119, and a multi-mode divider (MMD) 120. The second input of ΔΣ-PFD 115 receives the local oscillator signal S from DCO 104. LO (t).

[0040] The ΔΣ-PFD 115 modulates the phase of the baseband-modulated (i.e., angle-modulated) reference oscillator signal with the DCO signal S from the MMD120. LO The phase of the lower-division version of (t) is compared, and the frequency of DCO 104 is locked to (N). int +N frac )·f ref , where N int (integer value) and N frac The (score) is determined by the carrier frequency of the selected RF channel. Signal S LO (t) can be mathematically described as:

[0041] S LO (t)=A LO cos(2πf LO t+∫2πΔf m (τ)dτ)

[0042] Among them, f LO It is the RF carrier frequency, Δf m =N mod f ref , where N mod It is a digital baseband signal, and A LO It is the amplitude of the signal envelope.

[0043] MMD 120 via N int +{...、-1、0、1、...} performs a fractional N-type frequency division on the input of the DCO 104 local oscillator, where {...、-1、0、1、...} reflects the time-averaged value N of the MMD 120. frac Long-term fractional frequency control, and the PFD / CP combination with f ref Frequency pulse width modulation (PWM) current signal (I cp The frequency-divided DCO 104 input and reference oscillator signal f are generated in the form of ) ref The phase error between them. ΔΣ-ADC 118 will I cp Signal digitization. The Lth-order ΔΣ-ADC implements the (L+1)th-order ΔΣ-PFD by closing the loop within the ΔΣ-PFD.

[0044] The output of ΔΣ-PFD 115 includes the digital baseband modulation component N. mod (121) and the digitization error component, the digitization error component including time-averaged N frac The fractional control sequence 122 is used in adder 119 to obtain the required value. int Combined and fed back to MMD 120, to each f ref The instantaneous divider value of MMD 120 is set at the clock cycle. The fractional control sequence 122 is also provided to the adder 123, wherein the fractional control sequence 122 is derived from N at each clock cycle. frac Subtracted to generate frequency error Δf e Δf e The sequential values ​​are accumulated in accumulator 124, which integrates the frequency error into a phase error. The phase error signal passes through digital loop filter (DLF) 125, which has a bandwidth greater than the frequency of the phase error signal. However, the bandwidth of DLF 125 is lower than that of the modulation N. mod The bandwidth makes DCO unaffected by N mod The effect. Conversely, N mod The digital demodulator 126 is directed to extract the RX bits.

[0045] For clarity, Figure 1 Partially reproduced as Figure 2 System 200 is shown only when system 100 is configured as a receiver. As described above, ΔΣ-PFD 115 includes PFD 116 and CP 117 for analog components. PFD 116 generates a voltage pulse with a width corresponding to the phase difference between a baseband-modulated reference oscillator signal from limiter 113 and a down-divided version of the local oscillator signal from DCO 104 provided by MMD 120. Charge pump 117 converts the voltage pulse into a pulse-width modulated (PWM) current pulse I. cp This drives the ΔΣ-ADC118. The ΔΣ-ADC118 digitizes the current pulse into a digital baseband signal 121 (modulation component) and interacts with N. int The fractional control sequence 122 (error component) is combined with the control of MMD 120. Therefore, ΔΣ-PFD 115 is implemented as a hybrid analog-to-digital frequency / phase detector.

[0046] Figure 1 Partially reproduced as Figure 3A System 300 in the diagram only shows the components used when system 100 is configured as a transmitter, requiring transmit / receive phase coherence. Specifically, LNA 103, mixer 105, and CDF 106 are not used in transmit mode and can be disabled to reduce power consumption. Figure 3A In the process, the data to be transmitted (TX bits) is converted into a digital baseband signal N by the digital modulator 127. mod N from digital modulator 127 mod Coupled to DCO 104 via transmit gain controller 128 and adder 129, where N from digital modulator 127 mod Modulation of DCO 104. Modulation signal S from DCO 104. LO (t) is provided as an input to ΔΣ-PFD 115. N from digital modulator 127 mod It is also coupled to adder 123, where N from digital modulator 127 mod The digitized baseband signal N from ΔΣ-PFD 115 mod 121 offsets.

[0047] In TX modes with phase coherence, such as Figure 3A As shown, the reference oscillator 112 remains connected to the quadrature modulator (as in RX mode). However, since there is no baseband signal from the receiver front end, the output of the quadrature modulator is simply the signal f from the reference oscillator 112. refThe signal is limited by limiter 113 and transmitted directly to PFD 114 of ΔΣ-PFD 115 via transmit / receive switch TR2 (not shown). This operating mode allows the transceiver to switch from receive mode to transmit mode without switching the connection of the reference oscillator that provides phase coherence.

[0048] As described above, the signal S from DCO 104 LO (t) is provided to MMD 120. In receive mode operation, PFD 116 will use the reference oscillator signal f provided by reference oscillator 112. ref Compared to the modulated signal from DCO 104, the modulated signal from DCO 104 is down-divided by MMD 120 in frequency. PFD 116 and CP 117 are based on the reference oscillator signal (f ref ) and as described above by N mod The phase difference between the modulated down-divided DCO signals is used to generate pulse width modulation (PWM) current pulses I. cp The sequence. Therefore, the digitized output of the ΔΣ-ADC 118 includes a fractional control sequence 122 and a digital modulation N. mod 121 Both, the fractional control sequence 122 represents N int With N frac The difference between them. Fractional control sequence 122 is used in adder 119 with N. int The combination is used to adjust the instantaneous division ratio of the MMD 120 with each clock cycle of the reference oscillator 112.

[0049] Digital baseband modulation data N mod 121 and the fractional control sequence 122 from ΔΣ-ADC 118 are coupled to adder 123. As described above, the digital baseband signal (N) from ΔΣ-PFD 115 and digital modulator 127... mod The fractional control sequence 122 cancels out N on a clock cycle basis, but the fractional control sequence 122 is coupled with N. frac Differential, and fractional control sequence 122 and fractional control number N frac The difference between them is presented as a digital frequency error signal Δf e As described above regarding the receiving mode of operation, the digital frequency error signal Δf e The digital phase error Δφ is integrated by accumulator 124. e Corresponding to N frac The digital phase error Δφ between the fractional control sequence 122 and the error between the fractional control sequence 122 e The narrowband digital loop filter 125 is used, where the digital phase error Δφ e The digital N in adder 129 is adjusted by the gain from the wideband TX gain controller 128.mod Signal combination to drive DCO104 to phase-lock with reference oscillator 112, and to transmit data N digitally. mod The DCO 104 is modulated. This method of using a narrow-band loop to control the center RF frequency of the signal source (DCO 104) and using a wide-bandwidth path outside the loop to modulate the signal source is called two-point modulation. The modulated DCO signal is then coupled to the power amplifier (PA) 130 via the TR switch 102, and the amplified signal is transmitted by the antenna 101.

[0050] Figure 1 Partially reproduced as Figure 3B System 350 in the diagram only shows the components used when system 100 is configured as a transmitter, provided that transmit / receive phase coherence is not required. Figure 3B As shown, the connection of reference oscillator 112 is switched from the quadrature modulator to a direct connection with ΔΣ-PFD 115. This allows components of the quadrature modulator to be de-energized to reduce overall power consumption.

[0051] like Figure 3A In the case of System 300, the data to be transmitted (TX bits) is converted into a digital baseband signal N by the digital modulator 127. mod N from digital modulator 127 mod Coupled to DCO104 via transmit gain controller 128 and adder 129, where N from digital modulator 127 mod Modulation of DCO 104. Modulation signal S from DCO 104. LO (t) is provided as an input to ΔΣ-PFD 115. N from digital modulator 127 mod It is also coupled to adder 123, where N from digital modulator 127 mod The digitized baseband signal N from ΔΣ-PFD 115 mod 121 offsets.

[0052] As described above, the signal S from DCO 104 LO (t) is provided to MMD 120. PFD 116 will use the reference oscillator signal f provided by reference oscillator 112. ref Compared to the modulated signal from DCO 104, the modulated signal from DCO 104 is down-divided by MMD 120 in frequency. PFD 116 and CP 117 are based on the reference oscillator signal (f ref ) and as described above by N mod The phase difference between the modulated down-divided DCO signals is used to generate pulse width modulation (PWM) current pulses I. cpThe sequence. Therefore, the digitized output of the ΔΣ-ADC 118 includes a fractional control sequence 122 and a digital modulation N. mod 121 Both, the fractional control sequence 122 represents N int With N frac The difference between them. Fractional control sequence 122 is used in adder 119 with N. int The combination is used to adjust the instantaneous division ratio of the MMD 120 with each clock cycle of the reference oscillator 112.

[0053] Digital baseband modulation data N mod 121 and fractional control sequence 122 are coupled to adder 123. As described above, the digital baseband signal (N) from ΔΣ-PFD 115 and digital modulator 127... mod The fractional control sequence 122 cancels out the error, but on a clock cycle basis (at the frequency f of the reference oscillator 112) ref (place) and N frac Differential, and fractional control sequence 122 and fractional control number N frac The difference between them is presented as a digital frequency error signal Δf e As mentioned above, the digital frequency error signal Δf e The digital phase error Δφ is integrated by accumulator 124. e Corresponding to N frac The digital phase error Δφ between the fractional control sequence 122 and the error between the fractional control sequence 122 e The narrowband digital loop filter 125 is used, where the digital phase error Δφ e The digital N in adder 129 is adjusted by the gain from the wideband TX gain controller 128. mod Signal combination to drive DCO 104 to phase-lock with reference oscillator 112, and to transmit data N digitally. mod The DCO 104 is modulated. The modulated DCO signal is then coupled to the power amplifier (PA) 130 via the TR switch 102 (not shown), and the amplified signal is transmitted by the antenna 101.

[0054] Although the closed-loop operation described in this paper is used to drive the digital frequency error Δf e It tends to zero, but due to the residual Δf e Process, voltage, and temperature (PVT) variations, and the digital gain of the DCO (in Hertz / Least Significant Bit K). DCO The latter is used as an error signal to adaptively track the DCO gain, effectively eliminating its process-voltage-temperature (PVT) variations and maximizing the transmit path bandwidth that cannot be directly corrected by the normal operation of the loop. Therefore, any residual digital frequency error Δf eThe calibration module (CAL) 131 processes the transmit gain to be corrected for this variation using the TX gain module 128.

[0055] Figure 4 This is a block diagram illustrating another exemplary phase / frequency tracking transceiver 400 according to this disclosure. System 400 is similar to system 100 in most respects, as indicated by similar reference numerals in system 100 and system 400. Figure 4 The transceiver shown in the figure replaces the single-channel mixer 105 and CSF 106 of system 100 with quadrature mixer 132 and composite CSF 133, respectively, thereby eliminating the need for the 90-degree phase shifter 107 for secondary mixing operations.

[0056] Figure 5 This is a flowchart illustrating an exemplary method 500 for receiving angle-modulated radio frequency signals in a phase / frequency tracking transceiver according to the present disclosure. Reference Figure 2 Method 500 begins at operation 502, receiving an angle-modulated radio frequency (RF) signal (e.g., 102B) in the receiver front end (e.g., antenna 101, LNA 103, and mixer 105) and down-converting the angle-modulated RF signal to a baseband signal (e.g., 105A). Method 500 continues at operation 504, angle-modulating a reference source (e.g., reference source 112) with the baseband signal to generate an angle-modulated reference signal. (e.g., S) ref (t)). Next, method 500 continues at operation 506, where the zero-crossing point of the angle-modulated reference signal is compared with the frequency-divided local RF signal (e.g., S) in the fractional N-type Δ-Σ phase / frequency detector. LO The zero-crossing points of (t) are compared to generate a signal including the modulation component (e.g., the digitized baseband signal N). mod 121) and the difference signal of the error component (e.g., fractional control sequence 122). In one example, method 500 continues at operation 508: based on the fractional control sequence (e.g., 122) and the fractional control number (e.g., N) frac The difference between them generates a digital frequency error (e.g., Δf). e At operation 510: the digital frequency error is accumulated (e.g., in accumulator 124) to generate a digital phase error signal Δφ. e At operation 512: Select the digital phase error (e.g., Δφ) using a digital loop filter (e.g., DLF 125). e At operation 514: the local RF signal is phase-locked to a reference signal (e.g., f) by using a digitally controlled oscillator (e.g., DCO 104) tuned with digital phase error. ref); and at operation 516: demodulate the digital baseband signal in a digital demodulator (e.g., demodulator 126) to recover the stream of received (RX) data bits.

[0057] Figure 6 This is a flowchart illustrating an exemplary method 600 for transmitting angle-modulated RF signals in a phase / frequency tracking transceiver according to the present disclosure. (See also:) Figure 3A and Figure 3B Method 600 begins at operation 602, using a digitized baseband signal (e.g., N). mod Angle modulation is performed on a digitally controlled oscillator (e.g., DCO 104). Method 600 continues at operation 604 by comparing the zero-crossing point of the reference signal with the zero-crossing point of the angle-modulated local RF signal in a fractional N-type Δ-Σ phase / frequency detector to generate a signal including the modulation component (e.g., the digitized baseband signal N). mod The difference signal between the fractional control sequence 121 and the error component (e.g., fractional control sequence 122). Next, method 600 continues at operation 606, based on the fractional control sequence and the fractional control number (e.g., N). frac The difference between (e.g., in adder 123) generates a digital frequency error (e.g., Δf). e Method 600 continues at operation 608: accumulating the digital frequency error (e.g., in accumulator 124) to generate a digital phase error Δφ. e At operation 610: a digital loop filter (e.g., DLF 125) is used to select the digital phase error; at operation 612: where the local RF source is a digitally controlled oscillator (DCO), the local RF signal is phase-locked to a reference signal by tuning the DCO with the digital phase error; and at operation 614: the stream of transmit (TX) data bits is encoded in a digital modulator (e.g., 127) to generate a digital baseband signal (e.g., N... mod ).

[0058] The foregoing description sets forth numerous specific details, such as examples of specific systems, components, methods, etc., to provide a thorough understanding of several examples in this disclosure. However, it will be apparent to those skilled in the art that at least some examples of this disclosure can be practiced without these specific details. In other instances, well-known components or methods have not been described in detail, or have been presented in the form of simple block diagrams, in order to avoid unnecessarily obscuring this disclosure. Therefore, the specific details set forth are merely exemplary. Specific examples may differ from these exemplary details and are still considered to be within the scope of this disclosure.

[0059] Any reference to “an example” or “example” throughout this specification means that a particular feature, structure, or characteristic described in connection with the example is included in at least one example. Therefore, the phrases “in an example” or “in the example” appearing in various places throughout this specification do not necessarily all refer to the same example.

[0060] Although the operations of the methods described herein are shown and described in a specific order, the order of operations for each method can be changed so that some operations can be performed in reverse order, or that some operations can be performed at least partially concurrently with other operations. Instructions or sub-operations of different operations can be performed intermittently or alternately.

[0061] The above description of the illustrated examples of the invention (including those described in the abstract) is not intended to be exhaustive or to limit the invention to the precise forms disclosed. While specific embodiments and examples of the invention have been described herein for illustrative purposes, various equivalent modifications are possible within the scope of the invention, as will be recognized by those skilled in the art. The words “example” or “exemplary” are used herein to mean as an example, instance, or illustration. Any aspect or design described herein as “example” or “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects or designs. Rather, the use of the words “example” or “exemplary” is intended to present the concept in a specific manner. As used in this application, the term “or” is intended to mean an inclusive “or” rather than an exclusive “or.” That is, unless otherwise specified or clear from the context, “X includes A or B” is intended to mean any natural inclusion. That is, “X includes A or B” is satisfied in any of the foregoing cases if X includes A; X includes B; or X includes both A and B. Additionally, unless otherwise specified for the singular form or clear from the context, the article “a” used in this application and the appended claims should generally be interpreted as meaning “one or more.” As used in this application, in the context of connected components or systems, the terms “coupled to” or “coupled with” include both directly coupled components or systems and indirectly coupled components or systems through other components or interface systems.

Claims

1. A radio frequency (RF) transceiver, comprising: A reference signal source, configured to generate a reference signal; A local RF source, configured to generate a local RF signal; as well as A mixed-signal phase / frequency detector configured to compare the reference signal with the local RF signal and generate a difference signal based on the comparison, wherein the difference signal includes a modulation component and an error component.

2. The RF transceiver according to claim 1, further comprising: A receiver front end, configured to receive angle-modulated RF signals and down-convert the angle-modulated RF signals into baseband signals; A quadrature modulator coupled to the receiver front end and the reference signal source, wherein the quadrature modulator is configured to perform angular modulation on the reference signal source using the baseband signal; as well as A limiter, which is coupled to the quadrature modulator to limit the angle-modulated reference signal.

3. The RF transceiver according to claim 2, in, The mixed-signal phase / frequency detector includes a fractional-N type Δ-Σ phase / frequency detector (ΔΣ-PFD) configured to divide the local RF signal, wherein the difference signal is obtained by comparing the zero-crossing point of the angle-modulated reference signal with the zero-crossing point of the frequency-divided local RF signal, and The modulation component includes a digitized baseband signal, and the error component includes a fractional control sequence.

4. The RF transceiver according to claim 3, wherein, The local RF source includes a digitally controlled oscillator (DCO), and the RF transceiver further includes: An adder coupled to the ΔΣ-PFD, the adder being configured to generate a digital frequency error based on the difference between the fractional control sequence and the fractional control number; An accumulator, coupled to the adder, configured to generate a digital phase error based on the digital frequency error; and A digital loop filter (DLF) configured to select the digital phase error, wherein the digital phase error is adapted to lock the DCO to the reference signal.

5. The RF transceiver of claim 4, further comprising a digital demodulator coupled to the ΔΣ-PFD, the digital demodulator being configured to decode the digitized baseband signal to recover a stream of received data bits.

6. The RF transceiver according to claim 1, further comprising: A quadrature modulator, having no modulation input, is coupled to the reference signal source, wherein the reference signal passes through the quadrature modulator without modulation. The local RF source includes a digitally controlled oscillator (DCO) configured to be angle-modulated by a digitized baseband signal.

7. The RF transceiver according to claim 6, in, The hybrid signal phase / frequency detector includes a fractional-N Δ-Σ phase / frequency detector (ΔΣ-PFD) configured to divide a locally RF signal that is angle-modulated, wherein the difference signal is obtained by comparing the zero-crossing points of the reference signal with the zero-crossing points of the divided locally RF signal that is angle-modulated, and wherein the modulation component includes the digitized baseband signal, and the error component includes a fractional control sequence.

8. The RF transceiver according to claim 7, further comprising: A first adder coupled to the ΔΣ-PFD and configured to generate a digital frequency error based on a difference between the fractional control sequence and a fractional control number; An accumulator coupled to the first adder and configured to generate a digital phase error based on the digital frequency error; And A digital loop filter (DLF) configured to select the digital phase error, wherein the digital phase error is adapted to phase-lock the DCO to the reference signal.

9. The RF transceiver according to claim 8, further comprising a digital modulator coupled to the first adder and to a second adder, the second adder being coupled between the DLF and the DCO, the digital modulator being configured to encode a sequence of transmit data bits into the digitized baseband signal, in, The digitized baseband signal from the ΔΣ-PFD is canceled in the first adder by the digitized baseband signal from the digital modulator, and wherein the digitized baseband signal from the digital modulator is added to the digital phase error in the second adder to modulate the DCO with the digitized baseband signal.

10. The RF transceiver according to claim 9, further comprising a power amplifier (PA) coupled to the DCO to amplify a signal from the DCO that is digitally baseband-modulated.

11. A method in a radio frequency transceiver, comprising: Comparing a reference signal from a reference source with a locally radio frequency (RF) signal in a hybrid signal phase / frequency detector; Generating a difference signal based on the comparison, the difference signal including a modulation component and an error component; And Phase-locking the locally RF signal to the reference signal with the error component to perform angle demodulation for RF reception and angle modulation for RF transmission.

12. The method according to claim 11, further comprising: Receiving an angle-modulated RF signal in a receiver front end and down-converting the angle-modulated RF signal to a baseband signal; And Angle-modulating the reference source with the baseband signal to generate an angle-modulated reference signal.

13. The method according to claim 12, wherein, The hybrid signal phase / frequency detector includes a fractional-N Δ-Σ phase / frequency detector (ΔΣ-PFD) configured to divide the locally RF signal, wherein the difference signal is obtained by comparing the zero-crossing points of the angle-modulated reference signal and the zero-crossing points of the divided locally RF signal.

14. The method according to claim 13, wherein, The modulation component includes a digitized baseband signal, and the error component includes a fractional control sequence.

15. The method according to claim 14, wherein, The local RF signal is generated by a digitally controlled oscillator (DCO), and the method further includes: A digital frequency error is generated based on the difference between the fractional control sequence and the fractional control number. The digital frequency error is accumulated to generate a digital phase error; and The digital phase error is selected using a digital loop filter (DLF), wherein phase-locking the local RF signal to the reference signal includes tuning the DCO with the digital phase error.

16. The method of claim 15, further comprising demodulating the digitized baseband signal to recover the stream of received data bits.

17. The method of claim 11, further comprising angle-modulating a local RF signal source with a digital baseband signal to generate the local RF signal.

18. The method according to claim 17, in, The mixed-signal phase / frequency detector includes a fractional-N type Δ-Σ phase / frequency detector (ΔΣ-PFD) configured to divide the local RF signal, wherein the difference signal is obtained by comparing the zero-crossing point of the reference signal with the zero-crossing point of the divided local RF signal, and The modulation component includes the digitized baseband signal, and the error component includes the fractional control sequence.

19. The method according to claim 18, wherein, The local RF signal source includes a digitally controlled oscillator (DCO), and the method further includes: A digital frequency error is generated based on the difference between the fractional control sequence and the fractional control number; The digital frequency error is accumulated to generate a digital phase error; and The digital phase error is selected using a digital loop filter (DLF), wherein phase-locking the local RF signal to the reference signal includes tuning the DCO with the digital phase error.

20. The method according to claim 19, wherein, Angle modulation of the local RF signal source includes: The stream of data bits is encoded in a digital modulator to generate the digitized baseband signal; The digitized baseband signal is combined with the digital phase error at the digital control input of the DCO; and The DCO is tuned using the digital baseband signal.

21. The method of claim 20, further comprising: Amplify the angle-modulated local RF signal; as well as Transmits amplified angle-modulated local RF signal.

22. A system for transmitting and receiving signals, comprising: Radio frequency (RF) transceivers, including: A reference signal source, configured to generate a reference signal; A local RF source, configured to generate a local RF signal; and A mixed-signal phase / frequency detector configured to compare the reference signal with the local RF signal and generate a difference signal based on the comparison, wherein the difference signal includes a modulation component and an error component; and An antenna coupled to the RF transceiver to transmit and receive angle-modulated RF signals.

23. The system of claim 22, further comprising: A receiver front end, configured to receive angle-modulated RF signals and down-convert the angle-modulated RF signals into baseband signals; as well as A quadrature modulator coupled to the receiver front end and the reference signal source, wherein the quadrature modulator is configured to angle-modulate the reference signal source with the baseband signal.

24. The system according to claim 23, in, The mixed-signal phase / frequency detector includes a fractional-N type Δ-Σ phase / frequency detector (ΔΣ-PFD) configured to divide the modulated local RF signal, wherein the difference signal is obtained by comparing the zero-crossing points of the reference signal and the zero-crossing points of the divided local RF signal. The modulation component includes a digitized baseband signal, and the error component includes a fractional control sequence.

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