A high voltage detection circuit for AC-DC converters
By designing a high-voltage detection circuit in the AC-DC converter, the risk of machine explosion and personal electric shock in the event of AC power anomalies is resolved, and system protection and safe discharge of the X-capacitor voltage after AC power failure are achieved, ensuring personal safety. The high-voltage detection circuit in the AC converter is solved, ensuring system safety in the event of AC power anomalies.
Patent Information
- Application Number
- CN202111006020.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-08-30
- Publication Date
- 2025-10-03
- Estimated Expiration
- 2041-08-30
AI Technical Summary
AC-DC converters lack effective protection mechanisms when AC power is abnormal, leading to potential explosion risks and personal safety hazards. In particular, after AC power is lost, high voltage across the X-capacitor may cause electric shock.
A high-voltage detection circuit is designed, including a high-voltage switching circuit, a high-voltage starting circuit, a voltage-controlled current source, a current detection circuit, a power-off detection circuit, an X-capacitor detection circuit, and a logic control circuit. By detecting abnormal AC voltage and power-off conditions, it controls system protection and X-capacitor discharge to ensure safety.
This system protects against AC undervoltage or power outages, preventing machine crashes. It also discharges the X-capacitor voltage to a safe voltage after a power outage, ensuring personal safety while reducing unnecessary power consumption.
Smart Images

Figure CN113794185B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of chips, and in particular to a high-voltage detection circuit in an AC-DC converter requiring power-off protection and X-capacitor discharge. Background Art
[0002] AC-DC converters are typically powered directly by AC power. When AC power anomalies occur, appropriate protection mechanisms are required. These mechanisms typically require constant monitoring of the AC power supply and provision of brownout (BO) protection and X-capacitor (X-capacitor) discharge circuits. When the AC power falls below a certain level, the AC-DC converter must stop generating power to prevent accidents. When the AC-DC converter loses power, the voltage across the X-capacitor remains high. To protect personnel, the charge on the X-capacitor must be discharged to below 36V to prevent accidental electric shock. Summary of the Invention
[0003] In view of the above problems, the present invention provides a high-voltage detection circuit for an AC-DC converter, for detecting whether an abnormality occurs in the alternating current.
[0004] Specifically, the present invention provides a high-voltage detection circuit for an AC-DC converter, comprising a high-voltage switching circuit, a high-voltage starting circuit, a voltage-controlled current source, a current detection circuit, a power-off detection circuit, an X-capacitor detection circuit, a logic control circuit, and a sampling control circuit; wherein,
[0005] The high-voltage switch circuit is connected to the high-voltage starting circuit, the voltage-controlled current source, and the sampling control circuit. The voltage-controlled current source is also connected to the high-voltage starting circuit and the current detection circuit. The current detection circuit is also respectively connected to the power-off detection circuit and the X-capacitor detection circuit. The logic control circuit is respectively connected to the power-off detection circuit, the X-capacitor detection circuit, the high-voltage starting circuit, and the sampling control circuit.
[0006] Furthermore, the high-voltage switch circuit is used to isolate the AC voltage from the high-voltage startup circuit and the voltage-controlled current source, and is only turned on during startup and detection, and is in the off state at all other times;
[0007] The high-voltage startup circuit is used to provide the power required for the system to work when the system is powered on and VDD is lower than the startup voltage. After the system is working normally, the high-voltage startup circuit stops working;
[0008] The voltage-controlled current source is used to convert the rectified DC voltage into a current signal;
[0009] The current detection circuit is used to detect the magnitude of the output current of the voltage-controlled current source and whether it changes. The magnitude of the current is used to determine whether the magnitude of the AC voltage can ensure safe and reliable operation of the system; and whether the AC voltage has lost power is determined by whether the current changes.
[0010] The power-off detection circuit is used to determine whether the AC voltage is too low. If the AC voltage is lower than the power-off threshold, a power-off protection signal is issued to turn off the system MOSFET.
[0011] The X-capacitor detection circuit is used to detect whether the AC voltage is powered off. If the AC voltage is powered off, the X-capacitor protection circuit is triggered to start discharging the X-capacitor.
[0012] The logic control circuit is used to provide timing and control signals, process the output signals of the power-off detection circuit and the X-capacitor detection circuit, control the on and off of the high-voltage switch circuit, and control the discharge of charge on the X-capacitor;
[0013] The sampling control circuit is used to be turned on during high voltage startup, detection and X capacitor discharge, and is turned off at other times.
[0014] Furthermore, the high-voltage switch circuit includes a junction field effect transistor or a depletion mode transistor, an enhancement mode LDMOS transistor, a first resistor and a second resistor;
[0015] The drain of the junction field effect transistor or the depletion mode transistor is connected to the rectified DC voltage, the source is connected to the drain of the enhancement mode LDMOS transistor via a first resistor, and is connected to the gates of the junction field effect transistor or the depletion mode transistor and the enhancement mode LDMOS transistor via a second resistor, and is also connected to the output end of the sampling control circuit; the source of the enhancement mode LDMOS transistor is connected to the high voltage startup circuit and the voltage-controlled current source.
[0016] Furthermore, the high-voltage startup circuit includes an NMOS tube and a diode, the drain of the NMOS tube is connected to the drain of the LDMOS tube in the high-voltage switch circuit, the gate is connected to an output end of the logic control circuit, the source is connected to the anode of the diode, and the cathode of the diode is connected to VDD.
[0017] Furthermore, the voltage-controlled current source includes a resistor, a first NMOS transistor and a second NMOS transistor, one end of the resistor is connected to the source of the enhancement mode LDNMOS transistor in the high-voltage switching circuit, and the other end is connected to the drain of the first NMOS transistor; the gate and drain of the first NMOS transistor are short-circuited together, and the source is grounded; the gate of the second NMOS transistor is connected to the gate of the first NMOS transistor, the drain is connected to an input end of the current detection circuit, and the source is grounded.
[0018] Furthermore, the current detection circuit includes a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a first resistor, a second resistor, a third resistor, a first current comparator, a second current comparator, and a third current comparator;
[0019] The first, second, third, and fourth PMOS transistors form a current mirror, with their gates all connected together. The gate and drain of the first PMOS transistor are short-circuited together, and the sources of the four PMOS transistors are connected to VDD. The drain of the first PMOS transistor serves as an input end of a current detection circuit and is connected to the output of a voltage-controlled current source. The drains of the second, third, and fourth PMOS transistors are connected to ground via a first resistor, a second resistor, and a third resistor, respectively, and are also connected to the non-inverting input ends of a first current comparator, a second current comparator, and a third current comparator, respectively. The inverting input ends of the first, second, and third current comparators are grounded. The outputs of the first and second current comparators are connected to an X-capacitor detection circuit. The output end of the third current comparator is connected to a power-off detection circuit.
[0020] Furthermore, the power-off detection circuit includes an edge detection circuit, a timing circuit, an RS trigger and an inverter;
[0021] The input end of the edge detection circuit is connected to an output end of the current detection circuit, and the output end of the edge detection circuit is connected to a reset end of the timing circuit;
[0022] The reset terminal of the timing circuit is connected to the edge detection circuit, the clock terminal is connected to the clock signal, and the output terminal is connected to the S terminal of the RS trigger;
[0023] The RS trigger has its R terminal connected to the system power-on reset signal, its S terminal connected to the output of the timing circuit, the output of the RS trigger is connected to the input terminal of the inverter, and the output terminal of the inverter is connected to an input terminal of the logic control circuit.
[0024] Furthermore, the X-capacitance detection circuit includes an edge detection circuit, a NOR gate, a first inverter, a timing circuit, an RS trigger, and a second inverter;
[0025] The input end of the edge detection circuit is connected to an output end of the current detection circuit, and the output end of the edge detection circuit is connected to the input end of the NOR gate; the output end of the NOR gate is connected to the reset end of the timing circuit via the first inverter;
[0026] The reset terminal of the timing circuit is connected to the output terminal of the first inverter, the clock terminal is connected to the clock signal, and the output terminal is connected to the S terminal of the RS trigger;
[0027] The RS trigger has its R terminal connected to the system power-on reset signal, its S terminal connected to the output of the timing circuit, the output of the RS trigger is connected to the input of the second inverter, and the output of the second inverter is connected to an input of the logic control circuit.
[0028] Furthermore, the logic control circuit includes a NAND gate and three inverters; wherein, one input end of the NAND gate is connected to the power-off detection circuit, one input end is connected to the output end of the first inverter, the input end of the first inverter is connected to the X-capacitor detection circuit, the output end of the first inverter is connected to the input end of the second inverter, and the output end of the second inverter is connected to an input end of the sampling control circuit; the output end of the NAND gate is connected to the input end of the third inverter, and the output end of the third inverter is connected to the PWM control chip.
[0029] Furthermore, the sampling control circuit includes an NOR gate and an inverter, one input end of the NOR gate is connected to an output end of the logic control circuit, the other input end of the NOR gate is connected to the clock signal, and the output of the NOR gate is connected to an input end of the high-voltage switch circuit via the inverter.
[0030] The present invention detects the AC voltage supply status when the AC-DC converter is working, and provides protection to the system when the AC voltage is undervoltage or power-off. In the case of undervoltage, the system stops working until the AC voltage returns to normal. After the AC voltage power-off, the voltage across the X capacitor is discharged to a safe voltage of 36V to ensure personal safety.
[0031] The present invention provides a high-voltage detection circuit for an AC-DC converter, which can not only provide BO protection and X-capacitor discharge, but also close the high-voltage power supply path, saving power consumption and reducing unnecessary waste. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] Figure 1 This is a structural schematic diagram of a high-voltage detection circuit used in an AC-DC converter according to Example 1 of the present invention;
[0033] Figure 2 This is a schematic diagram of an embodiment of a high-voltage switch circuit in embodiment 1 of the present invention;
[0034] Figure 3 This is a schematic diagram of an embodiment of a high-voltage starting circuit in embodiment 1 of the present invention;
[0035] Figure 4 This is a schematic diagram of an embodiment of a voltage-controlled current source in embodiment 1 of the present invention;
[0036] Figure 5 Schematic diagram of a current detection circuit according to embodiment 1 of the present invention;
[0037] Figure 6Schematic diagram of a current comparator according to embodiment 1 of the present invention;
[0038] Figure 7 Schematic diagram of a power-off detection circuit according to embodiment 1 of the present invention;
[0039] Figure 8 Schematic diagram of an embodiment of an X-capacitance detection circuit in embodiment 1 of the present invention;
[0040] Figure 9 Schematic diagram of a logic control circuit according to embodiment 1 of the present invention;
[0041] Figure 10 Schematic diagram of a sampling circuit in Example 1 of the present invention;
[0042] Figure 11 This is a detailed circuit diagram of a high-voltage detection circuit for an AC-DC converter according to Example 1 of the present invention. DETAILED DESCRIPTION
[0043] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention is further described in detail below with reference to the drawings and embodiments. In the detailed description below, many specific details are proposed in order to provide a comprehensive understanding of the present invention. However, it is obvious to those skilled in the art that the present invention can be implemented without the need for some of these specific details. The following description of the embodiments is merely to provide a better understanding of the present invention by illustrating examples of the present invention simultaneously. The present invention is in no way limited to any specific configuration proposed below, but covers any modification, replacement and improvement of elements, components and algorithms without departing from the spirit of the present invention. In the drawings and the following description, well-known structures and technologies are not shown to avoid unnecessary ambiguity in the present invention.
[0044] In an AC-DC converter, the converter is powered by AC power. If the AC power is too low, the converter continues to operate, posing a risk of explosion. After the converter stops supplying AC power, high voltage will continue to exist across the X-capacitor between the neutral and live wires. If accidentally touched, there is a risk of electric shock. Therefore, the charge on the X-capacitor needs to be discharged.
[0045] This invention provides a high-voltage detection circuit for use in AC-DC converters, designed to detect alternating current (AC) anomalies. It protects the system when the AC voltage is undervoltage or loses power. During an undervoltage condition, the system stops operating until the AC voltage returns to normal. After a power outage, the voltage across the X capacitor is discharged to a safe 36V voltage, ensuring personal safety.
[0046] Figure 1The figure shows a schematic diagram of a high-voltage detection circuit 100 for use in an AC-DC converter according to an embodiment of the present invention. One end of the high-voltage detection circuit 100 is connected to the output of a rectifier 10 and the other end is connected to a PWM control chip 20. Connected to the rectifier 10, it can detect abnormalities in the AC power supply. Connected to the PWM control chip 20, it can shut down the MOSFET when abnormalities occur. The high-voltage detection circuit 100 includes a high-voltage switching circuit 110, a high-voltage startup circuit 120, a voltage-controlled current source 130, a current detection circuit 140, a power-off detection circuit 150, an X-capacitor detection circuit 160, a logic control circuit 170, and a sampling control circuit 180. The high-voltage switch circuit 110 is connected to the high-voltage startup circuit 120, the voltage-controlled current source 130, and the sampling control circuit 180. The voltage-controlled current source 130 is further connected to the high-voltage startup circuit 120 and the current detection circuit 140. The current detection circuit 140 is further connected to the power-off detection circuit 150 and the X-capacitor detection circuit 160. The logic control circuit 170 is respectively connected to the power-off detection circuit 150, the X-capacitor detection circuit 160, the high-voltage startup circuit 120, and the sampling control circuit 180.
[0047] The high-voltage switch circuit 110 is controlled to turn on and off by the sampling control circuit 180. It is turned on only during AC-DC startup and detection, and is in the off state at all other times to reduce power consumption. After the AC-DC converter is powered on, when VDD is lower than the startup voltage, the high-voltage switch circuit 110 is turned on, and the capacitor connected to VDD is charged through the high-voltage startup circuit 120. After the VDD voltage is higher than the normal startup threshold, the high-voltage startup circuit 120 is turned off, and the voltage-controlled current source 130 starts to work. The voltage-controlled current source 130 converts the rectified DC voltage into a current signal and sends it to the current detection circuit 140. The current detection circuit 140 determines whether the AC voltage supply is normal based on the current size; and determines whether the AC voltage is in a power-off state based on whether the current changes. The current detection circuit 140 sends the detection result to the power-off detection circuit 150 and the X-capacitance detection circuit 150. 60; the power-off detection circuit 150 is used to determine whether the AC voltage is too low. If the AC voltage is lower than the BROWNOUT threshold, a BROWNOUT protection signal is issued to shut down the system MOSFET to protect the system. The X-capacitor detection circuit 160 is used to detect whether the AC voltage is underpowered. If the AC voltage is underpowered, the X-capacitor protection is triggered and the X-capacitor is discharged. The power-off detection circuit 150 and the X-capacitor detection circuit 160 send the AC voltage status to the logic control circuit 170. The logic control circuit 170 processes the output signals of the power-off detection circuit and the X-capacitor detection circuit to control the turning on and off of the high-voltage switch and the discharge of the charge of the X-capacitor. The sampling control circuit 180 receives the control of the logic control circuit 170 to complete the turning on and off of the high-voltage switch. The sampling control circuit 180 is turned on during high-voltage startup, current conversion, and X-capacitor discharge, and is turned off at other times.
[0048] One end of the high-voltage switch circuit 110 is connected to the rectified DC voltage, and the other end is connected to the high-voltage startup circuit 120, the voltage-controlled current source 130, and the sampling control circuit 180. The high-voltage switch circuit 110 is turned on when the AC-DC converter is powered on and when detecting the DC voltage after AC rectification. It is in the off state at all other times to reduce power consumption.
[0049] like Figure 2 As shown in FIG. 1 , as a specific embodiment of the high-voltage switch circuit 110 , the high-voltage switch circuit 110 includes a junction field effect transistor (JFET) or a depletion mode transistor 1101 , an enhancement mode LDMOS transistor 1104 , and resistors 1102 and 1103 .
[0050] The drain of a junction field effect transistor or a depletion mode transistor 1101 is connected to the rectified DC voltage HV, and the source is connected to the drain of an enhancement mode LDMOS transistor 1104 via a resistor 1102. The drain of the junction field effect transistor or the depletion mode transistor 1101 and the gate of the enhancement mode LDMOS transistor 1104 are connected to the gate of the junction field effect transistor or the depletion mode transistor 1101 and the enhancement mode LDMOS transistor 1104 via a resistor 1103, and is also connected to the output terminal (SD_HN) of the sampling control circuit 180. The source of the enhancement mode LDMOS transistor 1104 is connected to the high voltage startup circuit 120 and the voltage-controlled current source 130 (HV2i).
[0051] One end of the high-voltage startup circuit 120 is connected to the high-voltage switch circuit 110, and the other end is connected to the capacitor connected to VDD. When the AC-DC converter is powered on and started, the PWM control chip 20 compares its power supply voltage VDD with the chip startup voltage value. When VDD is lower than the chip startup voltage value, the high-voltage switch tube is turned on, and the high-voltage startup circuit 120 charges the capacitor connected to VDD. When the chip power supply voltage exceeds the startup voltage value, the chip turns off the high-voltage startup circuit 120, and the high-voltage startup circuit 120 stops supplying current to the chip. The supply current is provided by the auxiliary winding instead, reducing unnecessary power consumption caused by high-voltage startup.
[0052] like Figure 3 As shown, a specific embodiment of a high-voltage startup circuit 120 includes an NMOS transistor 1201 (NM1) and a diode 1202 (D1). The drain of NMOS transistor 1201 is connected to the drain (HV2i) of LDMOS transistor 1104 in high-voltage switch circuit 110, the gate is connected to an output terminal (ON_HN) of logic control circuit 170, the source is connected to the anode of diode 1202, and the cathode of diode 1202 is connected to VDD. During startup, VDD is charged, NMOS transistor 1201 turns on, and diode 1202 conducts forward. After VDD is fully charged, NMOS transistor 1201 turns off, and the diode is reverse biased to prevent VDD leakage.
[0053] One end of the voltage-controlled current source 130 is connected to the high-voltage switch circuit 110 , and the other end is connected to the current detection circuit 140 ; the voltage-controlled current source converts the AC voltage into a current signal, and completes the BROWNOUT and X-capacitance detection by processing the current signal.
[0054] like Figure 4 As shown, a specific embodiment of voltage-controlled current source 130 includes resistor 1301, NMOS transistors 1302 and 1303. One end of resistor 1301 is connected to the source (HV2i) of enhancement-mode LDNMOS transistor 1104 in high-voltage switching circuit 110, and the other end is connected to the drain of NMOS transistor 1302. The gate and drain of NMOS transistor 1302 are short-circuited together, and the source is grounded. The gate of NMOS transistor 1303 is connected to the gate of 1302, the drain is connected to an input terminal (isns) of current detection circuit 140, and the source is grounded. NMOS transistors 1302 and 1303 form a current mirror with a ratio set to 10:1. They send a scaled-down current to current detection circuit 140, reducing the device size of the current detection circuit and improving processing accuracy.
[0055] The current of the voltage-controlled current output (I AC_SNS )Amplitude of available AC power (V AC ) and the resistance value of resistor 1301 (R1 in the following formula) are expressed as:
[0056]
[0057] The current detection circuit 140 has an input connected to the voltage-controlled current source 130, one output connected to the power-off detection circuit 150, and the other output connected to the X-capacitor detection circuit 160. The current detection circuit 140 is used to detect the magnitude of the output current of the voltage-controlled current source 120 and whether it changes. Based on the magnitude of the output current, it determines whether the magnitude of the AC voltage can ensure safe and reliable operation of the system. Based on whether the current changes, it determines whether the AC voltage is in a power-off state.
[0058] like Figure 5 As shown, a specific implementation of the current detection circuit 140 includes PMOS transistors 1401 , 1402 , 1403 and 1404 , resistors 1405 , 1406 and 1407 , and current comparators 1408 , 1409 and 1410 .
[0059] PMOS transistors 1401, 1402, 1403, and 1404 form a current mirror. Their gates are all connected together, with the gate and drain of 1401 short-circuited. The sources of the four PMOS transistors are connected to VDD. The drain of 1401 serves as the input of the current detection circuit 140 and is connected to the output of the voltage-controlled current source 130. The drains of 1402, 1403, and 1404 are connected to ground via resistors 1405, 1406, and 1407, respectively. They are also connected to the non-inverting inputs of current comparators 1408, 1409, and 1410, respectively, to implement power-off detection and X-capacitor detection. The inverting inputs of current comparators 1408, 1409, and 14010 are grounded. Current comparators 1408, 1409, and 1410 can detect three AC voltage values. The outputs of current comparators 1408 and 1409 are sent to X-capacitor detection circuit 160 to detect whether the AC power is off. The output of current comparator 1410 is connected to power-off detection circuit 150 to detect whether the AC power meets operating requirements.
[0060] like Figure 6 As shown, an embodiment of a current comparator includes a current mirror formed by a pair of PMOS transistors, two current sources, a resistor R2, and a Schmitt trigger. The sources of the two PMOS transistors forming the current mirror are connected to VDD through the current source, and the drain of the PMOS transistor with the source and drain short-circuited serves as the non-inverting input terminal. The drain of the other PMOS in the current mirror is connected to a resistor R2, and the other end of the resistor serves as the inverting input terminal of the comparator. The end of the current source connected to the source of the PMOS is also connected to a Schmitt trigger, and the output of the Schmitt trigger serves as the output terminal of the comparator.
[0061] Taking comparator 1408 as an example, the same-direction end of 1408 is connected to PMOS tube 1402 and resistor 1405, and the reverse end is grounded. The current flowing through resistor 1405 is the sum of the current flowing through PMOS tube 1402 (set as Id) and the current I1 of the current source inside the comparator. The voltage drop across resistor 1405 is the product of the resistance value of 1405 (set as R1) and the current, expressed as (Id+I1)×R1. The voltage drop across resistor R2 inside the comparator is I1×R2. When the voltage drop across 1405 is higher than the voltage drop across R2, the comparator outputs a high level, otherwise, it outputs a low level. It can be calculated when When the voltage across resistor 1405 and resistor R2 is equal, the current of PMOS tube 1402 is equal to the output current of the current detection circuit, that is, Id=I AC_SNS Therefore, by setting the resistance of resistor 1405, the amplitude of the AC current to be detected can be set. One end of the power-off detection circuit 150 is connected to an output terminal of the current detection circuit 140, and the other end is connected to one end of the logic control circuit 170. If the AC voltage is abnormal, the power-off protection signal is output to the logic control circuit 170, which controls the PWM control chip 20 to turn off the MOSFET.
[0062] like Figure 7 As shown, an embodiment of the power-off detection circuit 150 includes: an edge detection circuit 1501, a timing circuit 1502, an RS trigger 1503 and an inverter 1504; if the edge detection circuit 1501 cannot detect an edge, the timing circuit 1502 continues timing until the timing ends, indicating that the AC voltage is abnormal, and a power-off signal is output, triggering the RS trigger 1503, and being latched and output to the logic control circuit through the inverter 1504, controlling the PWM control chip 20 to turn off the MOSFET; if an edge is detected, the timer is reset, indicating that the AC voltage is normal.
[0063] The input end of the edge detection circuit 1501 is connected to the output end of the current comparator 1410 in the current detection circuit 140 (BO_sns), and the output end of the edge detection circuit 1501 is connected to the reset end of the timing circuit 1502; if the edge detection circuit 1501 cannot detect an edge, the timing circuit 1502 continues to count until the timing ends; if an edge is detected, the timing circuit 1502 is reset.
[0064] Timing circuit 1502 is used to set time. Its reset terminal is connected to edge detection circuit 1501, its clock terminal is connected to clock signal CLK, and its output terminal is connected to the S terminal of RS trigger 1503. After the AC-DC converter starts to work normally, the timer starts timing. If the AC voltage is always lower than the BO threshold point during the timing process, the BO signal is output after the timing ends. If BROWNOUT is higher than the threshold voltage before the timing ends, the timer is reset, the AC voltage is normal, and timing starts again.
[0065] RS flip-flop 1503, its R terminal is connected to the system power-on reset signal por, and its S terminal is connected to the output of the timing circuit 1502. The output of the RS flip-flop 1503 is connected to the input of an inverter 1504, and the output of the inverter 1504 is connected to an input of the logic control circuit 170. The RS flip-flop 1503 is used to lock the BROWNOUT signal; when the AC voltage is lower than the threshold, after the timing ends, the RS flip-flop is set to a high level and latched until the AC-DC converter is powered on again.
[0066] One end of the X-capacitance detection circuit 160 is connected to an output end of the current detection circuit 140 , and the other end is connected to one end of the logic control circuit 170 . If the AC voltage is abnormal, the X-capacitance detection circuit 160 outputs an X-capacitance signal to the logic control circuit 170 , which controls the high-voltage switch circuit 110 and the high-voltage startup circuit 120 to discharge the X-capacitor.
[0067] like Figure 8As shown, an embodiment of the X_CAP detection circuit 160 includes edge detection circuits 1601 and 1602, a NOR gate 1603, an inverter 1604, a timing circuit 1605, an RS flip-flop 1606, and an inverter 1607. If the edge detection circuits 1601 and 1602 fail to detect an edge, the timer continues counting until the timer expires, indicating that the AC voltage is abnormal. An X-capacitor signal is output, triggering the RS flip-flop 1606, which is latched and output to the logic control circuit via inverter 1607. This signal controls the high-voltage switch circuit 110 and the high-voltage startup circuit 120 to discharge the X-capacitor. If an edge is detected, the timer is reset, indicating that the AC voltage is normal.
[0068] The input terminals of the edge detection circuits 1601 and 1602 are connected to an output terminal of the current detection circuit 140, and the output terminals of the edge detection circuits 1601 and 1602 are connected to the input terminal of the NOR gate 1603; the output terminal of the NOR gate 1603 is connected to the timing circuit 1605 via the inverter 1604. If the edge detection circuit cannot detect an edge, the timer continues to count until the timing ends.
[0069] Timing circuit 1605 is used to set time. Its reset terminal is connected to the output terminal of inverter 1604, its clock terminal is connected to the clock signal CLK, and its output terminal is connected to the S terminal of RS flip-flop 1606. After the AC-DC converter starts operating normally, the timer begins timing. If the AC voltage remains unchanged after the timing expires, an X-capacitor signal is output, and X-capacitor detection circuit 160 controls high-voltage startup circuit 120 to turn on and discharge the X-capacitor. If an edge is detected, the timer is reset, indicating that the AC voltage is normal, and timing is restarted.
[0070] RS flip-flop 1606 has its R terminal connected to the system power-on reset signal por, and its S terminal connected to the output of timing circuit 1605. The output of RS flip-flop 1606 is connected to the input of inverter 1607, and the output of inverter 1607 is connected to an input of logic control circuit 170. RS flip-flop 1606 is used to latch the X-capacitor discharge control signal. After the AC voltage is lost, logic control circuit 170 activates high-voltage switching circuit 110 and high-voltage startup circuit 120, discharging the charge on the X-capacitor to the VDD capacitor via high-voltage startup circuit 120.
[0071] The logic control circuit 170 has a first input connected to the power-off detection circuit 150 , a second input connected to the output of the X-capacitor detection circuit 160 , a first output connected to the sampling control circuit 180 , and a second output connected to the PWM control chip 20 .
[0072] like Figure 9As shown, an embodiment of the logic control circuit 170 includes: a NAND gate 1703, three inverters 1701, 1702, and 1704. One input of the NAND gate 1703 is connected to the power-off detection circuit 150 (BO_P), and another input is connected to the output of the first inverter 1701. The input of the first inverter 1701 is connected to the X-capacitor detection circuit 160. The output of the first inverter 1701 is connected to the input of the second inverter 1702. The output of the second inverter 1702 is connected to an input (ON_HN) of the sampling control circuit 180. The output of the NAND gate 1703 is connected to the input of the third inverter 1704. The output of the third inverter 1704 is connected to the PWM control chip 20.
[0073] One end of the sampling control circuit 180 is connected to the high-voltage switch circuit 110 , and the other end is connected to the logic control circuit 170 , and controls the opening and closing of the high-voltage switch circuit 110 during startup and detection.
[0074] like Figure 10 As shown, an embodiment of sampling control circuit 180 includes a NOR gate 1801 and an inverter 1802. One input of NOR gate 1801 is connected to an output of logic control circuit 170 (ON_HN), while the other input of NOR gate 1801 is connected to clock signal CLK. The output of NOR gate 1801 is connected to an input of high-voltage switch circuit 110 (SD_HN) via inverter 1802. Sampling control circuit 180 is used to control the on and off of high-voltage switch circuit 110, reducing the clock frequency and thus the high power consumption caused by the constant on state. According to the sampling law, as long as the switching frequency is greater than twice the rectified signal frequency, the high power consumption can be reduced.
[0075] Figure 11 This is a detailed circuit diagram of a high-voltage detection circuit for an AC-DC converter, according to Example 1 of the present invention. This circuit detects the AC voltage supply during operation of the AC-DC converter and provides system protection in the event of an AC voltage undervoltage or power failure. During an undervoltage condition, the system stops operating until the AC voltage returns to normal. After an AC voltage failure, the voltage across the X capacitor is discharged to a safe 36V voltage to ensure personal safety.
[0076] The above are merely preferred embodiments of the present invention, and the present invention may also be implemented in other specific forms without departing from its spirit and essential characteristics. The above embodiments are to be regarded as illustrative and non-restrictive in all respects and should not be regarded as limiting the present invention. Without departing from the premise and spirit of the above-mentioned basic technical ideas of the present invention, the present invention may also be modified, replaced or changed in various forms to obtain effects similar to those of the present invention. The scope of the present invention is defined by the appended claims rather than the above description, and all changes that fall within the meaning and scope of the claims are thereby included in the present invention.
Claims
1. A high voltage detection circuit for an AC-DC converter, characterized in that: It includes a high-voltage switch circuit, a high-voltage startup circuit, a voltage-controlled current source, a current detection circuit, a power-off detection circuit, an X-capacitor detection circuit, a logic control circuit and a sampling control circuit; wherein, The high-voltage switch circuit is connected to the high-voltage starting circuit, the voltage-controlled current source, and the sampling control circuit. The voltage-controlled current source is also connected to the high-voltage starting circuit and the current detection circuit. The current detection circuit is also respectively connected to the power-off detection circuit and the X-capacitor detection circuit. The logic control circuit is respectively connected to the power-off detection circuit, the X-capacitor detection circuit, the high-voltage starting circuit, and the sampling control circuit. The high-voltage switch circuit includes a junction field effect transistor or a depletion mode transistor, an enhancement mode LDMOS transistor, a first resistor and a second resistor; The drain of the junction field effect transistor or the depletion mode transistor is connected to the rectified DC voltage, the source is connected to the drain of the enhancement mode LDMOS transistor via a first resistor, and is connected to the gates of the junction field effect transistor or the depletion mode transistor and the enhancement mode LDMOS transistor via a second resistor, and is also connected to the output end of the sampling control circuit; the source of the enhancement mode LDMOS transistor is connected to the high voltage startup circuit and the voltage-controlled current source; The high-voltage startup circuit includes an NMOS transistor and a diode, wherein the drain of the NMOS transistor is connected to the drain of the LDMOS transistor in the high-voltage switch circuit, the gate is connected to an output end of the logic control circuit, the source is connected to the anode of the diode, and the cathode of the diode is connected to VDD; The voltage-controlled current source includes a resistor, a first NMOS transistor, and a second NMOS transistor. One end of the resistor is connected to the source of the enhancement mode LDNMOS transistor in the high-voltage switch circuit, and the other end is connected to the drain of the first NMOS transistor. The gate and drain of the first NMOS transistor are short-circuited together, and the source is grounded. The gate of the second NMOS transistor is connected to the gate of the first NMOS transistor, the drain is connected to an input terminal of the current detection circuit, and the source is grounded. The current detection circuit includes a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a first resistor, a second resistor, a third resistor, a first current comparator, a second current comparator, and a third current comparator; The first PMOS transistor, the second PMOS transistor, the third PMOS transistor, and the fourth PMOS transistor form a current mirror, and the gates are all connected together, wherein the gate and drain of the first PMOS transistor are short-circuited together, the sources of the four PMOS transistors are connected to VDD, the drain of the first PMOS transistor serves as an input end of a current detection circuit and is connected to the output of a voltage-controlled current source, the drains of the second PMOS transistor, the third PMOS transistor, and the fourth PMOS transistor are connected to ground via a first resistor, a second resistor, and a third resistor, respectively, and are also connected to the non-inverting input ends of a first current comparator, a second current comparator, and a third current comparator, respectively, and the inverting input ends of the first current comparator, the second current comparator, and the third current comparator are grounded; the outputs of the first current comparator and the second current comparator are connected to an X-capacitor detection circuit; and the output end of the third current comparator is connected to a power-off detection circuit; The power-off detection circuit includes an edge detection circuit, a timing circuit, an RS trigger and an inverter; The input end of the edge detection circuit is connected to an output end of the current detection circuit, and the output end of the edge detection circuit is connected to a reset end of the timing circuit; The reset terminal of the timing circuit is connected to the edge detection circuit, the clock terminal is connected to the clock signal, and the output terminal is connected to the S terminal of the RS trigger; The RS trigger, its R terminal is connected to the system power-on reset signal, its S terminal is connected to the output of the timing circuit, the output of the RS trigger is connected to the input of the inverter, and the output of the inverter is connected to an input of the logic control circuit; The X-capacitance detection circuit includes an edge detection circuit, a NOR gate, a first inverter, a timing circuit, an RS trigger and a second inverter; The input end of the edge detection circuit is connected to an output end of the current detection circuit, and the output end of the edge detection circuit is connected to the input end of the NOR gate; the output end of the NOR gate is connected to the reset end of the timing circuit via the first inverter; The reset terminal of the timing circuit is connected to the output terminal of the first inverter, the clock terminal is connected to the clock signal, and the output terminal is connected to the S terminal of the RS trigger; The RS trigger has its R terminal connected to the system power-on reset signal, its S terminal connected to the output of the timing circuit, the output of the RS trigger is connected to the input of the second inverter, and the output of the second inverter is connected to an input of the logic control circuit.
2. The high-voltage detection circuit for an AC-DC converter according to claim 1, wherein: The high-voltage switch circuit is used to isolate the AC voltage from the high-voltage starting circuit and the voltage-controlled current source, and is only turned on during startup and detection, and is in the off state at all other times; The high-voltage startup circuit is used to provide the power required for the system to work when the system is powered on and VDD is lower than the startup voltage. After the system is working normally, the high-voltage startup circuit stops working; The voltage-controlled current source is used to convert the rectified DC voltage into a current signal; The current detection circuit is used to detect the magnitude of the output current of the voltage-controlled current source and whether it changes. The magnitude of the current is used to determine whether the magnitude of the AC voltage can ensure safe and reliable operation of the system; and whether the AC voltage has lost power is determined by whether the current changes. The power-off detection circuit is used to determine whether the AC voltage is too low. If the AC voltage is lower than the power-off threshold, a power-off protection signal is issued to turn off the system MOSFET. The X-capacitor detection circuit is used to detect whether the AC voltage is powered off. If the AC voltage is powered off, the X-capacitor protection circuit is triggered to start discharging the X-capacitor. The logic control circuit is used to provide timing and control signals, process the output signals of the power-off detection circuit and the X-capacitor detection circuit, control the on and off of the high-voltage switch circuit, and control the discharge of charge on the X-capacitor; The sampling control circuit is used to be turned on during high voltage startup, detection and X capacitor discharge, and is turned off at other times.
3. A high voltage detection circuit for an AC-DC converter according to claim 1 or 2, characterized in that: The logic control circuit includes a NAND gate and three inverters; wherein, one input end of the NAND gate is connected to the power-off detection circuit, and one input end is connected to the output end of the first inverter; the input end of the first inverter is connected to the X-capacitance detection circuit; the output end of the first inverter is connected to the input end of the second inverter; the output end of the second inverter is connected to an input end of the sampling control circuit; the output end of the NAND gate is connected to the input end of the third inverter; and the output end of the third inverter is connected to the PWM control chip.
4. A high voltage detection circuit for an AC-DC converter according to claim 1 or 2, characterized in that: The sampling control circuit includes a NOR gate and an inverter, wherein one input end of the NOR gate is connected to an output end of the logic control circuit, the other input end of the NOR gate is connected to the clock signal, and the output of the NOR gate is connected to an input end of the high-voltage switch circuit via the inverter.
Citation Information
Patent Citations
X capacitor discharge control circuit used in switching power supply
CN105119476A