A chip circuit for monitoring process fluctuations and extracting equivalent parameters of switching tubes

Abstract

The present invention discloses a chip circuit for monitoring process fluctuations and extracting equivalent parameters of switching tubes, belonging to the technical field of basic electronic circuits. Microstrip lines, MIM capacitors, switching tubes, switching tube gate resistors, switching tube gate feed voltage points, and input and output voltage points are integrated on a substrate using semiconductor technology. The first LC resonant frequency point is formed by the capacitance and parasitic inductance of the switching tube when it is turned off, and the microstrip inductance in the circuit; the second LC resonant frequency point is formed by the on-resistance and parasitic inductance of the switching tube when it is turned on, the MIM capacitors in the circuit, and the microstrip inductance; and the equivalent parameters of the switching tube are extracted by fitting the resonance curve. By performing on-chip testing on this chip circuit, process fluctuations can be directly monitored based on the offset of the two resonant frequencies of the two-port network parameter test curve.

Description

Technical Field

[0001] The invention discloses a chip circuit for monitoring process fluctuations and extracting equivalent parameters of a switch tube, belonging to the technical field of basic electronic circuits. Background Art

[0002] With the miniaturization and integration of TR components, the integrated design of power amplifier chips and switches has become a trend. TR components require the switch to operate in both the off and on states for transmission and reception. Accurately determining the switch's parasitic parameters is a crucial factor influencing the accuracy of the integrated design. These parameters include: equivalent resistance Ron in the on state, equivalent resistance Roff in the off state, equivalent capacitance Coff in the off state, drain parasitic inductance Ld, and source parasitic inductance Ls.

[0003] Existing on-wafer testing parameter extraction techniques for monolithic microwave integrated circuits (MMICs) typically involve adding a microstrip line and ground-signal-ground (GSG) voltage points to the source and drain terminals of the switch, then applying power to the gate before testing. This on-wafer testing technique requires calibration and parameter stripping of the microstrip lines and GSG voltage points at the source and drain terminals. The resulting pure switch parameters are then extracted using modeling techniques. Calibration and parameter stripping also require the production of calibration components, increasing the workload and introducing errors. One approach to extracting switch parameters using modeling is to substitute the S-parameters of the switch in its off and on states, obtained through testing, into circuit simulation designs. However, for power amplifiers and switch integrated circuits, which have high output power, the switch often operates under large-signal conditions. Consequently, the equivalent parasitic parameters of the switch differ between large-signal and small-signal conditions. Using small-signal S-parameters to extract the switch parasitic parameters of the power amplifier and switch integrated circuit can lead to inconsistencies between the design and the actual chip operation, potentially causing design deviations. Another modeling technology for extracting switch tube parameters is to establish a large-signal model of the switch tube. It is difficult to establish a mathematical model for nonlinear problems, resulting in the accuracy of the large-signal model not meeting the requirements for extracting switch parasitic parameters. The modeling process of the large-signal model is complex and time-consuming, and sometimes the simulation does not converge, affecting the timeliness of chip design.

[0004] Process fluctuations during semiconductor manufacturing lead to discrete device performance parameters, affecting chip-to-chip consistency. For integrated power amplifier and switch chips, real-time monitoring of chip process fluctuations is necessary to ensure the accuracy of parasitic parameters extracted from the switch transistors during on-wafer testing.

[0005] Therefore, the present invention aims to design an on-chip test circuit with a simple structure for extracting parasitic parameters of switch tubes of a switch and power amplifier integrated chip. Summary of the Invention

[0006] The purpose of the present invention is to address the deficiencies of the above-mentioned background technology and provide a chip circuit for monitoring process fluctuations and extracting equivalent parameters of switching tubes, so as to solve the technical problem that the existing on-wafer test parameter extraction technology of switching tubes cannot meet the accuracy and timeliness of detection of switch and power amplifier integrated chips, and realize the purpose of the invention of real-time monitoring of process fluctuations and accurate extraction of parasitic parameters of switching tubes on integrated chips.

[0007] The present invention adopts the following technical solutions to achieve the above-mentioned purpose of the invention: a chip circuit for monitoring process fluctuations and extracting equivalent parameters of switching tubes. Specifically, it is a chip circuit that integrates microstrip lines, switching tubes and their associated gate resistors and gate voltage points, and MIM capacitors on a substrate based on semiconductor technology. The first LC resonant frequency point is formed by the capacitance and parasitic inductance of the switching tube when it is turned off, and the microstrip inductance in the circuit. The second LC resonant frequency point is formed by the on-resistance, parasitic inductance, MIM capacitors in the circuit, and microstrip inductance when the switching tube is turned on. An equivalent circuit model is established, and the equivalent parameters of the switching tube are extracted by fitting the resonance curve. The chip circuit is tested on-chip, and the offset of the two resonant frequencies of the two-port network parameter curve obtained by the test can be used to directly monitor process fluctuations, and provide feedback and guidance to improve the stability and consistency of the process platform.

[0008] A chip circuit for monitoring process fluctuations and extracting equivalent parameters of a switching tube includes: first to fifth microstrip lines, a MIM capacitor, a first switching tube, a second switching tube, a first switching tube gate resistor, a second switching tube gate resistor, a first switching tube gate feed voltage point, a second switching tube gate feed voltage point, an input bonding point, and an output bonding point, all of which are integrated on a substrate using a semiconductor process. One end of the first microstrip line is an input bonding point, one end of the second microstrip line is connected to the other end of the first microstrip line, one end of the third microstrip line is connected to the other end of the first microstrip line, one end of the fourth microstrip line is connected to the other end of the third microstrip line, one end of the fifth microstrip line is connected to the other end of the third microstrip line, and the other end of the fifth microstrip line is an output bonding point. The drain of the first switching tube is connected to the other end of the second microstrip line, the gate of the first switching tube is connected to one end of the gate resistor of the first switching tube, the source of the first switching tube is grounded, and the other end of the gate resistor of the first switching tube is the gate feeding voltage point of the first switching tube. One electrode of the MIM capacitor is connected to the other end of the fourth microstrip line, the drain of the second switching tube is connected to the other electrode of the MIM capacitor, the gate of the second switching tube is connected to one end of the gate resistor of the second switching tube, the source of the second switching tube is grounded, and the other end of the gate resistor of the second switching tube is the gate feeding voltage point of the second switching tube.

[0009] Furthermore, in a chip circuit for monitoring process fluctuations and extracting equivalent parameters of switching tubes, the substrate includes but is not limited to gallium arsenide, silicon carbide, silicon, etc.

[0010] Furthermore, in a chip circuit for monitoring process fluctuations and extracting equivalent parameters of a switching transistor, the switch's off-state capacitance, drain parasitic inductance, source parasitic inductance Ls, and equivalent inductance of the second microstrip line form a first LC resonant frequency. When the switch is on, its on-resistance, drain parasitic inductance, source parasitic inductance Ls, MIM capacitance, and equivalent inductance of the fourth microstrip line form a second LC resonant frequency. By fitting the simulated or tested resonant frequency curve, the equivalent parameters of the switching transistor are extracted: on-resistance, off-resistance, off-capacitance, drain parasitic inductance, and source parasitic inductance.

[0011] Furthermore, in a chip circuit for monitoring process fluctuations and extracting equivalent parameters of switching tubes, the two switching tube cores have the same size and structure, the same source parasitic inductance, the same source parasitic resistance, the same drain parasitic inductance, and the same drain parasitic resistance.

[0012] Furthermore, in a chip circuit for monitoring process fluctuations and extracting equivalent parameters of switching tubes, the widths of the first, third, and fifth microstrip lines are the widths of a 50-ohm characteristic impedance, and the widths of the second and fourth microstrip lines are 15 um to 40 um.

[0013] Furthermore, in a chip circuit for monitoring process fluctuations and extracting equivalent parameters of a switching tube, the capacitance of the MIM capacitor is 0.5 pF-5 pF.

[0014] Furthermore, in a chip circuit for monitoring process fluctuations and extracting equivalent parameters of switching tubes, the S21 curve of the chip circuit is tested, and the offset of the two resonant frequency points on the S21 curve is monitored. When the offset of the low-frequency resonant point or the high-frequency resonant point is observed, the monitoring result of the process fluctuation is obtained, thereby realizing direct monitoring of the process fluctuation.

[0015] The present invention adopts the above technical solution and has the following beneficial effects:

[0016] (1) The chip circuit of the present invention constructs two resonant frequency points based on the switch-off equivalent circuit and the on-equivalent resistance, and extracts the equivalent parasitic parameters of the switch when it is turned off and on by fitting the resonance curve, thereby converting the nonlinear parameter extraction problem into a linear problem. The fitting resonance curve can characterize both the large-signal state and the small-signal state of the switch, and solves the non-convergence problem that sometimes occurs in the large-signal model, avoids the errors introduced by microstrip line calibration and parameter stripping, and improves the accuracy of the equivalent parameter extraction of the switch.

[0017] (2) The present invention can directly reflect the process fluctuation by directly measuring the two-port network parameters of the chip circuit, enhance the process stability, and ensure that the accuracy of the extracted switch tube parameters is not affected by process fluctuations. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1(a) is a schematic diagram of a chip circuit for monitoring process fluctuations and extracting equivalent parameters of a switching tube according to the present invention, Figure 1(b) is an equivalent circuit of Figure 1(a), and Figure 1(c) is a simplified fitting circuit of Figure 1(b).

[0019] Figure 2 This is a physical diagram of the chip circuit used in the present invention to monitor process fluctuations and extract equivalent parameters of switching tubes.

[0020] Figure 3 This is a comparison diagram of the S21 curve obtained based on large signal model simulation and the S21 resonant frequency curve fitted by the present invention.

[0021] Explanation of the numbers in the figure: MS1-MS5 are the first to fifth microstrip lines, C is the MIM capacitor, SW1~SW2 are the first and second switch tubes, R is the gate resistor of the switch tube, PAD_Voff and PAD_Von are the gate feed voltage points of the first and second switch tubes, and PAD_in and PAD_out are the input and output bonding points. DETAILED DESCRIPTION

[0022] The technical solution of the invention is described in detail below with reference to the accompanying drawings.

[0023] The present invention discloses a chip circuit for monitoring process fluctuations and extracting equivalent parameters of a switch tube. Figure 2 As shown, the first to fifth microstrip lines MS1-MS5, the first switch SW1 and its gate resistor R and gate feed voltage point PAD_Voff, the second switch SW2 and its gate resistor R and gate feed voltage point PAD_Von, and the MIM capacitor C are integrated onto a substrate using a semiconductor process. The substrate may include, but is not limited to, gallium arsenide, silicon carbide, or silicon. The two switches have the same die size and structure, and the two switches have the same source parasitic inductance and source parasitic resistance, as well as the same drain parasitic inductance and drain parasitic resistance.

[0024] Figure 2The schematic diagram of the chip circuit is shown in Figure 1 (a). The first microstrip line MS1, the third microstrip line MS3, and the fifth microstrip line MS5 are connected in series in sequence. The signal input end of the first microstrip line MS1 is connected to the input bonding point PAD_in, and the signal output end of the fifth microstrip line MS5 is connected to the output bonding point PAD_out. The drain of the first switch tube SW1 is connected to the connection point of the first microstrip line MS1 and the third microstrip line MS3 through the second microstrip line MS2. The gate of the first switch tube SW1 is connected to the switch tube gate resistor R and the equivalent resistor R. The first and fourth microstrip lines are preferably 15-40 μm wide; the first, third, and fifth microstrip lines have a characteristic impedance of 50 ohms. To reduce chip circuit area and minimize losses, the width of the second and fourth microstrip lines is preferably 15-40 μm; the width of the first, third, and fifth microstrip lines is preferably 50 ohm wide. To reduce chip circuit area and minimize manufacturing dispersion, the capacitance of the MIM capacitor is preferably 0.5-5 pF.

[0025] The equivalent turn-off voltage Voff is applied to the gate feed voltage point PAD_Voff of the first switch tube, and the equivalent turn-on voltage Von is applied to the gate feed voltage point PAD_Von of the second switch tube. The equivalent circuit of Figure 1 (a) is shown in Figure 1 (b). The first switch tube SWI is equivalent to the gate parasitic inductance Lg, gate parasitic resistance Rg, source parasitic inductance Ls, source parasitic resistance Rs, drain parasitic inductance Ld, drain parasitic resistance Rd, turn-off resistance Roff, turn-off capacitance Coff, gate-source parasitic capacitance Cgs , gate-drain parasitic capacitance Cgd, parasitic capacitance between substrate and source Cps, and parasitic capacitance between substrate and drain Cpd. The second switch tube SW2 is equivalent to a circuit consisting of gate parasitic inductance Lg, gate parasitic resistance Rg, source parasitic inductance Ls, source parasitic resistance Rs, drain parasitic inductance Ld, drain parasitic resistance Rd, on-resistance Ron, gate-source parasitic capacitance Cgs, gate-drain parasitic capacitance Cgd, parasitic capacitance between substrate and source Cps, and parasitic capacitance between substrate and drain Cpd.

[0026] Because the switch gate has a high-resistance series resistor during integrated design, the switch gate does not participate in circuit matching, and the parasitic parameters of the gate can be ignored. The peripheral parasitic inductance and parasitic resistance of the drain and source of the switch tube are related to the switch size and structure. The peripheral parasitic inductance and parasitic resistance of the drain and source of the switch tube made using semiconductor technology are very small. The equivalent circuit shown in Figure 1 (b) can be equivalent to the simplified fitting circuit shown in Figure 1 (c). The first LC resonant frequency point is formed by the capacitance Coff, drain parasitic inductance Ld, source parasitic inductance Ls and the equivalent inductance of the second microstrip line when the first switch tube is turned off. The second LC resonant frequency point is formed by the on-resistance Ron, drain parasitic inductance Ld, source parasitic inductance Ls, MIM capacitor C and the equivalent inductance of the fourth microstrip line when the second switch tube is turned on.

[0027] By fitting the resonant frequency points, the mathematical model for extracting the equivalent parameters of the switch can be converted into a linear model. When the drain parasitic resistance Rd=0.01Ω and the source parasitic resistance Rs=0.01Ω, the extracted equivalent parameters of the switch tube are: on-resistance Ron=1.2Ω, off-resistance Roff=1650Ω, off-capacitance Coff=0.262pF, drain parasitic inductance Ld=29pH, and source parasitic inductance Ls=29pH.

[0028] A test signal is applied to the input bonding point PAD_in, an equivalent off-voltage Voff is applied to the gate feed voltage point PAD_Voff of the first switch tube, and an equivalent on-voltage Von is applied to the gate feed voltage point PAD_Von of the second switch tube. The first switch tube enters the off state and the second switch tube enters the on state. The feedback signal of the test signal is collected through the output bonding point PAD_out. The S21 curve of the chip is simulated according to the input test signal and the feedback signal of the test signal, or the S21 curve is obtained by testing with a vector network analyzer. For the simplified fitting circuit model shown in Figure 1 (c), the S21 curve obtained by simulation based on the large signal model and the S21 curve obtained in the process of fitting the resonant frequency point are shown as follows: Figure 3 As shown, the first LC resonant frequency coincides with the high-frequency resonant frequency of the S21 simulation curve, and the second LC resonant frequency coincides with the low-frequency resonant frequency of the S21 simulation curve. The off-state capacitance Coff mainly affects Figure 3The position of the medium and high frequency resonant frequency points, the drain parasitic inductance Ld and the source parasitic inductance Ls mainly affect the size of the opening of the resonance pit. The drain parasitic inductance Ld, the source parasitic inductance Ls and the off-state capacitance Coff jointly determine the exact position of the resonant frequency point. The drain parasitic resistance Rd, the source parasitic resistance Rs and the on-state resistance Ron affect the depth of the resonance pit. It can be seen that by performing on-chip testing on the chip circuit of the present invention, the process fluctuation can be monitored according to the offset of the two resonant frequency points of the tested S21 curve. When the low-frequency resonant point or the high-frequency resonant point shifts to the left, it indicates that the parasitic capacitance of the switch tube is too large. When the low-frequency resonant point or the high-frequency resonant point shifts to the right, it indicates that the parasitic capacitance of the switch tube is too small. Therefore, when the low-frequency resonant point or the high-frequency resonant point shifts, the monitoring result of the process fluctuation can be fed back to the process platform. The directly observed process fluctuation monitoring result is used for feedback and guidance to improve the stability and consistency of the process platform.

[0029] The above embodiments are only for illustrating the technical idea of ​​the present invention and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution in accordance with the technical idea proposed by the present invention shall fall within the protection scope of the present invention.

Claims

1. A chip circuit for monitoring process fluctuations and extracting equivalent parameters of switching tubes, characterized in that: include: The first microstrip line, one end of which is the input bonding point, a second microstrip line, one end of which is connected to the other end of the first microstrip line, A third microstrip line, one end of which is connected to the other end of the first microstrip line, a fourth microstrip line, one end of which is connected to the other end of the third microstrip line, a fifth microstrip line, one end of which is connected to the other end of the third microstrip line, and the other end of which is an output bonding point, A first switching tube, whose drain is connected to the other end of the second microstrip line, whose gate is connected to one end of the first switching tube gate resistor, and whose source is grounded, wherein the other end of the first switching tube gate resistor is the first switching tube gate feeding voltage point, A MIM capacitor, one electrode of which is connected to the other end of the fourth microstrip line, and A second switching tube, whose drain is connected to the other electrode of the MIM capacitor, whose gate is connected to one end of the second switching tube gate resistor, and whose source is grounded, and the other end of the second switching tube gate resistor is the second switching tube gate feeding voltage point; When the chip circuit is used to extract the equivalent parameters of the switch tube: An equivalent turn-off voltage is applied to the gate feed voltage point of the first switch tube, and the turn-off capacitance, drain parasitic inductance, source parasitic inductance and second microstrip line of the first switch tube operate at a first LC resonant frequency point. An equivalent on-state voltage is applied to the gate feed voltage point of the second switch tube. When the second switch tube is on, the on-state resistance, drain parasitic inductance, source parasitic inductance, MIM capacitor and the fourth microstrip line operate at the second LC resonant frequency point. Fitting a resonant frequency curve according to the first LC resonant frequency point and the second LC resonant frequency point, and obtaining the on-resistance, off-resistance, off-capacitance, drain parasitic inductance, and source parasitic inductance of the first switching tube and the second switching tube by fitting the resonant frequency curve; When the chip circuit is used to monitor process fluctuations: a test signal is applied to the input bonding pressure point, a feedback signal of the test signal is collected through the output bonding pressure point, the S21 parameter curve of the chip circuit is measured or simulated, and the position offset of the low-frequency resonance point and the high-frequency resonance point of the S21 parameter curve is observed. When the position of the low-frequency resonance point or the high-frequency resonance point is offset, the monitoring result of the process fluctuation is obtained.

2. A chip circuit for monitoring process fluctuations and extracting equivalent parameters of a switching tube according to claim 1, characterized in that: The first to fifth microstrip lines, the first switching tube, the second switching tube, the first switching tube gate resistor, the second switching tube gate resistor, the MIM capacitor, the input bonding pressure point, the output bonding pressure point, the first switching tube gate feed voltage point, and the second switching tube gate feed voltage point are all integrated on the substrate using semiconductor technology.

3. A chip circuit for monitoring process fluctuations and extracting equivalent parameters of switching tubes according to claim 2, characterized in that: The substrate is a gallium arsenide substrate, a silicon carbide substrate, or a silicon substrate.

4. A chip circuit for monitoring process fluctuations and extracting equivalent parameters of a switching tube according to claim 1, characterized in that: The first switching tube and the second switching tube have the same size and structure, the same source parasitic inductance, the same source parasitic resistance, the same drain parasitic inductance and the same drain parasitic resistance.

5. The chip circuit for monitoring process fluctuations and extracting equivalent parameters of a switching tube according to claim 1, characterized in that: The widths of the first, third and fifth microstrip lines are 50 ohm characteristic impedance line widths, and the widths of the second and fourth microstrip lines are 15 um to 40 um.

6. A chip circuit for monitoring process fluctuations and extracting equivalent parameters of switching tubes according to claim 1, characterized in that: The capacitance of the MIM capacitor is 0.5 pF-5 pF.

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