A boot method, system, and related equipment for a server NVMe hard drive.

Abstract

This application provides a method for booting a server NVMe hard drive, comprising: upon detecting a power-on command, determining the target PCIe port of the connected NVMe hard drive during a hardware initialization phase; obtaining an NVMe hard drive management function configuration policy; configuring the enabling state of the NVMe hard drive management function of the target PCIe port according to the NVMe hard drive management function configuration policy; and performing port initialization on the target PCIe port to complete hardware initialization. This application enables the NVMe hard drive management function of the NVMe port to take effect upon first boot into the BIOS or OS. Users do not need to restart to enable the NVMe hard drive management function of the PCIe port, thereby improving the efficiency of NVMe hard drive management and enhancing the user experience. This application also provides a boot system for a server NVMe hard drive, a server, and a computer-readable storage medium, which have the aforementioned beneficial effects.

Description

Technical Field

[0001] This application relates to the field of servers, and in particular to a boot method for a server NVME hard drive, a boot system, a server, and a storage medium. Background Technology

[0002] Intel VROC (Virtual RAID on CPU) is a RAID function built into Intel processors or PCHs. It supports the creation of redundant RAID arrays by connecting HDDs (Hard Disk Drives) and SSDs (Solid State Drives) with SAS (Serial Attached SCSI), SATA (Serial ATA), or NVMe interfaces directly connected to the processor or PCH (Platform Controller Hub, integrated southbridge) in a server. This improves the redundancy of data directly connected to the processor and PCH chip (integrated southbridge chip), ensuring that a single disk failure will not cause system or user data failure. Before using the NVMe VROC function, users need to enable NVMe disk management on the PCIe (peripheral component interconnect express) port of the processor containing the NVMe (NVM Express, Non-Volatile Memory Express, an industry standard for PCIe SSDs) disk. In other words, the PCIe port requires booting into the BIOS (Basic Input Output System) to configure the NVMe hard drive management functions before restarting, which results in a poor user experience. Summary of the Invention

[0003] The purpose of this application is to provide a method for booting a server NVMe hard drive, a server, and a computer-readable storage medium, which enables the NVMe hard drive management function of the PCIe port without requiring a restart, thereby improving the efficiency of NVMe hard drive management.

[0004] To address the aforementioned technical problems, this application provides a boot method for a server NVMe hard drive, the specific technical solution of which is as follows:

[0005] Upon detecting the power-on command, the target PCIe port of the connected NVMe hard drive is determined during the hardware initialization phase.

[0006] Obtain NVMe hard drive management configuration strategies;

[0007] Configure the NVMe hard disk management function of the target PCIe port to enable or disable it according to the NVMe hard disk management function configuration policy.

[0008] Perform port initialization on the target PCIe port to complete hardware initialization.

[0009] Optionally, determining the target PCIe port for the connected NVMe hard drive during the hardware initialization phase includes:

[0010] During the hardware initialization phase, the PCH chip is used to confirm that the NVMe hard drive has been inserted into the hard drive slot.

[0011] The target PCIe port corresponding to the hard drive slot is determined according to the preset slot port mapping table.

[0012] Optionally, before determining the target PCIe port corresponding to the hard drive slot according to the preset slot port mapping table, the method further includes:

[0013] Generate the preset slot port mapping table containing the mapping relationship between hard disk slots and PCIe ports, and store it in the basic input / output system.

[0014] Optionally, during the hardware initialization phase, the NVMe hard drives that are confirmed to be inserted into the hard drive slot via the PCH chip include:

[0015] The type of hard drive inserted into the hard drive slot is determined by the PRESENT# and IFDET# signals of the NVME hard drive slot;

[0016] When the PRESENT# signal is high and the IFDET# signal is low, the hard drive inserted into the hard drive slot is an NVME hard drive;

[0017] When both the PRESENT# signal and the IFDET# signal are low, the hard drive inserted into the hard drive slot is a SAS type hard drive or a SATA type hard drive.

[0018] Optionally, configure the enabling status of the NVMe disk management function on the target PCIe port according to the NVMe disk management function configuration policy, including:

[0019] If the NVMe disk management function configuration policy is to automatically enable the NVMe disk management function on the PCIe port where the NVMe disk is located, then the NVMe disk management function of the target PCIe port is configured to be enabled, and the NVMe disk management function of other PCIe ports is configured to be disabled.

[0020] If the NVMe disk management function configuration policy is to automatically enable NVMe disk management function on all PCIe ports, then the NVMe disk management function on all PCIe ports is configured to be enabled.

[0021] If the NVMe disk management function configuration policy is to automatically disable the NVMe disk management function on all PCIe ports, then the NVMe disk management function on all PCIe ports is configured to be disabled.

[0022] If the NVMe disk management function configuration policy is to manually configure the NVMe disk management function of each PCIe port, then read the NVMe disk management function configuration options of each PCIe port in the NVMe disk management function configuration policy, and configure the NVMe disk management function on or off status of each PCIe port to be consistent with the NVMe disk management function configuration options.

[0023] This application also provides a server, including:

[0024] Hard disk backplane; the hard disk backplane is provided with a complex programmable logic device (CPLD) and a hard disk slot for connecting an NVMe hard disk.

[0025] A motherboard; the motherboard is equipped with a processor and a PCH chip; and the PCH chip is connected to the complex programmable logic device (CPLD) via an I2C access channel; the PCH chip is used to determine the target PCIe port of the connected NVMe hard drive during the hardware initialization phase via the I2C access channel; the processor is used to configure the NVMe hard drive management function and initialize the port of the target PCIe port according to the NVMe hard drive management function configuration policy.

[0026] Optionally, the motherboard is also provided with a MUX selector; the first input of the MUX selector is the NVME management bus signal of the processor, the second input of the MUX selector is the I2C signal of the PCH chip, and the output of the MUX selector is connected to the complex programmable logic device CPLD through the I2C bus; the Sel selection signal of the MUX selector is connected to the general input / output interface of the PCH chip.

[0027] Optionally, the PCH chip is used to select the MUX selector to the I2C signal of the PCH chip during the hardware initialization phase.

[0028] This application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the method described above.

[0029] This application provides a method for booting a server NVMe hard drive, comprising: upon detecting a boot command, determining the target PCIe port of the connected NVMe hard drive during the hardware initialization phase; obtaining an NVMe hard drive management function configuration policy; configuring the enabling status of the NVMe hard drive management function of the target PCIe port according to the NVMe hard drive management function configuration policy; and performing port initialization on the target PCIe port to complete the hardware initialization.

[0030] This application identifies the PCIe ports with connected NVMe hard drives during the hardware initialization phase and obtains the NVMe hard drive management function configuration policy. It pre-configures the NVMe hard drive management function for the corresponding port during the system's PCIe initialization phase, ensuring that the NVMe hard drive management function is effective upon first boot into the BIOS or operating system. Users do not need to restart for the PCIe port's NVMe hard drive management function to take effect, thereby improving the efficiency of NVMe hard drive management and enhancing the user experience.

[0031] This application also provides a boot system for a server NVME hard disk, a server, and a computer-readable storage medium, which have the aforementioned beneficial effects, and will not be elaborated here. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0033] Figure 1 A flowchart illustrating the boot method for a server NVME hard drive provided in an embodiment of this application;

[0034] Figure 2 This is a schematic diagram showing the connection between the hard drive backplane and the motherboard in the current server system;

[0035] Figure 3 A schematic diagram illustrating the connection between the hard disk backplane and the motherboard in a server system provided in this application embodiment;

[0036] Figure 4 This is a flowchart illustrating another method for booting a server NVME hard drive, as provided in an embodiment of this application. Detailed Implementation

[0037] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0038] Currently, Intel VROC supports RAID for HDDs and SSA hard drives with SAS / SATA interfaces. In practical applications, HDDs and SSDs with SAS / SATA interfaces are more likely to be connected using RAID cards or dedicated PCIe cards for SAS cards, rather than being directly connected from the processor / PCH interface, and do not rely on VROC functionality.

[0039] Intel's VROC feature supports RAID arrays of NVMe SSDs. In practice, NVMe SSDs are typically directly connected to the processor, offering numerous opportunities for VROC applications. Before using NVMe VROC, users need to enable NVMe disk management on the processor's PCIe port where the NVMe SSD is located. NVMe disk management is not enabled on PCIe ports used by common PCIe devices, as it consumes additional resources; it is generally disabled by default on all non-NVMe PCIe ports of the processor. Besides supporting VROC, the NVMe disk management function on the PCIe port where the NVMe SSD is located can also be used for LED operation.

[0040] Many users operate NVMe VROC manually through the BIOS interface. Upon first boot, they enter the BIOS interface, open the PCIe port interface, and see which PCIe ports are connected to NVMe hard drives. For each of these connected PCIe ports, select the option to enable VMD (Volume Management Device) functionality. After enabling NVMe hard drive management for that port, save the BIOS configuration and restart for the NVMe hard drive management function to take effect. Upon restarting, enter the BIOS interface again. This time, the NVMe VROC interface will be displayed. NVMe hard drives with NVMe management enabled will be listed in the VROC interface, allowing users to enable VROC functionality. Click to enable the VROC option for the corresponding NVMe hard drive, save the BIOS configuration, and restart for the changes to take effect. The system can then operate in NVMe RAID mode. Alternatively, users can configure VROC RAID functionality using the `mdadm` command within the operating system. This method also requires configuring VMD and restarting first. It is evident that currently, if the NVMe disk management function is required, the server needs to be restarted at least once, resulting in a poor user experience.

[0041] To address the aforementioned technical deficiencies, please refer to... Figure 1 , Figure 1 A flowchart illustrating the boot method for a server NVME hard drive provided in this application embodiment.

[0042] S101: After detecting the power-on command, determine the target PCIe port of the connected NVMe hard drive during the hardware initialization phase;

[0043] In this step, during the hardware initialization phase, it is necessary to identify the PCIe port that is already connected to the NVMe hard drive and designate it as the target PCIe port. Specifically, the target PCIe port in this step refers to the PCIe port that is already connected to the NVMe hard drive during the hardware initialization process.

[0044] In practical applications, a server may include a motherboard and a hard drive backplane. The motherboard has a PCH chip, which can directly access the Complex Programmable Logic Device (CPLD) and NVMe-specific GPIO on the hard drive backplane, thereby determining the target PCIe port for the connected NVMe hard drive during the hardware initialization phase. During this process, the PCH chip needs to be able to promptly access the presence status of the NVMe hard drive on the CPLD located on the hard drive backplane. One feasible approach is to directly add an access channel from the PCH to the hard drive backplane. This access channel can be an I2C channel, or other types of communication channels; no specific limitations are specified here.

[0045] In one feasible approach, the PCH chip can be used during hardware initialization to confirm the NVMe hard drives inserted into the drive bays, and then the target PCIe port corresponding to the drive bays can be determined according to a preset drive bay port mapping table. That is, first, it detects which drive bays have NVMe hard drives inserted, and then determines the target PCIe port based on the mapping relationship between drive bays and ports. Specifically, a preset drive bay port mapping table containing the mapping relationship between drive bays and PCIe ports can be generated in advance and stored in the basic input / output system. Therefore, when performing this step, the drive bays where the NVMe hard drives are inserted are first determined, and then the target PCIe port is determined by referring to the preset operation bit port mapping table. This preset drive bay port mapping table mainly contains the mapping relationship between drive bays and corresponding PCIe port numbers.

[0046] Furthermore, it's easy to understand that not all hard drives inserted into a PCIe port are NVMe type. In this case, the type of hard drive inserted into the slot can be determined by the PRESENT# and IFDET# signals of the NVMe hard drive slot. Specifically, when the PRESENT# signal is high and the IFDET# signal is low, the hard drive inserted into the slot is an NVMe hard drive; when both the PRESENT# and IFDET# signals are low, the hard drive inserted into the slot is a SAS or SATA type hard drive. The hard drive type can be determined using the above method, and in this step, only the target PCIe port corresponding to the NVMe hard drive needs to be identified.

[0047] S102: Obtain NVMe hard drive management function configuration policy;

[0048] This step aims to obtain the NVMe disk management function configuration policy. On one hand, this step does not limit where the NVMe disk management function configuration policy can be obtained. On the other hand, this step does not limit the specific content of the NVMe disk management function configuration policy; it mainly includes the relevant configurations for the NVMe disk management function. For example, the NVMe disk management function configuration policy may include which target PCIe ports have NVMe disk management enabled, or the activation method for NVMe disk management, which may include automatic or manual activation. Automatic activation of NVMe disk management means that the target PCIe port will automatically enable NVMe disk management after the server powers on, while manual activation requires manual operation by the user to enable the NVMe disk management function for the target port.

[0049] S103: Configure the NVMe hard disk management function of the target PCIe port to enable the NVMe hard disk management function according to the NVMe hard disk management function configuration policy;

[0050] This step requires configuring the NVMe disk management function's enabling status for each target PCIe port according to the NVMe disk management function configuration policy. It's important to note that this enabling status includes both disabling and enabling NVMe disk management; that is, the user has the option to configure the NVMe disk management function's enabling status. It's not simply a matter of setting target PCIe ports that are currently disabled to the enabled state; configuring the enabling status includes both enabling → disabling and the reverse process of disabling → enabling. Therefore, one possible execution method for this step is as follows:

[0051] If the NVMe disk management function configuration policy is to automatically enable the NVMe disk management function on the PCIe port where the NVMe disk is located, then configure the NVMe disk management function of the target PCIe port to be enabled, and configure the NVMe disk management function of other PCIe ports to be disabled.

[0052] If the NVMe disk management function configuration policy is set to automatically enable NVMe disk management function on all PCIe ports, then configure the NVMe disk management function on all PCIe ports to be enabled.

[0053] If the NVMe disk management function configuration policy is to automatically disable the NVMe disk management function on all PCIe ports, then configure the NVMe disk management function on all PCIe ports to be disabled.

[0054] If the NVMe disk management function configuration policy is to manually configure the NVMe disk management function of each PCIe port, then the NVMe disk management function configuration options of each PCIe port in the NVMe disk management function configuration policy are read, and the enabled or disabled status of the NVMe disk management function of each PCIe port is configured to be consistent with the NVMe disk management function configuration options.

[0055] S104: Perform port initialization on the target PCIe port to complete hardware initialization.

[0056] After configuring the target PCIe port, port initialization can be performed to complete hardware initialization. Once hardware initialization is complete, processes such as BIOS initialization in the server can be executed, and the server's operating system can be accessed.

[0057] In this embodiment, during the hardware initialization phase, the PCIe port of the connected NVMe hard drive is promptly identified, and the NVMe hard drive management function configuration policy is obtained. The NVMe hard drive management function for the corresponding port is pre-configured during the system's PCIe initialization phase, ensuring that the NVMe hard drive management function of the NVMe port is effective upon first boot into the BIOS or OS. Users do not need to restart for the NVMe hard drive management function of the PCIe port to take effect, thereby improving the efficiency of NVMe hard drive management and enhancing the user experience.

[0058] Building upon the above embodiments, NVMe disk management function configuration policies can also be configured and stored in the Basic Input / Output System (BIOS). These policies include options for automatically enabling NVMe disk management on the PCIe ports where the NVMe disks reside, disabling NVMe disk management on all ports, enabling NVMe disk management on all ports, and manually configuring NVMe disk management. Manual configuration displays VMD configuration options for all PCIe ports and identifies the PCIe ports connected to the NVMe disks, allowing users to manually enable or disable NVMe disk management on each port. Modifications to the NVMe disk management function configuration policies take effect on the PCIe ports after the server restarts. In other words, the NVMe disk management function configuration policies can be updated based on user selections, and the changes take effect upon a restart.

[0059] Based on the above embodiments, as a preferred embodiment, after configuring the NVMe hard drive management function, after the BIOS boots, the user can also use the `mdadm` command to configure the processor virtual RAID function of the NVMe hard drive after the server enters the operating system. After configuring the NVMe hard drive management function, the processor virtual RAID function can be configured without restarting the server. Specifically, the user can first receive the BIOS boot command, enter the BIOS configuration interface, configure the processor virtual RAID function of the NVMe hard drive in the BIOS configuration interface, save the BIOS settings, and restart the server to enable the processor virtual RAID function. That is, based on this embodiment, the efficiency of configuring the processor virtual RAID function is further improved.

[0060] The following describes a server provided in an embodiment of this application. The server described below and the boot method for the NVMe hard drive of the server described above can be referred to each other. See also Figure 2 and Figure 3 , Figure 2 This is a diagram illustrating the connection between the hard drive backplane and the motherboard in the current server system. Figure 3 This is a schematic diagram illustrating the connection between the hard disk backplane and the motherboard in a server system provided in this application, to show the difference between the server provided in this application and the current server. The server provided in this application specifically includes:

[0061] Hard disk backplane; the hard disk backplane is provided with a complex programmable logic device (CPLD) and a hard disk slot for connecting an NVMe hard disk.

[0062] A motherboard; the motherboard is equipped with a processor and a PCH chip; and the PCH chip is connected to the complex programmable logic device (CPLD) via an I2C access channel; the PCH chip is used to determine the target PCIe port of the connected NVMe hard drive during the hardware initialization phase via the I2C access channel; the processor is used to configure the NVMe hard drive management function and initialize the port of the target PCIe port according to the NVMe hard drive management function configuration policy.

[0063] Each NVMe hard drive socket provides PRESENT# and IFDET# signals connected to the GPIO of the Complex Programmable Logic Device (CPLD) on the hard drive backplane. These signals are pulled up by default and are used to distinguish whether a hard drive is inserted into the slot. The PRESENT# signal is the presence detection signal, while the IFDET# signal is the interface type detection signal. When both PRESENT# and IFDET# signals are low, the connected hard drive is a SAS / SATA type hard drive; when PRESENT# is high and IFDET# is low, the connected hard drive is an NVMe hard drive.

[0064] In a typical design, a complex programmable logic device (CPLD) on the hard drive backplane will have two I2C channels, one connected to the motherboard's BMC and the other to the motherboard's processor. The I2C channel connected to the BMC is used by the BMC to perform out-of-band management of the hard drive's presence, alarm, and LED status. The I2C channel connected to the motherboard processor is also called VPP. It has the physical electrical characteristics of I2C but runs the VPP protocol. It is used by the processor to configure the NVME disk's LED / present / alarm status. When the NVME of a hard drive backplane may be connected to the PCIe ports of multiple processors, an NVME management bus signal needs to be reserved for each processor.

[0065] Figure 3 Compared to Figure 2 Specifically, the server provided in this application adds an I2C access channel from the PCH chip to the complex programmable logic device (CPLD) on the hard drive backplane. This access channel is multiplexed with the original VPP access channel of the hard drive backplane. After power-on, the PCH chip first determines the target PCIe port of the connected NVMe hard drive during the hardware initialization phase. Specifically, it first identifies which hard drive slots have NVMe hard drives inserted in the system through this I2C access channel from the CPLD and the dedicated GPIO of NVMe on the hard drive backplane. Then, it identifies the target PCIe port according to the preset slot port mapping table stored in the BIOS, obtains and applies the NVMe hard drive management function configuration strategy, and initializes the corresponding PCIe port to the VMD enabled mode before entering the BIOS menu, thus achieving the goal of successfully initializing the NVMe hard drive management function when entering the BIOS configuration for the first time.

[0066] Based on the above-mentioned server, the BIOS in the server provided in this application embodiment can be used to pre-store the NVME hard disk management function configuration policy. When executing the NVME hard disk management function configuration, the processor on the server motherboard is used to configure the NVME hard disk management function and initialize the target PCIe port according to the NVME hard disk management function configuration policy pre-stored in the BIOS.

[0067] Based on the above embodiments, as a preferred embodiment, the motherboard may also include a MUX selector. The first input of the MUX selector is the processor's NVME management bus signal, also known as the VPP signal, which is a dedicated NVME management bus for the processor and has a physical form similar to the I2C bus. The second input of the MUX selector is the I2C signal of the PCH chip, and the output of the MUX selector is connected to the Complex Programmable Logic Device (CPLD) via the I2C bus; the Sel selection signal of the MUX selector is connected to the general-purpose input / output interface of the PCH chip.

[0068] The PCH chip is used to select the MUX selector to the I2C signal of the PCH chip during the hardware initialization phase. In addition, the PCH chip can also be used to confirm the NVMe hard drive connected to the hard drive slot via the I2C channel, and to select the MUX selector to the NVMe management bus signal of the processor after the hardware initialization phase is completed.

[0069] In the specific application of this application embodiment, the PCIe port number of the processor corresponding to each NVME slot on the hard drive backplane of this system can be pre-stored in the basic input / output system. For example, NVME slot 0 corresponds to channel 0:3 of PCIe0 of processor 0, and NVME slot n corresponds to channel y:y+3 of PCIeEx of processor m. This embodiment uses a x4 bit-width NVME hard drive as an example.

[0070] The configuration menu for the Basic Input / Output System (BIOS) can also include an option to automatically enable Virtual Machine Deployment (VMD) on the PCIe port where the NVMe hard drive is located. This option can be configured with a default setting, such as being enabled by default. In this case, the BIOS will automatically update the PCIe VMD settings based on the latest NVMe PCIe port distribution each time the system powers on and restarts. This is useful for configuring VROC in the BIOS or OS later. This option can also be changed to disable all VMDs upon customer request, or to keep the current VMD configuration unchanged and disable the automatic VMD update function.

[0071] See Figure 4 , Figure 4 This is a flowchart of another boot method for a server NVME hard drive provided in an embodiment of this application. The corresponding execution process can be found in [reference needed]. Figure 4 , Figure 4 The VMD function is also the NVME hard disk management function described in this application.

[0072] After power-on, the BIOS bootloader runs, and the PCH chip changes the MUX selector to select the I2C bus of the PCH. At this time, the NVMe management bus signal has not yet started working and does not require access. Then, it reads the PRESENT# and IFDET# signal status of all hard drive slots from the Complex Programmable Logic Device (CPLD) on the hard drive backplane to identify which hard drive slots have NVMe hard drives inserted. Then, it switches the MUX selector back to the VPP channel, allowing the processor to use VPP functions normally after power-on. The BIOS identifies which PCIe ports have NVMe hard drives inserted based on the mapping table of NVMe hard drive slots to processor PCIe ports, i.e., the preset slot port mapping table. Depending on the different preset options for whether to automatically configure NVMe hard drive management functions, the BIOS enables NVMe hard drive management functions on PCIe ports with NVMe hard drives inserted and disables NVMe hard drive management functions on PCIe ports without NVMe hard drives connected. If the user has no need for NVMe hard drive management functions and VROC, the option for whether to automatically configure NVMe hard drive management functions can be set to delete VMD or remain unchanged, thereby deleting all NVMe hard drive management functions or not performing any additional NVMe hard drive management function configuration. Afterwards, the BIOS boot program completes the scanning and initialization of the PCIe port, and the NVMe hard drive management function becomes active.

[0073] If users need to complete the NVMe hard drive VROC configuration under the operating system, after booting into the OS normally with the option to automatically configure VMD, they can use the mdadm command to complete the NVMe hard drive VROC configuration.

[0074] If users need to complete VROC configuration in the BIOS configuration interface, after powering on with the option to automatically configure VMD, they can press the BIOS boot button during startup to enter the BIOS configuration interface, complete the NVMe hard drive VROC configuration in the BIOS configuration interface, save the BIOS configuration, and restart to enter the operating system.

[0075] As can be seen, this embodiment adds an I2C access channel from the PCH to the hard drive backplane, which is multiplexed with the existing VPP channel. During startup, the PCH chip can automatically identify which slots already have NVMe hard drives in place from the backplane's complex programmable logic device (CPLD). It then looks up the corresponding PCIe port in a preset slot port mapping table containing NVMe slots and PCIe ports, automatically configuring these PCIe ports to enable NVMe hard drive management. Afterward, it performs PCIe port scanning and initialization, ensuring that the NVMe hard drive management function of the NVMe port is effective upon first boot into the BIOS or operating system, without requiring a second boot. Furthermore, this embodiment does not rely on the BMC system and does not require modification to the hard drive backplane design.

[0076] This application also provides a boot system for a server NVMe hard drive, including:

[0077] The port determination module is used to determine the target PCIe port of the connected NVMe hard drive during the hardware initialization phase after detecting the power-on command.

[0078] The policy acquisition module is used to acquire NVMe hard drive management function configuration policies;

[0079] The policy configuration module is used to configure the enabling status of the NVMe hard disk management function of the target PCIe port according to the NVMe hard disk management function configuration policy;

[0080] The port configuration module is used to initialize the target PCIe port and complete the hardware initialization.

[0081] This application embodiment can also achieve the acquisition of NVMe hard drive management function configuration policies during the hardware initialization phase, i.e., during the system's PCIe initialization phase. This allows the NVMe hard drive management function of the corresponding port to be pre-configured, so that the NVMe hard drive management function of the NVMe port becomes effective upon first boot into the BIOS or OS. Users do not need to restart for the PCIe port's NVMe hard drive management function to become effective, thereby improving the efficiency of NVMe hard drive management and enhancing the user experience.

[0082] Based on the above embodiments, as a preferred embodiment, the port determination module includes:

[0083] The hard drive slot determination unit is used to confirm, during the hardware initialization phase, the NVMe hard drive that has been inserted into the hard drive slot via the PCH chip.

[0084] The port determination unit is used to determine the target PCIe port corresponding to the hard disk slot according to a preset slot port mapping table.

[0085] Based on the above embodiments, as a preferred embodiment, it further includes:

[0086] The mapping table generation module is used to generate the preset slot port mapping table containing the mapping relationship between hard disk slots and PCIe ports, and store it in the basic input / output system.

[0087] Based on the above embodiments, as a preferred embodiment, the hard disk slot determining unit includes:

[0088] The signal detection subunit is used to determine the type of hard drive inserted into the hard drive slot based on the PRESENT# and IFDET# signals of the NVME hard drive slot. When the PRESENT# signal is high and the IFDET# signal is low, the hard drive inserted into the hard drive slot is an NVME hard drive. When both the PRESENT# and IFDET# signals are low, the hard drive inserted into the hard drive slot is a SAS type hard drive or a SATA type hard drive.

[0089] Based on the above embodiments, as a preferred embodiment, the strategy configuration module is a module for performing the following steps:

[0090] If the NVMe disk management function configuration policy is to automatically enable the NVMe disk management function on the PCIe port where the NVMe disk is located, then the NVMe disk management function of the target PCIe port is configured to be enabled, and the NVMe disk management function of other PCIe ports is configured to be disabled.

[0091] If the NVMe disk management function configuration policy is to automatically enable NVMe disk management function on all PCIe ports, then the NVMe disk management function on all PCIe ports is configured to be enabled.

[0092] If the NVMe disk management function configuration policy is to automatically disable the NVMe disk management function on all PCIe ports, then the NVMe disk management function on all PCIe ports is configured to be disabled.

[0093] If the NVMe disk management function configuration policy is to manually configure the NVMe disk management function of each PCIe port, then read the NVMe disk management function configuration options of each PCIe port in the NVMe disk management function configuration policy, and configure the NVMe disk management function on or off status of each PCIe port to be consistent with the NVMe disk management function configuration options.

[0094] Based on the above embodiments, as a preferred embodiment, it further includes:

[0095] The NVMe hard disk management function configuration policy configuration module is used to configure the NVMe hard disk management function configuration policy and store it in the basic input / output system; the NVMe hard disk management function configuration policy includes whether to automatically enable the NVMe hard disk management function on the PCIe port where the NVMe hard disk is located, whether to disable the NVMe hard disk management function on all ports, whether to enable the NVMe hard disk management function on all ports, and whether to manually configure the NVMe hard disk management function.

[0096] Based on the above embodiments, as a preferred embodiment, it further includes:

[0097] The function setting module is used to configure the processor virtual RAID function of the NVME hard disk using the mdadm command after the server enters the operating system.

[0098] Based on the above embodiments, as a preferred embodiment, after the BIOS boots up, it further includes:

[0099] The virtual RAID function enabling module is used to receive the BIOS boot command, enter the BIOS configuration interface, configure the processor virtual RAID function of the NVMe hard drive in the BIOS configuration interface, save the BIOS settings and restart the server to enable the processor virtual RAID function.

[0100] This application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed, can perform the steps provided in the above embodiments. The storage medium may include various media capable of storing program code, such as a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0101] This application also provides a server, which may include a memory and a processor. The memory stores a computer program, and when the processor calls the computer program in the memory, it can implement the steps provided in the above embodiments. Of course, the server may also include various network interfaces, power supplies, and other components.

[0102] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. As the system provided in the embodiments corresponds to the method provided in the embodiments, the description is relatively simple; relevant parts can be found in the method section.

[0103] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand the method and core ideas of this application. It should be noted that those skilled in the art can make several improvements and modifications to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of the claims of this application.

[0104] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A boot method for a server NVME hard drive, characterized in that, An application is made in a server including a hard drive backplane and a motherboard. The hard drive backplane has a Complex Programmable Logic Device (CPLD) and hard drive slots for connecting NVMe hard drives. The motherboard has a processor, a PCH chip, and a MUX selector. The PCH chip is connected to the CPLD via an I2C access channel. The first input of the MUX selector is the NVMe management bus signal of the processor, and the second input is the I2C signal of the PCH chip. The output of the MUX selector is connected to the CPLD via an I2C bus, and the Sel selection signal of the MUX selector is connected to the general-purpose input / output interface of the PCH chip. The method includes: Upon detecting the power-on command, during the hardware initialization phase, the PCH chip outputs a selection signal through the general-purpose input / output interface to the Sel selection signal terminal of the MUX selector, controlling the MUX selector to select the I2C signal of the PCH chip. The PCH chip accesses the complex programmable logic device (CPLD) on the hard disk backplane via the I2C access channel and the MUX selector, reads the PRESENT and IFDET signals of the hard disk slot, determines the NVMe hard disk that has been inserted into the hard disk slot based on the PRESENT and IFDET signals, and determines the target PCIe port corresponding to the hard disk slot according to the preset slot port mapping table. Obtain NVMe hard drive management configuration strategies; After the hardware initialization phase is completed, the PCH chip controls the MUX selector to select the NVME management bus signal of the processor; Configure the NVMe hard disk management function of the target PCIe port to enable or disable it according to the NVMe hard disk management function configuration policy. Perform port initialization on the target PCIe port to complete hardware initialization.

2. The startup method according to claim 1, characterized in that, During the hardware initialization phase, determining the target PCIe port for the connected NVMe hard drive includes: During the hardware initialization phase, the PCH chip is used to confirm that the NVMe hard drive has been inserted into the hard drive slot. The target PCIe port corresponding to the hard drive slot is determined according to the preset slot port mapping table.

3. The startup method according to claim 2, characterized in that, Before determining the target PCIe port corresponding to the hard drive slot according to the preset slot port mapping table, the process also includes: Generate the preset slot port mapping table containing the mapping relationship between hard disk slots and PCIe ports, and store it in the basic input / output system.

4. The startup method according to claim 2, characterized in that, During the hardware initialization phase, the NVMe hard drives that are confirmed to be inserted into the hard drive slot via the PCH chip include: The type of hard drive inserted into the hard drive slot is determined by the PRESENT# and IFDET# signals of the NVME hard drive slot; When the PRESENT# signal is high and the IFDET# signal is low, the hard drive inserted into the hard drive slot is an NVME hard drive; When both the PRESENT# signal and the IFDET# signal are low, the hard drive inserted into the hard drive slot is a SAS type hard drive or a SATA type hard drive.

5. The startup method according to claim 1, characterized in that, Configure the NVMe disk management function of the target PCIe port to enable or disable the NVMe disk management function according to the NVMe disk management function configuration policy, including: If the NVMe disk management function configuration policy is to automatically enable the NVMe disk management function on the PCIe port where the NVMe disk is located, then the NVMe disk management function of the target PCIe port is configured to be enabled, and the NVMe disk management function of other PCIe ports is configured to be disabled. If the NVMe disk management function configuration policy is to automatically enable NVMe disk management function on all PCIe ports, then the NVMe disk management function on all PCIe ports is configured to be enabled. If the NVMe disk management function configuration policy is to automatically disable the NVMe disk management function on all PCIe ports, then the NVMe disk management function on all PCIe ports is configured to be disabled. If the NVMe disk management function configuration policy is to manually configure the NVMe disk management function of each PCIe port, then read the NVMe disk management function configuration options of each PCIe port in the NVMe disk management function configuration policy, and configure the NVMe disk management function on or off status of each PCIe port to be consistent with the NVMe disk management function configuration options.

6. A server, characterized in that, include: Hard disk backplane; the hard disk backplane is provided with a complex programmable logic device (CPLD) and a hard disk slot for connecting an NVMe hard disk. Motherboard; the motherboard is equipped with a processor and a PCH chip; and the PCH chip is connected to the complex programmable logic device CPLD via an I2C access channel; the PCH chip is used to determine the target PCIe port of the connected NVMe hard drive during the hardware initialization phase via the I2C access channel; The processor is used to configure the NVMe hard disk management function and initialize the target PCIe port according to the NVMe hard disk management function configuration policy; the motherboard is also equipped with a MUX selector; The first input of the MUX selector is the NVME management bus signal of the processor, the second input of the MUX selector is the I2C signal of the PCH chip, and the output of the MUX selector is connected to the complex programmable logic device (CPLD) via the I2C bus; the Sel selection signal of the MUX selector is connected to the general-purpose input / output interface of the PCH chip; the PCH chip is used to select the MUX selector to the I2C signal of the PCH chip during the hardware initialization phase.

7. A boot system for a server NVME hard drive, characterized in that, This system is applied to servers including a hard drive backplane and a motherboard. The hard drive backplane has a Complex Programmable Logic Device (CPLD) and hard drive slots for connecting NVMe hard drives. The motherboard has a processor, a PCH chip, and a MUX selector. The PCH chip is connected to the CPLD via an I2C access channel. The first input of the MUX selector is the NVMe management bus signal of the processor, and the second input is the I2C signal of the PCH chip. The output of the MUX selector is connected to the CPLD via an I2C bus, and the Sel selection signal of the MUX selector is connected to the general purpose input / output interface of the PCH chip. The system includes: The port determination module is used to detect the power-on command and, during the hardware initialization phase, the PCH chip outputs a selection signal to the Sel selection signal terminal of the MUX selector through the general-purpose input / output interface, controlling the MUX selector to select the I2C signal of the PCH chip. The PCH chip accesses the complex programmable logic device (CPLD) of the hard disk backplane through the I2C access channel and the MUX selector, reads the PRESENT and IFDET signals of the hard disk slot, determines the NVMe hard disk that has been inserted into the hard disk slot based on the PRESENT and IFDET signals, and determines the target PCIe port corresponding to the hard disk slot according to the preset slot port mapping table. The policy acquisition module is used to acquire NVMe hard drive management function configuration policies; The policy configuration module is used to control the MUX selector to select the NVME management bus signal of the processor after the hardware initialization phase is completed; and to configure the enabling status of the NVME hard disk management function of the target PCIe port according to the NVME hard disk management function configuration policy. The port configuration module is used to initialize the target PCIe port and complete the hardware initialization.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the server NVME hard disk boot method as described in any one of claims 1-5.

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