Power battery control system of vehicle and related device

Abstract

The application discloses a power battery control system of a vehicle. The system uses three input ends of a system basic chip and a main control chip to control a relay of a power output of a power battery of the vehicle through a logic circuit. When a first input end of the logic circuit is at a high level and levels of a second input end and a third input end are opposite, the logic circuit outputs an effective level signal to a drive circuit of the relay; otherwise, the logic circuit is at a high resistance state. Thus, the power battery control system of the vehicle provided by the application can maintain the relay closed for a period of time before the relay is opened when the MCU and / or the SBC fails, the control signal of the MCU and / or the SBC suddenly drops, the logic circuit is at the high resistance state, and the voltage of the control signal received by the relay slowly drops due to the existence of an oscillation circuit connected to an output end of the logic circuit, so that the vehicle does not suddenly lose power, and the safety of the vehicle is improved.

Description

Technical Field

[0001] This application relates to the field of power supply, and more particularly to a power battery control system and related devices for a vehicle. Background Technology

[0002] Currently, the relays controlling the power output of a vehicle's battery are generally controlled by a main control chip (MCU, Microcontroller Unit) and a system base chip (SBC). The output signals of the MCU and SBC are usually connected together to an AND gate to control the power output of the relays from the vehicle's battery.

[0003] However, this means that if the MCU or SBC output malfunctions, the control signal of the MCU or SBC will suddenly drop, causing the relay controlling the power output of the vehicle's battery to trip. If this type of fault occurs while the vehicle is in motion, the vehicle will suddenly lose power, posing a significant safety risk. Summary of the Invention

[0004] To address the aforementioned technical problems, this application provides a power battery control system and related devices for a vehicle, used to control the output of the power battery and improve vehicle safety.

[0005] To achieve the above objectives, the technical solutions provided in this application are as follows:

[0006] This application provides a power battery control system for a vehicle, including: a system base chip, a main control chip, a logic circuit, and an oscillation circuit;

[0007] The system base chip is connected to the first input terminal of the logic circuit; the first signal terminal of the main control chip is connected to the second input terminal of the logic circuit, and the second signal terminal of the main control chip is connected to the third input terminal of the logic circuit; the output terminal of the logic circuit is used to connect to the relay drive circuit; the first terminal of the oscillation circuit is connected to the relay drive circuit, and the second terminal of the oscillation circuit is grounded; the relay is used to control the power output of the power battery.

[0008] The system base chip is used to output system control signals;

[0009] The main control chip is used to output main control signals;

[0010] The logic circuit is used to output a valid level signal to the relay drive circuit when the first input terminal is high and the levels of the second and third input terminals are opposite; otherwise, it is in a high-impedance state.

[0011] Optionally, when the first input terminal of the logic circuit is at a high level, the second input terminal is at a low level, and the third input terminal is at a high level, the logic circuit outputs a high level; when the first input terminal of the logic circuit is at a high level, the second input terminal is at a high level, and the third input terminal is at a low level, the logic circuit outputs a low level.

[0012] Optionally, the logic circuit includes: an XOR gate, a NOT gate, a first AND gate, a second AND gate, and a tri-state output circuit;

[0013] The first input terminal is connected to the enable terminal of the tri-state output circuit via the first AND gate; the two input terminals of the XOR gate are respectively connected to the second input terminal and the third input terminal; the output terminal of the XOR gate is connected to the enable terminal via the first AND gate; one input terminal of the second AND gate is connected to the second input terminal via the NOT gate, and the other input terminal of the second AND gate is connected to the third input terminal; the output terminal of the second AND gate is connected to the signal terminal of the tri-state output circuit; the output terminal of the tri-state output circuit is used to connect to the drive circuit of the relay.

[0014] Optionally, when the first input terminal of the logic circuit is at a high level, the second input terminal is at a low level, and the third input terminal is at a high level, the logic circuit outputs a low level; when the first input terminal of the logic circuit is at a high level, the second input terminal is at a high level, and the third input terminal is at a low level, the logic circuit outputs a high level.

[0015] Optionally, the logic circuit includes: an XOR gate, a NOT gate, a first AND gate, a second AND gate, and a tri-state output circuit;

[0016] The first input terminal is connected to the enable terminal of the tri-state output circuit via the first AND gate; the two input terminals of the XOR gate are respectively connected to the second input terminal and the third input terminal; the output terminal of the XOR gate is connected to the enable terminal via the first AND gate; one input terminal of the second AND gate is connected to the third input terminal via the NOT gate, and the other input terminal of the second AND gate is connected to the second input terminal; the output terminal of the second AND gate is connected to the signal terminal of the tri-state output circuit; the output terminal of the tri-state output circuit is used to connect to the drive circuit of the relay.

[0017] Optionally, when the enable terminal of the tri-state output circuit is low, the tri-state output circuit is in a high-impedance state; when both the enable terminal and the signal terminal of the tri-state output circuit are high, the output of the tri-state output circuit is high; when the enable terminal of the tri-state output circuit is high and the signal terminal of the tri-state output circuit is low, the output of the tri-state output circuit is low.

[0018] Optionally, the oscillation circuit includes a capacitor and a resistor;

[0019] The capacitor and resistor are respectively connected between the output terminal of the logic circuit and the ground line.

[0020] Optionally, the system further includes: a signal feedback module;

[0021] The signal feedback module is connected to the output terminal of the logic circuit; the signal feedback module is used to provide feedback on the output signal of the logic circuit.

[0022] This application provides a vehicle power system, the system comprising: a power battery, a relay, and the aforementioned vehicle power battery control system; the power battery and the power battery control system are respectively connected to the relay;

[0023] The vehicle's power battery control system controls the power output of the power battery through the relay.

[0024] This application provides an electric vehicle, which includes: a power system as described above, and an electronic control unit; the electronic control unit is connected to the power system.

[0025] The electronic control unit controls the power output of the power system.

[0026] As can be seen from the above technical solution, this application has the following beneficial effects:

[0027] This application provides a vehicle power battery control system, including: a system base chip, a main control chip, a logic circuit, and an oscillation circuit; the system base chip is connected to the first input terminal of the logic circuit; the first signal terminal of the main control chip is connected to the second input terminal of the logic circuit, and the second signal terminal of the main control chip is connected to the third input terminal of the logic circuit; the output terminal of the logic circuit is used to connect to the drive circuit of a relay; the first terminal of the oscillation circuit is connected to the drive circuit of the relay, and the second terminal of the oscillation circuit is grounded; the relay is used to control the power output of the power battery; the system base chip is used to output system control signals; the main control chip is used to output main control signals; the logic circuit is used to output an effective level signal to the drive circuit of the relay when the first input terminal is high and the levels of the second and third input terminals are opposite; otherwise, it is in a high-impedance state.

[0028] Therefore, the vehicle power battery control system provided in this application uses a logic circuit to control the relay that controls the power output of the vehicle power battery through a relay, which is connected to the three input terminals of the system base chip and the main control chip. When the first input terminal is high and the levels of the second and third input terminals are opposite, the logic circuit outputs a valid level signal to the relay's drive circuit; otherwise, it is in a high-impedance state. Thus, in the vehicle power battery control system provided in this application, if the MCU and / or SBC malfunctions, and the control signals of the MCU and / or SBC suddenly drop, the logic circuit is in a high-impedance state. Furthermore, due to the presence of the oscillation circuit connected to the output terminal of the logic circuit, the voltage of the control signal received by the relay will slowly decrease, causing the relay to remain closed for a period of time before opening. This prevents the vehicle from suddenly losing power, thereby improving vehicle safety. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 A schematic diagram of a vehicle power battery control system provided in an embodiment of this application;

[0031] Figure 2 An output signal diagram of a logic circuit provided in an embodiment of this application;

[0032] Figure 3 A schematic diagram of a logic circuit structure provided in an embodiment of this application;

[0033] Figure 4 This is a diagram of a three-state circuit output signal provided in an embodiment of this application. Detailed Implementation

[0034] To help better understand the solutions provided in the embodiments of this application, before introducing the methods provided in the embodiments of this application, we will first introduce the application scenarios of the solutions in the embodiments of this application.

[0035] Currently, the relays controlling the power output of a vehicle's battery are generally controlled by the main control chip (MCU) and the system base chip (SBC). The output signals of the MCU and SBC are typically connected together to an AND gate to control the relay's power output. However, this means that if the MCU or SBC output malfunctions, the control signal of the MCU or SBC will suddenly drop, causing the relay controlling the vehicle's battery power output to trip. If this type of fault occurs while the vehicle is in motion, the vehicle will suddenly lose power, posing a significant safety risk.

[0036] To address the aforementioned technical problems, the vehicle power battery control system provided in this application uses a logic circuit to control a relay that controls the power output of the vehicle power battery via three input terminals of the system base chip and the main control chip. When the first input terminal is high and the levels of the second and third input terminals are opposite, the logic circuit outputs a valid level signal to the relay's drive circuit; otherwise, it is in a high-impedance state. Thus, in the vehicle power battery control system provided in this application, if the MCU and / or SBC malfunctions, causing the control signals of the MCU and / or SBC to suddenly drop, the logic circuit will be in a high-impedance state. Furthermore, due to the presence of an oscillation circuit connected to the output terminal of the logic circuit, the voltage of the control signal received by the relay will slowly decrease, causing the relay to remain closed for a period of time before opening. This prevents the vehicle from suddenly losing power, thereby improving vehicle safety.

[0037] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the embodiments of this application will be further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0038] See Figure 1 This figure is a schematic diagram of a vehicle power battery control system structure provided in an embodiment of this application. Figure 1 As shown in the embodiment of this application, the power battery control system for a vehicle includes: a system base chip 100, a main control chip 200, a logic circuit 300, and an oscillation circuit 400.

[0039] The system base chip 100 is connected to the first input terminal of the logic circuit 300; the first signal terminal of the main control chip 200 is connected to the second input terminal of the logic circuit 300, and the second signal terminal of the main control chip 200 is connected to the third input terminal of the logic circuit 300; the output terminal of the logic circuit 300 is used to connect to the relay drive circuit; the first terminal of the oscillation circuit 400 is connected to the relay drive circuit, and the second terminal of the oscillation circuit 400 is grounded; the relay is used to control the power output of the power battery.

[0040] In this embodiment, the system base chip 100 is used to output system control signals; the main control chip 200 is used to output main control signals; and the logic circuit 300 is used to output a valid level signal to the relay drive circuit when the first input terminal is high and the levels of the second and third input terminals are opposite; otherwise, it is in a high impedance state.

[0041] It is understood that in the system provided in this application embodiment, when the MCU malfunctions, the signals output from the two output terminals of the MCU are usually pulled high or low simultaneously. At this time, the signals from the second and third input terminals of the logic circuit in this application will also be pulled high or low simultaneously, causing the logic circuit to be in a high-impedance state. At this time, the output signal sent by the vehicle's power battery control system to the relay in this application embodiment is at a high level, and the voltage is slowly released to ground through the oscillation circuit. Thus, the voltage of the control signal received by the relay will slowly decrease, causing the relay to remain closed for a period of time before opening, thereby giving the MCU some time to adjust its output signal and prevent the vehicle from suddenly losing power. Similarly, in the system provided in this application embodiment, when the SBC malfunctions, causing the SBC output signal to be pulled low, the logic circuit is also in a high-impedance state.

[0042] The following will introduce two specific implementation methods of the logic circuit in the embodiments of this application:

[0043] See Figure 2 This figure is an output signal diagram of a logic circuit provided in an embodiment of this application. Figure 2 As shown, 0 represents a low level, 1 represents a high level, X represents any state, and Hi-Z represent the logic circuit being in a high-impedance state. In this embodiment, as one possible implementation, when the first input terminal of the logic circuit is high, the second input terminal is low, and the third input terminal is high, the logic circuit outputs a high level; when the first input terminal of the logic circuit is high, the second input terminal is high, and the third input terminal is low, the logic circuit outputs a low level.

[0044] It is understood that in the system provided in this application embodiment, if the MCU and SBC normally control the relay to open, the SBC output signal is high, the MCU's first signal terminal outputs low, and the MCU's second signal terminal outputs high. At this time, the logic circuit output is high. In this case, the oscillation circuit will not affect the control signal received by the relay, and the control signal received by the relay is also high.

[0045] It is understood that in the system provided in this application embodiment, if the MCU and SBC normally control the relay to turn off, the SBC output signal is high, the MCU's first signal terminal outputs a high level, and the MCU's second signal terminal outputs a low level. At this time, the logic circuit output is low. In this case, the oscillation circuit will not affect the control signal received by the relay, and the control signal received by the relay is also low.

[0046] See Figure 3 This figure is a schematic diagram of a logic circuit structure provided in an embodiment of this application. Figure 3 As shown, the logic circuit in the embodiment of this application includes: an XOR gate D1, a NOT gate D2, a first AND gate D3, a second AND gate D4, and a tri-state output circuit D5.

[0047] Specifically, the first input terminal SS1 is connected to the enable terminal of the tri-state output circuit D5 through the first AND gate D3; the two input terminals of the XOR gate D1 are connected to the second input terminal A and the third input terminal B, respectively; the output terminal of the XOR gate D1 is connected to the enable terminal EN through the first AND gate D3; one input terminal of the second AND gate D4 is connected to the second input terminal A through the NOT gate D2, and the other input terminal of the second AND gate D4 is connected to the third input terminal B; the output terminal of the second AND gate D4 is connected to the signal terminal IN of the tri-state output circuit D5; and the output terminal OUT of the tri-state output circuit D5 is used to connect to the relay drive circuit.

[0048] In this embodiment of the application, as another possible implementation, when the first input terminal of the logic circuit is at a high level, the second input terminal is at a low level, and the third input terminal is at a high level, the logic circuit outputs a low level; when the first input terminal of the logic circuit is at a high level, the second input terminal is at a high level, and the third input terminal is at a low level, the logic circuit outputs a high level.

[0049] It is understood that in the system provided in this application embodiment, if the MCU and SBC normally control the relay to open, the SBC output signal is high, the MCU's first signal terminal outputs a high level, and the MCU's second signal terminal outputs a low level. At this time, the logic circuit output is high. In this case, the oscillation circuit will not affect the control signal received by the relay, and the control signal received by the relay is also high.

[0050] It is understood that in the system provided in this application embodiment, if the MCU and SBC normally control the relay to turn off, the SBC output signal is high, the MCU's first signal terminal outputs low, and the MCU's second signal terminal outputs high. At this time, the logic circuit output is low. In this case, the oscillation circuit will not affect the control signal received by the relay, and the control signal received by the relay is also low.

[0051] In this implementation, the logic circuit in the embodiments of this application includes: an XOR gate, a NOT gate, a first AND gate, a second AND gate, and a tri-state output circuit;

[0052] The first input terminal is connected to the enable terminal of the tri-state output circuit via the first AND gate; the two input terminals of the XOR gate are connected to the second input terminal and the third input terminal respectively; the output terminal of the XOR gate is connected to the enable terminal via the first AND gate; one input terminal of the second AND gate is connected to the third input terminal via the NOT gate, and the other input terminal of the second AND gate is connected to the second input terminal; the output terminal of the second AND gate is connected to the signal terminal of the tri-state output circuit; the output terminal of the tri-state output circuit is used to connect to the relay drive circuit.

[0053] The tri-state output circuit in the two possible implementations described above will be described in detail below:

[0054] See Figure 4 This figure shows the output signal of a three-state circuit provided in an embodiment of this application. Figure 4 As shown, 0 represents a low level, 1 represents a high level, X represents any state, and Hi-Z represent the logic circuit being in a high-impedance state. In the embodiments of this application, when the enable terminal EN of the tri-state output circuit is low, the tri-state output circuit is in a high-impedance state Hi-Z; when both the enable terminal EN and the signal terminal IN of the tri-state output circuit are high, the output OUT of the tri-state output circuit is high; when the enable terminal EN of the tri-state output circuit is high and the signal terminal IN of the tri-state output circuit is low, the output OUT of the tri-state output circuit is low.

[0055] The oscillation circuit in this application will be described in detail below through a specific embodiment:

[0056] In one possible implementation of this application, the oscillation circuit may include a capacitor and a resistor; the capacitor and resistor are respectively connected between the output terminal of the logic circuit and the ground line. It is understood that, due to the presence of the oscillation circuit, when the logic circuit is in a high-impedance state, the voltage at the first terminal of the oscillation circuit is affected by the voltage at the previous moment. If the first terminal was at a high level at the previous moment, then the voltage at the first terminal will slowly decrease through the slow discharge of the RC circuit, with a time constant of RC. If the voltage was at a low level at the previous moment, then it remains at a low level.

[0057] In one possible implementation of this application, the vehicle's power battery control system further includes: a signal feedback module; the signal feedback module is connected to the output terminal of the logic circuit; the signal feedback module is used to feed back the output signal of the logic circuit.

[0058] The vehicle power battery control system provided in this application uses a logic circuit to control the relay that controls the power output of the vehicle power battery through a relay, which is connected to the three input terminals of the system base chip and the main control chip. When the first input terminal is high and the levels of the second and third input terminals are opposite, the logic circuit outputs a valid level signal to the relay's drive circuit; otherwise, it is in a high-impedance state. Thus, in the vehicle power battery control system provided in this application, if the MCU and / or SBC malfunctions, and the control signals of the MCU and / or SBC suddenly drop, the logic circuit is in a high-impedance state. Furthermore, due to the presence of the oscillation circuit connected to the output terminal of the logic circuit, the voltage of the control signal received by the relay will slowly decrease, causing the relay to remain closed for a period of time before opening. This prevents the vehicle from suddenly losing power, thereby improving vehicle safety.

[0059] According to the vehicle power battery control system provided in the above embodiments, this application also provides a vehicle power system, characterized in that the system includes: a power battery, a relay, and the vehicle power battery control system provided in the above embodiments; the power battery and the power battery control system are respectively connected to the relay; the vehicle power battery control system controls the power output of the power battery through the relay.

[0060] Based on the vehicle power battery control system and vehicle power system provided in the above embodiments, this application also provides an electric vehicle, characterized in that the electric vehicle includes: the power system provided in the above embodiments, and an electronic control unit; the electronic control unit is connected to the power system; and the electronic control unit controls the power output of the power system.

[0061] As can be seen from the above description of the embodiments, those skilled in the art can clearly understand that all or part of the steps in the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, a server, or a network communication device such as a media gateway, etc.) to execute the methods described in various embodiments or some parts of the embodiments of this application.

[0062] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. Regarding the methods disclosed in the embodiments, since they correspond to the systems disclosed in the embodiments, the descriptions are relatively simple; relevant parts can be referred to the system section description.

[0063] It should also be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0064] The above description of the disclosed embodiments will enable those skilled in the art to make or use various modifications to these embodiments. It will be readily apparent to those skilled in the art that the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A power storage device control system of a vehicle characterized by comprising: Comprising: system base chip, master control chip, logic circuit and oscillation circuit; The first input end of the logic circuit is connected with the system base chip; the second input end of the logic circuit is connected with the first signal end of the master control chip, and the third input end of the logic circuit is connected with the second signal end of the master control chip; the output end of the logic circuit is used for connecting the driving circuit of the relay; the first end of the oscillation circuit is connected with the driving circuit of the relay, and the second end of the oscillation circuit is grounded; the relay is used for controlling the power output of the power battery; The system base chip is used for outputting system control signals. The master control chip is used for outputting master control signals. When the first input end is high level and the levels of the second input end and the third input end are opposite, the logic circuit outputs a valid level signal to the driving circuit of the relay. Otherwise, it is in a high resistance state.

2. The system of claim 1, wherein, When the first input end of the logic circuit is high level, the second input end is low level and the third input end is high level, the logic circuit outputs low level; when the first input end of the logic circuit is high level, the second input end is high level and the third input end is low level, the logic circuit outputs high level.

3. The system of claim 2, wherein, The logic circuit comprises an exclusive OR gate, a NOT gate, a first AND gate, a second AND gate and a tri-state output circuit. The first input end is connected with the enable end of the tri-state output circuit through the first AND gate; the two input ends of the exclusive OR gate are connected with the second input end and the third input end respectively; the output end of the exclusive OR gate is connected with the enable end through the first AND gate; one input end of the second AND gate is connected with the second input end through the NOT gate, and the other input end of the second AND gate is connected with the third input end; the output end of the second AND gate is connected with the signal end of the tri-state output circuit; and the output end of the tri-state output circuit is used for connecting the driving circuit of the relay.

4. The system of claim 1, wherein, When the first input end of the logic circuit is high level, the second input end is low level and the third input end is high level, the logic circuit outputs low level; when the first input end of the logic circuit is high level, the second input end is high level and the third input end is low level, the logic circuit outputs high level.

5. The system of claim 4, wherein, The logic circuit comprises an exclusive OR gate, a NOT gate, a first AND gate, a second AND gate and a tri-state output circuit. The first input end is connected with the enable end of the tri-state output circuit through the first AND gate; the two input ends of the exclusive OR gate are connected with the second input end and the third input end respectively; the output end of the exclusive OR gate is connected with the enable end through the first AND gate; one input end of the second AND gate is connected with the third input end through the NOT gate, and the other input end of the second AND gate is connected with the second input end; the output end of the second AND gate is connected with the signal end of the tri-state output circuit; and the output end of the tri-state output circuit is used for connecting the driving circuit of the relay.

6. The system of claim 3 or 5, wherein, When the enable terminal of the tri-state output circuit is low, the tri-state output circuit is in a high resistance state; when the enable terminal and the signal terminal of the tri-state output circuit are both high, the output of the tri-state output circuit is high; when the enable terminal of the tri-state output circuit is high and the signal terminal of the tri-state output circuit is low, the output of the tri-state output circuit is low.

7. The system of claim 1, wherein, The oscillation circuit comprises a capacitor and a resistor. The capacitor and the resistor are connected between the output terminal of the logic circuit and the ground wire, respectively.

8. The system of claim 1, wherein, The system further comprises a signal feedback module. The signal feedback module is connected to the output terminal of the logic circuit, and is configured to feed back the output signal of the logic circuit.

9. A powertrain system of a vehicle, characterized by, The system comprises a power battery, a relay, and a power battery control system of a vehicle according to any one of claims 1 to 8; the power battery and the power battery control system are connected to the relay, respectively. The power battery control system of the vehicle controls the power output of the power battery through the relay.

10. An electric vehicle characterized by comprising: The electric vehicle comprises a power system according to claim 9, and an electronic control unit; the electronic control unit is connected to the power system. The electronic control unit controls the power output of the power system.

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