Method and apparatus for high precision intra prediction

Abstract

Methods, apparatus, and non-transitory computer-readable storage media for video encoding and compression employing high precision intra prediction techniques are provided. In one method, a decoder obtains a first control flag signaled on a specified level, the specified level comprising one of the following levels: a transform block (TB) level, a coding block (CB) level, a slice level, a picture level, or a sequence level, where the first control flag indicates whether to enable a decode-end high precision intra mode derivation (DHI) mode; in response to determining that the first control flag is enabled, the decoder acquires a second flag indicating whether to use DHI of the DHI mode on the specified level; and in response to determining to use the DHI mode, the decoder derives a high precision intra mode using a predefined method.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application is based on and claims the benefit of U.S. Provisional Application No. 63 / 335,723, filed on April 27, 2022, the entire contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] The present application relates to video coding and compression. More specifically, the present application relates to a method and apparatus for improving the coding efficiency of video blocks using high-precision intra-frame prediction techniques. Background Art

[0004] Various video coding techniques can be used to compress video data. Video coding is performed according to one or more video coding standards. For example, video coding standards include Versatile Video Coding (VVC), High Efficiency Video Coding (H.265 / HEVC), Advanced Video Coding (H.264 / AVC), Moving Picture Experts Group (MPEG) coding, etc. Video coding generally uses prediction methods (e.g., inter-frame prediction, intra-frame prediction, etc.) that exploit the redundancy present in video images or sequences. Video coding techniques aim to compress video data into a form that uses a lower bit rate while avoiding or minimizing the degradation of video quality. Summary of the invention

[0005] Embodiments of the present disclosure provide methods and apparatus for video encoding and compression using high-precision intra-frame prediction technology.

[0006] According to a first aspect of the present disclosure, a video decoding method is provided, which may include: a decoder obtains a first control flag transmitted by a signal at a specified level, the specified level including one of the following levels: transform block (TB) level, coding block (CB) level, slice level, picture level or sequence level, wherein the first control flag indicates whether a decoding-side high-precision intra-frame mode derivation (DHI) mode is enabled; in response to determining that the DHI mode is enabled, the decoder obtains a second flag of the DHI indicating whether the DHI mode is used at the specified level; and in response to determining that the DHI mode is used at the specified level, the decoder derives a high-precision intra-frame mode using a predefined method.

[0007] According to a second aspect of the present disclosure, a video decoding method is provided, which may include: a decoder obtains a control flag transmitted by a signal at a specified level, the specified level including one of the following levels: transform block (TB) level, coding block (CB) level, slice level, picture level or sequence level, wherein the control flag indicates whether a decoding-side high-precision intra-frame mode derivation (DHI) mode is enabled; and in response to determining that the first control flag is enabled, the decoder derives a high-precision intra-frame mode under predefined conditions, the predefined conditions including one of the following conditions: a specific mode, or a specific block size.

[0008] According to a third aspect of the present disclosure, a video encoding method is provided, which may include: an encoder transmitting a first control flag with a signal at a specified level, the specified level including one of the following levels: transform block (TB) level, coding block (CB) level, slice level, picture level or sequence level, wherein the first control flag indicates whether a decoding-side high-precision intra-frame mode derivation (DHI) mode is enabled; in response to determining that the DHI mode is enabled, the encoder transmits a second flag of the DHI indicating whether the DHI mode is used at the specified level; and in response to determining that the DHI mode is used at the specified level, the encoder derives a high-precision intra-frame mode using a predefined method.

[0009] According to a fourth aspect of the present disclosure, a video encoding method is provided, which may include: an encoder transmitting a control flag with a signal at a specified level, the specified level including one of the following levels: transform block (TB) level, coding block (CB) level, slice level, picture level or sequence level, wherein the control flag indicates whether a decoding-side high-precision intra-frame mode derivation (DHI) mode is enabled; and in response to determining that the first control flag is enabled, the decoder derives a high-precision intra-frame mode under predefined conditions, the predefined conditions including one of the following conditions: a specific mode, or a specific block size.

[0010] According to a fifth aspect of the present disclosure, a video decoding device is provided. The device includes one or more processors and a memory coupled to the one or more processors and configured to store instructions executable by the one or more processors. In addition, when executing the instructions, the one or more processors are configured to perform the methods according to the first and second aspects above.

[0011] According to a sixth aspect of the present disclosure, a video encoding device is provided. The device includes one or more processors and a memory coupled to the one or more processors and configured to store instructions executable by the one or more processors. In addition, when executing the instructions, the one or more processors are configured to perform the methods according to the third and fourth aspects above.

[0012] According to the seventh aspect of the present disclosure, a non-temporary computer-readable storage medium is provided, which stores computer-executable instructions. When the computer-executable instructions are executed by one or more computer processors, the one or more computer processors receive a bit stream and execute the method according to the above-mentioned first and second aspects.

[0013] According to an eighth aspect of the present disclosure, a non-temporary computer-readable storage medium is provided, which stores computer-executable instructions. When the computer-executable instructions are executed by one or more computer processors, the one or more computer processors execute the method according to the third and fourth aspects to encode a current block into a bit stream and transmit the bit stream.

[0014] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not intended to restrict the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate examples consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0016] Figure 1 is a block diagram of a video encoder system according to some examples of the present disclosure.

[0017] FIG. 2A to FIG. 2E is a schematic diagram illustrating different block partitions in a multi-type tree structure according to some examples of the present disclosure.

[0018] Figure 3 is a block diagram of a video decoder according to some examples of the present disclosure.

[0019] Figure 4 A selected set of pixels on which gradient analysis is performed is shown.

[0020] Figure 5 A selected set of pixels on which gradient analysis is performed is shown.

[0021] Figure 6 Prediction fusion by weighted averaging of two HoG modes and one planar mode according to some embodiments of the present disclosure is shown.

[0022] Figure 7A template and its reference sample used in TIMD according to some embodiments of the present disclosure are shown.

[0023] Figure 8 is a block diagram illustrating an exemplary system for encoding and decoding video blocks according to some embodiments of the present disclosure.

[0024] Fig. 9 is a block diagram illustrating an exemplary video encoder according to some embodiments of the present disclosure.

[0025] Fig.10 is a block diagram illustrating an exemplary video decoder according to some embodiments of the present disclosure.

[0026] Fig.11 , Fig.12 , Fig.13 and Fig.14 is a block diagram illustrating how a frame may be recursively partitioned into multiple video blocks of different sizes and shapes according to some examples of the present disclosure.

[0027] Fig.15 Partition types of coding blocks according to some examples of the present disclosure are shown.

[0028] Fig.16 is a computing environment according to some examples of the present disclosure.

[0029] Fig.17 is a flowchart illustrating a video decoding method according to some examples of the present disclosure.

[0030] Fig.18 is a flowchart illustrating a video decoding method according to some examples of the present disclosure.

[0031] Fig.19 is a diagram showing some examples according to the present disclosure Fig.17 The video decoding method shown is a flowchart of a video encoding method corresponding to the video decoding method.

[0032] Fig. 20 is a diagram showing some examples according to the present disclosure Fig.18 The video decoding method shown is a flowchart of a video encoding method corresponding to the video decoding method. DETAILED DESCRIPTION

[0033] Reference will now be made in detail to specific embodiments, examples of which are shown in the accompanying drawings. In the following detailed description, numerous non-limiting specific details are set forth to aid in understanding the subject matter presented herein. However, it will be apparent to one of ordinary skill in the art that various alternatives may be used. For example, it will be apparent to one of ordinary skill in the art that the subject matter presented herein may be implemented on many types of electronic devices having digital video capabilities.

[0034] The terms used in this disclosure are only used to describe specific embodiments and are not intended to limit the disclosure. Unless otherwise clearly indicated throughout the disclosure, the singular forms "a", "the" and "the" in the disclosure and the appended claims are also intended to include plural forms. It should also be understood that the term "and / or" used in this disclosure refers to and includes one or any or all possible combinations of the listed multiple associated items.

[0035] References in this specification to "one embodiment," "an embodiment," "an example," "some embodiments," "some examples," or similar language mean that the particular features, structures, or characteristics described are included in at least one embodiment or example. Unless explicitly stated otherwise, features, structures, elements, or characteristics associated with one or more embodiments are also applicable to other embodiments.

[0036] In the present disclosure, unless otherwise explicitly stated, the terms "first", "second", "third", etc. are used only to refer to the names of related elements (such as devices, components, compositions, steps, etc.), without implying any spatial or temporal order. For example, "first device" and "second device" may refer to two separately formed devices, or two parts, components or operating states of the same device, and may be named arbitrarily.

[0037] The terms "module", "sub-module", "circuit", "sub-circuit", "circuitry", "sub-circuitry", "unit", or "sub-unit" may include a memory (shared, dedicated, or group) that stores code or instructions that can be executed by one or more processors. A module may include one or more circuits with or without stored code or instructions. A module or circuit may include one or more directly or indirectly connected components. These components may or may not be physically connected to each other or adjacent to each other.

[0038] As used herein, the terms "if" or "when" may be understood as "upon" or "in response to..." depending on the context. These terms, if they appear in a claim, may not indicate that the associated limitation or feature is conditional or optional. For example, a method may include the following steps: i) when or if condition X exists, perform function or action X'; ii) when or if condition Y exists, perform function or action Y'. The method may have the ability to perform function or action X' and the ability to perform function or action Y' at the same time. Therefore, functions X' and Y' may be performed at different times in multiple executions of the method.

[0039] A unit or module may be implemented in pure software, pure hardware, or a combination of hardware and software. For example, in a pure software implementation, a unit or module may include functionally related code blocks or software components that are directly or indirectly linked together to perform a specific function.

[0040] The first version of the VVC standard was completed in July 2020, which can save about 50% bitrate or provide equivalent perceptual quality compared to the previous generation video coding standard HEVC. Although the VVC standard has made significant improvements in coding over its predecessor, there is evidence that higher coding efficiency can be achieved using other coding tools. Recently, under the cooperation of ITU-TVECG and ISO / IEC MPEG, the Joint Video Exploration Team (JVET) began to explore advanced technologies that can significantly improve the coding efficiency of VVC. In April 2021, a software code base called Enhanced Compression Model (ECM) was established for future video coding exploration work. The ECM reference software is based on the VVC Test Model (VTM) developed by JVET for VVC, in which several existing modules (e.g., intra / inter prediction, transform, loop filter, etc.) are further extended and / or improved. In the future, any new coding tools beyond the VVC standard need to be integrated into the ECM platform and tested using the JVET Common Test Conditions (CTC).

[0041] Similar to all previous video coding standards, ECM is built on a block-based hybrid video coding framework. Figure 1 A block diagram of a general block-based hybrid video coding system is given. The input video signal is processed block by block, called coding unit (CU). In ECM-1.0, a CU can be up to 128x128 pixels. However, similar to VVC, a coding tree unit (CTU) is split into multiple CUs to accommodate different local characteristics based on quadtree / binarytree / ternarytree. In the multi-type tree structure, a CTU is first divided by a quadtree structure. Then, each quadtree leaf node can be further divided by binary and ternary tree structures. As shown in Figure 2, there are five types of partitioning, namely, quadruple partitioning, horizontal binary partitioning, vertical binary partitioning, horizontal ternary partitioning, and vertical ternary partitioning. In Figure 1In the video code, spatial prediction and / or temporal prediction can be performed. Spatial prediction (or "intra-frame prediction") uses pixels from samples of neighboring blocks that have been coded in the same video picture / segment (called reference samples) to predict the current video block. Spatial prediction reduces the spatial redundancy inherent in video signals. Temporal prediction (also known as "inter-frame prediction" or "motion compensated prediction") uses reconstructed pixels from coded video pictures to predict the current video block. Temporal prediction reduces the temporal redundancy inherent in video signals. The temporal prediction signal for a given CU is usually signaled by one or more motion vectors (MVs) that indicate the amount and direction of motion between the current CU and its temporal reference. In addition, if multiple reference pictures are supported, a reference picture index is additionally sent to identify which reference picture in the reference picture memory the temporal prediction signal comes from. After spatial and / or temporal prediction, the intra / inter mode decision circuit 121 in the encoder 100 selects the best prediction mode based on, for example, a rate-distortion optimization method. The block predictor 120 is then subtracted from the current video block; and the resulting prediction residual is decorrelated using the transform circuit 102 and the quantization circuit 104. The resulting quantized residual coefficients are dequantized by an inverse quantization circuit 116 and inverse transformed by an inverse transform circuit 118 to form a reconstructed residual, which is then added back to the prediction block to form a reconstructed signal for the CU. In addition, the reconstructed CU may be loop filtered 115, such as by applying a deblocking filter, sample adaptive offset (SAO), and / or adaptive loop filter (ALF), before being placed in a reference picture memory of a picture buffer 117 and used to encode future video blocks. To form an output video bitstream 114, the coding mode (inter or intra), prediction mode information, motion information, and quantized residual coefficients are all sent to an entropy coding unit 106 for further compression and packaging to form a bitstream.

[0042] Figure 3 The overall block diagram of a block-based video decoder is given. The video bitstream 201 is first entropy decoded at the entropy decoding unit 202. The coding mode and prediction information are sent to the spatial prediction unit (if intra-frame coding) or the temporal prediction unit (if inter-frame coding) to form a prediction block. For example, Figure 3In the example, the block predictor mechanism implemented in the intra / inter mode selector 212 is configured to perform intra prediction 208 or motion compensation 210 based on the decoded prediction information. The residual transform coefficients are sent to the inverse quantization unit 204 and the inverse transform unit 206 to reconstruct the residual block. The prediction block and the residual block are then added (e.g., by using a summer 214). The reconstructed block may be further loop filtered (e.g., loop filter 209) before being stored in a reference picture memory (e.g., picture buffer 213). The reconstructed video in the reference picture memory is then sent out (e.g., video output 222) to drive a display device and is used to predict future video blocks.

[0043] The focus of this application is to further improve the coding efficiency of high-precision intra-frame prediction coding tools. The following will briefly review some related coding tools in ECM, then discuss some deficiencies in existing DIMD / TIMD designs, and finally propose solutions to improve existing intra-frame prediction designs.

[0044] Decoding-side Intra Mode Derivation (DIMD)

[0045] DIMD is an intra coding tool where the luma intra prediction mode (IPM) is not transmitted via the bitstream. Instead, it is derived in the same way in the encoder and decoder using previously coded / decoded pixels. The DIMD method performs texture gradient processing to derive the 2 best modes. These two modes and the planar mode are then applied to the block and their predictors are weighted averaged. The selection of DIMD is signaled for intra coded blocks in the bitstream using a flag. At the decoder, if the DIMD flag is true, the intra prediction mode is derived during the reconstruction process using the same previously coded neighboring pixels. If not, the intra prediction mode is parsed from the bitstream as in the classic intra coding mode.

[0046] To derive the intra prediction mode for a block, first a set of neighboring pixels is selected to perform gradient analysis on. For normative purposes, these pixels should be in the decoded / reconstructed pixel pool. Figure 4 As shown, a template is selected that is surrounded by T pixels on the left side of the current block and T pixels on the top. Next, a gradient analysis is performed on the pixels of the template. This allows the main angular direction of the template to be determined, which is assumed (and can be a prerequisite for the method in this disclosure) to have a high probability of being the same as the direction of the current block. Therefore, a simple 3x3 Sobel gradient filter is used, which is defined by the following matrix that will be convolved with the template:

[0047]

[0048] For each pixel of the template, each of these two matrices is point-by-point multiplied with a 3x3 window centered on the current pixel and consisting of its 8 directly adjacent pixels, and the results are summed. In this way, two values ​​Gx (obtained by multiplying with Mx) and Gy (obtained by multiplying with My) corresponding to the horizontal and vertical gradients of the current pixel are obtained.

[0049] Figure 5 The convolution process is shown. Pixel 801 is the current pixel. Pixel 803 (including 801) is a pixel that can be gradient analyzed. Pixel 802 is a pixel that cannot be gradient analyzed due to the lack of some adjacent pixels. Pixel 804 is an available (reconstructed) pixel outside the template under consideration, which is used for gradient analysis of pixel 803. If pixel 804 is not available (for example, because the block is too close to the boundary of the picture), all pixels 803 using this pixel 804 will not be gradient analyzed. For each pixel 803, the intensity (G) and direction (O) of the gradient using Gx and Gy are calculated as follows:

[0050] G=|G x |+|G y | and

[0051] The direction of the gradient is then converted into an intra angular prediction mode and used to index a histogram (initialized to zero at first). The histogram value for that intra angular mode is incremented by G. Once all red pixels in the template have been processed, the histogram contains the accumulated values ​​of the gradient strengths for each intra angular mode. The IPM corresponding to the two highest histogram bins is selected for the current block. If the maximum value in the histogram is 0 (meaning that gradient analysis cannot be performed, or the area that makes up the template is flat), DC mode is selected as the intra prediction mode for the current block.

[0052] The two IPMs corresponding to the two highest Histogram of Oriented Gradients (HoG) bins are combined with the Planar mode. Prediction fusion is applied as a weighted average of the above three predictors. For this purpose, the weight of Planar is fixed to 21 / 64 (~1 / 3). The remaining 43 / 64 (~2 / 3) weight is shared by the two HoG IPMs according to the magnitude of their HoG bins. Figure 6 Shows this process.

[0053] The derived intra modes are included in the master list of intra most probable modes (MPMs), so the DIMD process is performed before building the MPM list. The master derived intra modes of a DIMD block are stored with the block and used to build the MPM lists of neighboring blocks.

[0054] Template-based Intra Mode Derivation (TIMD)

[0055] For each intra mode in MPM, calculate Figure 7 The sum of absolute transform differences (SATD) between the predicted and reconstructed samples of the template area shown is calculated, and the intra mode of the first two modes with the smallest SATD cost is selected, which is then fused with the weights, and this weighted intra prediction is used to encode the current CU.

[0056] The costs of the two selected modes are compared to the threshold, applying a cost factor of 2 in the test, as follows:

[0057] costMode2<2*costMode1.

[0058] If this condition is true, then fusion is applied, otherwise only mode 1 is used.

[0059] The weight of a mode is calculated based on its SATD cost as follows:

[0060] weight1=costMode2 / (costMode1+costMode2)

[0061] weight2=1-weight1.

[0062] Intra-mode coding with 67 intra-prediction modes

[0063] To capture arbitrary edge directions present in natural videos, the number of directional intra modes in VVC is expanded from the 33 used in HEVC to 65. These denser directional intra prediction modes are applicable to all block sizes and for luma and chroma intra prediction.

[0064] In VVC, for non-square blocks, several traditional angular intra prediction modes are adaptively replaced with wide-angle intra prediction modes.

[0065] In HEVC, each intra-coded block is a square with each side length being a power of 2. Therefore, no division operation is required to generate the intra predictor using the DC mode. In VVC, blocks can have a rectangular shape, so a division operation is required for each block in the general case. To avoid division operations for DC prediction, for non-square blocks, only the long side is used to calculate the average.

[0066] Intra-mode coding

[0067] In order to keep the complexity of the most probable mode (MPM) list generation low, an intra mode coding approach with 6 MPMs is used by considering two available adjacent intra modes. The following three aspects are considered when constructing the MPM list:

[0068] -Default intra mode

[0069] - Adjacent Intra Mode

[0070] -Derived intra mode

[0071] Regardless of whether the MRL and ISP coding tools are applied, intra blocks use a unified 6-MPM list. The MPM list is constructed based on the intra modes of the left and upper neighboring blocks. Assuming that the mode on the left is denoted as Left and the mode of the upper block is denoted as Above, the construction of the unified MPM list is as follows:

[0072] - When a neighboring block is not available, its intra mode is set to Planar by default.

[0073] -If both mode Left and mode Above are non-angle modes:

[0074] -MPM list v{Planar,DC,V,H,V-4,V+4}

[0075] - If one of the Left and Above modes is an angle mode and the other is a non-angle mode:

[0076] - Set Mode Max to the larger of Mode Left and Mode Above

[0077] -MPM list → {Planar,Max,Max-1,Max+1,Max––2,Max+2}

[0078] -If Left and Above are both in angle mode, and they are different:

[0079] - Set Mode Max to the larger of Mode Left and Mode Above

[0080] - Set Mode Min to the smaller of Mode Left and Mode Above

[0081] -If Max–Min is equal to 1:

[0082] -MPM list → {Planar,Left,Above,Min–1,Max+1,Min–2}

[0083] - Otherwise, if Max–Min is greater than or equal to 62:

[0084] -MPM list → {Planar,Left,Above,Min+1,Max–1,Min+2}

[0085] - Otherwise, if Max–Min is equal to 2:

[0086] -MPM list → {Planar,Left,Above,Min+1,Min–1,Max+1}

[0087] -otherwise:

[0088] -MPM list → {Planar,Left,Above,Min–1,–Min+1,Max–1}

[0089] -If Left and Above are both in angle mode and they are the same:

[0090] -MPM list→{Planar,Left,Left-1,Left+1,Left–2,Left+2}

[0091] In addition, the first binary unit (bin) of the mpm index codeword is CABAC context coded. A total of three contexts are used, corresponding to whether the current intra block is MRL enabled, ISP enabled, or a normal intra block.

[0092] During the generation of the 6 MPM lists, pruning is used to remove repeated patterns so that only unique patterns can be included in the MPM lists. For the entropy coding of the 61 non-MPM patterns, truncated binary code (TBC) is used.

[0093] Figure 8 is a block diagram illustrating an exemplary system 10 for encoding and decoding video blocks in parallel according to some embodiments of the present disclosure. Figure 8 As shown in , system 10 includes a source device 12 that generates and encodes video data to be later decoded by a destination device 14. Source device 12 and destination device 14 may include any of a wide variety of electronic devices, including desktop or laptop computers, tablet computers, smart phones, set-top boxes, digital televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, etc. In some implementations, source device 12 and destination device 14 are equipped with wireless communication capabilities.

[0094] In some embodiments, the target device 14 may receive the encoded video data to be decoded via the link 16. The link 16 may include any type of communication medium or device capable of moving the encoded video data from the source device 12 to the target device 14. In one example, the link 16 may include a communication medium that enables the source device 12 to directly send the encoded video data to the target device 14 in real time. The encoded video data may be modulated according to a communication standard (e.g., a wireless communication protocol) and sent to the target device 14. The communication medium may include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form a portion of a packet-based network (e.g., a local area network, a wide area network, or a global network such as the Internet). The communication medium may include a router, a switch, a base station, or any other device that may be beneficial to facilitate communication from the source device 12 to the target device 14.

[0095] In some other embodiments, the encoded video data may be sent from the output interface 22 to the storage device 32. The encoded video data in the storage device 32 may then be accessed by the target device 14 via the input interface 28. The storage device 32 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, a Blu-ray disc, a digital versatile disc (DVD), a compact disc read-only memory (CD-ROM), a flash memory, a volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data. In another example, the storage device 32 may correspond to a file server or another intermediate storage device that may hold the encoded video data generated by the source device 12. The target device 14 may access the stored video data from the storage device 32 via streaming or downloading. The file server may be any type of computer capable of storing encoded video data and sending the encoded video data to the target device 14. Exemplary file servers include a network server (e.g., for a website), a file transfer protocol (FTP) server, a network attached storage (NAS) device, or a local disk drive. Target device 14 may access the encoded video data through any standard data connection suitable for accessing encoded video data stored on a file server, including a wireless channel (e.g., a Wireless Fidelity (Wi-Fi) connection), a wired connection (e.g., a Digital Subscriber Line (DSL), a cable modem, etc.), or a combination of both wireless channels and wired connections. The transmission of the encoded video data from storage device 32 may be a streaming transmission, a download transmission, or a combination of both streaming and download transmissions.

[0096] like Figure 8As shown, source device 12 includes video source 18, video encoder 20 and output interface 22. Video source 18 may include a source such as a video capture device (e.g., a camera), a video archive containing previously captured video, a video feed interface for receiving video from a video content provider, and / or a computer graphics system for generating computer graphics data as source video. As an example, if video source 18 is a camera of a security monitoring system, source device 12 and target device 14 may form a camera phone or a video phone. However, the embodiments described in the present application may be generally applicable to video encoding and decoding, and may be applied to wireless and / or wired applications.

[0097] The captured, pre-captured, or computer-generated video may be encoded by the video encoder 20. The encoded video data may be sent directly to the target device 14 via the output interface 22 of the source device 12. The encoded video data may also (or alternatively) be stored on a storage device 32 for later access by the target device 14 or other device for decoding and / or playback. The output interface 22 may further include a modem and / or a transmitter.

[0098] Target device 14 includes input interface 28, video decoder 30, and display device 34. Input interface 28 may include a receiver and / or a modem and receives encoded video data via link 16. The encoded video data transmitted via link 16 or provided on storage device 32 may include various syntax elements generated by video encoder 20 for use by video decoder 30 in decoding the video data. Such syntax elements may be included within the encoded video data sent over a communication medium, stored on a storage medium, or stored on a file server.

[0099] In some implementations, the target device 14 may include a display device 34, which may be an integrated display device and an external display device configured to communicate with the target device 14. The display device 34 displays the decoded video data to a user and may include any of a variety of display devices, such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

[0100] The video encoder 20 and the video decoder 30 can operate according to a proprietary standard or an industry standard (e.g., VVC, HEVC, Part 10 of MPEG-4, AVC) or an extension of such a standard. It should be understood that the present application is not limited to a specific video encoding / decoding standard and can be applied to other video encoding / decoding standards. It is generally believed that the video encoder 20 of the source device 12 can be configured to encode the video data according to any of these current standards or future standards. Similarly, it is also generally believed that the video decoder 30 of the target device 14 can be configured to decode the video data according to any of these current standards or future standards.

[0101] The video encoder 20 and the video decoder 30 may be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic devices, software, hardware, firmware, or any combination thereof. When partially implemented in software, the electronic device may store instructions for the software in a suitable non-transitory computer-readable medium, and use one or more processors to execute the instructions in the hardware to perform the video encoding / decoding operations disclosed in the present disclosure. Each of the video encoder 20 and the video decoder 30 may be included in one or more encoders or decoders, and either of the encoders or decoders may be integrated as part of a combined encoder / decoder (CODEC) in the corresponding device.

[0102] Fig. 9 is a block diagram illustrating an exemplary video encoder 20 according to some embodiments described in the present application. The video encoder 20 can perform intra-frame prediction coding and inter-frame prediction coding on video blocks within a video frame. Intra-frame prediction coding relies on spatial prediction to reduce or remove spatial redundancy in video data within a given video frame or picture. Inter-frame prediction coding relies on temporal prediction to reduce or remove temporal redundancy in video data within adjacent video frames or pictures of a video sequence. It should be noted that in the field of video coding and decoding, the term "frame" can be used as a synonym for the term "image" or "picture".

[0103] like Fig. 9As shown in FIG. 1 , the video encoder 20 includes a video data memory 40, a prediction processing unit 41, a decoded picture buffer (DPB) 64, an adder 50, a transform processing unit 52, a quantization unit 54, and an entropy coding unit 56. The prediction processing unit 41 further includes a motion estimation unit 42, a motion compensation unit 44, a segmentation unit 45, an intra-frame prediction processing unit 46, and an intra-frame block copy (BC) unit 48. In some embodiments, the video encoder 20 also includes an inverse quantization unit 58, an inverse transform processing unit 60, and an adder 62 for video block reconstruction. A loop filter 63 such as a deblocking filter can be located between the adder 62 and the DPB 64 to filter the block boundary to remove the block effect from the reconstructed video. In addition to the deblocking filter, another loop filter, such as a sample adaptive offset (SAO) filter and / or an adaptive loop filter (ALF), can be used to filter the output of the adder 62. In some examples, the loop filter can be omitted, and the decoded video block can be directly provided to the DPB 64 by the adder 62. Video encoder 20 may take the form of a fixed or programmable hardware unit, or may be distributed among one or more of the illustrated fixed or programmable hardware units.

[0104] Video data memory 40 may store video data to be encoded by components of video encoder 20. Figure 8 The video source 18 shown obtains video data in the video data memory 40. The DPB 64 is a buffer that stores reference video data (e.g., reference frames or pictures) for use by the video encoder 20 (e.g., in intra-frame or inter-frame prediction coding mode) when encoding the video data. The video data memory 40 and the DPB 64 can be formed by any of a variety of memory devices. In various examples, the video data memory 40 can be on-chip with other components of the video encoder 20, or off-chip relative to those components.

[0105] like Fig. 9As shown in , after receiving the video data, the segmentation unit 45 within the prediction processing unit 41 segments the video data into video blocks. This segmentation may also include segmenting the video frame into strips, tiles (e.g., a set of video blocks) or other larger coding units (CUs) according to a predefined splitting structure (e.g., a quadtree (QT) structure) associated with the video data. A video frame is or may be considered as a two-dimensional sample array or matrix with sample values. The samples in the array may also be referred to as pixels or picture elements (pel). The number of samples in the horizontal and vertical directions (or axes) of the array or picture defines the size and / or resolution of the video frame. For example, a video frame may be divided into a plurality of video blocks by using QT segmentation. A video block is again or may be considered as a two-dimensional sample array or matrix with sample values, but its dimensions are smaller than the dimensions of a video frame. The number of samples in the horizontal and vertical directions (or axes) of a video block defines the size of the video block. By, for example, iteratively using QT segmentation, binary tree (BT) segmentation, or ternary tree (TT) segmentation, or any combination thereof, a video block may be further segmented into one or more block partitions or sub-blocks (which may again form blocks). It should be noted that the term "block" or "video block" used herein may be a portion of a frame or picture, in particular a rectangular (square or non-square) portion. With reference to, for example, HEVC and VVC, a block or video block may be or correspond to a coding tree unit (CTU), a CU, a prediction unit (PU) or a transform unit (TU) and / or may be or correspond to a corresponding block, such as a coding tree block (CTB), a coding block (CB), a prediction block (PB) or a transform block (TB)) and / or a sub-block.

[0106] The prediction processing unit 41 may select one of a plurality of feasible prediction coding modes for the current video block based on the error results (e.g., coding rate and distortion level), such as one of one or more inter-frame prediction coding modes in a plurality of intra-frame prediction coding modes. The prediction processing unit 41 may provide the resulting intra-frame prediction coding block or inter-frame prediction coding block to the adder 50 to generate a residual block, and to the adder 62 to reconstruct the coding block for subsequent use as part of a reference frame. The prediction processing unit 41 also provides syntax elements (e.g., motion vectors, intra-frame mode indicators, partition information, and other such syntax information) to the entropy coding unit 56.

[0107] To select an appropriate intra-prediction coding mode for the current video block, intra-prediction processing unit 46 within prediction processing unit 41 may perform intra-prediction coding of the current video block in relation to one or more neighboring blocks in the same frame as the current block to be encoded to provide spatial prediction. Motion estimation unit 42 and motion compensation unit 44 within prediction processing unit 41 may perform inter-prediction coding of the current video block in relation to one or more prediction blocks in one or more reference frames to provide temporal prediction. Video encoder 20 may perform multiple encoding passes, for example, to select an appropriate coding mode for each block of video data.

[0108] In some embodiments, motion estimation unit 42 determines an inter-prediction mode for a current video frame by generating a motion vector according to a predetermined pattern within a sequence of video frames, the motion vector indicating the displacement of a video block within the current video frame relative to a prediction block within a reference video frame. Motion estimation performed by motion estimation unit 42 is the process of generating a motion vector that estimates the motion of a video block. For example, a motion vector may indicate the displacement of a video block within a current video frame or picture relative to a prediction block within a reference frame associated with a current block being encoded within the current frame. The predetermined pattern may designate a video frame in a sequence as a P frame or a B frame. Intra BC unit 48 may determine a vector (e.g., a block vector) for intra BC coding in a manner similar to the motion vector determined by motion estimation unit 42 for inter prediction, or may utilize motion estimation unit 42 to determine a block vector.

[0109] In terms of pixel differences, the prediction block for the video block may be or may correspond to a block or reference block of a reference frame that is considered to closely match the video block to be encoded, and the pixel difference may be determined by the sum of absolute differences (SAD), the sum of squared differences (SSD), or other difference metrics. In some embodiments, the video encoder 20 may calculate values ​​for sub-integer pixel positions of the reference frame stored in the DPB 64. For example, the video encoder 20 may interpolate values ​​for quarter-pixel positions, eighth-pixel positions, or other fractional pixel positions of the reference frame. Thus, the motion estimation unit 42 may perform a motion search relative to full pixel positions and fractional pixel positions and output a motion vector with fractional pixel accuracy.

[0110] Motion estimation unit 42 calculates a motion vector for a video block in an inter-prediction coded frame by comparing the position of the video block to the position of a prediction block of a reference frame selected from a first reference frame list (list 0) or a second reference frame list (list 1), each of which identifies one or more reference frames stored in DPB 64. Motion estimation unit 42 sends the calculated motion vector to motion compensation unit 44 and then to entropy encoding unit 56.

[0111] The motion compensation performed by the motion compensation unit 44 may involve obtaining or generating a prediction block based on the motion vector determined by the motion estimation unit 42. After receiving the motion vector for the current video block, the motion compensation unit 44 may locate the prediction block pointed to by the motion vector in one of the reference frame lists, retrieve the prediction block from the DPB 64, and forward the prediction block to the adder 50. The adder 50 then forms a residual video block of pixel difference values ​​by subtracting the pixel values ​​of the prediction block provided by the motion compensation unit 44 from the pixel values ​​of the current video block being encoded. The pixel difference values ​​forming the residual video block may include luminance component differences or chrominance component differences or both. The motion compensation unit 44 may also generate syntax elements associated with the video block of the video frame for use by the video decoder 30 when decoding the video block of the video frame. The syntax elements may include, for example, syntax elements defining a motion vector for identifying a prediction block, any flag indicating a prediction mode, or any other syntax information described herein. It should be noted that the motion estimation unit 42 and the motion compensation unit 44 may be highly integrated, but are described separately for conceptual purposes.

[0112] In some embodiments, the intra BC unit 48 may generate vectors and obtain prediction blocks in a manner similar to that described above in conjunction with the motion estimation unit 42 and the motion compensation unit 44, but these prediction blocks are in the same frame as the current block being encoded, and these vectors are referred to as block vectors rather than motion vectors. Specifically, the intra BC unit 48 may determine the intra prediction mode to be used to encode the current block. In some examples, the intra BC unit 48 may encode the current block using various intra prediction modes, for example, during separate encoding passes, and test their performance through rate-distortion analysis. Next, the intra BC unit 48 may select a suitable intra prediction mode to use among the various tested intra prediction modes and generate an intra mode indicator accordingly. For example, the intra BC unit 48 may calculate rate-distortion values ​​for the various tested intra prediction modes using rate-distortion analysis, and select an intra prediction mode with the best rate-distortion characteristic among the tested modes as a suitable intra prediction mode to use. The rate-distortion analysis generally determines the amount of distortion (or error) between a coded block and the original uncoded block that was encoded to produce the coded block, as well as the bit rate (i.e., the number of bits) used to produce the coded block. Intra BC unit 48 may calculate ratios based on the distortion and rate for the various coded blocks to determine which intra-prediction mode exhibits the best rate-distortion value for the block.

[0113] In other examples, intra BC unit 48 may use, in whole or in part, motion estimation unit 42 and motion compensation unit 44 to perform such functions for intra BC prediction in accordance with embodiments described herein. In either case, for intra block copying, the prediction block may be a block that is considered to closely match the block to be encoded in terms of pixel differences, which may be determined by SAD, SSD, or other difference metrics, and identifying the prediction block may include calculating values ​​for sub-integer pixel positions.

[0114] Regardless of whether the prediction block is from the same frame according to intra-frame prediction or from a different frame according to inter-frame prediction, the video encoder 20 can form a residual video block by subtracting the pixel values ​​of the prediction block from the pixel values ​​of the current video block being encoded. The pixel difference values ​​forming the residual video block may include both luma component differences and chroma component differences.

[0115] As an alternative to the inter-frame prediction performed by the motion estimation unit 42 and the motion compensation unit 44 or the intra-frame block copy prediction performed by the intra BC unit 48 as described above, the intra-frame prediction processing unit 46 can perform intra-frame prediction on the current video block. Specifically, the intra-frame prediction processing unit 46 can determine the intra-frame prediction mode for encoding the current block. To this end, the intra-frame prediction processing unit 46 can use various intra-frame prediction modes to encode the current block, for example, during separate encoding passes, and the intra-frame prediction processing unit 46 (or in some examples, the mode selection unit) can select a suitable intra-frame prediction mode from the tested intra-frame prediction modes to use. The intra-frame prediction processing unit 46 can provide information indicating the intra-frame prediction mode selected for the block to the entropy coding unit 56. The entropy coding unit 56 can encode the information indicating the selected intra-frame prediction mode into the bitstream.

[0116] After prediction processing unit 41 determines a prediction block for the current video block via inter-prediction or intra-prediction, adder 50 forms a residual video block by subtracting the prediction block from the current video block. The residual video data in the residual block may be included in one or more TUs and provided to transform processing unit 52. Transform processing unit 52 transforms the residual video data into residual transform coefficients using a transform (e.g., a discrete cosine transform (DCT) or a conceptually similar transform).

[0117] The transform processing unit 52 may send the resulting transform coefficients to a quantization unit 54. The quantization unit 54 quantizes the transform coefficients to further reduce the bit rate. The quantization process may also reduce the bit depth associated with some or all of the coefficients. The degree of quantization may be modified by adjusting a quantization parameter. In some examples, the quantization unit 54 may then perform a scan on the matrix including the quantized transform coefficients. Alternatively, the entropy coding unit 56 may perform the scan.

[0118] After quantization, entropy coding unit 56 entropy encodes the quantized transform coefficients into a video bitstream using, for example, context adaptive variable length coding (CAVLC), context adaptive binary arithmetic coding (CABAC), syntax-based context adaptive binary arithmetic coding (SBAC), probability interval partitioning entropy (PIPE) coding, or another entropy coding method or technique. The encoded bitstream may then be sent to a video bitstream such as a Figure 8 The video decoder 30 shown, or archived as Figure 8 The video frame may be stored in storage device 32 as shown for later transmission to or retrieval by video decoder 30. Entropy encoding unit 56 may also entropy encode motion vectors and other syntax elements for the current video frame being encoded.

[0119] Inverse quantization unit 58 and inverse transform processing unit 60 apply inverse quantization and inverse transform, respectively, to reconstruct the residual video block in the pixel domain for use in generating reference blocks for predicting other video blocks. As noted above, motion compensation unit 44 may generate a motion compensated prediction block from one or more reference blocks of a frame stored in DPB 64. Motion compensation unit 44 may also apply one or more interpolation filters to the prediction block to calculate sub-integer pixel values ​​for use in motion estimation.

[0120] Adder 62 adds the reconstructed residual block to the motion compensated prediction block generated by motion compensation unit 44 to generate a reference block for storage in DPB 64. The reference block may then be used as a prediction block by intra BC unit 48, motion estimation unit 42, and motion compensation unit 44 to inter-predict another video block in a subsequent video frame.

[0121] Fig.10 2 is a block diagram illustrating an exemplary video decoder 30 according to some embodiments of the present application. The video decoder 30 includes a video data memory 79, an entropy decoding unit 80, a prediction processing unit 81, an inverse quantization unit 86, an inverse transform processing unit 88, an adder 90, and a DPB 92. The prediction processing unit 81 further includes a motion compensation unit 82, an intra-frame prediction unit 84, and an intra-frame BC unit 85. The video decoder 30 can perform a decoding process that is substantially reciprocal to the encoding process described above in conjunction with FIG. 2 with respect to the video encoder 20. For example, the motion compensation unit 82 can generate prediction data based on the motion vector received from the entropy decoding unit 80, and the intra-frame prediction unit 84 can generate prediction data based on the intra-frame prediction mode indicator received from the entropy decoding unit 80.

[0122] In some examples, units of the video decoder 30 may be tasked to perform embodiments of the present application. In addition, in some examples, embodiments of the present disclosure may be dispersed in one or more of the units of the video decoder 30. For example, the intra BC unit 85 may perform embodiments of the present application alone or in combination with other units of the video decoder 30 (e.g., the motion compensation unit 82, the intra prediction unit 84, and the entropy decoding unit 80). In some examples, the video decoder 30 may not include the intra BC unit 85, and the functions of the intra BC unit 85 may be performed by other components of the prediction processing unit 81 (e.g., the motion compensation unit 82).

[0123] The video data memory 79 may store video data, such as an encoded video bitstream, to be decoded by other components of the video decoder 30. The video data stored in the video data memory 79 may be obtained, for example, from the storage device 32, from a local video source (e.g., a camera), via a wired or wireless network communication of video data, or by accessing a physical data storage medium (e.g., a flash drive or hard disk). The video data memory 79 may include a coded picture buffer (CPB) that stores encoded video data from an encoded video bitstream. The DPB 92 of the video decoder 30 stores reference video data for use by the video decoder 30 when decoding the video data (e.g., in an intra-frame or inter-frame prediction coding mode). The video data memory 79 and the DPB 92 may be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM) (including synchronous DRAM (SDRAM)), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. For illustrative purposes, the video data memory 79 and the DPB 92 are shown in FIG. Fig.10 9 as two different components of the video decoder 30. However, it will be apparent to those skilled in the art that the video data memory 79 and the DPB 92 can be provided by the same memory device or separate memory devices. In some examples, the video data memory 79 can be on-chip with other components of the video decoder 30, or off-chip relative to those components.

[0124] During the decoding process, the video decoder 30 receives an encoded video bitstream representing video blocks of an encoded video frame and associated syntax elements. The video decoder 30 may receive syntax elements at the video frame level and / or the video block level. The entropy decoding unit 80 of the video decoder 30 entropy decodes the bitstream to generate quantization coefficients, motion vectors or intra-frame prediction mode indicators, and other syntax elements. The entropy decoding unit 80 then forwards the motion vectors or intra-frame prediction mode indicators, and other syntax elements to the prediction processing unit 81.

[0125] When a video frame is encoded as an intra-prediction coded (I) frame or for intra-coded prediction blocks in other types of frames, the intra-prediction unit 84 of the prediction processing unit 81 can generate prediction data for a video block of the current video frame based on the intra-prediction mode transmitted by the signal and reference data from a previously decoded block of the current frame.

[0126] When the video frame is encoded as an inter-frame prediction coding (i.e., B or P) frame, the motion compensation unit 82 of the prediction processing unit 81 generates one or more prediction blocks for the video block of the current video frame based on the motion vector and other syntax elements received from the entropy decoding unit 80. Each of the prediction blocks can be generated from a reference frame in one of the reference frame lists. The video decoder 30 can construct the reference frame lists, i.e., List 0 and List 1, based on the reference frames stored in the DPB 92 using a default construction technique.

[0127] In some examples, when a video block is encoded according to the intra BC mode described herein, intra BC unit 85 of prediction processing unit 81 generates a prediction block for the current video block based on the block vector and other syntax elements received from entropy decoding unit 80. The prediction block may be within a reconstructed region of the same picture as the current video block as defined by video encoder 20.

[0128] The motion compensation unit 82 and / or the intra BC unit 85 determine prediction information for a video block of the current video frame by parsing the motion vector and other syntax elements, and then use the prediction information to generate a prediction block for the current video block being decoded. For example, the motion compensation unit 82 uses some of the received syntax elements to determine a prediction mode (e.g., intra prediction or inter prediction) for encoding a video block of a video frame, an inter prediction frame type (e.g., B or P), construction information for one or more of the reference frame lists for the frame, motion vectors for each inter prediction encoded video block of the frame, inter prediction states for each inter prediction encoded video block of the frame, and other information for decoding a video block in the current video frame.

[0129] Similarly, the intra BC unit 85 may use some of the received syntax elements, such as flags, to determine whether the current video block is predicted using intra BC mode, construction information of which video blocks of the frame are within the reconstruction region and should be stored in the DPB 92, block vectors for each intra BC predicted video block of the frame, intra BC prediction status for each intra BC predicted video block of the frame, and other information for decoding the video block in the current video frame.

[0130] Motion compensation unit 82 may also perform interpolation using interpolation filters as used by video encoder 20 during encoding of the video blocks to calculate interpolated values ​​for sub-integer pixels of reference blocks. In this case, motion compensation unit 82 may determine the interpolation filters used by video encoder 20 based on the received syntax elements and use these interpolation filters to produce the prediction blocks.

[0131] Inverse quantization unit 86 inverse quantizes the quantized transform coefficients provided in the bitstream and entropy decoded by entropy decoding unit 80, using the same quantization parameters calculated by video encoder 20 for each video block in the video frame to determine the degree of quantization. Inverse transform processing unit 88 applies an inverse transform (e.g., an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process) to the transform coefficients to reconstruct the residual block in the pixel domain.

[0132] After the motion compensation unit 82 or the intra BC unit 85 generates a prediction block for the current video block based on the vector and other syntax elements, the adder 90 reconstructs the decoded video block for the current video block by adding the residual block from the inverse transform processing unit 88 to the corresponding prediction block generated by the motion compensation unit 82 and the intra BC unit 85. A loop filter 91 (e.g., a deblocking filter, an SAO filter, and / or an ALF) may be located between the adder 90 and the DPB 92 to further process the decoded video block. In some examples, the loop filter 91 may be omitted, and the decoded video block may be provided directly to the DPB 92 by the adder 90. The decoded video blocks in a given frame are then stored in the DPB 92, which stores reference frames for subsequent motion compensation of the next video block. The DPB 92 or a memory device separate from the DPB 92 may also store the decoded video for later presentation on a display device (e.g., Figure 8 on a display device 34).

[0133] In a typical video encoding process, a video sequence typically includes an ordered set of frames or pictures. Each frame may include three sample arrays, denoted as SL, SCb, and SCr. SL is a two-dimensional array of luma samples. SCb is a two-dimensional array of Cb chroma samples. SCr is a two-dimensional array of Cr chroma samples. In other examples, a frame may be monochrome and therefore include only a two-dimensional array of luma samples.

[0134] like Fig.11As shown in , the video encoder 20 (or more specifically, the segmentation unit 45) generates an encoded representation of a frame by first segmenting the frame into a set of CTUs. A video frame may include an integer number of CTUs ordered consecutively from left to right and from top to bottom in a raster scan order. Each CTU is the largest logical coding unit, and the width and height of the CTU are signaled by the video encoder 20 in a sequence parameter set so that all CTUs in a video sequence have the same size, one of 128×128, 64×64, 32×32, and 16×16. It should be noted, however, that the present application is not necessarily limited to a particular size. As Fig.12 As shown in , each CTU may include one CTB for luma samples, two corresponding coding tree blocks for chroma samples, and syntax elements for encoding samples of the coding tree blocks. The syntax elements describe the properties of different types of units of the coding pixel blocks and how the video sequence can be reconstructed at the video decoder 30, including inter-frame prediction or intra-frame prediction, intra-frame prediction mode, motion vectors, and other parameters. In a monochrome picture or a picture with three separate color planes, a CTU may include a single coding tree block and syntax elements for encoding samples of the coding tree block. The coding tree block may be an N×N block of samples.

[0135] To achieve better performance, the video encoder 20 may recursively perform tree partitioning, such as binary tree partitioning, ternary tree partitioning, quadtree partitioning, or a combination thereof, on the coding tree block of the CTU and divide the CTU into smaller CUs. Fig.13 As depicted in , a 64×64 CTU 400 is first divided into four smaller CUs, each CU having a block size of 32×32. Among the four smaller CUs, CU 410 and CU 420 are respectively divided into four CUs with a block size of 16×16. Two 16×16 CUs 430 and CU 440 are further divided into four CUs with a block size of 8×8. Fig.14 Depicted is a diagram showing Fig.13 The quadtree data structure of the final result of the partitioning process of the CTU 400 depicted in FIG. 4 corresponds to a CU of a corresponding size ranging from 32×32 to 8×8. Fig.12 In the CTU depicted in FIG, each CU may include a CB of luma samples and two corresponding coding blocks of chroma samples of the same size frame, and syntax elements for encoding the samples of the coding blocks. In a monochrome picture or a picture with three separate color planes, a CU may include a single coding block and syntax structures for encoding the samples of the coding block. It should be noted that Fig.13 and Fig.14The quadtree partitioning depicted in FIG is for illustrative purposes only, and one CTU can be split into multiple CUs based on quadtree partitioning / ternary tree partitioning / binary tree partitioning to adapt to varying local characteristics. In a multi-type tree structure, one CTU is partitioned according to a quadtree structure, and each quadtree leaf CU can be further partitioned according to a binary and ternary tree structure. Fig.15 As shown, there are five possible partitioning types for a coding block with width W and height H, namely, quadruple partitioning, horizontal binary partitioning, vertical binary partitioning, horizontal ternary partitioning, and vertical ternary partitioning.

[0136] In some embodiments, the video encoder 20 may further partition the coding block of the CU into one or more (M×N) PBs. A PB is a rectangular (square or non-square) sample block to which the same prediction (inter or intra) is applied. The PU of a CU may include a PB of luma samples, two corresponding PBs of chroma samples, and syntax elements for predicting the PBs. In a monochrome picture or a picture with three separate color planes, a PU may include a single PB and a syntax structure for predicting the PB. The video encoder 20 may generate a predicted luma block, a predicted Cb block, and a predicted Cr block for the luma PB, Cb PB, and Cr PB of each PU of the CU.

[0137] Video encoder 20 may use intra prediction or inter prediction to generate a prediction block for a PU. If video encoder 20 uses intra prediction to generate a prediction block for a PU, video encoder 20 may generate the prediction block for the PU based on decoded samples of a frame associated with the PU. If video encoder 20 uses inter prediction to generate a prediction block for a PU, video encoder 20 may generate the prediction block for the PU based on decoded samples of one or more frames other than the frame associated with the PU.

[0138] After the video encoder 20 generates a predicted luma block, a predicted Cb block, and a predicted Cr block for one or more PUs of a CU, the video encoder 20 may generate a luma residual block for the CU by subtracting the predicted luma block of the CU from the original luma coding block of the CU, so that each sample in the luma residual block of the CU indicates the difference between a luma sample in one of the predicted luma blocks of the CU and a corresponding sample in the original luma coding block of the CU. Similarly, the video encoder 20 may generate a Cb residual block and a Cr residual block for the CU, respectively, so that each sample in the Cb residual block of the CU indicates the difference between a Cb sample in one of the predicted Cb blocks of the CU and a corresponding sample in the original Cb coding block of the CU, and each sample in the Cr residual block of the CU may indicate the difference between a Cr sample in one of the predicted Cr blocks of the CU and a corresponding sample in the original Cr coding block of the CU.

[0139] In addition, if Fig.13As shown in , the video encoder 20 can use quadtree partitioning to decompose the luma residual block, Cb residual block and Cr residual block of the CU into one or more luma transform blocks, Cb transform blocks and Cr transform blocks, respectively. A transform block is a rectangular (square or non-square) sample block to which the same transform is applied. The TU of the CU may include a transform block of luma samples, two corresponding transform blocks of chroma samples, and syntax elements for transforming the transform block samples. Therefore, each TU of the CU may be associated with a luma transform block, a Cb transform block and a Cr transform block. In some examples, the luma transform block associated with the TU may be a sub-block of the luma residual block of the CU. The Cb transform block may be a sub-block of the Cb residual block of the CU. The Cr transform block may be a sub-block of the Cr residual block of the CU. In a monochrome picture or a picture with three separate color planes, a TU may include a single transform block and a syntax structure for transforming the samples of the transform block.

[0140] The video encoder 20 may apply one or more transforms to the luma transform block of the TU to generate a luma coefficient block for the TU. The coefficient block may be a two-dimensional array of transform coefficients. The transform coefficient may be a scalar. The video encoder 20 may apply one or more transforms to the Cb transform block of the TU to generate a Cb coefficient block for the TU. The video encoder 20 may apply one or more transforms to the Cr transform block of the TU to generate a Cr coefficient block for the TU.

[0141] After generating a coefficient block (e.g., a luma coefficient block, a Cb coefficient block, or a Cr coefficient block), the video encoder 20 may quantize the coefficient block. Quantization generally refers to a process in which transform coefficients are quantized to potentially reduce the amount of data used to represent the transform coefficients, thereby providing further compression. After the video encoder 20 quantizes the coefficient block, the video encoder 20 may entropy encode syntax elements indicating the quantized transform coefficients. For example, the video encoder 20 may perform CABAC on the syntax elements indicating the quantized transform coefficients. Finally, the video encoder 20 may output a bitstream including a sequence of bits that form a representation of an encoded frame and associated data, and the bitstream is stored in the storage device 32 or sent to the target device 14.

[0142] After receiving the bitstream generated by the video encoder 20, the video decoder 30 can parse the bitstream to obtain syntax elements from the bitstream. The video decoder 30 can reconstruct the frame of the video data based at least in part on the syntax elements obtained from the bitstream. The process of reconstructing the video data is generally inverse to the encoding process performed by the video encoder 20. For example, the video decoder 30 can perform an inverse transform on the coefficient block associated with the TU of the current CU to reconstruct the residual block associated with the TU of the current CU. The video decoder 30 also reconstructs the coding block of the current CU by adding the samples of the prediction block for the PU of the current CU to the corresponding samples of the transform block of the TU of the current CU. After reconstructing the coding block for each CU of the frame, the video decoder 30 can reconstruct the frame.

[0143] As mentioned above, video coding mainly uses two modes, namely, intra-frame prediction (or intra-frame prediction) and inter-frame prediction (or inter-frame prediction) to achieve video compression. It should be noted that IBC can be regarded as intra-frame prediction or a third mode. Between the two modes, inter-frame prediction contributes more to coding efficiency than intra-frame prediction because motion vectors are used to predict the current video block based on the reference video block.

[0144] But with the ever-improving video data capture technology and finer video block sizes for retaining details in the video data, the amount of data required to represent the motion vector for the current frame has also increased significantly. One way to overcome this challenge benefits from the fact that not only a set of neighboring CUs in both the spatial and temporal domains have similar video data for prediction purposes, but also the motion vectors between these neighboring CUs are similar. Therefore, the motion information of spatially neighboring CUs and / or temporally co-located CUs can be used as an approximation of the motion information (e.g., motion vector) of the current CU (which is also called the "motion vector predictor" (MVP) of the current CU) by exploring their spatial and temporal correlations.

[0145] Instead of combining as above Fig. 9 The actual motion vector of the current CU determined by the motion estimation unit 42 is encoded into the video bitstream, and the motion vector prediction value of the current CU is subtracted from the actual motion vector of the current CU to generate a motion vector difference (MVD) for the current CU. By doing so, the motion vector determined by the motion estimation unit 42 for each CU of the frame does not need to be encoded into the video bitstream, and the amount of data used to represent motion information in the video bitstream can be significantly reduced.

[0146] Similar to the process of selecting a prediction block in a reference frame during inter-frame prediction of a coding block, both the video encoder 20 and the video decoder 30 need to adopt a set of rules for constructing a motion vector candidate list (also called a "merge list") for the current CU using those potential candidate motion vectors associated with the spatial neighboring CUs and / or temporal co-located CUs of the current CU, and then selecting a member from the motion vector candidate list as the motion vector prediction value for the current CU. By doing so, the motion vector candidate list itself does not need to be sent from the video encoder 20 to the video decoder 30, and the index of the selected motion vector prediction value within the motion vector candidate list is sufficient for the video encoder 20 and the video decoder 30 to use the same motion vector prediction value within the motion vector candidate list to encode and decode the current CU.

[0147] Although the DIMD / TIMD mode can improve the efficiency of intra-frame prediction, its performance still needs to be further improved. At the same time, some parts of the existing intra-frame mode also need to be simplified to achieve efficient codec hardware implementation or improved to improve coding efficiency. In addition, the trade-off between its implementation complexity and coding efficiency benefits also needs to be further improved.

[0148] It should be understood that the drawings in the present disclosure can be combined with all examples mentioned in the present disclosure, and the disclosed methods can be applied independently or in combination.

[0149] Decoding-side high-precision intra-mode inference (DHI)

[0150] In a first aspect of the present disclosure, it is proposed to derive a high-precision intra-frame mode from previously decoded information at the TB / CB / strip / picture / sequence level. According to one or more embodiments of the present disclosure, a control flag is signaled at the TB / CB / strip / picture / sequence level to indicate whether the signaling of the DHI mode is enabled or disabled. When the control flag is signaled as enabled, a flag of the DHI mode is further signaled to the decoder to indicate whether the DHI mode is used at the signaling level. When the DHI mode is enabled, different methods can be used to derive the high-precision intra-frame mode, and some exemplary methods are listed below. In one or more embodiments, when the DHI mode is enabled, a flag of the DHI mode is further signaled to the decoder to indicate whether the DHI mode is used at the signaling level. When the DHI mode is used, different methods can be used to derive the high-precision intra-frame mode, and some exemplary methods are listed below.

[0151] According to one or more embodiments of the present disclosure, high-precision intra-frame modes from adjacent intra-frame modes or MPM lists can be stored and used as current high-precision intra-frame modes. In one example, if DHI mode is enabled and adjacent intra-frame modes are encoded using TIMD mode, their high-precision intra-frame modes and their corresponding low-precision intra-frame modes are also stored in a mapping table to indicate which high-precision mode to use when the decoder receives the corresponding low-precision mode.

[0152] According to one or more embodiments of the present disclosure, the cost of the TIMD mode can be used to derive a high-precision intra-frame mode in a decoder. In one example, if the DHI mode is enabled and the decoder receives an intra-frame direction mode, its adjacent high-precision intra-frame mode is further checked based on the cost of the TIMD to determine whether to use the adjacent high-precision intra-frame mode. If the cost of the adjacent high-precision intra-frame mode is lower than the original intra-frame mode, the adjacent high-precision intra-frame mode is used.

[0153] According to one or more embodiments of the present disclosure, the histogram of the DIMD mode can be used to derive a high-precision intra-frame mode in a decoder. In one example, if the DHI mode is enabled and the decoder receives an intra-frame directional mode, its adjacent high-precision intra-frame mode is further checked based on the histogram of DIMD to determine whether to use the adjacent high-precision intra-frame mode. If the histogram of the adjacent high-precision intra-frame mode is higher than the original intra-frame mode, the adjacent high-precision intra-frame mode is used.

[0154] According to one or more embodiments of the present disclosure, a histogram of a DIMD mode can be calculated in a decoder in a high-precision intra-frame mode. In one example, if the DHI mode is enabled, the direction of the gradient is converted to an intra-frame angle prediction mode with high precision (e.g., 133 modes) for indexing a histogram (initialized to zero first). The histogram will contain the cumulative value of the gradient strength for each intra-frame angle mode. The IPM corresponding to the two highest histogram bars is selected for the current block. If the maximum value in the histogram is 0 (meaning that gradient analysis cannot be performed, or the area that makes up the template is flat), the DC mode is selected as the intra-frame prediction mode for the current block.

[0155] In a second aspect of the present disclosure, it is proposed to derive a high-precision intra-frame mode from previously decoded TB / CB / strip / picture / sequence-level information without signal transmission. According to one or more embodiments of the present disclosure, a high-precision intra-frame mode will be derived under certain predefined conditions (e.g., a specific mode, a specific block size) without the need for additional control flags. When the predefined conditions are matched, a high-precision intra-frame mode will be derived based on the previously decoded information. Different methods can be used to derive a high-precision intra-frame mode, and some exemplary methods are listed below.

[0156] According to one or more embodiments of the present disclosure, high-precision intra-frame modes from adjacent intra-frame modes or MPM lists can be stored and used as current high-precision intra-frame modes. In one example, if adjacent intra-frame modes are encoded using TIMD mode, their high-precision intra-frame modes and their corresponding low-precision intra-frame modes are also stored in a mapping table to indicate which high-precision mode to use when the decoder receives the corresponding low-precision mode.

[0157] According to one or more embodiments of the present disclosure, the cost of the TIMD mode can be used to derive a high-precision intra-frame mode in a decoder. In one example, if the decoder receives an intra-frame direction mode, its adjacent high-precision intra-frame mode is further checked based on the cost of TIMD to determine whether to use the adjacent high-precision intra-frame mode. If the cost of the adjacent high-precision intra-frame mode is lower than the original intra-frame mode, the adjacent high-precision intra-frame mode is used. In another example, if the decoder receives an intra-frame direction mode, its adjacent high-precision intra-frame mode is further checked by the cost of TIMD to indicate whether to use the adjacent high-precision intra-frame mode. If the cost of the adjacent high-precision intra-frame mode is lower than the threshold of the original intra-frame mode (e.g., 1 / 2, 1 / 3, 5 / 8, 3 / 4, 7 / 8), the adjacent high-precision intra-frame mode is used. The threshold can be half of the TIMD cost of the original intra-frame mode.

[0158] According to one or more embodiments of the present disclosure, the histogram of the DIMD mode can be used to derive the high-precision intra-frame mode in the decoder. In one example, if the decoder receives an intra-frame directional mode, it further checks its adjacent high-precision intra-frame mode based on the histogram of DIMD to determine whether to use the adjacent high-precision intra-frame mode. If the histogram of the adjacent high-precision intra-frame mode is higher than the original intra-frame mode, the adjacent high-precision intra-frame mode is used.

[0159] According to one or more embodiments of the present disclosure, the histogram of the DIMD mode can be calculated in the decoder in a high-precision intra-frame mode. In one example, the direction of the gradient is converted into an intra-frame angle prediction mode (e.g., 133 modes) with high precision for indexing a histogram (initialized to zero first). The histogram will contain the cumulative value of the gradient strength for each intra-frame angle mode. The IPM corresponding to the two highest histogram bars is selected for the current block. If the maximum value in the histogram is 0 (meaning that gradient analysis cannot be performed, or the area that makes up the template is flat), the DC mode is selected as the intra-frame prediction mode for the current block.

[0160] Fig.16A computing environment 1610 is shown coupled to a user interface 1650. The computing environment 1610 may be part of a data processing server. The computing environment 1610 includes a processor 1620, a memory 1630, and an input / output (I / O) interface 1640.

[0161] The processor 1620 generally controls the overall operation of the computing environment 1610, such as operations associated with display, data acquisition, data communication, and image processing. The processor 1620 may include one or more processors for executing instructions to perform all or some of the steps in the above method. In addition, the processor 1620 may include one or more modules that facilitate the interaction between the processor 1620 and other components. The processor may be a central processing unit (CPU), a microprocessor, a single-chip microcomputer, a graphics processing unit (GPU), etc.

[0162] The memory 1630 is configured to store various types of data to support the operation of the computing environment 1610. The memory 1630 may include predetermined software 1632. Examples of such data include instructions for any application or method operating on the computing environment 1610, video data sets, image data, etc. The memory 1630 may be implemented by using any type of volatile or non-volatile memory device or a combination thereof, such as a static random access memory (SRAM), an electrically erasable programmable read-only memory (EEPROM), an erasable programmable read-only memory (EPROM), a programmable read-only memory (PROM), a read-only memory (ROM), a magnetic memory, a flash memory, a magnetic disk, or an optical disk.

[0163] I / O interface 1640 provides an interface between processor 1620 and peripheral interface modules (e.g., keyboard, click wheel, buttons, etc.). Buttons may include, but are not limited to, a home button, a start scan button, and a stop scan button. I / O interface 1640 may be coupled to an encoder and a decoder.

[0164] Fig.17 is a flowchart illustrating a video decoding method according to an example of the present disclosure.

[0165] In step 1701, the decoder may obtain a first control flag signaled at a specified level. For example, the specified level may include one of the following levels: transform block (TB) level, coding block (CB) level, slice level, picture level, or sequence level, wherein the first control flag indicates whether a decoding-side high-precision intra mode derivation (DHI) mode is enabled.

[0166] In some examples, the decoder may determine whether one or more adjacent intra-frame modes are encoded using a template-based intra-frame mode derivation (TIMD) mode. In some examples, the decoder may store the high-precision intra-frame mode and the corresponding low-precision intra-frame mode of one or more adjacent intra-frame modes in a mapping table when determining that one or more adjacent intra-frame modes are encoded using the TIMD mode. When the low-precision intra-frame mode is obtained, the decoder may obtain the corresponding high-precision intra-frame mode based on the mapping table. For example, the decoder may obtain the corresponding high-precision intra-frame mode based on the low-precision intra-frame mode and the mapping table.

[0167] In step 1702, the decoder may, upon determining that the first control flag is enabled, obtain a second flag of DHI indicating whether to use the DHI mode at a specified level.

[0168] In some examples, the decoder can obtain an intra-frame directional mode, check the adjacent high-precision intra-frame modes of the intra-frame directional mode based on the cost of template-based intra-frame mode derivation (TIMD), and select the adjacent high-precision intra-frame mode based on the cost of the adjacent high-precision intra-frame mode.

[0169] In step 1703, when the decoder determines to use the DHI mode, the decoder may derive the high-precision intra mode using a predefined method.

[0170] In some embodiments, the decoder may determine to use the adjacent high-precision intra mode when determining that the cost of the adjacent high-precision intra mode is below a predetermined threshold of the original cost of the intra directional mode. In some embodiments, the predetermined threshold is half of the original cost of the intra directional mode.

[0171] In some examples, the decoder can obtain an intra-frame directional mode, check the adjacent high-precision intra-frame modes of the intra-frame directional mode based on the histogram of the decoding-end intra-frame mode derivation (DIMD), and select the adjacent high-precision intra-frame mode based on the histogram of the adjacent high-precision intra-frame modes.

[0172] In some examples, the decoder may determine to use the adjacent high-precision intra mode when determining that the histogram of the adjacent high-precision intra mode is higher than the original histogram of the intra directional mode.

[0173] In some embodiments, the decoder may convert the gradient direction into an intra-frame angular prediction mode with high precision and index a histogram, wherein the histogram includes the accumulated values ​​of the gradient strengths for each intra-frame angular prediction mode.

[0174] In some examples, the decoder may select an intra angular prediction mode for the current block based on the two highest histogram bins in the indexed histogram.

[0175] In some examples, upon determining that the maximum value of the histogram is zero, the decoder may select DC mode as the intra angular prediction mode for the current block.

[0176] Fig.18 is a flowchart illustrating a video decoding method according to an example of the present disclosure.

[0177] In step 1801, the decoder may obtain a control flag transmitted by a signal at a specified level, which specified level includes one of the following levels: transform block (TB) level, coding block (CB) level, slice level, picture level or sequence level, wherein the first control flag indicates whether a decoding-side high-precision intra-frame mode derivation (DHI) mode is enabled.

[0178] In some examples, the decoder may determine whether one or more adjacent intra-frame modes are encoded using a template-based intra-frame mode derivation (TIMD) mode. In some examples, the decoder may store the high-precision intra-frame mode and the corresponding low-precision intra-frame mode of one or more adjacent intra-frame modes in a mapping table when determining that one or more adjacent intra-frame modes are encoded using the TIMD mode. In some examples, the decoder may obtain the corresponding high-precision intra-frame mode based on the mapping table when obtaining a low-precision intra-frame mode.

[0179] In step 1802, when it is determined that the first control flag is enabled, the decoder may derive a high-precision intra mode under a predefined condition, where the predefined condition includes one of the following conditions: a specific mode, or a specific block size.

[0180] In some examples, the decoder can obtain an intra-frame directional mode, check the adjacent high-precision intra-frame modes of the intra-frame directional mode based on the cost of template-based intra-frame mode derivation (TIMD), and select the adjacent high-precision intra-frame mode based on the cost of the adjacent high-precision intra-frame mode.

[0181] In some embodiments, the decoder may determine to use the adjacent high-precision intra mode when determining that the cost of the adjacent high-precision intra mode is below a predetermined threshold of the original cost of the intra directional mode. In some embodiments, the predetermined threshold is half of the original cost of the intra directional mode.

[0182] In some examples, the decoder can obtain an intra-frame directional mode, check the adjacent high-precision intra-frame modes of the intra-frame directional mode according to the histogram of the decoding-end intra-frame mode derivation (DIMD), and select the adjacent high-precision intra-frame mode based on the histogram of the adjacent high-precision intra-frame modes.

[0183] In some examples, the decoder may determine to use the adjacent high-precision intra mode when determining that the histogram of the adjacent high-precision intra mode is higher than the original histogram of the intra directional mode.

[0184] In some examples, the decoder may convert the gradient direction to an intra angular prediction mode with high precision and index a histogram, where the histogram includes accumulated values ​​of gradient magnitudes for each intra angular prediction mode.

[0185] In some embodiments, the decoder may select the intra angular prediction mode for the current block based on the two highest histogram bins in the indexed histogram.

[0186] In some embodiments, upon determining that the maximum value of the histogram is zero, the decoder may select the DC mode as the intra angular prediction mode for the current block.

[0187] Fig.19 is a flowchart illustrating a video encoding method according to an example of the present disclosure.

[0188] In step 1901, the encoder may obtain a first control flag transmitted by a signal at a specified level, the specified level including one of the following levels: transform block (TB) level, coding block (CB) level, slice level, picture level or sequence level, wherein the first control flag indicates whether a high-precision intra-frame mode derivation (DHI) mode is enabled at the decoding end, and when it is determined that the DHI mode is enabled, a second flag of the DHI is transmitted by a signal, the second flag indicating whether the DHI mode is used at the specified level, and when it is determined that the DHI mode is used at the specified level, a predefined method is used to derive the high-precision intra-frame mode.

[0189] In some examples, the encoder may determine whether one or more adjacent intra-frame modes are encoded using a template-based intra-frame mode derivation (TIMD) mode. In some examples, the encoder may store a high-precision intra-frame mode and a corresponding low-precision intra-frame mode of one or more adjacent intra-frame modes in a mapping table when determining that one or more adjacent intra-frame modes are encoded using the TIMD mode.

[0190] In step 1902, the encoder may, upon determining that the first control flag is enabled, obtain a second flag of DHI indicating whether to use the DHI mode at a specified level.

[0191] In some examples, the encoder can obtain an intra-frame directional mode, the encoder checks the adjacent high-precision intra-frame modes of the intra-frame directional mode based on the cost of template-based intra-frame mode derivation (TIMD), and selects the adjacent high-precision intra-frame mode based on the cost of the adjacent high-precision intra-frame mode.

[0192] In step 1903, when the encoder determines to use the DHI mode, the encoder may derive the high-precision intra mode using a predefined method.

[0193] In some embodiments, the encoder may determine to use the adjacent high-precision intra mode when it is determined that the cost of the adjacent high-precision intra mode is below a predetermined threshold of the original cost of the intra directional mode. In some embodiments, the predetermined threshold is half of the original cost of the intra directional mode.

[0194] In some examples, the encoder can obtain an intra-frame directional mode, check the adjacent high-precision intra-frame modes of the intra-frame directional mode based on the histogram of the decoding-end intra-frame mode derivation (DIMD), and select the adjacent high-precision intra-frame mode based on the histogram of the adjacent high-precision intra-frame modes.

[0195] In some examples, the encoder may determine to use a neighboring high-precision intra mode when it determines that a histogram of the neighboring high-precision intra mode is higher than an original histogram of the intra directional mode.

[0196] In some embodiments, the encoder may convert the gradient direction into an intra angular prediction mode with high precision and index a histogram, wherein the histogram includes accumulated values ​​of gradient magnitudes for each intra angular prediction mode.

[0197] In some examples, the encoder may select the intra angular prediction mode for the current block based on the two highest histogram bins in the indexed histogram.

[0198] In some examples, upon determining that the maximum value of the histogram is zero, the encoder may select DC mode as the intra angular prediction mode for the current block.

[0199] Fig. 20 is a flowchart illustrating a video encoding method according to an example of the present disclosure.

[0200] In step 2001, the encoder may obtain a control flag transmitted by a signal at a specified level, which specified level includes one of the following levels: transform block (TB) level, coding block (CB) level, slice level, picture level or sequence level, wherein the first control flag indicates whether a decoding-side high-precision intra-frame mode derivation (DHI) mode is enabled.

[0201] In some examples, the encoder may determine whether one or more adjacent intra-frame modes are encoded using a template-based intra-frame mode derivation (TIMD) mode. In some examples, the encoder may store the high-precision intra-frame mode and the corresponding low-precision intra-frame mode of one or more adjacent intra-frame modes in a mapping table when determining that one or more adjacent intra-frame modes are encoded using the TIMD mode. In some examples, the encoder may obtain the corresponding high-precision intra-frame mode based on the mapping table when obtaining a low-precision intra-frame mode.

[0202] In step 2002, when it is determined that the first control flag is enabled, the decoder may derive a high-precision intra mode under a predefined condition, where the predefined condition includes one of the following conditions: a specific mode, or a specific block size.

[0203] In some examples, the encoder can obtain an intra-frame directional mode, and the decoder checks the adjacent high-precision intra-frame modes of the intra-frame directional mode based on the cost of template-based intra-frame mode derivation (TIMD), and selects the adjacent high-precision intra-frame mode based on the cost of the adjacent high-precision intra-frame mode.

[0204] In some embodiments, the encoder may determine to use the adjacent high-precision intra mode when it is determined that the cost of the adjacent high-precision intra mode is below a predetermined threshold of the original cost of the intra directional mode. In some embodiments, the predetermined threshold is half of the original cost of the intra directional mode.

[0205] In some examples, the encoder may signal an intra-frame directional mode, check the adjacent high-precision intra-frame modes of the intra-frame directional mode based on a histogram of decoder-side intra-frame mode derivation (DIMD), and select the adjacent high-precision intra-frame mode based on the histogram of the adjacent high-precision intra-frame modes.

[0206] In some examples, the encoder may determine to use a neighboring high-precision intra mode when it determines that a histogram of the neighboring high-precision intra mode is higher than an original histogram of the intra directional mode.

[0207] In some examples, the encoder may convert the gradient direction to an intra angular prediction mode with high precision and index a histogram, where the histogram includes accumulated values ​​of gradient magnitudes for each intra angular prediction mode.

[0208] In some embodiments, the encoder may select the intra angular prediction mode for the current block based on the two highest histogram bins in the indexed histogram.

[0209] In some embodiments, upon determining that the maximum value of the histogram is zero, the encoder may select the DC mode as the intra angular prediction mode for the current block.

[0210] In some examples, a device is provided. The device includes a processor 1620 and a memory 1630, wherein the memory 1630 is configured to store instructions executable by the processor; wherein when the processor executes the instructions, it is configured to perform the following steps: Fig.17 , Fig.18 , Fig.19 or Fig. 20 The method shown.

[0211] In some other examples, a non-transitory computer-readable storage medium is provided, in which instructions are stored. For example, the instructions can be stored as predetermined software 1632, or a part of the software. When the instructions are executed by the processor 1620, the instructions cause the processor to perform the following steps: Fig.17 , Fig.18 , Fig.19 or Fig. 20 In one example, the plurality of programs may be executed by a processor 1620 in a computing environment 1610 to (e.g., Fig. 9 The video encoder 20 in the computing environment 1610 receives a bit stream or data stream including encoded video information (e.g., video blocks representing encoded video frames, and / or one or more associated syntax elements, etc.), and can also be executed by the processor 1620 in the computing environment 1610 to perform the above-mentioned decoding method according to the received bit stream or data stream. In another example, the multiple programs can be executed by the processor 1620 in the computing environment 1610 to perform the above-mentioned encoding method to encode the video information (e.g., video blocks representing video frames, and / or one or more associated syntax elements, etc.) into a bit stream or data stream, and can also be executed by the processor 1620 in the computing environment 1610 to (e.g., to Fig.10 Alternatively, a non-transitory computer-readable storage medium may store the bit stream or data stream generated by the encoder (e.g., Fig. 9 The video encoder 20 in FIG. 1 generates a video signal for a decoder (eg, Fig.10 A bitstream or data stream including encoded video information (e.g., video blocks representing encoded video frames, and / or associated one or more syntax elements, etc.) used by the video decoder 30 in the video decoder 30 when decoding video data. The non-transitory computer-readable storage medium can be, for example, a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0212] In an embodiment, a computing device is also provided, which includes: one or more processors (e.g., processor 1620); and a non-transitory computer-readable storage medium or memory 1630 in which multiple programs that can be executed by the one or more processors are stored, wherein the one or more processors are configured to perform the above-mentioned method when executing the multiple programs.

[0213] In an embodiment, a computer program product is also provided, including a plurality of programs in, for example, memory 1630, which can be executed by processor 1620 in computing environment 1610 for performing the above method. For example, the computer program product may include a non-transitory computer-readable storage medium.

[0214] In an embodiment, the computing environment 1610 may be implemented by one or more ASICs, DSPs, digital signal processing devices (DSPDs), programmable logic devices (PLDs), FPGAs, GPUs, controllers, microcontrollers, microprocessors, or other electronic components for performing the above methods.

[0215] The description of the present disclosure has been presented for purposes of illustration and is not intended to be exhaustive or limited to the present disclosure. Many modifications, variations, and alternative embodiments will be apparent to one of ordinary skill in the art having the benefit of the teachings presented in the foregoing description and the associated drawings.

[0216] Unless otherwise specifically stated, the order of steps of the method according to the present disclosure is intended to be illustrative only, and the steps of the method according to the present disclosure are not limited to the order specifically described above, but can be changed according to actual conditions. In addition, at least one of the steps of the method according to the present disclosure can be adjusted, combined or deleted according to actual needs.

[0217] The examples are chosen and described in order to explain the principles of the present disclosure and to enable other persons skilled in the art to understand the various embodiments of the present disclosure and to best utilize the basic principles and various embodiments with various modifications suitable for the specific use contemplated. Therefore, it will be understood that the scope of the present disclosure is not limited to the specific examples of the disclosed embodiments, and modifications and other embodiments are intended to be included within the scope of the present disclosure.

Claims

1. A video decoding method, comprising: The decoder obtains a first control flag signaled at a specified level, wherein the specified level includes one of the following levels: transform block TB level, coding block CB level, slice level, picture level or sequence level, wherein the first control flag indicates whether to enable a decoding-side high-precision intra mode derivation DHI mode, In response to determining that the DHI mode is enabled, the decoder acquires a second flag of the DHI indicating whether to use the DHI mode at the specified level, and In response to determining to use the DHI mode at the specified level, the decoder derives a high-precision intra mode using a predefined method.

2. The method according to claim 1, wherein: The predefined methods include: The decoder determines whether one or more adjacent intra-modes are encoded using a template-based intra-mode derivation TIMD mode; In response to determining that the one or more adjacent intra modes are encoded using the TIMD mode, the decoder stores a high-precision intra mode and a corresponding low-precision intra mode of the one or more adjacent intra modes in a mapping table; and In response to acquiring the low-precision intra mode, the decoder acquires the corresponding high-precision intra mode based on the mapping table and the low-precision intra mode.

3. The method according to claim 1, wherein: The predefined methods include: The decoder obtains an intra-frame direction mode; The decoder checks the neighboring high-precision intra modes of the intra directional mode according to the cost of template-based intra mode derivation TIMD; and The decoder selects the adjacent high-precision intra-mode based on a cost of the adjacent high-precision intra-mode.

4. The method according to claim 3, wherein: The predefined method also includes: In response to determining that the cost of the adjacent high-precision intra mode is lower than a predetermined threshold of the original cost of the intra directional mode, the decoder determines to use the adjacent high-precision intra mode.

5. The method according to claim 4, wherein: The predetermined threshold is half of the original cost of the intra directional mode.

6. The method according to claim 1, wherein: The predefined methods include: The decoder obtains an intra-frame direction mode; The decoder derives a histogram of DIMD according to the decoding-end intra-frame mode, and checks the adjacent high-precision intra-frame mode of the intra-frame directional mode; and The decoder selects the adjacent high-precision intra-frame mode based on a histogram of the adjacent high-precision intra-frame modes.

7. The method according to claim 6, wherein: The predefined method also includes: In response to determining that the histogram of the adjacent high-precision intra mode is higher than the original histogram of the intra directional mode, the decoder determines to use the adjacent high-precision intra mode.

8. The method according to claim 6, wherein: The predefined method also includes: The decoder converts the gradient direction into an intra-frame angular prediction mode with high precision and indexes the histogram, wherein the histogram includes cumulative values ​​of gradient magnitudes for each intra-frame angular prediction mode.

9. The method according to claim 8, wherein: The predefined method also includes: The decoder selects an intra angular prediction mode for a current block based on the two highest histogram bins in the indexed histogram.

10. The method according to claim 9, wherein: The predefined method also includes: In response to determining that the maximum value of the histogram is zero, the decoder selects the DC mode as the intra angular prediction mode for the current block.

11. A video decoding method, characterized in that: include: The decoder obtains a control flag signaled at a specified level, the specified level comprising one of the following levels: transform block TB level, coding block CB level, slice level, picture level or sequence level, wherein the control flag indicates whether to enable a decoding-side high-precision intra mode derivation DHI mode, and In response to determining that the first control flag is enabled, the decoder derives a high-precision intra mode under a predefined condition, wherein the predefined condition comprises one of the following conditions: a specific mode, or a specific block size.

12. The method according to claim 11, further comprising: The decoder determines whether one or more adjacent intra-modes are encoded using a template-based intra-mode derived TIMD mode; In response to determining that the one or more adjacent intra modes are encoded using the TIMD mode, the decoder stores the high-precision intra mode and the corresponding low-precision intra mode of the one or more adjacent intra modes in a mapping table; as well as In response to acquiring the low-precision intra-frame mode, the decoder acquires a corresponding high-precision intra-frame mode according to the mapping table and the low-precision intra-frame mode.

13. The method according to claim 11, wherein: The predefined methods include: The decoder obtains the intra-frame direction mode; The decoder checks the neighboring high-precision intra modes of the intra directional mode according to the cost of template-based intra mode derivation TIMD; and The decoder selects the adjacent high-precision intra-mode based on a cost of the adjacent high-precision intra-mode.

14. The method according to claim 13, wherein: The predefined method also includes: In response to determining that the cost of the adjacent high-precision intra mode is lower than a predetermined threshold of the original cost of the intra directional mode, the decoder determines to use the adjacent high-precision intra mode.

15. The method according to claim 14, wherein: The predetermined threshold is half of the original cost of the intra directional mode.

16. The method according to claim 11, wherein: The predefined methods include: The decoder obtains an intra-frame direction mode; The decoder checks the adjacent high-precision intra-frame mode of the intra-frame directional mode according to the histogram of the DIMD derived by the decoding end intra-frame mode; and The decoder selects the adjacent high-precision intra-frame mode based on a histogram of the adjacent high-precision intra-frame modes.

17. The method according to claim 16, wherein: The predefined method also includes: In response to determining that the histogram of the adjacent high-precision intra mode is higher than the original histogram of the intra directional mode, the decoder determines to use the adjacent high-precision intra mode.

18. The method according to claim 16, wherein: The predefined method also includes: The decoder converts the gradient direction into an intra-frame angular prediction mode with high precision and indexes the histogram, wherein the histogram includes cumulative values ​​of gradient magnitudes for each intra-frame angular prediction mode.

19. The method according to claim 18, wherein: The predefined method also includes: The decoder selects an intra angular prediction mode for a current block based on the two highest histogram bins in the indexed histogram.

20. The method according to claim 19, wherein: The predefined method also includes: In response to determining that the maximum value of the histogram is zero, the decoder selects the DC mode as the intra angular prediction mode for the current block.

21. A video encoding method, comprising: The encoder signals a first control flag at a specified level, wherein the specified level includes one of the following levels: transform block TB level, coding block CB level, slice level, picture level or sequence level, wherein the first control flag indicates whether to enable a decoding-side high-precision intra mode derivation DHI mode, In response to determining that the DHI mode is enabled, the encoder signals a second flag of the DHI indicating whether the DHI mode is used at the specified level, and In response to determining to use the DHI mode at the specified level, the encoder derives a high-precision intra mode using a predefined method.

22. The method according to claim 21, wherein: The predefined methods include: The encoder determines whether one or more neighboring intra-modes are encoded using a template-based intra-mode derivation TIMD mode; and In response to determining that the one or more adjacent intra modes are encoded using the TIMD mode, the encoder stores a high-precision intra mode and a corresponding low-precision intra mode of the one or more adjacent intra modes in a mapping table.

23. The method according to claim 21, wherein: The predefined methods include: The encoder signals an intra directional mode; The encoder checks the neighboring high-precision intra modes of the intra directional mode according to the cost of template-based intra mode derivation TIMD; and The encoder selects the adjacent high-precision intra mode based on a cost of the adjacent high-precision intra mode.

24. The method according to claim 23, wherein: The predefined method also includes: In response to determining that the cost of the neighboring high-precision intra mode is lower than a predetermined threshold of the original cost of the intra directional mode, the encoder determines to use the neighboring high-precision intra mode.

25. The method according to claim 24, wherein: The predetermined threshold is half of the original cost of the intra directional mode.

26. The method according to claim 21, wherein: The predefined methods include: The encoder signals an intra directional mode; The encoder derives a histogram of DIMD according to the intra-frame mode at the decoding end, and checks the adjacent high-precision intra-frame mode of the intra-frame directional mode; and The encoder selects the adjacent high-precision intra-frame mode based on a histogram of the adjacent high-precision intra-frame modes.

27. The method according to claim 26, wherein: The predefined method also includes: In response to determining that the histogram of the neighboring high-precision intra mode is higher than the original histogram of the intra directional mode, the encoder determines to use the neighboring high-precision intra mode.

28. The method according to claim 26, wherein: The predefined method also includes: The encoder converts the gradient direction into an intra-frame angular prediction mode with high precision and indexes the histogram, wherein the histogram includes cumulative values ​​of gradient magnitudes for each intra-frame angular prediction mode.

29. The method according to claim 28, wherein: The predefined method also includes: The encoder selects an intra angular prediction mode for a current block based on the two highest histogram bins in the indexed histogram.

30. The method of claim 29, wherein: The predefined method also includes: In response to determining that the maximum value of the histogram is zero, the encoder selects DC mode as the intra angular prediction mode for the current block.

31. A video encoding method, comprising: the encoder signals a control flag at a specified level, the specified level comprising one of the following levels: transform block TB level, coding block CB level, slice level, picture level or sequence level, wherein the control flag indicates whether to enable a decoding-side high-precision intra mode derivation DHI mode, and In response to determining that the first control flag is enabled, the decoder derives a high-precision intra mode under a predefined condition, wherein the predefined condition comprises one of the following conditions: a specific mode, or a specific block size.

32. The method of claim 31 further comprising: The encoder determines whether one or more adjacent intra-modes are encoded using a template-based intra-mode derived TIMD mode; In response to determining that the one or more adjacent intra modes are encoded using the TIMD mode, the encoder stores a high-precision intra mode and a corresponding low-precision intra mode of the one or more adjacent intra modes in a mapping table; as well as In response to acquiring the low-precision intra mode, the encoder acquires the corresponding high-precision intra mode according to the mapping table and the low-precision intra mode.

33. The method according to claim 31, wherein: The predefined methods include: The encoder signals the intra-directional mode; The encoder checks the neighboring high-precision intra modes of the intra directional mode according to the cost of template-based intra mode derivation TIMD; and The encoder selects the adjacent high-precision intra mode based on a cost of the adjacent high-precision intra mode.

34. The method of claim 33, wherein: The predefined method also includes: In response to determining that the cost of the neighboring high-precision intra mode is lower than a predetermined threshold of the original cost of the intra directional mode, the encoder determines to use the neighboring high-precision intra mode.

35. The method of claim 34, wherein: The predetermined threshold is half of the original cost of the intra directional mode.

36. The method of claim 31, wherein: The predefined methods include: The encoder signals an intra directional mode; The encoder checks the adjacent high-precision intra-frame mode of the intra-frame directional mode according to the histogram of the DIMD derived by the decoding end intra-frame mode; and The encoder selects the adjacent high-precision intra-frame mode based on a histogram of the adjacent high-precision intra-frame modes.

37. The method of claim 36, wherein: The predefined method also includes: In response to determining that the histogram of the neighboring high-precision intra mode is higher than the original histogram of the intra directional mode, the encoder determines to use the neighboring high-precision intra mode.

38. The method of claim 36, wherein: The predefined method also includes: The encoder converts the gradient direction into an intra-frame angular prediction mode with high precision and indexes the histogram, wherein the histogram includes cumulative values ​​of gradient magnitudes for each intra-frame angular prediction mode.

39. The method of claim 38, wherein: The predefined method also includes: The encoder selects an intra angular prediction mode for a current block based on the two highest histogram bins in the indexed histogram.

40. The method of claim 39, wherein: The predefined method also includes: In response to determining that the maximum value of the histogram is zero, the encoder selects DC mode as the intra angular prediction mode for the current block.

41. An apparatus comprising: one or more processors; as well as A memory configured to store instructions executable by the one or more processors; wherein, when executing the instructions, the one or more processors are configured to perform the method of any one of claims 1-40.

42. A non-transitory computer-readable storage medium for storing computer-executable instructions, which, when executed by one or more computer processors, cause the one or more computer processors to perform the method of any one of claims 21-40 to encode a current video block into a bitstream and transmit the bitstream.

43. A non-transitory computer-readable storage medium for storing computer-executable instructions, which, when executed by one or more computer processors, cause the one or more computer processors to receive a bit stream and execute the method of any one of claims 1-20 based on the bit stream.

Images