Construction method of hybrid mapping structure and related device

Abstract

The invention relates to the technical field of data storage, and discloses a construction method of a hybrid mapping structure and a related device.The construction method of the hybrid mapping structure comprises the steps that a mapping pair is obtained; judging whether the logic address is a continuous non-large-page alignment address or not according to the global bitmap; if the logical address is not the continuous non-large page alignment address, judging whether the continuity of a logical address field corresponding to the logical address is greater than a continuity threshold value or not; if the continuity of the logic address field is greater than a continuity threshold value, inserting the mapping pair into a compact array; if the continuity degree of the logic address field is smaller than or equal to a continuity degree threshold value, the mapping pair is inserted into a range bucket hash structure, and the mapping pair is stored by adopting a mixed mapping structure formed by combining three data structures including a global bit chart, a compact array and the range hash bucket structure, so that the memory overhead of the flash memory equipment can be optimized, and the memory performance of the flash memory equipment is improved. The memory is saved in a pure sequential read-write scene, and the performance of the array is kept in a pure random read-write scene.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of data storage technology, and in particular to a method for constructing a hybrid mapping structure and related devices. Background Art

[0002] In modern solid-state drives (SSDs), the mapping table from logical addresses to physical addresses (L2P table) is an important part of the flash translation layer (FTL). This L2P table not only directly affects the read and write performance, but also occupies most of the SSD's memory resources. In addition, the size of the mapping table increases with the increase in flash memory capacity, but the physical space available for memory particles in the SSD is approaching its limit. With the exponential increase in global data volume and the emergence of large-capacity QLC SSDs, the contradiction of memory shortage in SSDs has become increasingly prominent.

[0003] At present, in order to solve the above-mentioned problem of SSD memory shortage, there are two types of existing technical solutions: the first type is the most widely used array-based mapping table, where the array subscript represents the logical address (LPA) of the page, and the corresponding element value represents the physical address (PPA) of the page. This type of structure can save memory by adjusting the page granularity. If the array with 4K as one page is the traditional solution, the performance is higher, but the memory consumption is larger; if the array with 16K as one page is called a large page solution, the performance is lower and 75% of the memory can be saved. The second type is the structure of using external storage to save the mapping table, including the selective index cache (DFTL) solution that uses flash memory to store the mapping table, storing part of the table in the SSD memory, and the rest of the mapping table in the flash memory or host memory. Although this solution can save memory, it has poor performance due to the swapping in and out of flash memory pages. In summary, these two existing technical solutions cannot take into account both performance and memory overhead. Summary of the invention

[0004] The embodiment of the present application provides a method for constructing a hybrid mapping structure and a related device. By adopting a hybrid mapping structure that combines three data structures: a global bitmap table, a compact array, and a range hash bucket structure, mapping pairs are stored. This can optimize the memory overhead of the flash memory device, save memory in a purely sequential read and write scenario, and maintain the performance of the array in a purely random read and write scenario.

[0005] The embodiments of the present application provide the following technical solutions:

[0006] In a first aspect, an embodiment of the present application provides a method for constructing a hybrid mapping structure, the hybrid mapping structure including a global bitmap table, a compact array, and a range bucket hash structure, the method comprising:

[0007] Obtain a mapping pair, wherein the mapping pair includes a logical address and a physical address corresponding to the logical address;

[0008] According to the global bitmap table, determine whether the logical address is a continuous non-large page aligned address;

[0009] If the logical address is not a continuous non-large page aligned address, determining whether the continuity of the logical address segment corresponding to the logical address is greater than a continuity threshold;

[0010] If the continuity of the logical address segment is greater than the continuity threshold, the mapping pair is inserted into the compact array;

[0011] If the continuity of the logical address segment is less than or equal to the continuity threshold, the mapping pair is inserted into the range bucket hash structure.

[0012] In some embodiments, the global bitmap table is used to store metadata information corresponding to each logical address segment, the metadata information includes continuity, the metadata information also includes an allocation bitmap, the allocation bitmap is used to store a first state of the logical address, the first state includes a mapped state and a non-mapped state, and the method further includes:

[0013] According to the allocation bitmap, determining whether the first state corresponding to the logical address is a mapping state;

[0014] If the first state corresponding to the logical address is a non-mapped state, the first state corresponding to the logical address is modified to a mapped state.

[0015] In some embodiments, the metadata information further includes a continuous bitmap, the continuous bitmap is used to store the second state of the logical address, the second state includes a continuous state and a non-continuous state, and judging whether the logical address is a continuous non-large page aligned address according to the global bitmap table includes:

[0016] Determine whether the logical address is a non-large page aligned address;

[0017] If the logical address is a non-large page aligned address, judging whether the logical address is continuous with the logical address in the global bitmap table according to the global bitmap table;

[0018] If the logical address is continuous with the logical address in the global bitmap table, the continuous bitmap corresponding to the logical address is determined to be in a continuous state.

[0019] In some embodiments, the range bucket hash structure includes a global range table, a range bucket, and a range array, wherein the global range table is used to store mapping pointers corresponding to logical address segments, and inserting mapping pairs into the range bucket hash structure includes:

[0020] According to the global range table, determine whether the mapping pointer corresponding to the logical address segment points to the range bucket;

[0021] If the mapping pointer corresponding to the logical address segment points to the range bucket, the mapping pair is inserted into the range bucket;

[0022] If the mapping pointer corresponding to the logical address segment does not point to the range bucket, the mapping pair is inserted into the range array.

[0023] In some embodiments, after inserting the mapping pair into the range bucket, the method further comprises:

[0024] Determine whether the capacity of the range bucket reaches the capacity threshold;

[0025] If the capacity of the range bucket has reached the capacity threshold, then determine whether the continuity of the range bucket is greater than the continuity threshold;

[0026] If the continuity of the range bucket is less than or equal to the continuity threshold, then determine whether the density of the range bucket is greater than the density threshold;

[0027] If the density of the range bucket is less than or equal to the density threshold, the range bucket is split into at least two range buckets;

[0028] If the density of the range bucket is greater than the density threshold, the range bucket is split into at least two range arrays.

[0029] In some embodiments, the method further comprises:

[0030] Determine whether the continuity of the compact array is less than or equal to the continuity threshold;

[0031] If the continuity of the compact array is less than the continuity threshold, all mapping pairs with established mapping relationships in the compact array are obtained;

[0032] Insert all mapping pairs with established mapping relationships into range buckets and release the memory of the compact array to restore the compact array to a range bucket.

[0033] In some embodiments, after inserting the mapping pair into the range array, the method further comprises:

[0034] Determine whether the density of the range array is less than the density threshold;

[0035] If the density of the range array is less than the density threshold, get all mapping pairs in the range array;

[0036] Insert all mapping pairs in the range array into the range bucket and release the memory of the range array to restore the range array to a range bucket.

[0037] In some embodiments, after inserting the mapping pair into the range bucket, the method further comprises:

[0038] Determine whether there is a logical address segment in the range bucket whose continuity is greater than the continuity threshold;

[0039] If the continuity of a certain logical address segment in the range bucket is greater than the continuity threshold, the logical address segment and the mapping pair corresponding to the logical address segment are obtained;

[0040] Create a compact array for the logical address segment, and move the mapping pairs corresponding to the logical address segment from the range bucket to the compact array;

[0041] After moving the mapping pairs corresponding to the logical address segments from the range bucket to the compact array, if the density of the range bucket is less than the density threshold, the range bucket is merged with the surrounding range buckets into a new range bucket.

[0042] In a second aspect, an embodiment of the present application provides a physical address query method based on a hybrid mapping structure, the hybrid mapping structure includes a global bitmap table, a compact array, and a range bucket hash structure, the method comprising:

[0043] Get the logical address;

[0044] According to the global bitmap table, check whether the logical address has been mapped;

[0045] If the logical addresses have established a mapping relationship, determine whether the logical addresses are continuous;

[0046] If the logical addresses are continuous, the global bitmap table is traversed to obtain the starting logical address of the address segment corresponding to the logical address;

[0047] If the starting logical address is a large page aligned address, the physical address corresponding to the logical address is obtained through the compact array;

[0048] If the logical address is not continuous, the physical address corresponding to the logical address is obtained through the range bucket hash structure.

[0049] In some embodiments, the range bucket hash structure includes a global range table, a range bucket, and a range array, wherein the global range table is used to store a mapping pointer corresponding to a logical address segment, and obtaining a physical address corresponding to a logical address through the range bucket hash structure includes:

[0050] According to the global range table, determine whether the mapping pointer corresponding to the logical address segment points to the range bucket;

[0051] If the mapping pointer corresponding to the logical address segment points to the range bucket, the physical address corresponding to the logical address is obtained in the range bucket;

[0052] If the mapping pointer corresponding to the logical address segment does not point to the range bucket, the physical address corresponding to the logical address is obtained in the range array.

[0053] In some embodiments, the metadata information includes an allocation bitmap, the allocation bitmap is used to store a first state of the logical address, the first state includes a mapping state and an unmapping state, and determining whether a mapping relationship has been established for the logical address includes:

[0054] According to the allocation bitmap, determining whether the first state corresponding to the logical address is a mapping state;

[0055] If the first state corresponding to the logical address is a mapping state, it is determined that a mapping relationship has been established for the logical address;

[0056] If the first state corresponding to the logical address is a non-mapped state, it is determined that no mapping relationship is established for the logical address, and a query failure result is output.

[0057] In some embodiments, the metadata information further includes a continuous bitmap, the continuous bitmap is used to store the second state of the logical address, the second state includes a continuous state and a discontinuous state, and determining whether the logical address is continuous includes:

[0058] According to the continuous bitmap, determining whether the second state corresponding to the logical address is a continuous state;

[0059] If the second state corresponding to the logical address is a continuous state, determining the logical address as a continuous logical address;

[0060] If the second state corresponding to the logical address is a non-continuous state, the logical address is determined as a non-continuous logical address.

[0061] In some embodiments, before obtaining the physical address corresponding to the logical address through the compact array, the method further includes:

[0062] Determine whether the address segment has established a compact array;

[0063] If a compact array has been established for the address segment, the physical address corresponding to the logical address is obtained through the compact array;

[0064] If a compact array is not established for the address segment, the physical address corresponding to the logical address is obtained through the range bucket hash structure.

[0065] In a third aspect, an embodiment of the present application provides a flash memory device controller, including:

[0066] at least one processor; and,

[0067] a memory communicatively connected to at least one processor; wherein,

[0068] The memory stores instructions that can be executed by at least one processor, and the instructions are executed by at least one processor so that the at least one processor can execute the method for constructing a hybrid mapping structure as in the first aspect, or the physical address query method based on the hybrid mapping structure as in the second aspect.

[0069] In a fourth aspect, an embodiment of the present application provides a flash memory device, including:

[0070] The flash memory device controller according to the third aspect;

[0071] At least one flash memory medium is communicatively coupled to the flash memory device controller.

[0072] The beneficial effects of the embodiments of the present application are as follows: different from the prior art, the embodiments of the present application provide a method for constructing a hybrid mapping structure, wherein the hybrid mapping structure includes a global bitmap table, a compact array and a range bucket hash structure, and the method includes: obtaining a mapping pair, wherein the mapping pair includes a logical address and a physical address corresponding to the logical address; judging whether the logical address is a continuous non-large page aligned address according to the global bitmap table; if the logical address is not a continuous non-large page aligned address, judging whether the continuity of the logical address segment corresponding to the logical address is greater than the continuity threshold; if the continuity of the logical address segment is greater than the continuity threshold, inserting the mapping pair into the compact array; if the continuity of the logical address segment is less than or equal to the continuity threshold, inserting the mapping pair into the range bucket hash structure, the present application can store the mapping pairs by adopting a hybrid mapping structure combining three data structures including a global bitmap table, a compact array and a range hash bucket structure, thereby optimizing the memory overhead of the flash memory device, saving memory in a purely sequential read and write scenario, and maintaining the performance of the array in a purely random read and write scenario. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] One or more embodiments are exemplarily described by corresponding drawings, which do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and the figures in the drawings do not constitute proportional limitations unless otherwise stated.

[0074] Figure 1 is a structural diagram of a hybrid mapping structure provided in an embodiment of the present application;

[0075] Figure 2 It is a relationship diagram of a range hash bucket structure provided by an embodiment of the present application;

[0076] Figure 3 It is a flowchart of a method for constructing a hybrid mapping structure provided in an embodiment of the present application;

[0077] Figure 4 It is a flowchart of determining whether a first state corresponding to a logical address is a mapping state provided by an embodiment of the present application;

[0078] Figure 5 It is a flowchart of determining whether a logical address is a continuous non-large page aligned address provided by an embodiment of the present application;

[0079] Figure 6 yes Figure 3 A detailed flow chart of step S305 in FIG.

[0080] Figure 7 It is a schematic diagram of a flow chart of determining whether the capacity of a range bucket reaches a capacity threshold provided by an embodiment of the present application;

[0081] Figure 8 It is a flowchart of determining whether the continuity of a compact array is less than or equal to a continuity threshold provided by an embodiment of the present application;

[0082] Fig. 9 It is a schematic diagram of a flow chart for determining whether the density of a range array is less than a density threshold provided in an embodiment of the present application;

[0083] Fig.10 It is a flow chart of a method for determining whether there is a certain logical address segment in a range bucket whose continuity is greater than a continuity threshold provided by an embodiment of the present application;

[0084] Fig.11 It is a schematic diagram of the overall process of a method for constructing a hybrid mapping structure provided in an embodiment of the present application;

[0085] Fig.12 It is a flow chart of a physical address query method based on a hybrid mapping structure provided in an embodiment of the present application;

[0086] Fig.13 yes Fig.12 A detailed flow chart of step S1202 in FIG.

[0087] Fig.14 yes Fig.12 A detailed flow chart of step S1204 in FIG.

[0088] Fig.15 yes Fig.12 A detailed flow chart of step S1205 in FIG.

[0089] Fig.16 It is a flowchart of determining whether a compact array has been established for an address segment provided by an embodiment of the present application;

[0090] Fig.17 It is a schematic diagram of the overall process of a physical address query method based on a hybrid mapping structure provided in an embodiment of the present application;

[0091] Fig.18 is a structural diagram of a flash memory controller provided in an embodiment of the present application;

[0092] Fig.19 It is a structural schematic diagram of a flash memory device provided in an embodiment of the present application.

[0093] Description of Figure Numbers:

[0094] Label name Label name 100 Flash memory devices 200 Host 110 Flash Media 180 Flash Device Controller 181 processor 182 Memory DETAILED DESCRIPTION

[0095] The technical solution of the present application is described in detail below in conjunction with the accompanying drawings:

[0096] See also Figure 1 , Figure 1 is a structural diagram of a hybrid mapping structure provided in an embodiment of the present application;

[0097] like Figure 1 As shown, the hybrid mapping structure is stored in the memory space of the flash memory device, and the hybrid mapping structure includes a global bitmap table, a compact array and a range bucket hash table (RBHT, Range Bucket Hash Table le), wherein the range hash bucket structure includes a global range table (GRT, G l oba l Range Table le), a range bucket (RB, Range Bucket) and a range array (RA, Range Array). In some embodiments, the range array structure in the range bucket hash structure will be exchanged to the host memory as the SSD memory is short, and the remaining array storage structures are all located inside the SSD. It can be understood that the three structures of the global bitmap table, the compact array and the range bucket hash table can exist at the same time, and can be converted to each other according to the load status, thereby dynamically adjusting the proportion of each data storage structure. By adopting a hybrid mapping structure combining the three data structures of the global bitmap table, the compact array and the range hash bucket structure to store the mapping pair, the present application can optimize the memory overhead of the flash memory device, save memory in a pure sequential read and write scenario, and maintain the performance of the array in a pure random read and write scenario.

[0098] See also Figure 2 , Figure 2 It is a relationship diagram of a range hash bucket structure provided by an embodiment of the present application;

[0099] like Figure 2As shown, the global bitmap table includes metadata information. The global bitmap table consists of multiple address segments, each of which corresponds to continuity, and each address segment includes multiple logical addresses. The present application will dynamically convert the mapping table according to the continuity, and each mapping table structure dynamically occupies memory. Each address segment stores its mapping table address through a pointer, and each logical address corresponds to a continuous bitmap and an allocation bitmap, wherein the allocation bitmap represents whether each logical address has established a mapping relationship with the physical address. Querying the allocation bitmap in advance can avoid the delay overhead caused by the failure of the mapping table query. Continuity refers to the sum of the number of continuous bitmaps in each address segment that are in a continuous state. If the continuity is greater than the continuity threshold, it means that the continuity of the address segment is good, and a compact array should be selected for mapping; if the continuity is less than or equal to the continuity threshold, it means that the continuity of the segment is poor, and a range bucket hash bucket structure should be selected for mapping. In the embodiment of the present application, in order to facilitate the management of the logical address, the logical address of the fixed address length is set as the address segment, wherein the fixed address length can be set according to actual needs, for example, the address length is set to 4096. In some embodiments, in order to avoid long forward search, the present application combines every 8 logical addresses LPA into one group, and the bits of the 8-byte aligned address are fixedly set to 0. And by recording the physical address PPA of the 8-byte aligned address through a compact array, only 1 / 8 of the mapping table entries need to be recorded, saving memory space.

[0100] The compact array is divided into multiple arrays according to the size of the address segment. When the address segment length is 4096, there are 512 compact array entries, and each entry occupies 4 bytes, a total of 2048 bytes. When FTL builds a compact array table, it will apply for memory in blocks of 2KB. When the continuity of the address segment drops below the threshold, FTL will convert the compact array into a range bucket and release the original memory.

[0101] The range bucket hash table consists of a global range table, a range bucket, and a range array. The global range table is used to record the mapping table address corresponding to each logical address range (logical address segment), and to store the mapping pointer corresponding to the logical address segment. It should be noted that the range in the global range table is of indefinite length, and its range changes dynamically according to the splitting and merging of the range bucket and the range array. The global range table stores the starting address of each range, and the starting address of the next range is also the ending address of the previous range. The range bucket is a hash table structure with a fixed size, which is used to store the mapping pair of the logical address LPA to the physical address PPA in the range, wherein the mapping pair consists of two fields, LPA and PPA. Compared with the array structure, the range bucket is more suitable for storing sparse mapping pairs. When the density of the range bucket reaches the upper limit of a range bucket to store mapping pairs, that is, the capacity of the range bucket reaches the capacity threshold, the range bucket will split, and can be split into two range buckets, or multiple range arrays, or a combination of range arrays and range buckets according to the actual situation. The range array is an array of fixed length, which is organized according to the structure of the traditional array scheme to store the PPA of a range. The base address of each range array is recorded in the global range table, and will be converted back into range buckets when the number of valid mappings in the range array decreases. Compared with range buckets, range arrays have higher insertion and query performance and are more suitable for storage in host memory. In some embodiments, since range bucket queries may encounter hash conflicts, linear probing will result in multiple memory accesses. The range array only needs one memory access to obtain the PPA, and placing it in the host memory can reduce the number of PCIe requests. Therefore, in some embodiments, when a large number of range arrays are generated in random scenarios, the present application reduces the SSD memory pressure by placing the range arrays in the host memory.

[0102] See also Figure 3 , Figure 3 It is a flowchart of a method for constructing a hybrid mapping structure provided in an embodiment of the present application;

[0103] In an embodiment of the present application, a hybrid mapping structure includes a global bitmap table, a compact array, and a range bucket hash structure, wherein the global bitmap table is used to store metadata information corresponding to each logical address segment, the metadata information includes continuity, the compact array is used to store logical addresses whose continuity is greater than a continuity threshold and are aligned to large pages and the physical addresses corresponding to the logical addresses, and the range bucket hash structure is used to store logical addresses that are not stored in the compact array and the physical addresses corresponding to the logical addresses.

[0104] like Figure 3 As shown, the process of the method for constructing a hybrid mapping structure includes:

[0105] Step S301: Obtain a mapping pair, wherein the mapping pair includes a logical address and a physical address corresponding to the logical address;

[0106] Specifically, a mapping pair to be inserted into the hybrid mapping structure is obtained, wherein the mapping pair includes a logical address and a physical address corresponding to the logical address. It should be noted that there is a mapping relationship between the logical address and the physical address corresponding to the logical address.

[0107] In an embodiment of the present application, after obtaining the mapping pair, it is necessary to record the mapping relationship between the logical address and the physical address in the mapping pair in the allocation bitmap of the global bitmap table, so as to facilitate the subsequent query through the global bitmap table whether there is a mapping relationship between the logical address and the physical address, thereby improving the query efficiency of the physical address.

[0108] Please refer to Figure 4 , Figure 4 It is a flowchart of determining whether a first state corresponding to a logical address is a mapping state provided by an embodiment of the present application;

[0109] Step S401: Obtain a global bitmap table;

[0110] Specifically, a global bitmap table is obtained, and the global bitmap table is used to store metadata information corresponding to each logical address segment, and the metadata information includes continuity, allocation bitmap, and continuity bitmap. In an embodiment of the present application, the allocation bitmap is used to store a first state of the logical address, wherein the first state includes a mapping state and an unmapped state, and the mapping state refers to a mapping relationship established between the logical address and the physical address, and the unmapped state refers to no mapping relationship established between the logical address and the physical address. The continuity bitmap is used to store a second state of the logical address, wherein the second state includes a continuous state and a discontinuous state. The continuous state means that the current logical address is continuous with a certain logical address recorded in the global bitmap table, and the discontinuous state means that there is no certain logical address in the global bitmap table that is continuous with the current logical address. The continuity is the sum of the number of continuous states corresponding to the logical addresses of a certain address segment. For example, a certain address segment contains 10 logical addresses, among which the continuous bitmaps of 6 logical addresses are in a continuous state, and the continuous bitmaps of 4 logical addresses are in a discontinuous state, then the continuity of the address segment is 6.

[0111] Step S402: judging whether the first state corresponding to the logical address is a mapping state according to the allocation bitmap;

[0112] Specifically, through the global bitmap table, the allocation bitmap corresponding to the logical address is queried, and the first state corresponding to the logical address is obtained, and then it is determined whether the first state corresponding to the logical address is a mapping state. If the first state corresponding to the logical address is a non-mapping state, step S403 is entered; if the first state corresponding to the logical address is a mapping state, step S404 is entered.

[0113] Step S403: modifying the first state corresponding to the logical address to a mapping state;

[0114] Specifically, if the first state corresponding to the logical address is an unmapped state, it means that the mapping relationship between the logical address and the physical address has not been recorded in the global bitmap table, that is, the current first state of the logical address is an unmapped state, then the allocation bitmap in the global bitmap table is modified, and the first state corresponding to the logical address is modified to a mapped state. For example, assuming that the mapped state is 1 and the unmapped state is 0, the first state is modified from 0 to 1 to record the mapping relationship between the logical address and the physical address in the global bitmap table. After the first state corresponding to the logical address is modified to a mapped state, step S404 is entered.

[0115] Step S404: inserting the mapping pair into the hybrid mapping structure;

[0116] Specifically, if the first state corresponding to the logical address is a mapping state, indicating that the mapping relationship between the logical address and the physical address has been recorded in the global bitmap table, the mapping pair is inserted into the hybrid mapping structure according to steps S302 to S306.

[0117] Please refer to Figure 5 , Figure 5 It is a flowchart of determining whether a logical address is a continuous non-large page aligned address provided by an embodiment of the present application;

[0118] like Figure 5 As shown, the process of determining whether the logical address is a continuous non-large page aligned address includes:

[0119] Step S501: Obtaining a logical address;

[0120] Specifically, according to the mapping pair, the logical address in the mapping pair is obtained.

[0121] Step S502: determining whether the logical address is a non-large page aligned address;

[0122] Specifically, it is determined whether the logical address is a non-large page aligned address. If the logical address is a non-large page aligned address, the process proceeds to step S503; if the logical address is not a non-large page aligned address, the process proceeds to step S504. In the embodiment of the present application, large page alignment refers to allocating or mapping memory to a memory block larger than the standard page size (such as 4KB). These larger memory blocks are usually called large pages. Pages), a large page alignment address refers to a coarse-grained page, that is, a large page includes multiple 4kb pages. Large page alignment can ensure that data can be read or written continuously and efficiently. For example, large page alignment can reduce the number of page table entries, thereby reducing memory usage and improving memory access speed, as well as reducing memory fragmentation, making memory management more efficient. A non-large page alignment address refers to a data starting address that is not an integer multiple of the number of bytes in the data unit. Large page alignment addresses include but are not limited to 8-byte alignment addresses, and non-large page alignment addresses include but are not limited to non-8-byte alignment addresses, wherein an 8-byte alignment address indicates that the starting address of the data is an integer multiple of 8, the number of bytes in the data unit. For example, assuming that it is necessary to determine whether the logical address is an 8-byte alignment address, the logical address is divided by 8 and the remainder is obtained. If the remainder is not equal to 0, it indicates that the logical address is a non-8-byte alignment address; if the remainder is equal to 0, it indicates that the logical address is an 8-byte alignment address.

[0123] Step S503: judging whether the logical address is continuous with the logical address in the global bitmap table according to the global bitmap table;

[0124] Specifically, if the logical address is a non-large page aligned address, then according to the global bitmap table, it is determined whether the logical address is continuous with the logical address in the global bitmap table, wherein the global bitmap table includes a continuous bitmap, the continuous bitmap includes a second state, and the second state includes a continuous state and a discontinuous state. If the logical address is continuous with the logical address in the global bitmap table, the continuous bitmap corresponding to the logical address is determined as a continuous state, and the process goes to step S505; if the logical address is discontinuous with the logical address in the global bitmap table, the continuous bitmap corresponding to the logical address is determined as a discontinuous state, and the process goes to step S504.

[0125] Step S504: determining whether the continuity of the logical address segment corresponding to the logical address is greater than a continuity threshold;

[0126] Specifically, when the logical address is a large page aligned address, or the logical address is discontinuous with the logical address in the global bitmap table, it is determined whether the continuity of the logical address segment corresponding to the logical address is greater than the continuity threshold, wherein the continuity refers to the total number of continuous states in the address segment corresponding to the logical address. If the continuity of the logical address segment corresponding to the logical address is greater than the continuity threshold, step S506 is entered; if the continuity of the logical address segment corresponding to the logical address is less than or equal to the continuity threshold, step S507 is entered; in an embodiment of the present application, the continuity threshold can be set according to actual needs. For example, the continuity threshold is set to 7. Assuming that the address segment corresponding to the logical address contains 10 logical addresses, of which 8 logical addresses have continuous bitmaps in a continuous state and 2 logical addresses have continuous bitmaps in a non-continuous state, the continuity of the address segment is 8, i.e., it is determined that the continuity of the address segment is greater than the continuity threshold.

[0127] Step S505: determining the continuous bitmap corresponding to the logical address as a continuous state;

[0128] Specifically, if the logical address is a non-large page aligned address, and the logical address is continuous with the logical address in the global bitmap table, that is, when the logical address is a continuous non-large page aligned address, the continuous bitmap corresponding to the logical address is determined as a continuous state, indicating that the logical address is continuous with the previous logical address. In an embodiment of the present application, it is not necessary to store the logical address in the memory space, but through the continuous bitmap in the global bitmap table, it is possible to determine whether the current logical address is continuous with the previous logical address. It can be understood that for continuous addresses, the present application only needs to record the starting address of each address segment in the global bitmap table, and record the second state of other addresses to the continuous bitmap. Based on the continuity of the address, when the logical address is continuous, in the process of querying the physical address, it is only necessary to know the physical address of the previous address, and the physical address corresponding to the current logical address can be obtained by adding 1, so that memory compression can be achieved. Compared with storing all logical addresses in the memory space, this method can save the memory space of the flash memory device and improve the query efficiency of the physical address.

[0129] Step S506: inserting the mapping pair into the compact array;

[0130] Specifically, if the continuity of the logical address segment corresponding to the logical address is greater than the continuity threshold, the mapping pair corresponding to the logical address is inserted into the compact array to construct the compact array.

[0131] Step S507: insert the mapping pair into the range hash bucket structure;

[0132] Specifically, if the continuity of the logical address segment corresponding to the logical address is less than or equal to the continuity threshold, the mapping pair corresponding to the logical address is inserted into the range hash bucket structure to construct the range hash bucket structure.

[0133] Step S302: judging whether the logical address is a continuous non-large page aligned address according to the global bitmap table;

[0134] Specifically, the non-large page aligned address includes a non-8-byte aligned address. According to the global bitmap table, the first state corresponding to the logical address is obtained, and the logical address is divided by 8 and the remainder is taken. If the first state corresponding to the logical address is a continuous state and the remainder corresponding to the logical address is not equal to 0, it is determined that the logical address is a continuous non-large page aligned address, and the process goes to step S303; otherwise, it is determined that the logical address is not a continuous non-large page aligned address, and the process goes to step S304.

[0135] Step S303: modifying the global bitmap table to record the logical address in the global bitmap table;

[0136] Specifically, if the logical address is a continuous non-large page aligned address, the global bitmap table is modified to modify the second state corresponding to the logical address to a continuous state, so as to record the logical address in the global bitmap table.

[0137] Step S304: determining whether the continuity of the logical address segment corresponding to the logical address is greater than a preset threshold;

[0138] Specifically, determine whether the continuity of the logical address segment corresponding to the logical address is greater than the continuity threshold, where the continuity refers to the total number of continuous states in the address segment corresponding to the logical address. If the continuity of the logical address segment corresponding to the logical address is greater than the continuity threshold, enter step S306; if the continuity of the logical address segment corresponding to the logical address is less than or equal to the continuity threshold, enter step S305.

[0139] Step S305: insert the mapping pair into the range bucket hash structure;

[0140] For details, please refer to Figure 6 , Figure 6 yes Figure 3 A detailed flow chart of step S305 in FIG.

[0141] like Figure 6 As shown, step S305: inserting the mapping pair into the range bucket hash structure includes:

[0142] Step S351: Obtain the global range table;

[0143] Specifically, the range hash bucket structure includes a global range table, a range array and a range bucket, and the global range table is obtained, wherein the global range table is used to store a mapping pointer corresponding to a logical address segment, and the mapping pointer points to a range bucket or a range array.

[0144] Step S352: judging whether the mapping pointer corresponding to the logical address segment points to the range bucket according to the global range table;

[0145] Specifically, according to the global range table, determine whether the mapping pointer corresponding to the logical address segment points to the range bucket. If the mapping pointer corresponding to the logical address segment points to the range bucket, enter step S354; if the mapping pointer corresponding to the logical address segment points to the range array, enter step S353.

[0146] Step S353: insert the mapping pair into the range array;

[0147] Specifically, if the mapping pointer corresponding to the logical address segment points to the range array, the mapping pair is inserted into the range array.

[0148] Step S354: insert the mapping pair into the range bucket;

[0149] Specifically, if the mapping pointer corresponding to the logical address segment points to the range bucket, the mapping pair is inserted into the range bucket.

[0150] Step S306: inserting the mapping pair into the compact array;

[0151] Specifically, if the continuity of the logical address segment corresponding to the logical address is greater than the continuity threshold, the mapping pair is inserted into the compact array.

[0152] Please refer to Figure 7 , Figure 7 It is a schematic diagram of a flow chart of determining whether the capacity of a range bucket reaches a capacity threshold provided by an embodiment of the present application;

[0153] like Figure 7 As shown in the figure, the process of determining whether the capacity of the range bucket reaches the capacity threshold includes:

[0154] Step S701: after inserting the mapping pair into the range bucket, obtain the capacity of the range bucket;

[0155] Specifically, after the mapping pair is inserted into the range bucket, the capacity of the range bucket is obtained, wherein the capacity of the range bucket refers to the number of mapping pairs currently stored in the range bucket / the total number of mapping pairs that the range bucket can store at most.

[0156] Step S702: Determine whether the capacity of the range bucket reaches the capacity threshold;

[0157] Specifically, determine whether the capacity of the range bucket reaches the capacity threshold. If the capacity of the range bucket reaches the capacity threshold, enter step S704; if the capacity of the range bucket does not reach the capacity threshold, enter step S703. In this embodiment of the application, the capacity threshold can be set according to actual needs. For example, the capacity threshold is set to 95%.

[0158] Step S703: Do not split the range bucket;

[0159] Specifically, if the capacity of the range bucket does not reach the capacity threshold, it means that the current range bucket does not need to be split into other data storage structures in this application, and therefore, the range bucket is not split.

[0160] Step S704: determine whether the continuity of the range bucket is greater than the continuity threshold;

[0161] Specifically, if the capacity of the range bucket reaches the capacity threshold, it is further determined whether the continuity of the range bucket is greater than the continuity threshold. If the continuity of the range bucket is greater than the continuity threshold, step S705 is entered; if the continuity of the range bucket is less than or equal to the continuity threshold, step S706 is entered.

[0162] Step S705: Move the mapping pairs in the range bucket to the compact array;

[0163] Specifically, if the continuity of the range bucket is greater than the continuity threshold, the condition for building a compact array is met, all mapping pairs in the range bucket are obtained, the mapping pairs are moved to the compact array, and the memory space of the range bucket is released.

[0164] Step S706: determine whether the density of the range bucket is greater than the density threshold;

[0165] Specifically, the density of the range bucket is obtained, where the density of the range bucket = the number of valid mapping pairs in the range bucket / the address range of the range bucket, and whether the density of the range bucket is greater than the density threshold is determined. If the density of the range bucket is greater than the density threshold, step S707 is entered; if the density of the range bucket is less than or equal to the density threshold, step S708 is entered. In the embodiment of the present application, the density threshold can be set according to actual needs, for example, the density threshold is set to 50%.

[0166] Step S707: Split the range bucket into at least two range arrays;

[0167] Specifically, if the density of the range bucket is greater than a density threshold, the range bucket is split into at least two range arrays.

[0168] Step S708: Split the range bucket into at least two range buckets;

[0169] Specifically, if the density of the range bucket is less than or equal to the density threshold, the range bucket is split into at least two range buckets.

[0170] In an embodiment of the present application, when the continuity of the address segments in the range bucket is lower than the continuity threshold, if the density of the range bucket is greater than the density threshold, it can be considered that the current mapping is a mapping under a random write load. The present application uses range buckets to store mapping pairs corresponding to sparsely allocated address segments, and range arrays to store densely allocated mappings of random write loads, wherein the sparse allocation refers to mapping pairs with a density less than or equal to the density threshold, and the dense allocation refers to mapping pairs with a density greater than the density threshold. In the above steps S701 to S708, the present application can adaptively change the storage structure of the data according to the capacity of the data structure or the density of the mapping pairs, and realize the conversion between range buckets, range arrays and compact arrays, thereby saving memory space of the flash memory device and improving memory utilization.

[0171] Please refer to Figure 8 , Figure 8 It is a flowchart of determining whether the continuity of a compact array is less than or equal to a continuity threshold provided by an embodiment of the present application;

[0172] like Figure 8 As shown, the process of determining whether the continuity of a compact array is less than or equal to a continuity threshold includes:

[0173] Step S801: After inserting the mapping pair into the compact array, obtain the continuity of the compact array;

[0174] Specifically, after the mapping pair is inserted into the compact array, the continuity of the current compact array is obtained, wherein the continuity refers to the total number of continuous states in the address segment corresponding to the compact array.

[0175] Step S802: determining whether the continuity of the compact array is less than or equal to a continuity threshold;

[0176] Specifically, determine whether the continuity of the compact array is less than or equal to the continuity threshold. If the continuity of the compact array is less than or equal to the continuity threshold, proceed to step S804; if the continuity of the compact array is greater than the continuity threshold, proceed to step S803.

[0177] Step S803: do not process the compact array;

[0178] Specifically, if the continuity of the compact array is greater than the continuity threshold, it means that the continuity of the compact array meets the conditions for constructing a compact array, and the compact array does not need to be converted into other data storage structures, and the compact array is not processed.

[0179] Step S804: Obtain all mapping pairs with established mapping relationships in the compact array;

[0180] Specifically, if the continuity of the compact array is less than or equal to the continuity threshold, it means that the current continuity of the compact array does not meet the conditions for building a compact array, and all mapping pairs with established mapping relationships in the compact array are obtained to facilitate subsequent migration of the mapping pairs.

[0181] Step S805: insert all mapping pairs with established mapping relationships into the range bucket, and release the memory of the compact array to restore the compact array to the range bucket;

[0182] Specifically, when the continuity of the address segment of the compact array decreases as a new mapping pair is inserted, it can be considered that the segment is transformed from a sequential write load to a random write load. Therefore, the mapping pairs need to be stored in the range bucket used to store the mappings of the random write load, that is, all mapping pairs with established mapping relationships are inserted into the range bucket, and the memory of the compact array is released to restore the compact array to the range bucket.

[0183] Please refer to Fig. 9 , Fig. 9 It is a schematic diagram of a flow chart for determining whether the density of a range array is less than a density threshold provided in an embodiment of the present application;

[0184] like Fig. 9 As shown, the process of determining whether the density of the range array is less than the density threshold includes:

[0185] Step S901: after inserting the mapping pair into the range array, obtaining the density of the range array;

[0186] Specifically, after inserting the mapping pair into the range array, the density of the range array is obtained, wherein the density of the range array=the number of valid mapping pairs / the range of the range array, and the valid mapping pair refers to the mapping pair whose first state is the mapping state.

[0187] Step S902: determining whether the density of the range array is less than a density threshold;

[0188] Specifically, determine whether the density of the range array is less than the density threshold. If the density of the range array is less than the density threshold, proceed to step S904; if the density of the range array is greater than or equal to the density threshold, proceed to step S903, where the density threshold can be set according to actual needs, for example, the density threshold is set to 50%.

[0189] Step S903: do not process the range array;

[0190] Specifically, if the density of the range array is greater than or equal to the density threshold, it means that the range array does not need to be converted into other data storage structures, and the range array is not processed.

[0191] Step S904: Obtain all mapping pairs in the range array;

[0192] Specifically, if the density of the range array is less than the density threshold, it means that the range array meets the conditions for conversion to a range bucket, and all mapping pairs in the range array are obtained so that the mapping pairs in the range array can be subsequently moved to the range bucket.

[0193] Step S905: insert all mapping pairs in the range array into the range bucket, and release the memory of the range array to restore the range array to the range bucket;

[0194] Specifically, since the range bucket is used to store mapping pairs corresponding to sparsely allocated address segments, and the range array is used to store mappings of densely allocated random write loads, when the density of the range array is reduced to below the density threshold, all mapping pairs in the range array need to be inserted into the range bucket and the memory of the range array needs to be released to restore the range array to the range bucket.

[0195] Please refer to Fig.10 , Fig.10 It is a flow chart of a method for determining whether there is a certain logical address segment in a range bucket whose continuity is greater than a continuity threshold provided by an embodiment of the present application;

[0196] like Fig.10 As shown, the process of determining whether there is a logical address segment in the range bucket whose continuity is greater than the continuity threshold includes:

[0197] Step S1001: after inserting the mapping pair into the range bucket, obtaining the continuity of the logical address segment in the range bucket;

[0198] Specifically, after the mapping pair is inserted into the range bucket, the continuity of each logical address segment in the range bucket is obtained, wherein the continuity is the total number of continuous states corresponding to the logical addresses of the logical address segment.

[0199] Step S1002: Determine whether there is a logical address segment in the range bucket whose continuity is greater than a continuity threshold;

[0200] Specifically, according to the continuity of each logical address segment in the range bucket, determine whether there is a logical address segment in the range bucket whose continuity is greater than the continuity threshold. If there is a logical address segment in the range bucket whose continuity is greater than the continuity threshold, proceed to step S1004; if there is no logical address segment in the range bucket whose continuity is greater than the continuity threshold, proceed to step S1003.

[0201] Step S1003: do not process the range bucket;

[0202] Specifically, if there is no logical address segment in the range bucket whose continuity is greater than the continuity threshold, it means that the range bucket does not need to be converted into other data storage structures, and the range bucket is not processed.

[0203] Step S1004: Acquire the logical address segment and the mapping pair corresponding to the logical address segment;

[0204] Specifically, if there is a logical address segment in the range bucket whose continuity is greater than the continuity threshold, the logical address segment and the mapping pair corresponding to the logical address segment are obtained.

[0205] Step S1005: Create a compact array for the logical address segment, and move the mapping pair corresponding to the logical address segment from the range bucket to the compact array;

[0206] Specifically, since the continuity of the logical address segment in the current range bucket meets the conditions for building a compact array, a compact array is established for the logical address segment, and the mapping pair corresponding to the logical address segment is moved from the range bucket to the compact array. After the move is completed, the memory space occupied by the range bucket is released.

[0207] Step S1006: after moving the mapping pair corresponding to the logical address segment from the range bucket to the compact array, determining whether the density of the range bucket is less than a density threshold;

[0208] Specifically, after the mapping pairs corresponding to the logical address segments are moved from the range bucket to the compact array, it is necessary to further obtain the density of the range bucket to determine whether the density of the range bucket is less than the density threshold; if the density of the range bucket is less than the density threshold, proceed to step S1008; if the density of the range bucket is greater than or equal to the density threshold, proceed to step S1007, where the density of the range bucket = the total number of valid mapping pairs / the maximum capacity of the range bucket.

[0209] Step S1007: do not process the range bucket;

[0210] Specifically, if the density of the range bucket is greater than or equal to the density threshold, the range bucket is not processed.

[0211] Step S1008: merging the range bucket with surrounding range buckets into a new range bucket;

[0212] Specifically, if the density of the range bucket is less than the density threshold, it means that the density of the current range bucket is too low, and the range bucket needs to be merged, that is, the range bucket is merged with the surrounding range buckets into a new range bucket.

[0213] Please refer to Fig.11 , Fig.11It is a schematic diagram of the overall process of a method for constructing a hybrid mapping structure provided in an embodiment of the present application;

[0214] like Fig.11 As shown, the overall process of the method for constructing a hybrid mapping structure includes:

[0215] Step S1101: Obtain a mapping pair;

[0216] Specifically, a mapping pair to be inserted into the hybrid mapping structure is obtained, wherein the mapping pair includes a logical address and a physical address corresponding to the logical address. It should be noted that there is a mapping relationship between the logical address and the physical address corresponding to the logical address.

[0217] Step S1101: judging whether the first state corresponding to the logical address is a mapping state according to the allocation bitmap;

[0218] Specifically, through the global bitmap table, the allocation bitmap corresponding to the logical address is queried, and the first state corresponding to the logical address is obtained, and then it is determined whether the first state corresponding to the logical address is a mapping state. If the first state corresponding to the logical address is a non-mapping state, step S1103 is entered; if the first state corresponding to the logical address is a mapping state, step S1104 is entered.

[0219] Step S1103: modifying the first state corresponding to the logical address to a mapping state;

[0220] Specifically, if the first state corresponding to the logical address is an unmapped state, it means that the mapping relationship between the logical address and the physical address has not been recorded in the global bitmap table, that is, the current first state of the logical address is an unmapped state, then the allocation bitmap in the global bitmap table is modified, and the first state corresponding to the logical address is modified to a mapped state. For example, assuming that the mapped state is 1 and the unmapped state is 0, the first state is modified from 0 to 1 to record the mapping relationship between the logical address and the physical address in the global bitmap table. After the first state corresponding to the logical address is modified to a mapped state, step S1104 is entered.

[0221] Step S1104: determining whether the logical address is a continuous non-large page aligned address;

[0222] Specifically, it is determined whether the logical address is a continuous non-large page aligned address. If the logical address is a continuous non-large page aligned address, the process proceeds to step S1105; if the logical address is not a continuous non-large page aligned address, the process proceeds to step S1106.

[0223] Step S1105: modifying the continuous bitmap corresponding to the logical address to a continuous state;

[0224] Specifically, if the logical address is a continuous non-large page aligned address, the continuous bitmap corresponding to the logical address is determined to be in a continuous state, indicating that the logical address is continuous with the previous logical address.

[0225] Step S1106: determining whether a compact array has been established for the address segment corresponding to the logical address;

[0226] Specifically, if the logical address is not a continuous non-large page aligned address, it is determined whether a compact array has been established for the address segment corresponding to the logical address. If a compact array has been established for the address segment corresponding to the logical address, step S1107 is entered; if a compact array has not been established for the address segment corresponding to the logical address, step S1108 is entered.

[0227] Step S1107: inserting the mapping pair into the compact array;

[0228] Specifically, if a compact array has been established for the address segment corresponding to the logical address, the mapping pair is directly inserted into the compact array corresponding to the logical address.

[0229] Step S1108: determining whether the continuity of the address segment corresponding to the logical address is greater than a continuity threshold;

[0230] Specifically, if a compact array is not established for the address segment corresponding to the logical address, it is determined whether the continuity of the address segment corresponding to the logical address is greater than the continuity threshold. If the continuity of the address segment corresponding to the logical address is greater than the continuity threshold, the process proceeds to step S1109; if the continuity of the address segment corresponding to the logical address is less than or equal to the continuity threshold, the process proceeds to step S1110.

[0231] Step S1109: creating a compact array for the address segment corresponding to the logical address, and inserting the mapping pair into the compact array;

[0232] Specifically, if the continuity of the address segment corresponding to the logical address is greater than the continuity threshold, a compact array is established for the address segment corresponding to the logical address, and the mapping pair is inserted into the compact array.

[0233] Step S1110: judging whether the mapping pointer corresponding to the logical address segment points to the range bucket according to the global range table;

[0234] Specifically, if the continuity of the address segment corresponding to the logical address is less than or equal to the continuity threshold, then according to the global range table, determine whether the mapping pointer corresponding to the logical address segment points to the range bucket. If the mapping pointer corresponding to the logical address segment points to the range bucket, go to step S1112; if the mapping pointer corresponding to the logical address segment does not point to the range bucket, go to step S1111.

[0235] Step S1111: insert the mapping pair into the range array;

[0236] Specifically, if the mapping pointer corresponding to the logical address segment does not point to the range bucket, the mapping pair is inserted into the range array.

[0237] Step S1112: insert the mapping pair into the range bucket;

[0238] Specifically, if the mapping pointer corresponding to the logical address segment points to the range bucket, the mapping pair is inserted into the range bucket.

[0239] Step S1113: determine whether the capacity of the range bucket is greater than the capacity threshold;

[0240] Specifically, after inserting the mapping pair into the range bucket, determine whether the capacity of the range bucket is greater than the capacity threshold. If the capacity of the range bucket is greater than the capacity threshold, enter step S1114; if the capacity of the range bucket is less than or equal to the capacity threshold, it means that the insertion of the mapping pair is completed.

[0241] Step S1114: determine whether the continuity of the range bucket is greater than the continuity threshold;

[0242] Specifically, if the capacity of the range bucket is greater than the capacity threshold, it is necessary to further determine whether the continuity of the range bucket is greater than the continuity threshold. If the continuity of the range bucket is greater than the continuity threshold, enter step S1115; if the continuity of the range bucket is less than or equal to the continuity threshold, enter step S1116.

[0243] Step S1115: Create a compact array for the logical address segment, and move the mapping pair corresponding to the logical address segment from the range bucket to the compact array;

[0244] Specifically, if the continuity of the range bucket is greater than the continuity threshold, a compact array is created for the logical address segment, and the mapping pair corresponding to the logical address segment is moved from the range bucket to the compact array corresponding to the logical address segment.

[0245] Step S1116: determine whether the density of the range bucket is greater than the density threshold;

[0246] Specifically, if the continuity of the range bucket is less than or equal to the continuity threshold, it is necessary to further determine whether the density of the range bucket is greater than the density threshold. If the density of the range bucket is greater than the density threshold, enter step S1117; if the density of the range bucket is less than or equal to the density threshold, enter step S1118.

[0247] Step S1117: Split the range bucket into a range array;

[0248] Specifically, if the density of a range bucket is greater than a density threshold, the range bucket is split into a range array.

[0249] Step S1118: Split the range bucket into two range buckets;

[0250] Specifically, if the density of a range bucket is less than or equal to a density threshold, the range bucket is split into two range buckets.

[0251] In an embodiment of the present application, a method for constructing a hybrid mapping structure is provided, wherein the hybrid mapping structure includes a global bitmap table, a compact array, and a range bucket hash structure, and the method includes: obtaining a mapping pair, wherein the mapping pair includes a logical address and a physical address corresponding to the logical address; judging whether the logical address is a continuous non-large page aligned address according to the global bitmap table; if the logical address is not a continuous non-large page aligned address, judging whether the continuity of the logical address segment corresponding to the logical address is greater than a continuity threshold; if the continuity of the logical address segment is greater than the continuity threshold, inserting the mapping pair into the compact array; if the continuity of the logical address segment is less than or equal to the continuity threshold, inserting the mapping pair into the range bucket hash structure. The present application can store mapping pairs by adopting a hybrid mapping structure combining three data structures: a global bitmap table, a compact array, and a range hash bucket structure, and can optimize the memory overhead of the flash memory device, thereby saving memory in a purely sequential read and write scenario and maintaining the performance of the array in a purely random read and write scenario.

[0252] Please refer to Fig.12 , Fig.12 It is a flow chart of a physical address query method based on a hybrid mapping structure provided in an embodiment of the present application;

[0253] like Fig.12 As shown, the process of the physical address query method based on the hybrid mapping structure includes:

[0254] Step S1201: Obtaining a logical address;

[0255] Specifically, a logical address is obtained, and the logical address is used to query its corresponding physical address in the hybrid mapping structure.

[0256] Step S1202: query whether a mapping relationship has been established for the logical address according to the global bitmap table;

[0257] For details, please refer to Fig.13 , Fig.13 yes Fig.12 A detailed flow chart of step S1202 in FIG.

[0258] like Fig.13 As shown, step S1202: querying whether a mapping relationship has been established for the logical address according to the global bitmap table includes:

[0259] Step S1221: query the allocation bitmap in the global bitmap table to obtain the first state corresponding to the logical address;

[0260] Specifically, the hybrid mapping structure includes a global bitmap table, wherein the global bitmap table is used to store metadata information corresponding to each logical address segment, the metadata information includes an allocation bitmap, and the allocation bitmap in the global bitmap table is queried to obtain a first state corresponding to the logical address, wherein the first state includes a mapping state and a non-mapping state.

[0261] Step S1222: judging whether the first state corresponding to the logical address is a mapping state according to the allocation bitmap;

[0262] Specifically, according to the allocation bitmap, it is determined whether the first state corresponding to the logical address is a mapping state, wherein the mapping state indicates that there is a mapping relationship between the logical address and the physical address corresponding to the logical address, and the unmapped state indicates that there is no mapping relationship between the logical address and the physical address corresponding to the logical address. If the first state corresponding to the logical address is a mapping state, the process proceeds to step S1214; if the first state corresponding to the logical address is an unmapped state, the process proceeds to step S1223.

[0263] Step S1223: determining that no mapping relationship is established for the logical address, and outputting a query failure result;

[0264] Specifically, if the first state corresponding to the logical address is a non-mapped state, it is determined that no mapping relationship is established between the logical address and the physical address, and a query failure result is output.

[0265] In an embodiment of the present application, a global bitmap table is used to first query whether a mapping relationship is established between the logical address and the physical address. When no mapping relationship is established between the logical address and the physical address, the result of query failure is directly output, which can improve the query efficiency of the physical address to avoid wasting a lot of time on querying when there is no mapping relationship between the logical address and the physical address.

[0266] Step S1214: Determine whether a mapping relationship has been established between logical addresses;

[0267] Specifically, if the first state corresponding to the logical address is a mapping state, it is determined that a mapping relationship has been established between the logical address and the physical address, and query steps S1204 to S1208 are continued.

[0268] Step S1203: determining that no mapping relationship is established for the logical address, and outputting a query failure result;

[0269] Specifically, if the first state corresponding to the logical address is a non-mapped state, it is determined that no mapping relationship is established between the logical address and the physical address, and a query failure result is output.

[0270] Step S1204: determining whether the logical addresses are continuous;

[0271] For details, please refer to Fig.14 , Fig.14 yes Fig.12 A detailed flow chart of step S1204 in FIG.

[0272] like Fig.14 As shown, step S1204: determining whether the logical addresses are continuous, including:

[0273] Step S1241: query the continuous bitmap in the global bitmap table to obtain the second state corresponding to the logical address;

[0274] Specifically, after determining that there is a mapping relationship between the logical address and the physical address through the allocation bitmap in the global bitmap table, the continuous bitmap in the global bitmap table is queried according to the global bitmap table to obtain the second state corresponding to the logical address, wherein the second state includes a continuous state or a discontinuous state.

[0275] Step S1242: judging whether the second state corresponding to the logical address is a continuous state according to the continuous bitmap;

[0276] Specifically, according to the continuous bitmap, determine whether the second state corresponding to the logical address is a continuous state. If the second state corresponding to the logical address is a continuous state, enter step S1244; if the second state corresponding to the logical address is a discontinuous state, enter step S1243.

[0277] Step S1243: determining the logical address as a non-continuous logical address;

[0278] Specifically, if the second state corresponding to the logical address is a discontinuous state, it means that the logical address is discontinuous with the previous logical address, and the logical address is determined as a discontinuous logical address.

[0279] Step S1244: determining the logical address as a continuous logical address;

[0280] Specifically, if the second state corresponding to the logical address is a continuous state, it means that the logical address is continuous with the previous logical address, and the logical address is determined as a continuous logical address.

[0281] Step S1205: Obtain the physical address corresponding to the logical address through the range bucket hash structure;

[0282] For details, please refer to Fig.15 , Fig.15 yes Fig.12 A detailed flow chart of step S1205 in FIG.

[0283] like Fig.15 As shown, step S1205: obtaining the physical address corresponding to the logical address through the range bucket hash structure, including:

[0284] Step S1251: Obtain the global range table;

[0285] Specifically, the range hash bucket structure includes a global range table, a range array and a range bucket, and the global range table is obtained, wherein the global range table is used to store a mapping pointer corresponding to a logical address segment, and the mapping pointer points to a range bucket or a range array.

[0286] Step S1252: judging whether the mapping pointer corresponding to the logical address segment points to the range bucket according to the global range table;

[0287] Specifically, according to the global range table, determine whether the mapping pointer corresponding to the logical address segment points to the range bucket. If the mapping pointer corresponding to the logical address segment points to the range bucket, enter step S1254; if the mapping pointer corresponding to the logical address segment points to the range array, enter step S1253.

[0288] Step S1253: Obtain the physical address corresponding to the logical address in the range array;

[0289] Specifically, if the mapping pointer corresponding to the logical address segment points to the range array, it means that the physical address corresponding to the logical address is stored in the range array, and the physical address corresponding to the logical address is obtained in the range array.

[0290] Step S1254: Obtain the physical address corresponding to the logical address in the range bucket;

[0291] Specifically, if the mapping pointer corresponding to the logical address segment points to the range bucket, it means that the physical address corresponding to the logical address is stored in the range bucket, and the physical address corresponding to the logical address is obtained in the range bucket.

[0292] Step S1206: traverse the global bitmap table to obtain the starting logical address of the address segment corresponding to the logical address;

[0293] Specifically, if the logical addresses are continuous, the global bitmap table is traversed forward according to the logical addresses to obtain the starting logical address of the address segment corresponding to the logical addresses.

[0294] Step S1207: determining whether the starting logical address is a large page aligned address;

[0295] Specifically, determine whether the starting logical address is a large page aligned address. If the starting logical address is a large page aligned address, enter step S1208; if the starting logical address is not a large page aligned address, enter step S1205; in an embodiment of the present application, a large page aligned address means that the starting address of the data is an integer multiple of the number of bytes of the data unit. Large page alignment can ensure that the data can be read or written continuously and efficiently, and a non-large page aligned address means that the starting address of the data is not an integer multiple of the number of bytes of the data unit. The large page aligned address includes but is not limited to an 8-byte aligned address. For example, assuming that it is necessary to determine whether the logical address is an 8-byte aligned address, divide the logical address by 8 and obtain the remainder. If the remainder is not equal to 0, it indicates that the logical address is a non-8-byte aligned address; if the remainder is equal to 0, it indicates that the logical address is an 8-byte aligned address.

[0296] Step S1208: Obtain the physical address corresponding to the logical address through the compact array;

[0297] Specifically, if the starting logical address is a large page aligned address, the physical address corresponding to the logical address is obtained through the compact array.

[0298] Please refer to Fig.16 , Fig.16 It is a flowchart of determining whether a compact array has been established for an address segment provided by an embodiment of the present application;

[0299] like Fig.16 As shown, the process of determining whether a compact array has been established in the address segment includes:

[0300] Step S1601: Obtain the address segment corresponding to the logical address;

[0301] Specifically, before querying the physical address through the compact array, the address segment corresponding to the logical address is obtained according to the logical address.

[0302] Step S1602: Determine whether a compact array has been established for the address segment;

[0303] Specifically, determine whether a compact array has been established for the logical address segment corresponding to the logical address. If a compact array has been established for the logical address segment corresponding to the logical address, proceed to step S1604; if a compact array has not been established for the logical address segment corresponding to the logical address, proceed to step S1603.

[0304] Step S1603: Obtain the physical address corresponding to the logical address through the range bucket hash structure;

[0305] Specifically, the range hash bucket structure includes a global range table, a range array, and a range bucket. The global range table is obtained, wherein the global range table is used to store a mapping pointer corresponding to a logical address segment, and the mapping pointer points to a range bucket or a range array. According to the global range table, it is determined whether the mapping pointer corresponding to the logical address segment points to the range bucket; if the mapping pointer corresponding to the logical address segment points to the range bucket, the physical address corresponding to the logical address is queried through the range bucket; if the mapping pointer corresponding to the logical address segment points to the range array, the physical address corresponding to the logical address is queried through the range array.

[0306] Step S1604: Obtain the physical address corresponding to the logical address through the compact array;

[0307] Specifically, if a compact array has been established for the logical address segment corresponding to the logical address, the physical address corresponding to the logical address is obtained through the compact array.

[0308] Please refer to Fig.17 , Fig.17 It is a schematic diagram of the overall process of a physical address query method based on a hybrid mapping structure provided in an embodiment of the present application;

[0309] like Fig.17 As shown, the overall process of the physical address query method based on the hybrid mapping structure includes:

[0310] Step S1701: Obtaining a logical address;

[0311] Specifically, a logical address is obtained, and the logical address is used to query its corresponding physical address in the hybrid mapping structure.

[0312] Step S1702: query whether a mapping relationship has been established for the logical address according to the global bitmap table;

[0313] Specifically, according to the allocation bitmap in the global bitmap table, it is queried whether a mapping relationship has been established for the logical address. If a mapping relationship has been established for the logical address, the process proceeds to step S1704; if no mapping relationship has been established for the logical address, the process proceeds to step S1703.

[0314] Step S1703: determining that no mapping relationship is established for the logical address, and outputting a query failure result;

[0315] Specifically, if no mapping relationship is established for the logical address, it is determined that no mapping relationship is established for the logical address, and a query failure result is output.

[0316] Step S1704: determine whether the logical addresses are continuous;

[0317] Specifically, if a mapping relationship has been established for the logical address, it is further determined whether the logical address is continuous with the previous logical address. If the logical address is continuous with the previous logical address, the process proceeds to step S1705; if the logical address is not continuous with the previous logical address, the process proceeds to step S1708.

[0318] Step S1705: traverse the global bitmap table to obtain the starting logical address of the address segment corresponding to the logical address;

[0319] Specifically, if the logical address is continuous with the previous logical address, the global bitmap table is traversed to obtain the starting logical address of the address segment corresponding to the logical address.

[0320] Step S1706: determining whether the starting logical address is a large page aligned address;

[0321] Specifically, determine whether the starting logical address is a large page alignment address, where the large page alignment address includes an 8-byte alignment address. If the starting logical address is a large page alignment address, proceed to step S1707; if the starting logical address is not a large page alignment address, proceed to step S1708.

[0322] Step S1707: Obtain the physical address corresponding to the logical address through the compact array;

[0323] Specifically, if the starting logical address is a large page aligned address, the physical address corresponding to the logical address is obtained through the compact array.

[0324] Step S1708: Obtain the global range table;

[0325] Specifically, when the logical address is not continuous with the previous logical address, or the starting logical address is not a large page aligned address, the global range table is obtained to query the physical address corresponding to the logical address through the range hash bucket structure.

[0326] Step S1709: judging whether the mapping pointer corresponding to the logical address segment points to the range bucket according to the global range table;

[0327] Specifically, according to the global range table, determine whether the mapping pointer corresponding to the logical address segment points to the range bucket. If the mapping pointer corresponding to the logical address segment points to the range bucket, enter step S1710; if the mapping pointer corresponding to the logical address segment does not point to the range bucket, enter step S1711.

[0328] Step S1710: Obtain the physical address corresponding to the logical address in the range bucket;

[0329] Specifically, if the mapping pointer corresponding to the logical address segment points to the range bucket, the physical address corresponding to the logical address is obtained in the range bucket.

[0330] Step S1711: Obtain the physical address corresponding to the logical address in the range array;

[0331] Specifically, if the mapping pointer corresponding to the logical address segment does not point to the range bucket, the physical address corresponding to the logical address is obtained in the range array.

[0332] In an embodiment of the present application, a physical address query method based on a hybrid mapping structure is provided, the hybrid mapping structure includes a global bitmap table, a compact array and a range bucket hash structure, the method includes: obtaining a logical address; querying whether a mapping relationship has been established for the logical address according to the global bitmap table; if a mapping relationship has been established for the logical address, determining whether the logical address is continuous; if the logical address is continuous, traversing the global bitmap table to obtain the starting logical address of the address segment corresponding to the logical address; if the starting logical address is a large page aligned address, obtaining the physical address corresponding to the logical address through the compact array; if the logical address is not continuous, obtaining the physical address corresponding to the logical address through the range bucket hash structure. The present application can query the physical address corresponding to the logical address through the hybrid mapping structure, thereby improving the query efficiency of the physical address.

[0333] In an embodiment of the present application, the execution subjects of the method for constructing a hybrid mapping structure and the physical address query method based on the hybrid mapping structure are both flash memory devices. Specifically, the flash memory device controller controls the flash memory device to execute the various method steps in the method for constructing a hybrid mapping structure or the physical address query method based on the hybrid mapping structure. The flash memory device includes a solid-state hard disk or other storage device using flash memory as the storage medium, and the flash memory device controller includes a controller of a solid-state hard disk or other storage device using flash memory as the storage medium.

[0334] Please refer to Fig.18 , Fig.18 is a structural diagram of a flash memory controller provided in an embodiment of the present application;

[0335] like Fig.18 As shown, the flash controller 180 includes one or more processors 181 and a memory 182. Fig.18 A processor 181 is taken as an example.

[0336] The processor 181 and the memory 182 may be connected via a bus or other means. Fig.18 The example of connecting through bus is taken in the following.

[0337] The processor 181 is used to provide computing and control capabilities to control the flash memory controller 180 to perform corresponding tasks, for example, to control the flash memory controller 180 to execute the method for constructing a hybrid mapping structure in any of the above-mentioned method embodiments, wherein the hybrid mapping structure includes a global bitmap table, a compact array, and a range bucket hash structure, and the method includes: obtaining a mapping pair, wherein the mapping pair includes a logical address and a physical address corresponding to the logical address; judging whether the logical address is a continuous non-large page aligned address according to the global bitmap table; if the logical address is not a continuous non-large page aligned address, judging whether the continuity of the logical address segment corresponding to the logical address is greater than a continuity threshold; if the continuity of the logical address segment is greater than the continuity threshold, inserting the mapping pair into the compact array; if the logical address If the continuity of the segment is less than or equal to the continuity threshold, the mapping pair is inserted into the range bucket hash structure, and a physical address query method based on a hybrid mapping structure, the hybrid mapping structure includes a global bitmap table, a compact array and a range bucket hash structure, the method includes: obtaining a logical address; querying whether a mapping relationship has been established for the logical address according to the global bitmap table; if a mapping relationship has been established for the logical address, determining whether the logical address is continuous; if the logical address is continuous, traversing the global bitmap table to obtain the starting logical address of the address segment corresponding to the logical address; if the starting logical address is a large page aligned address, obtaining the physical address corresponding to the logical address through the compact array; if the logical address is not continuous, obtaining the physical address corresponding to the logical address through the range bucket hash structure.

[0338] The present application can store mapping pairs by adopting a hybrid mapping structure that combines three data structures: a global bitmap table, a compact array, and a range hash bucket structure. This can optimize the memory overhead of the flash memory device, save memory in pure sequential read and write scenarios, and maintain the performance of the array in pure random read and write scenarios. In addition, the hybrid mapping structure can be used to query the physical address corresponding to the logical address, thereby improving the query efficiency of the physical address.

[0339] The processor 181 may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), a hardware chip or any combination thereof; it may also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a programmable logic device (PLD) or a combination thereof. The above-mentioned PLD may be a complex programmable logic device (CPLD), a field programmable gate array (FPGA), a general array logic (GAL) or any combination thereof.

[0340] The memory 182, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs, non-transitory computer executable programs and modules, such as the method for constructing a hybrid mapping structure in the embodiment of the present application, or the program instructions / modules corresponding to the physical address query method based on the hybrid mapping structure. The processor 181 can implement the method for constructing a hybrid mapping structure in any of the above method embodiments, or the physical address query method based on the hybrid mapping structure, by running the non-transitory software programs, instructions and modules stored in the memory 182. Specifically, the memory 182 may include a volatile memory (VM), such as a random access memory (RAM); the memory 182 may also include a non-volatile memory (NVM), such as a read-only memory (ROM), a flash memory, a hard disk drive (HDD) or a solid-state drive (SSD) or other non-transitory solid-state storage devices; the memory 182 may also include a combination of the above types of memories.

[0341] The memory 182 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage devices. In some embodiments, the memory 182 may optionally include a memory remotely arranged relative to the processor 181, and these remote memories may be connected to the processor 181 via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0342] One or more modules are stored in the memory 182, and when executed by one or more processors 111, execute the method for constructing the hybrid mapping structure in any of the above method embodiments, or the physical address query method based on the hybrid mapping structure.

[0343] In the embodiment of the present application, the flash memory controller 180 may also have components such as a wired or wireless network interface, a keyboard, and an input / output interface for input and output. The flash memory controller 180 may also include other components for implementing device functions, which will not be described in detail here.

[0344] The embodiment of the present application also provides a computer-readable storage medium, such as a memory including a program code, and the program code can be executed by a processor to complete the construction method of the hybrid mapping structure in the above embodiment, or the physical address query method based on the hybrid mapping structure. For example, the computer-readable storage medium can be a read-only memory (ROM), a random access memory (RAM), a compact disk (CDROM), a magnetic tape, a floppy disk, an optical data storage device, etc.

[0345] Please refer to Fig.19 , Fig.19 It is a structural schematic diagram of a flash memory device provided in an embodiment of the present application.

[0346] like Fig.19 As shown, the flash memory device 100 includes a flash memory medium 110 and a flash memory device controller 110 connected to the flash memory medium 110. The flash memory device 100 is connected to the host 200 in a wired or wireless manner to achieve data interaction.

[0347] The flash memory device controller 180 includes:

[0348] at least one processor 181; and,

[0349] A memory 182 is communicatively connected to at least one processor 181; wherein,

[0350] The memory 182 is used to store instructions that can be executed by at least one processor 181, and the instructions are executed by at least one processor to enable the at least one processor to execute the above-mentioned hybrid mapping structure construction method, or the physical address query method based on the hybrid mapping structure.

[0351] The flash memory medium 110, as the storage medium of the flash memory device 100, is also called flash memory, Flash, Flash memory or Flash particles. It is a type of storage device and a non-volatile memory that can store data for a long time even without current supply. Its storage characteristics are equivalent to those of a hard disk, making the flash memory medium 110 the basis of the storage medium for various portable digital devices.

[0352] Among them, the flash memory medium 110 can be Nand FLASH. Nand FLASH uses a single transistor as a storage unit for binary signals. Its structure is very similar to that of ordinary semiconductor transistors. The difference is that the single transistor of Nand FLASH adds a floating gate and a control gate. The floating gate is used to store electrons. The surface is covered by a layer of silicon oxide insulator and is coupled to the control gate through a capacitor. When negative electrons are injected into the floating gate under the action of the control gate, the storage state of the single crystal of Nand FLASH changes from "1" to "0", and when the negative electrons are removed from the floating gate, the storage state changes from "0" to "1". The insulator coated on the surface of the floating gate is used to trap the negative electrons in the floating gate to achieve data storage. That is, the storage unit of Nand FLASH is a floating gate transistor, which uses the floating gate transistor to store data in the form of charge. The amount of stored charge is related to the magnitude of the voltage applied to the floating gate transistor.

[0353] A Nand FLASH includes at least one Chip chip, each Chip chip is composed of several Block physical blocks, and each Block physical block includes several Page pages. Among them, the Block physical block is the smallest unit for Nand FLASH to perform erase operations, and the Page page is the smallest unit for Nand FLASH to perform read and write operations. The capacity of a Nand FLASH is equal to the number of its Block physical blocks * the number of Page pages contained in a Block physical block * the capacity of a Page page. Specifically, the flash memory medium 10 can be divided into SLC, MLC, TLC and QLC according to the different levels of the voltage of the storage unit.

[0354] The embodiment of the present application also provides a non-volatile computer-readable storage medium, such as a memory including a program code, and the program code can be executed by a processor to complete the construction method of the hybrid mapping structure in the above embodiment, or a physical address query method based on the hybrid mapping structure. For example, the non-volatile computer-readable storage medium can be a read-only memory (ROM), a random access memory (RAM), a compact disc (CDROM), a magnetic tape, a floppy disk, and an optical data storage device.

[0355] The embodiment of the present application also provides a computer program product, which includes one or more program codes, and the program code is stored in a non-volatile computer-readable storage medium. The processor of the flash memory device reads the program code from the non-volatile computer-readable storage medium, and the processor executes the program code to complete the method for constructing the hybrid mapping structure provided in the above embodiment, or the method steps of the physical address query method based on the hybrid mapping structure. A person of ordinary skill in the art can understand that all or part of the steps of implementing the above embodiment can be completed by hardware, or can be completed by hardware related to the program code through a program, and the program can be stored in a non-volatile computer-readable storage medium, and the storage medium mentioned above can be a read-only memory, a disk or an optical disk, etc.

Claims

1. A method for constructing a hybrid mapping structure, characterized in that: The hybrid mapping structure includes a global bitmap table, a compact array, and a range bucket hash structure, and the method includes: Obtaining a mapping pair, wherein the mapping pair includes a logical address and a physical address corresponding to the logical address; According to the global bitmap table, determining whether the logical address is a continuous non-large page aligned address; If the logical address is not a continuous non-large page aligned address, determining whether the continuity of the logical address segment corresponding to the logical address is greater than a continuity threshold; If the continuity of the logical address segment is greater than a continuity threshold, inserting the mapping pair into the compact array; If the continuity of the logical address segment is less than or equal to the continuity threshold, the mapping pair is inserted into the range bucket hash structure.

2. The method according to claim 1, characterized in that: The global bitmap table is used to store metadata information corresponding to each logical address segment, the metadata information includes continuity, the metadata information also includes an allocation bitmap, the allocation bitmap is used to store a first state of the logical address, the first state includes a mapped state and a non-mapped state, and the method further includes: According to the allocation bitmap, determining whether the first state corresponding to the logical address is a mapping state; If the first state corresponding to the logical address is a non-mapped state, the first state corresponding to the logical address is modified to a mapped state.

3. The method according to claim 2, characterized in that The metadata information also includes a continuous bitmap, the continuous bitmap is used to store the second state of the logical address, the second state includes a continuous state and a discontinuous state, and judging whether the logical address is a continuous non-large page aligned address according to the global bitmap table includes: Determining whether the logical address is a non-large page aligned address; If the logical address is a non-large page aligned address, determining, based on the global bitmap table, whether the logical address is continuous with the logical addresses in the global bitmap table; If the logical address is continuous with the logical address in the global bitmap table, the continuous bitmap corresponding to the logical address is determined to be in a continuous state.

4. The method according to claim 1, characterized in that: The range bucket hash structure includes a global range table, a range bucket and a range array, wherein the global range table is used to store mapping pointers corresponding to logical address segments, and inserting the mapping pair into the range bucket hash structure includes: According to the global range table, determining whether the mapping pointer corresponding to the logical address segment points to the range bucket; If the mapping pointer corresponding to the logical address segment points to the range bucket, inserting the mapping pair into the range bucket; If the mapping pointer corresponding to the logical address segment does not point to the range bucket, the mapping pair is inserted into the range array.

5. The method according to claim 3, characterized in that: After inserting the mapping pair into the range bucket, the method further comprises: Determining whether the capacity of the range bucket reaches a capacity threshold; If the capacity of the range bucket has reached the capacity threshold, determining whether the continuity of the range bucket is greater than the continuity threshold; If the continuity of the range bucket is less than or equal to the continuity threshold, determining whether the density of the range bucket is greater than a density threshold; If the density of the range bucket is less than or equal to the density threshold, split the range bucket into at least two range buckets; If the density of the range bucket is greater than the density threshold, the range bucket is split into at least two range arrays.

6. The method according to claim 3, characterized in that The method further comprises: Determining whether the continuity of the compact array is less than or equal to a continuity threshold; If the continuity of the compact array is less than the continuity threshold, then obtaining all mapping pairs with established mapping relationships in the compact array; All mapping pairs with established mapping relationships are inserted into the range bucket, and the memory of the compact array is released to restore the compact array to a range bucket.

7. The method according to claim 4, characterized in that After inserting the mapping pair into the range array, the method further comprises: Determine whether the density of the range array is less than a density threshold; If the density of the range array is less than the density threshold, obtaining all mapping pairs in the range array; All mapping pairs in the range array are inserted into the range bucket, and the memory of the range array is released to restore the range array to a range bucket.

8. The method according to claim 5, characterized in that After inserting the mapping pair into the range bucket, the method further comprises: Determine whether there is a logical address segment in the range bucket whose continuity is greater than the continuity threshold; If the continuity of a certain logical address segment in the range bucket is greater than the continuity threshold, obtaining the logical address segment and a mapping pair corresponding to the logical address segment; Establishing a compact array for the logical address segment, and moving the mapping pair corresponding to the logical address segment from the range bucket to the compact array; After moving the mapping pair corresponding to the logical address segment from the range bucket to the compact array, if the density of the range bucket is less than the density threshold, the range bucket is merged with surrounding range buckets into a new range bucket.

9. A physical address query method based on a hybrid mapping structure, characterized in that: The hybrid mapping structure includes a global bitmap table, a compact array, and a range bucket hash structure, and the method includes: Get the logical address; According to the global bitmap table, query whether a mapping relationship has been established for the logical address; If the mapping relationship between the logical addresses has been established, determining whether the logical addresses are continuous; If the logical addresses are continuous, traverse the global bitmap table to obtain the starting logical address of the address segment corresponding to the logical address; If the starting logical address is a large page aligned address, obtaining the physical address corresponding to the logical address through the compact array; If the logical address is not continuous, the physical address corresponding to the logical address is obtained through the range bucket hash structure.

10. The method according to claim 9, characterized in that The range bucket hash structure includes a global range table, a range bucket and a range array, wherein the global range table is used to store a mapping pointer corresponding to a logical address segment, and obtaining a physical address corresponding to the logical address through the range bucket hash structure includes: According to the global range table, determining whether the mapping pointer corresponding to the logical address segment points to the range bucket; If the mapping pointer corresponding to the logical address segment points to the range bucket, obtaining the physical address corresponding to the logical address in the range bucket; If the mapping pointer corresponding to the logical address segment does not point to the range bucket, the physical address corresponding to the logical address is obtained in the range array.

11. The method according to claim 9, characterized in that The global bitmap table is used to store metadata information corresponding to each logical address segment, the metadata information includes an allocation bitmap, the allocation bitmap is used to store a first state of the logical address, the first state includes a mapping state and a non-mapping state, and the determination of whether the mapping relationship has been established for the logical address includes: According to the allocation bitmap, determining whether the first state corresponding to the logical address is a mapping state; If the first state corresponding to the logical address is a mapping state, it is determined that a mapping relationship has been established for the logical address; If the first state corresponding to the logical address is a non-mapped state, it is determined that no mapping relationship is established for the logical address, and a query failure result is output.

12. The method according to claim 11, characterized in that The metadata information further includes a continuous bitmap, the continuous bitmap is used to store the second state of the logical address, the second state includes a continuous state and a discontinuous state, and the determining whether the logical address is continuous includes: According to the continuous bitmap, determining whether the second state corresponding to the logical address is a continuous state; If the second state corresponding to the logical address is a continuous state, determining the logical address as a continuous logical address; If the second state corresponding to the logical address is a discontinuous state, the logical address is determined as a discontinuous logical address.

13. The method according to claim 10, characterized in that Before obtaining the physical address corresponding to the logical address through the compact array, the method further includes: Determining whether a compact array has been established for the address segment; If a compact array has been established for the address segment, obtaining the physical address corresponding to the logical address through the compact array; If a compact array is not established for the address segment, the physical address corresponding to the logical address is obtained through the range bucket hash structure.

14. A flash memory device controller, characterized in that: include: at least one processor; as well as, a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the method for constructing a hybrid mapping structure as described in any one of claims 1-8, or the physical address query method based on the hybrid mapping structure as described in any one of claims 9-13.

15. A flash memory device, characterized in that: include: The flash memory device controller as claimed in claim 14; At least one flash memory medium is communicatively coupled to the flash memory device controller.

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