Chip testing system and method

Abstract

The embodiment of the invention provides a chip testing system and method.The chip testing system comprises a main control device and a measuring circuit board, the measuring circuit board comprises a chip to be tested, and a power input access of the chip to be tested is electrically connected with a measuring resistor; the main control equipment is used for sending a performance test instruction to the measurement circuit board, and the performance test instruction is used for running the chip to execute a plurality of test tasks according to a specific time sequence; the measurement circuit board is used for responding to the performance test instruction, running the to-be-tested chip to execute a plurality of test tasks, collecting working parameters of the to-be-tested chip under the plurality of test tasks, and measuring power consumption parameters of two ends of the resistor under the plurality of test tasks; and the main control equipment is also used for acquiring the working parameters and the power consumption parameters under the plurality of test tasks acquired by the measurement circuit board, and determining the performance test result of the to-be-tested chip based on the working parameters and the power consumption parameters under the plurality of test tasks, so that the accuracy and the test efficiency are improved, and the test cost is reduced.

Description

Technical Field

[0001] The embodiments of the present specification relate to the field of hardware testing technology, and in particular, to a chip testing system and method. Background Art

[0002] With the widespread application of integrated circuit (IC) chips in various devices, power consumption management has become particularly important. In order to improve the endurance and performance of the device, accurate testing of the power consumption data of the integrated circuit chip has become a necessary requirement.

[0003] At present, the power consumption data test of chips is mainly carried out manually. Testers will manually set the test conditions, then install the chip to be tested on the test circuit board, use measurement tools to manually record the parameters of the chip under multiple test tasks, and determine the performance test results of the chip.

[0004] However, since the testing mainly relies on manual methods, it is difficult for different operators or the same operator to conduct tests at different times to have completely consistent test conditions and methods, which directly affects the reliability of the performance test results. Secondly, manual testing is easily affected by external environmental factors, such as temperature changes, power supply stability, etc., which may cause deviations in the test results and thus affect the evaluation of the actual performance of the chip. In addition, manual testing requires a lot of human resources, which not only increases the testing cost, but also cannot meet the needs of rapid detection in large-scale production due to the slow manual operation speed, and is inefficient. Summary of the invention

[0005] In view of this, an embodiment of this specification provides a chip testing system. One or more embodiments of this specification also relate to another chip testing system, a chip testing method, another chip testing method, a main control device, a computer-readable storage medium and a computer program product to solve the technical defects existing in the prior art.

[0006] According to a first aspect of an embodiment of this specification, a chip testing system is provided, including a main control device and a measuring circuit board, the measuring circuit board including a chip to be tested, and a measuring resistor is electrically connected to a power input path of the chip to be tested;

[0007] A main control device, used for sending performance test instructions to the measurement circuit board, wherein the performance test instructions are used to run the chip to perform multiple test tasks according to a specific timing;

[0008] A measuring circuit board is used to respond to a performance test instruction, run the chip to be tested to perform multiple test tasks, collect working parameters of the chip to be tested under the multiple test tasks, and measure power consumption parameters of both ends of the resistor under the multiple test tasks;

[0009] The main control device is also used to obtain the working parameters and power consumption parameters under multiple test tasks collected by the measurement circuit board, and determine the performance test results of the chip to be tested based on the working parameters and power consumption parameters under the multiple test tasks.

[0010] According to a second aspect of an embodiment of this specification, a chip testing system is provided, including a main control device and a measuring circuit board, the measuring circuit board includes a RISC-V instruction set chip, the RISC-V instruction set chip includes a RISC-V compilation unit and a RISC-V processing unit, and a measuring resistor is electrically connected to a power input path of the RISC-V instruction set chip;

[0011] A main control device, used for sending performance test instructions to the measurement circuit board, wherein the performance test instructions are used to run the chip to perform multiple test tasks according to a specific timing;

[0012] A RISC-V compilation unit, used for receiving a performance test instruction and compiling the performance test instruction into a performance test instruction stream;

[0013] A RISC-V processing unit, for executing a plurality of test tasks in response to a performance test instruction stream;

[0014] A measurement circuit board is used to collect the working parameters of the RISC-V instruction set chip under multiple test tasks, and to measure the power consumption parameters of both ends of the resistor under multiple test tasks;

[0015] The main control device is also used to obtain the working parameters and power consumption parameters under multiple test tasks collected by the measurement circuit board, and determine the performance test results of the RISC-V instruction set chip based on the working parameters and power consumption parameters under multiple test tasks.

[0016] According to a third aspect of the embodiments of this specification, a chip testing method is provided, which is applied to a chip testing system, wherein the chip testing system includes a main control device and a measuring circuit, the measuring circuit board includes a chip to be tested, and a measuring resistor is electrically connected to a power input path of the chip to be tested, including:

[0017] In response to the performance test instruction, the chip to be tested is operated to execute multiple test tasks, wherein the performance test instruction is used to operate the chip to execute multiple test tasks according to a specific timing sequence;

[0018] Collecting the working parameters of the chip to be tested under multiple test tasks, and measuring the power consumption parameters of both ends of the resistor under multiple test tasks;

[0019] The working parameters and power consumption parameters under multiple test tasks collected by the measurement circuit board are obtained, and the performance test results of the chip to be tested are determined based on the working parameters and power consumption parameters under the multiple test tasks.

[0020] According to a fourth aspect of the embodiments of this specification, another chip testing method is provided, which is applied to a main control device of a chip testing system, wherein the chip testing system further includes a measuring circuit, the measuring circuit board includes a chip to be tested, and a measuring resistor is electrically connected to a power input path of the chip to be tested, including:

[0021] Sending a performance test instruction to the measurement circuit board, wherein the performance test instruction is used to run the chip to perform multiple test tasks according to a specific timing;

[0022] Obtaining working parameters and power consumption parameters under multiple test tasks collected by the measurement circuit board, and determining the performance test result of the chip to be tested based on the working parameters and power consumption parameters under the multiple test tasks, wherein the step of measuring the working parameters and power consumption parameters under the multiple test tasks collected by the measurement circuit board includes:

[0023] In response to the performance test instruction, the chip to be tested is run to execute multiple test tasks, the working parameters of the chip to be tested under the multiple test tasks are collected, and the power consumption parameters of both ends of the resistor under the multiple test tasks are measured.

[0024] According to a fifth aspect of the embodiments of this specification, a main control device is provided, including:

[0025] Memory and processor;

[0026] The memory is used to store computer programs / instructions, and the processor is used to execute the computer programs / instructions. When the computer programs / instructions are executed by the processor, the steps of the above method are implemented.

[0027] According to a sixth aspect of the embodiments of this specification, a computer-readable storage medium is provided, which stores a computer program / instruction, and the steps of the above method are implemented when the computer program / instruction is executed by a processor.

[0028] According to a seventh aspect of the embodiments of this specification, a computer program product is provided, comprising a computer program / instruction, which implements the steps of the above method when executed by a processor.

[0029] In one embodiment of this specification, the main control device automatically sends performance test instructions to ensure that each test can be performed under the same conditions, avoiding the problem of inconsistent test results caused by differences in human operations. In addition, multiple test tasks are executed according to a preset specific timing, further ensuring the consistency of the test process and the reliability of the performance test results. The measurement circuit board is directly integrated into the system, and the working parameters and power consumption parameters of the chip to be tested can be collected in real time and accurately. Secondly, in terms of power consumption measurement, by electrically connecting the measurement resistor to the power input path of the chip to be tested, the actual power consumption of the chip can be more accurately monitored, reducing the impact of external environmental factors on the test results. In addition, the automated chip testing system greatly reduces the dependence on human resources, reduces testing costs, and improves testing efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 This is one of the structural schematic diagrams of a chip testing system provided by an embodiment of this specification;

[0031] Figure 2 This is a second structural diagram of a chip testing system provided by an embodiment of this specification;

[0032] Figure 3 It is a structural schematic diagram of a power consumption measurement circuit in a chip testing system provided by an embodiment of this specification;

[0033] Figure 4 It is a measurement resistance circuit diagram of a power consumption measurement circuit in a chip test system provided by an embodiment of the present specification;

[0034] Figure 5 It is a schematic diagram of the architecture of a software module of a main control device in a chip testing system provided by an embodiment of this specification;

[0035] Figure 6 This is one of the flowcharts of a software module of a main control device in a chip testing system provided by an embodiment of this specification;

[0036] Figure 7 This is a second flow chart of a software module of a main control device in a chip testing system provided by an embodiment of this specification;

[0037] Figure 8 This is a third structural diagram of a chip testing system provided by an embodiment of this specification;

[0038] Fig. 9 This is a flow chart of an auxiliary testing device in a chip testing system provided by an embodiment of this specification;

[0039] Fig.10This is a fourth structural diagram of a chip testing system provided by an embodiment of this specification;

[0040] Fig.11 This is a fifth structural diagram of a chip testing system provided by an embodiment of this specification;

[0041] Fig.12 It is a flow chart of a mechanical arm and a touch display screen in a chip testing system provided by an embodiment of this specification;

[0042] Fig.13 This is the sixth structural diagram of a chip testing system provided by an embodiment of this specification;

[0043] Fig.14 is a schematic diagram of the structure of another chip testing system provided by an embodiment of this specification;

[0044] Fig.15 is a flow chart of a chip testing method provided by an embodiment of this specification;

[0045] Fig.16 is a flow chart of another chip testing method provided by an embodiment of this specification;

[0046] Fig.17 This is a structural block diagram of a main control device provided by an embodiment of this specification. DETAILED DESCRIPTION

[0047] Many specific details are described in the following description to facilitate a full understanding of this specification. However, this specification can be implemented in many other ways than those described herein, and those skilled in the art can make similar generalizations without violating the connotation of this specification, so this specification is not limited to the specific implementation disclosed below.

[0048] The terms used in one or more embodiments of this specification are only for the purpose of describing specific embodiments, and are not intended to limit one or more embodiments of this specification. The singular forms of "a", "said" and "the" used in one or more embodiments of this specification and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used in one or more embodiments of this specification refers to and includes any or all possible combinations of one or more associated listed items.

[0049] It should be understood that although the terms first, second, etc. may be used to describe various information in one or more embodiments of this specification, this information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of one or more embodiments of this specification, the first may also be referred to as the second, and similarly, the second may also be referred to as the first. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0050] In addition, it should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in one or more embodiments of this specification are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0051] First, the terms involved in one or more embodiments of this specification are explained.

[0052] CPU (Central Processing Unit): The core component of a computer system, responsible for executing the instruction sequence of the program, performing data processing and logical operations. It is the brain of the computer, and almost all computing tasks need to be completed by the CPU.

[0053] GPU (Graphics Processing Unit): A processor specialized for graphics rendering and parallel computing. Compared with the CPU, the GPU has more processing cores and is good at handling a large number of parallel tasks, such as image processing, video encoding and decoding, etc.

[0054] NPU (Neural Processing Unit): A processor designed specifically to accelerate machine learning algorithms, especially in the field of deep learning. NPU can efficiently handle complex neural network computing tasks and increase the speed of model training and reasoning.

[0055] VPU (Vision Processing Unit): A processor that focuses on computer vision tasks, such as image recognition, object detection, etc. VPU usually integrates a variety of hardware accelerators to optimize the processing efficiency of visual data.

[0056] G2D (2D Graphics Accelerator) is a hardware component used to accelerate the rendering of two-dimensional graphics. It is often used for drawing user interfaces in desktop environments to improve the speed and quality of graphics display.

[0057] SoC (System on a Chip): An integrated circuit that integrates the various components of a computer or other electronic system on a single chip. SoC usually contains multiple functional modules such as processors, memory, input and output interfaces, and is widely used in mobile devices, embedded systems and other fields.

[0058] RISC (Reduced Instruction Set Computing): A processor architecture design concept that simplifies processor design and increases instruction execution speed by reducing the number and complexity of instructions. The RISC architecture emphasizes the execution time of each instruction and the simplicity of the hardware structure.

[0059] RISC-V (RISC Five, the fifth generation of reduced instruction set architecture): an open source RISC instruction set architecture that aims to provide a free and open standard to promote the development of the software and hardware ecosystem. RISC-V supports a wide range of application scenarios from microcontrollers to supercomputers.

[0060] PVT (Process, Voltage, Temperature) sensor: A sensor used to monitor process variables, operating voltage, and ambient temperature during semiconductor chip manufacturing. PVT sensors are critical to ensuring chip stability and reliability under different conditions.

[0061] HDMI (High-Definition Multimedia Interface): A digital video / audio interface technology used to transmit high-definition video and audio signals. HDMI interfaces are commonly found in multimedia devices such as televisions, monitors, and projectors.

[0062] BT (Bluetooth): A wireless communication technology standard mainly used for data exchange between devices within a short distance. Bluetooth technology is widely used in consumer electronic products such as mobile phones, headphones, keyboards, and mice.

[0063] SDIO (Secure Digital Input Output): An interface standard for connecting memory cards and other peripherals. The SDIO interface supports high-speed data transmission and is commonly used in portable devices such as cameras and mobile phones.

[0064] ISP (Image Signal Processor): A processor dedicated to processing image data, responsible for converting raw image data into high-quality visual output. ISP is a key component in camera modules and is widely used in smartphones, surveillance cameras and other fields.

[0065] DSI (Display Serial Interface): A low-voltage differential signal interface used to connect display panels. It is mainly used in mobile devices and tablets and supports the transmission of high-definition video.

[0066] UART (Universal Asynchronous Receiver-Transmitter): is a commonly used serial communication interface used to achieve data transmission between devices. UART allows full-duplex communication between two devices, that is, sending and receiving data at the same time. It is widely used in embedded systems, computers and other electronic devices to connect various peripherals and sensors.

[0067] AP (Application Processor): A processor designed specifically for running operating systems and applications, commonly found in mobile devices such as smartphones and tablets. APs usually integrate multiple functional modules such as CPU and GPU.

[0068] 4G (Fourth Generation): The fourth generation of mobile communication technology provides faster data transmission rates and better network service quality than 3G. 4G technology mainly includes two standards: LTE (Long Term Evolution) and WiMAX (Worldwide Interoperability for Microwave Access).

[0069] Power domain: In integrated circuit (IC) design, in order to achieve power management and optimization, the chip is divided into multiple power supply areas corresponding to independent functional units. Each power domain can have different supply voltages, power management and power control strategies. In this way, the power consumption of the chip can be more finely controlled, the energy efficiency ratio can be improved, the battery life can be extended, and the heat generation can be reduced.

[0070] LDO (Low Dropout Regulator): A linear regulator that can operate when the voltage difference between the input voltage and the output voltage is very small. The main function of LDO is to convert the unstable input voltage into a stable output voltage, which is suitable for application scenarios that require high-precision, low-noise output.

[0071] DCDC Buck (DC Buck Converter): A switch-mode power converter used to convert a higher input DC voltage to a lower output DC voltage. The Buck converter regulates the output voltage through the fast switching action of a switching element (such as a MOSFET), and has high efficiency and strong load adaptability.

[0072] DCDC Boost (DC voltage step-up converter): A switch-mode power converter used to convert a lower input DC voltage to a higher output DC voltage. The Boost converter regulates the output voltage through the fast switching action of a switching element (such as a MOSFET), and has high efficiency and strong load adaptability.

[0073] DCDC Buck-Boost (DC voltage step-up / step-down converter): A switch-mode power converter used to convert a higher input DC voltage to a lower output DC voltage, or to convert a lower input DC voltage to a higher output DC voltage. Buck-Boost converters regulate the output voltage through fast switching actions of switching elements (such as MOSFETs), and have high efficiency and strong load adaptability.

[0074] DCDC Converter (DC to DC Converter): A type of power converter used to convert a DC voltage to another DC voltage of a different level. DCDC converters can be divided into boost, buck, and buck-boost types, depending on the input and output voltage requirements.

[0075] In this specification, a chip testing system is provided. One or more embodiments of this specification also relate to another chip testing system, a chip testing method, another chip testing method, a main control device, a computer-readable storage medium and a computer program product, which are described in detail one by one in the following embodiments.

[0076] See also Figure 1 , Figure 1 One of the structural schematic diagrams of a chip testing system provided by an embodiment of the present specification is shown. The chip testing system 100 includes a main control device 110 and a measuring circuit board 120. The measuring circuit board 120 includes a chip to be tested 1210. A measuring resistor is electrically connected to the power input path of the chip to be tested 1210.

[0077] The main control device 110 is used to send a performance test instruction to the measurement circuit board 120, wherein the performance test instruction is used to run the chip to perform multiple test tasks according to a specific timing;

[0078] The measuring circuit board 120 is used to respond to the performance test instruction, run the chip to be tested 1210 to perform multiple test tasks, collect the working parameters of the chip to be tested 1210 under the multiple test tasks, and measure the power consumption parameters of both ends of the resistor under the multiple test tasks;

[0079] The main control device 110 is also used to obtain the working parameters and power consumption parameters under multiple test tasks collected by the measurement circuit board 120, and determine the performance test results of the chip to be tested 1210 based on the working parameters and power consumption parameters under the multiple test tasks.

[0080] The chip test system 100 is a system for automatically testing the performance of integrated circuit chips, including a main control device 110 and a measurement circuit board 120, which can automatically perform the following: sending test instructions, executing test tasks, collecting test data, and finally analyzing the test results. The chip test system 100 ensures the consistency and accuracy of the test through a highly integrated and automated test process, and is suitable for rapid detection requirements in a large-scale production environment. For example, a typical chip test system includes a high-performance main control computer and multiple measurement circuit boards connected to different chips to be tested, which are used to test various types of SoC chips.

[0081] The main control device 110 is a core device in the chip test system 100 for controlling the test process and analyzing the performance test results. The main control device 110 can be a host computer such as a computer, a server or a dedicated test controller, which has the functions of generating and sending performance test instructions and analyzing performance test results. For example, the main control device 110 is an industrial computer running dedicated test software, which can communicate with the measurement circuit board 120 through interfaces such as USB and Ethernet, control the test process and process test data, and analyze and obtain performance test results of various types of SoC chips.

[0082] The measurement circuit board 120 is a circuit board in the chip testing system 100 for installing the chip to be tested 1210 and performing multiple test tasks, and can collect the working parameters of the chip to be tested 1210 and the power consumption parameters at both ends of the measurement resistor. The measurement circuit board 120 usually includes the chip to be tested 1210, a power management circuit, and a signal acquisition circuit, etc., and can communicate with the main control device 110, receive performance test instructions, and feedback the collected working parameters and power consumption parameters. For example, the measurement circuit board 120 is a PCB board, on which the SoC chip to be tested, the power management chip, the analog-to-digital converter (Analog-to-Digital Converte, referred to as ADC), etc. are welded, and communicates with the main control device 110 through interfaces such as USB and Ethernet.

[0083] The chip to be tested 1210 is an integrated circuit chip that needs to be tested for performance, and can be a CPU chip, a GPU chip, an NPU chip, a VPU chip, a SoC chip, etc. The chip to be tested 1210 is mounted on the measurement circuit board 120, and runs in response to the performance test instruction sent by the main control device 110, and executes multiple test tasks in a specific timing to evaluate its performance and power consumption. For example, the chip to be tested is a SoC chip, which integrates a CPU unit, an application processing unit, and an NPU unit, etc.

[0084] The power input path is a circuit path for providing power to the chip under test 1210, and generally includes a power management circuit and related power lines. The design of the power input path needs to ensure stable power supply to avoid test errors caused by power supply fluctuations. In power consumption measurement, a measuring resistor is electrically connected to the power input path of the chip under test 1210. For example, the power line from the power adapter to the measurement circuit board 120 is connected to the power pin of the SoC chip after passing through the voltage regulator and the filter circuit to ensure a stable 3.3V operating voltage.

[0085] The measuring resistor is a resistor connected in series on the power input path of the chip to be tested 1210, which is used to measure the power consumption of the chip. The measuring resistor is generally a high-precision precision measuring resistor. By measuring the voltage drop across the resistor, the power consumption parameters such as the voltage and current flowing through the resistor can be calculated, thereby determining the power consumption parameters of the chip to be tested 1210. Generally, the selection of the measuring resistor needs to consider the test scenario, test accuracy, power loss, etc. For example, a 10Ω+0.06Ω precision measuring resistor R1252 is connected to the power pin of the SoC chip.

[0086] The performance test instruction is an instruction sent by the main control device 110 to the measurement circuit board 120, which is used to run the chip to be tested 1210 to perform multiple test tasks in a specific timing. The performance test instruction usually includes information such as the type, timing, and parameters of the test task to ensure the standardization and automation of the test process. The performance test instruction is generated by the main control device 110 and sent to the measurement circuit board 120. For example, a performance test instruction containing "run memory bandwidth test for 3 seconds with a workload of 10%; run image processing test for 2 seconds with a workload of 70%" is sent to the measurement circuit board 120 through the interface, instructing the chip to be tested 1210 to perform test tasks in the following order: Memory bandwidth test: for 3 seconds, with a workload of 10%. Image processing test: for 2 seconds, with a workload of 70%.

[0087] The test task is a specific script task that the chip to be tested 1210 needs to execute during the performance test. The test task can include different workloads, operating frequencies, temperature conditions, etc., which are used to comprehensively evaluate the performance and power consumption of the chip. Each test task has a specific execution time and parameter settings. For example, memory bandwidth test: lasts for 3 seconds, with a workload of 10%. Image processing test: lasts for 2 seconds, with a workload of 70%. Floating-point operation test: lasts for 10 seconds, with an operating frequency of 1GHz. Integer operation test: lasts for 5 seconds, with an operating frequency of 800MHz.

[0088] The working parameters are working state parameters of the chip to be tested 1210 when executing multiple test tasks, including but not limited to workload, working frequency and temperature. The working parameters directly reflect the operation of the chip to be tested 1210 under different conditions and are an important basis for evaluating the performance of the chip to be tested 1210. The working parameters are collected by the measurement circuit board 120 and sent back to the main control device 110. For example, workload: the workload of the memory bandwidth test is 10%, and the workload of the image processing test is 70%. Working frequency: The working frequency of the floating-point operation test is 1GHz, and the working frequency of the integer operation test is 800MHz. Temperature: The ambient temperature during the power consumption test is 45°C.

[0089] The power consumption parameters are power consumption performance parameters measured at both ends of the resistor when the chip under test 1210 performs multiple test tasks, including but not limited to at least one of the following: voltage, current and temperature. The power consumption parameters indirectly reflect the energy consumption of the chip under test 1210 in different working states and are important indicators for evaluating the power consumption management performance of the chip. The power consumption parameters are usually obtained by measuring the resistance collected by the relevant sensors of the circuit board 120 and sent back to the main control device 110. For example, voltage: 3.3V. Working current: 1A. Temperature: 50°C.

[0090] Since the performance test instructions are used to run the chip to perform multiple test tasks in a specific timing, the collected working parameters and power parameters can be expressed in the form of a time series.

[0091] The performance test result is the result of the power consumption performance index of the chip to be tested 1210 obtained by analysis based on the collected working parameters and power consumption parameters. The performance test result includes the performance test result of a single functional unit (power domain) of the chip to be tested and the performance test results of multiple functional units (power domains). The performance test result usually includes the power consumption performance index of the chip to be tested 1210 under different test tasks, which is used to guide the design optimization and quality control of the chip. Optionally, the main control device 110 generates a detailed test report based on the performance test result. For example, floating-point operation performance: at a working frequency of 1 GHz, the floating-point operation performance is 1000M FLOPS, and at a working frequency of 800 MHz, the floating-point operation performance is 800M FLOPS. Power consumption: at a working frequency of 1 GHz, the power consumption is 3.3 W, and at a working frequency of 800 MHz, the power consumption is 2.8 W. Temperature change: at a working frequency of 1 GHz, the chip temperature rises from room temperature 25°C to 50°C, and at a working frequency of 800 MHz, the chip temperature rises from room temperature 25°C to 45°C. Image processing performance: 1080p video decoding rate is 30fps at 70% workload, and 10fps at 10% workload. Comprehensive evaluation: The comprehensive score is 85 points. It is recommended to optimize the power management module to reduce power consumption at high temperature, especially at high operating frequency and high workload. Specific suggestions: Optimize the power management circuit to reduce power supply fluctuations. Improve the heat dissipation design and enhance the thermal stability of the chip. Optimize the algorithm, reduce unnecessary computing tasks, and improve the energy efficiency ratio.

[0092] A performance test instruction is sent to the measurement circuit board 120. An optional method is to send the performance test instruction to the measurement circuit board 120 through an interface. For example, the main control device 110 sends a performance test instruction including "run memory bandwidth test for 3 seconds with a workload of 10%; run image processing test for 2 seconds with a workload of 70%" to the measurement circuit board 120 through the UART interface. Another optional method is to send the performance test instruction to the measurement circuit board 120 through Ethernet. For example, the main control device 110 sends a performance test instruction including "run floating-point operation test for 10 seconds with an operating frequency of 1 GHz" to the measurement circuit board 120 through the Ethernet interface. This is not limited here.

[0093] In response to the performance test instruction, the chip to be tested 1210 is run to perform multiple test tasks. One optional method is: the measurement circuit board 120 receives the performance test instruction, and starts the chip to be tested 1210 to perform the test task through the internal control logic. For example, after the measurement circuit board 120 receives the instruction of "running memory bandwidth test for 3 seconds with a workload of 10%", the chip to be tested 1210 is started to perform the memory bandwidth test; another optional method is: the measurement circuit board 120 receives the performance test instruction, and starts the chip to be tested 1210 to perform the test task through an external trigger signal. For example: After the measurement circuit board 120 receives the instruction of "running image processing test for 2 seconds with a workload of 70%", it starts the chip to be tested 1210 to perform the image processing test through an external trigger signal; another optional method is: after the measurement circuit board 120 receives the performance test instruction, it starts the chip to be tested 1210 to perform the test task through a preset script file. For example, after the measurement circuit board 120 receives the instruction of "running floating-point operation test for 10 seconds with an operating frequency of 1GHz", it loads the preset script file and starts the chip to be tested 1210 to perform the floating-point operation test, which is not limited here.

[0094] Collecting the working parameters of the chip to be tested 1210 under multiple test tasks, one optional way is: collecting the working parameters of the chip to be tested 1210 through built-in sensors, for example, the measuring circuit board 120 collects the temperature of the chip to be tested 1210 in floating-point operation test in real time through the built-in temperature sensor; another optional way is: the measuring circuit board 120 collects the working parameters of the chip to be tested 1210 through external sensors, for example, the measuring circuit board 120 collects the working frequency of the chip to be tested 1210 in memory bandwidth test in real time through an external frequency meter; another optional way is: reading the working parameters of the chip to be tested 1210 through internal registers, for example, the measuring circuit board 120 reads the workload of the chip to be tested 1210 in image processing test through internal registers, which is not limited here.

[0095] Collect power consumption parameters at both ends of the measuring resistor under multiple test tasks. One optional method is: collect the voltage at both ends of the measuring resistor under multiple test tasks through a voltage converter. For example, the measuring circuit board 120 collects the voltage at both ends of the measuring resistor under multiple test tasks in real time through the built-in ADC. Another optional method is: collect the power consumption parameters at both ends of the measuring resistor under multiple test tasks through a power consumption measurement device. For example, the measuring circuit board 120 collects the voltage at both ends of the measuring resistor under multiple test tasks through an external power meter. Another optional method is to collect the current at both ends of the measuring resistor under multiple test tasks through a current sensor. For example, the measuring circuit board 120 collects the current at both ends of the measuring resistor under multiple test tasks in real time through an internal current sensor. No limitation is made here.

[0096] Obtain the working parameters and power consumption parameters under multiple test tasks collected by the measurement circuit board 120. An optional method is: obtain the working parameters and power consumption parameters under multiple test tasks collected by the measurement circuit board 120 through an interface. For example, the main control device 110 obtains the working frequency, workload, current and voltage of the chip to be tested 1210 in the floating-point operation test from the measurement circuit board 120 through the UART interface. Another optional method is: obtain the working parameters and power consumption parameters under multiple test tasks collected by the measurement circuit board 120 through Ethernet. For example, the main control device 110 obtains the working frequency, workload, current and voltage of the chip to be tested 1210 in the memory bandwidth test from the measurement circuit board 120 through the Ethernet interface. This is not limited here.

[0097] Based on the working parameters and power consumption parameters under multiple test tasks, the performance test results of the chip to be tested 1210 are determined. An optional method is: based on the working parameters and power consumption parameters under multiple test tasks, the performance test results of the chip to be tested 1210 are obtained by analyzing the data analysis algorithm. For example, the main control device 110 uses a statistical analysis method to calculate the average power consumption and maximum temperature of the chip to be tested 1210 in the floating-point operation test, and generates a detailed test report including floating-point operation performance, power consumption and temperature change curves. Another optional method is: based on the working parameters and power consumption parameters under multiple test tasks, the performance test results of the chip to be tested 1210 are obtained by analyzing the machine learning algorithm. 10 performance test results, for example, the main control device 110 predicts the performance and power consumption of the chip to be tested 1210 under different test tasks through a machine learning algorithm, and generates a detailed test report, including the predicted power consumption curve and temperature change trend. Another optional method is: according to preset standard parameters, compare the working parameters and power consumption parameters under multiple test tasks to determine the performance test results of the chip to be tested 1210. For example, the main control device 110 compares the actual working parameters and power consumption parameters of the chip to be tested 1210 under different test tasks according to preset performance standard parameters, and generates a detailed test report, including power consumption deviation and temperature change range, which are not limited here.

[0098] In the embodiments of this specification, the main control device automatically sends performance test instructions to ensure that each test can be performed under the same conditions, avoiding the problem of inconsistent test results caused by differences in human operations. In addition, multiple test tasks are executed according to a preset specific timing, which further ensures the consistency of the test process and the reliability of the performance test results. The measurement circuit board is directly integrated into the system, and the working parameters and power consumption parameters of the chip to be tested can be collected in real time and accurately. Secondly, in terms of power consumption measurement, by electrically connecting the measurement resistor to the power input path of the chip to be tested, the actual power consumption of the chip can be more accurately monitored, reducing the impact of external environmental factors on the test results. In addition, the automated chip testing system greatly reduces the dependence on human resources, reduces testing costs, and improves testing efficiency.

[0099] In an optional embodiment of this specification, Figure 2 The second structural schematic diagram of a chip testing system provided by an embodiment of the present specification is shown. The chip testing system 100 also includes a DC power supply 130, which is electrically connected to a measurement circuit board 120. The measurement circuit board 120 also includes a power management chip 1220, which is electrically connected to the DC power supply 130. A measurement resistor is electrically connected to the power input path between the power management chip 1220 and the chip to be tested 1210.

[0100] The DC power supply 130 is a power supply device that provides stable DC power to the measurement circuit board 120. It can convert alternating current (Analog Circuit, referred to as AC) into direct current (Direct Circuit, referred to as DC), or directly provide direct current. The DC power supply 130 ensures stable power supply for various devices and components such as chips on the measurement circuit board 120 by adjusting the output voltage and current. For example, the DC power supply 130 is a power supply device dedicated to embedded systems and circuit boards, providing a 3.3V stable DC power supply.

[0101] The power management chip 1220 is an integrated circuit chip installed on the measurement circuit board 120 for managing and controlling power distribution. It is responsible for converting the input power supply voltage into a stable power supply required by various devices and chips on the measurement circuit board 120, and provides various protection functions to ensure the stability and safety of the measurement circuit board 120. The functions of the power management chip 1220 include but are not limited to at least one of the following: Voltage conversion: converting the input power supply voltage into the voltage required by each component in the measurement circuit board 120, such as converting 5V to 3.3V. Current management: controlling and distributing the current provided to each component on the measurement circuit board 120 to ensure that each component obtains appropriate current. Power monitoring: real-time monitoring of the status of the power supply, such as voltage, current, temperature, etc. Protection function: providing overvoltage protection, overcurrent protection, short circuit protection, overtemperature protection, etc., to ensure the safe operation of each component on the measurement circuit board 120. Power management: dynamically adjusting the output of the power supply according to the needs of each component on the measurement circuit board 120 to optimize power consumption.

[0102] The DC power supply 130 is electrically connected to the measuring circuit board 120. One optional way is that the DC power supply 130 and the measuring circuit board 120 are connected via a power converter. Another optional way is that the DC power supply 130 and the measuring circuit board 120 are directly connected, which is not limited here.

[0103] The power management chip 1220 is electrically connected to the DC power supply 130. One optional method is that the power management chip 1220 is directly connected to the DC power supply 130 through a power input pin. Another optional method is that the power management chip 1220 is connected to the DC power supply 130 through an intermediate circuit. For example, the power management chip 1220 is connected to the DC power supply 130 through an intermediate circuit (such as a voltage regulator and a filter circuit) to ensure that the power management chip 1220 obtains a more stable 5V DC power supply, which is not limited here.

[0104] In the embodiments of this specification, the stability and safety of the chip to be tested under multiple test tasks are ensured through the stable connection between the DC power supply and the measurement circuit board, and the efficient power management and protection functions of the power management chip.

[0105] In an optional embodiment of the present specification, the power management chip is electrically connected to the DC power supply 130 via a DC voltage converter.

[0106] A DC voltage converter is a power converter used to convert a DC voltage into another DC voltage of a different level. Depending on the topology, the DC voltage converter can achieve boost, buck, or bidirectional voltage conversion. The DC voltage converter includes but is not limited to at least one of the following: a DC to DC converter and a low voltage dropout stabilizer, wherein the DC to DC converter includes but is not limited to at least one of the following: a DC voltage boost converter, a DC voltage buck converter, and a DC voltage buck-boost converter.

[0107] For example, the chip to be tested 1210, the power management chip 1220, the memory chip and the wireless transmission chip (WIFI / BT chip) are installed. Figure 3 A schematic diagram of the structure of a power consumption measurement circuit in a chip test system provided by an embodiment of this specification is shown:

[0108] The DC power supply 130 provides a 12V DC power input VDD_12V, and provides the converted power voltage to the power management chip 1220, the low voltage drop regulator and the DC to DC converter through a DC voltage step-down converter (DCDCBuck). The power management chip 1220 supplies power to each power domain in the chip to be tested 1210 through multiple power input paths. The main power domains include the power domain that supplies power to the CPU subsystem (such as DVD08_CPU), the power domain that supplies power to the application processing unit (AP) subsystem (such as GPU, VPU, NPU, ISP, etc.), and other functional unit power input paths. The low voltage drop regulator supplies power to the memory chip through the memory chip power input path. The DC to DC converter supplies power to the wireless transmission chip through the wireless transmission chip power input.

[0109] In the embodiments of this specification, the power management chip is electrically connected to the DC power supply through a DC voltage converter, which realizes efficient and flexible voltage management and ensures stable power supply to each component on the measurement circuit board. It not only improves the power conversion efficiency and reduces energy loss, but also enhances the safety and reliability of the system through a variety of protection functions, ensuring the accuracy of the test results and the overall performance of the system.

[0110] In an optional embodiment of the present specification, the chip to be tested 1210 includes multiple functional units, and multiple power input paths are included between the power management chip 1220 and the multiple functional units, and a corresponding measurement resistor is electrically connected to any power input path.

[0111] The chip to be tested 1210 contains multiple independent functional units, each of which is responsible for performing different tasks to achieve corresponding functions. The multiple functional units can be processors, accelerators, interface controllers, etc. Each functional unit is represented as an independent power domain in the chip and requires independent power management and monitoring. For example, CPU unit, GPU unit, NPU unit, VPU unit and AP unit.

[0112] There are multiple independent power input paths between the power management chip 1220 and multiple functional units in the chip to be tested 1210. Each path is responsible for providing a stable power supply for a specific functional unit, and each path is electrically connected to a corresponding measuring resistor for monitoring and calculating power consumption parameters. For example, CPU unit power input path: power demand: 3.3V, measuring resistor: 10Ω, application scenario: the power management chip 1220 provides 3.3V power to the CPU unit through an independent power input path, and monitors the power consumption of the CPU unit through a 10Ω measuring resistor. GPU unit power input path: power demand: 1.5V, measuring resistor: 5Ω, application scenario: the power management chip 1220 provides 1.5V power to the GPU unit through another independent power input path, and monitors the power consumption of the GPU unit through a 5Ω measuring resistor. NPU unit power input path: power demand: 1.2V, measuring resistor: 8Ω, application scenario: the power management chip 1220 provides 1.2V power to the NPU unit through an independent power input path, and monitors the power consumption of the NPU unit through an 8Ω measuring resistor. VPU unit power input path: power requirement: 1.5V, measurement resistance: 6Ω, application scenario: the power management chip 1220 provides 1.5V power to the VPU unit through an independent power input path, and monitors the power consumption of the VPU unit through a 6Ω measurement resistor.

[0113] In the embodiments of this specification, the power management chip is connected to multiple functional units in the chip to be tested through multiple independent power input paths, and each path is electrically connected to a corresponding measurement resistor. This not only achieves accurate power management and power consumption monitoring for each functional unit, ensuring the stability and reliability of the system, but also improves the accuracy and efficiency of the test through efficient power conversion and protection functions, providing a solid foundation for chip performance testing.

[0114] In an optional embodiment of the present specification, the measuring resistor includes a first measuring resistor and a second measuring resistor, the resistance of the first measuring resistor is greater than that of the second measuring resistor, the first measuring resistor and the second measuring resistor are connected in series, and the first measuring resistor is connected in parallel with the switching element.

[0115] The first measuring resistor is a measuring resistor used to measure current on the power input path, and its resistance is relatively large, and it is usually used to measure power consumption monitoring under large current conditions. The resistance of the first measuring resistor is relatively large. Due to its large resistance, the first measuring resistor can be used to roughly measure current, which is suitable for power consumption monitoring under large current conditions. Since the first measuring resistor is connected in parallel with the switching element, when precise measurement is required, the first measuring resistor can be short-circuited by the switching element to achieve a large current input to the chip to be tested 1210. For example, the R1252 precision measuring resistor of 10Ω+0.06Ω, on the power input path of the CPU unit of the chip to be tested 1210, the power management chip 1220 provides a 3.3V power supply to the CPU unit through an independent power input path, and monitors the power consumption parameters of the CPU unit in a large current scenario through the R1252 precision measuring resistor.

[0116] The second measuring resistor is a measuring resistor used to measure current on the power input path, and its resistance is small, and it is usually used to measure power consumption monitoring under low current conditions. The resistance of the second measuring resistor is small. Due to the small resistance, the second measuring resistor can be used to accurately measure current, which is suitable for power consumption monitoring under low current conditions. The second measuring resistor is connected in series with the first measuring resistor, and together constitutes a part of the power input path, so that the current input to the chip to be tested 1210 is a small current. For example, the R1253 precision measuring resistor of 0.06Ω, on the power input path of the CPU unit of the chip to be tested 1210, the power management chip 1220 provides a 3.3V power supply to the CPU unit through an independent power input path, and monitors the power consumption parameters of the CPU unit in a low current scenario through the precision measuring resistors connected in series with R1252 and R1253.

[0117] The switch element is an electronic element used to control the on and off of the circuit, which can be a mechanical switch, a transistor (such as MOSFET), etc. The switch element is connected in parallel with the first measuring resistor, and can control whether the first measuring resistor is connected to the circuit, thereby affecting the total resistance of the measuring resistor. When accurate measurement is required, the first measuring resistor is short-circuited by closing the switch element, so that the total measuring resistance is equal to the second measuring resistor, thereby reducing the measurement error. The switch element can also be used to protect the circuit to prevent excessive current from passing through the measuring resistor and causing damage. For example, the first measuring resistor is connected in parallel with a MOSFET switch element.

[0118] For example, Figure 4 FIG. 1 shows a measurement resistance circuit diagram of a power consumption measurement circuit in a chip test system provided by an embodiment of the present specification, such as Figure 4 As shown:

[0119] A measuring resistor is electrically connected to the power input circuit of the CPU unit. The measuring resistor includes a first measuring resistor R1252 (10Ω+0.06Ω) precision measuring resistor and a second measuring resistor R1253 (0.06Ω) precision measuring resistor. The resistance value of the first measuring resistor is greater than that of the second measuring resistor. The first measuring resistor and the second measuring resistor are connected in series, and the first measuring resistor is connected in parallel with the MOSFET switching element (NCP5541 chip). The power domain of the CPU subsystem (such as DVD08_CPU) can be measured in high current or low current scenarios.

[0120] Among them, (V) represents the voltage across the precision resistor (Voltage), (R) represents the precision resistance value (Resistance), and (I) represents the current (Current).

[0121] In the embodiments of this specification, by connecting measuring resistors of different resistance values ​​in series or short-circuiting them under the control of switching elements, accurate testing of power consumption under different current scenarios is achieved, the accuracy and reliability of the test are improved, and the stability and consistency of the test results are ensured through flexible configuration of measuring resistors.

[0122] In an optional embodiment of the present specification, the software part in the main control device 110 is divided into six main modules: an initialization module, a monitoring module, a load adjustment module, a frequency adjustment module and a test report module. Figure 5 A schematic diagram showing the architecture of a software module of a main control device in a chip testing system provided by an embodiment of this specification is shown:

[0123] The initialization module includes test image building, test image burning, and test condition preset, which is used to complete the preparation work for all power consumption tests.

[0124] The monitoring module includes CPU frequency monitoring, CPU load monitoring, DevFreq frequency monitoring, DevFreq load monitoring and temperature monitoring. It is used to read the operating frequency and workload information of the CPU and AP peripherals on the CPUFreq and DevFreq nodes from the LinuxSysFs nodes in real time, and read the SoC chip temperature information obtained by the SoC chip PVT sensor.

[0125] The load regulation module includes single CPU load regulation, single Dev load regulation, CPU and Dev scenario load regulation, which is used to generate adjustable loads on each unit manager (IPMaster) involved in the CPU unit and AP unit, and run scenario loads involving multiple functional units.

[0126] The frequency adjustment module includes CPUFreq frequency adjustment and DevFreq frequency adjustment, which are used to adjust the test frequency and frequency conversion strategy as needed within the frequency table range configured by the SoC.

[0127] The test verification module includes load frequency verification and power consumption verification, which are used to verify the input of the comprehensive load regulation module, the output of the monitoring module and the power consumption measurement results.

[0128] The test report module includes test reports and visual charts, which are used to generate test result data reports and generate visual charts.

[0129] Optionally, during the monitoring process, the monitoring module forms the acquired data information into a time series of workload, frequency, current, and temperature, which is expressed as follows:

[0130] Workload of each unit of CPU and AP (NPU, VPU, etc.);

[0131] The operating frequency of each unit such as CPU and AP (NPU, VPU);

[0132] CPU and AP (NPU, VPU) power domain current and board-level current;

[0133] Temperature information of CPU and AP (NPU, VPU) on SoC chip;

[0134] The load regulation module has two working modes: one is to generate a single IP fixed workload, and the other is to generate a multi-IP random workload.

[0135] For the first working mode, the load regulation module forms a fixed load by changing the working time within a unit cycle:

[0136] (D) is the duty cycle, (T_on) is the load time per unit cycle, and (T) is the unit period.

[0137] For the second working mode, the load regulation module enables the system to adapt to the dynamically changing workload frequency of the CPU unit and other functional units by running specific link scenarios. For example, in the video decoding scenario, using a 4K video stream as input will generate a higher workload on the VPU than a 1080P video stream. In addition, even for the same video stream, different frame types (such as I frames, P frames) generate different workloads.

[0138] For the first working mode, in an optional embodiment of the present specification, the plurality of functional units include any one of the first functional units, and a first measuring resistor is electrically connected to the power input path between the power management chip and the first functional unit;

[0139] The main control device 110 is also used to obtain the working parameters of the first functional unit collected by the measurement circuit board 120 under multiple test tasks, and the power consumption parameters of both ends of the first measurement resistor under multiple test tasks, calculate the correlation between the working parameters and the power consumption parameters under multiple test tasks, and determine the performance test results of the chip to be tested 1210 based on the correlation.

[0140] The first functional unit is a specific functional module in the chip to be tested 1210, which is responsible for executing specific tasks to realize corresponding functions. The first functional unit is represented as an independent power domain in the chip, which requires independent power management and monitoring.

[0141] The correlation is the association between the working parameters and power consumption parameters of the chip to be tested 1210 under multiple test tasks. By calculating the correlation between these parameters, the performance and power consumption of the chip under different working conditions can be evaluated.

[0142] An optional method for calculating the correlation between the working parameters and the power consumption parameters under multiple test tasks is to calculate the average of the working parameters and the power consumption parameters under multiple test tasks, normalize the average of the working parameters and the power consumption parameters, and calculate the correlation between the working parameters and the power consumption parameters under multiple test tasks.

[0143] Exemplarily, for the first functional unit, the CPU unit:

[0144] Test task 1: Memory bandwidth test, lasting 3 seconds, workload is 10%. Working parameters: workload 10%, operating frequency 1GHz, temperature 45℃. Power consumption parameters: voltage 3.3V, current 1A.

[0145] Test task 2: Image processing test, lasting 2 seconds, workload is 70%. Working parameters: workload 70%, working frequency 1.5GHz, temperature 55℃. Power consumption parameters: voltage 3.3V, current 1.5A.

[0146] Correlation calculation: average workload: (10% + 70%) / 2 = 40%, average operating frequency: (1GHz + 1.5GHz) / 2 = 1.25GHz, average temperature: (45°C + 55°C) / 2 = 50°C, average voltage: (3.3V + 3.3V) / 2 = 3.3V, average current: (1A + 1.5A) / 2 = 1.25A, normalization: normalize all parameters to between 0 and 1. Correlation calculation: use the Pearson Correlation Coefficient to calculate the correlation between the operating parameters and the power consumption parameters.

[0147] Combination Figure 5 Multiple modules in Figure 6 Taking the CPU basic power consumption measurement process as an example, the general basic power consumption measurement process is described. Figure 6 One of the flow charts of a software module of a main control device in a chip testing system provided by an embodiment of this specification is shown:

[0148] In the initialization module, start, test image building, test image burning, and test condition preset;

[0149] In the frequency regulation module, set the on-demand regulation mode;

[0150] In the load regulation module, adjust the CPU load;

[0151] In the monitoring module, monitor the CPU load, monitor the CPU frequency, monitor the board-level current, monitor the current of the CPU power input circuit, and monitor the CPU PVT sensor temperature;

[0152] In the test verification module, based on CPU load and CPU frequency, CPU load frequency verification, based on CPU load, CPU frequency and CPU power input circuit current, CPU frequency power consumption verification;

[0153] In the test report module, a test report is generated based on the CPU load, CPU frequency, current of the CPU power input circuit, CPU PVT sensor temperature, verified CPU load frequency, and CPU frequency power consumption. Based on the test report, a visual power consumption curve is generated.

[0154] Specifically, the test verification module obtains the time series of the current CPU workload and operating frequency from the monitoring module, calculates their arithmetic mean values ​​respectively, and obtains its theoretical operating frequency by looking up the CPU load average value in the following table. If the difference with the CPU frequency average value is within the range of 5%, the result is in line with expectations. The CPU frequency and power consumption verification process is as follows:

[0155] In the time period T, the CPU load is adjusted to the upper limit of the interval of 0 to W1 through the load adjustment module, the working frequency is checked to F1, and the current time series information in the current time period is obtained through the monitoring module. The current time series is expressed as the arithmetic mean of its power consumption calculated in combination with the voltage; in the next time period T, the CPU load is adjusted to the upper limit of the interval of W1 to W2, and the arithmetic mean of the current time series information and the CPU power consumption is obtained through the monitoring module; and so on, until the highest interval, then a list of CPU frequencies and corresponding CPU power consumption can be obtained: the above two sequences are logarithmically normalized respectively; the correlation of the normalized time series is calculated: the closer the correlation coefficient is to 1, the stronger the correlation is.

[0156] Similarly, the same method is used to obtain a list of the frequencies and corresponding CPU power consumption of the remaining AP units (NPU, VPU, etc.) in the load range, and their correlation is calculated.

[0157] In the embodiments of this specification, precise power consumption measurement and performance evaluation of a single functional unit under multiple test tasks are achieved, ensuring the accuracy and reliability of the test. By calculating the correlation between working parameters and power consumption parameters, the performance and power consumption of the chip under different working conditions are accurately measured.

[0158] For the second working mode, in an optional embodiment of the present specification, the plurality of functional units include at least two second functional units, and a first measuring resistor is electrically connected to the power input path between the power management chip and the second functional units;

[0159] The main control device 110 is also used to obtain the working parameters of the second functional unit collected by the measurement circuit board 120 under multiple test tasks, and the power consumption parameters at both ends of the second measurement resistor under multiple test tasks, and calculate the actual power consumption parameters at both ends of the second measurement resistor under multiple test tasks based on the working parameters under multiple test tasks and the preset power consumption parameters of the preset functional unit, compare the actual power consumption parameters with the collected power consumption parameters, and determine the performance test results of the chip to be tested 1210.

[0160] The second functional unit is at least two specific functional modules in the chip to be tested 1210, which are responsible for performing different tasks to implement corresponding functions. The second functional unit is represented by at least two independent power domains in the chip, which require independent power management and monitoring. At least two second functional units form a multifunctional unit link to test more complex scenarios.

[0161] The preset power consumption parameters are pre-set before testing based on chip design specifications and historical data, and are used to evaluate and verify actual test results. The preset power consumption parameters usually include expected power consumption values ​​under different workloads and frequencies. The preset power consumption parameters reflect the expected power consumption of the chip under different operating conditions. Based on previous test data and experience, the preset power consumption parameters can provide a reference benchmark for verifying the accuracy of the test results. The preset power consumption parameters are used to verify the actual test results to ensure that the power consumption performance of the chip under different operating conditions meets expectations.

[0162] The actual power consumption parameters are the actual power consumption values ​​of the chip to be tested 1210 under multiple test tasks collected by measuring the circuit board 120 during the test process. The actual power consumption parameters reflect the actual power consumption performance of the chip under different working conditions. The actual power consumption parameters are collected by measuring sensors and measuring resistors on the circuit board 120, including parameters such as voltage and current. The actual power consumption parameters are collected in real time during the test process to ensure the accuracy and reliability of the data. The actual power consumption parameters are used to compare with the preset power consumption parameters to evaluate the performance and power consumption performance of the chip and find potential problems and optimization directions.

[0163] For example, for a CPU unit:

[0164] Test task 1: Memory bandwidth test, lasting 3 seconds, workload 10%; working parameters: workload 10%, working frequency 1GHz, temperature 45℃. Preset power consumption parameters: 3W. Actual power consumption parameters: The power consumption collected by measuring the resistor is 3.15W.

[0165] Test task 2: Image processing test, lasting 2 seconds, workload is 70%; working parameters: workload 70%, working frequency 1.5GHz, temperature 55℃. Preset power consumption parameters: 5W. Actual power consumption parameters: The power consumption collected by measuring the resistor is 5.1W.

[0166] For NPU unit:

[0167] Test task 1: Deep learning inference test, lasting 5 seconds, workload is 10%; working parameters: workload 10%, working frequency 1GHz, temperature 40℃. Preset power consumption parameters: 2W. Actual power consumption parameters: The power consumption collected by measuring the resistor is 2.1W.

[0168] Test task 2: Image recognition test, lasting 4 seconds, workload is 70%; working parameters: workload 70%, working frequency 1.5GHz, temperature 50℃. Preset power consumption parameters: 4W. Actual power consumption parameters: The power consumption collected by measuring the resistor is 4.2W.

[0169] Combination Figure 5In the video decoding link scenario, the main IPs involved are CPU, VPU, and G2D. The CPU is responsible for general computing tasks, such as controlling the video decoding algorithm; the VPU is responsible for processing the actual decoding of the video stream; and the G2D is responsible for image processing and 2D graphics acceleration. Video streams of different sizes and encoding complexities will have different effects on the workload and power consumption of each IP module. Figure 7 Taking the video decoding link scenario as an example, the scenario power consumption test process is described. Figure 7 The second flowchart of the software module of the main control device in a chip testing system provided by an embodiment of this specification is shown:

[0170] In the initialization module, start, test image building, test image burning, and test condition preset;

[0171] In the frequency regulation module, set the on-demand regulation mode;

[0172] In the load regulation module, run the video decoding link scenario task;

[0173] In the monitoring module, monitor the CPU load, monitor the CPU frequency, monitor the VPU load, monitor the VPU frequency, monitor the G2D load, monitor the G2D frequency, monitor the current of the CPU power input circuit, monitor the current of the AP unit power input circuit, monitor the board-level current, monitor the CPU PVT sensor temperature, and monitor the AP unit PVT sensor temperature;

[0174] In the test verification module, based on CPU load and CPU frequency, CPU frequency ratio verification is performed; based on VPU load and VPU frequency, VPU frequency ratio verification is performed; based on G2D load and G2D frequency, G2D frequency ratio verification is performed; based on the verified CPU frequency ratio, VPU frequency ratio and G2D frequency ratio, SoC power consumption is predicted;

[0175] In the test report module, a test report is generated based on the predicted SoC power consumption, the current of the CPU power input circuit, the current of the AP unit power input circuit, the board-level current, the CPU PVT sensor temperature, and the AP unit PVT sensor temperature. Based on the test report, a visual power consumption curve is generated.

[0176] Specifically, the method for calculating the proportion of the operating frequency within the measurement period (T) is to obtain the operating frequency time series of the CPU and DEV (VPU, G2D) modules through the monitoring module, which is expressed as:

[0177] Then the proportion of each frequency in the measurement period (T) is counted;

[0178] By obtaining the preset frequency and power consumption list of each functional unit, the preset power consumption parameters of the SoC can be derived:

[0179] The above preset power consumption parameters are compared with the actual power consumption parameters and preset power consumption parameters measured by the monitoring module from DVD08_CPU and DVD18_AP.

[0180] In addition, the monitoring module can be used to sum the power domains obtained in the board-level measurement circuit to obtain the overall power consumption of the SoC:

[0181] The board-level current can be obtained through the monitoring module, and compared with the preset board-level current to verify their proportional relationship, so as to clarify the power consumption proportion of SoC and other board-level peripherals respectively.

[0182] In the embodiments of this specification, accurate power consumption measurement and performance evaluation of multiple functional units under multiple test tasks in complex scenarios are achieved, ensuring the accuracy and reliability of the test. By comparing the actual power consumption parameters with the collected power consumption parameters, the performance and power consumption of the chip under different working conditions are accurately measured.

[0183] In an optional embodiment of this specification, Figure 8 The third structural diagram of a chip testing system provided by an embodiment of the present specification is shown. The chip testing system 100 further includes at least one auxiliary testing device 130. The at least one auxiliary testing device 130 is electrically connected to the measurement circuit board 120 through a corresponding interface.

[0184] The measuring circuit board 120 is specifically used to send a first control instruction corresponding to a first test task to at least one auxiliary test device 130 in response to the performance test instruction, wherein the first test task is any one of the plurality of test tasks;

[0185] At least one auxiliary test device 130 is configured to execute a first test task in response to a first control instruction.

[0186] The auxiliary test equipment 130 is an external device used to assist the measurement circuit board 120 in performing specific test tasks in the chip test system 100. These devices are electrically connected to the measurement circuit board 120 through an interface, receive control instructions from the measurement circuit board 120, and perform corresponding test tasks, including but not limited to at least one of the following: a mechanical arm, a mechanical arm control device, a touch display screen, a camera, an HDMI TV, WIFI, BT, and a USB. By introducing the auxiliary test equipment 130, the functions of the chip test system can be expanded to achieve more complex test scenarios and more comprehensive performance evaluations. The auxiliary test equipment 130 communicates with the measurement circuit board 120 through an interface to ensure the real-time and accuracy of the instructions. Among them, the mechanical arm is used to simulate user operations, such as clicking on the screen, moving devices, etc. The touch display screen is used to test the display and touch functions of the chip, such as screen resolution, touch response time, etc. The camera is used to test the image processing capabilities of the chip, such as image recognition, video encoding and decoding, etc. HDMI TV is used to test the video output capabilities of the chip, such as resolution, frame rate, etc. WIFI is used to test the wireless communication capabilities of the chip, such as network connection speed, signal strength, etc. BT is used to test the Bluetooth communication capabilities of the chip, such as connection stability, transmission rate, etc. USB is used to test the USB interface functions of the chip, such as data transmission speed, compatibility, etc.

[0187] The first test task is a specific task among multiple test tasks. The measurement circuit board 120 sends a first control instruction to the auxiliary test device 130, and the auxiliary test device 130 performs the task according to the first control instruction. The first test task can be any test task that requires the participation of the auxiliary test device 130, such as image processing, video playback, network connection, etc. The execution of the first test task is driven by the first control instruction sent by the measurement circuit board 120, ensuring the accuracy and consistency of the test task.

[0188] The first control instruction is an instruction sent by the measurement circuit board 120 to the auxiliary test device 130, which is used to control the auxiliary test device 130 to perform the first test task. The first control instruction usually contains information such as task type and parameter settings to ensure that the auxiliary test device 130 can correctly perform the task. The first control instruction is sent in real time through the interface to ensure the timely execution of the test task. After receiving the first control instruction, the auxiliary test device 130 parses the instruction content and executes the corresponding task.

[0189] For example, image processing test: First test task: use the camera to capture images and perform image recognition. First control instruction: command the camera to start capturing and processing images. Video playback test: First test task: play 4K video through HDMI TV and monitor video quality and frame rate. First control instruction: command HDMI TV to play the specified 4K video file. Touch response test: First test task: use the touch display to simulate user touch operations and test the touch response time. First control instruction: command the touch display to simulate a series of touch operations. Network connection test: First test task: test the network connection speed and signal strength of the chip through the WIFI device. First control instruction: command the WIFI device to connect to the specified network and perform a speed test.

[0190] An optional method of sending the first control instruction corresponding to the first test task to at least one auxiliary test device 130 is: sending the first control instruction corresponding to the first test task to at least one auxiliary test device 130 through an interface. For example, a camera is used to capture an image and perform image recognition. In response to the performance test instruction, the measurement circuit board 120 sends the first control instruction CAMERA_START_CAPTURE instruction to the camera through the interface.

[0191] Fig. 9 A schematic diagram of a flow chart of an auxiliary test device in a chip test system provided by an embodiment of this specification is shown:

[0192] start;

[0193] Upload the CPU load program and the test task script to the SoC power consumption measurement circuit board 120 via the network;

[0194] The main control device 110 sends a performance test instruction through an interface, starts a test task script with parameter control, and assists the test device 130 in executing the test task;

[0195] Finish.

[0196] In the embodiments of this specification, the performance and power consumption evaluation of the chip in various complex test scenarios is realized by the coordinated work of the measurement circuit board and the auxiliary test equipment. The measurement circuit board responds to the performance test instruction and sends the first control instruction to the auxiliary test equipment through the interface to ensure the accuracy and real-time performance of the test task. The auxiliary test equipment performs specific tasks according to the first control instruction, expands the functions of the chip test system, and improves the comprehensiveness and reliability of the test.

[0197] In an optional embodiment of this specification, Fig.10A fourth structural diagram of a chip testing system provided by an embodiment of the present specification is shown, wherein at least one auxiliary testing device 130 includes a mechanical arm 1310 and a touch display screen 1320;

[0198] The main control device 110 is also used to send motion control instructions to the robot arm 1310 and send touch display test instructions to the measurement circuit board 120;

[0199] The mechanical arm 1310 is used to perform corresponding touch operations on the touch display screen 1320 in response to motion control instructions;

[0200] The touch display screen 1320 is used to send a touch feedback signal to the measuring circuit board 120 in response to the touch operation;

[0201] The measuring circuit board 120 is used to respond to the touch display test instruction, operate the chip to be tested 1210 to perform the corresponding touch display test task based on the touch feedback signal, obtain the first task result, and send the first control instruction corresponding to the first task result to the touch display screen 1320;

[0202] The touch display screen 1320 is further configured to display the first task result in response to the first control instruction.

[0203] The robot arm 1310 is an automated device used to simulate user operations in the chip test system 100. The robot arm 1310 communicates with the main control device 110 through an interface, receives motion control instructions, and performs corresponding touch operations. The robot arm 1310 is used to simulate the user's manual operations, such as clicking the screen, sliding, long pressing, etc. The robot arm 1310 communicates with the main control device 110 through an interface to ensure the real-time and accuracy of the instructions. The robot arm 1310 is used to test the touch response time, touch sensitivity, etc. of the chip.

[0204] The touch display screen 1320 is an external device used in the chip test system 100 to test the display and touch functions of the chip. The touch display screen 1320 communicates with the measurement circuit board 120 through the DSI port, receives touch display test instructions, executes corresponding test tasks, and sends touch feedback signals. The touch display screen 1320 is used to test screen resolution, touch response time, touch sensitivity, etc. The touch display screen 1320 communicates with the measurement circuit board 120 through the DSI port to ensure the real-time and accuracy of the instructions. The touch display screen 1320 is used to test the display and touch functions of the chip to ensure user experience.

[0205] The motion control instruction is an instruction sent by the main control device 110 to the robot 1310, which is used to control the robot 1310 to perform a specific motion operation. The motion control instruction usually contains information such as the motion type, target position, and motion speed. For example, the motion control instruction: MOVE_TO 100200, instructs the robot 1310 to move to the coordinates (100, 200) on the screen. The corresponding touch operation: TOUCH 100200, the robot 1310 simulates a click operation at the coordinates (100, 200).

[0206] The touch display test instruction is an instruction sent by the main control device 110 to the measurement circuit board 120, which is used to control the measurement circuit board 120 to perform the touch display test task. The touch display test instruction usually includes information such as the test type and test parameters. For example, the touch display test instruction: TOUCHSCREEN_TEST 100200, the measurement circuit board 120 performs the touch display test task at the coordinates (100, 200).

[0207] The touch feedback signal is a signal sent by the touch display screen 1320 to the measurement circuit board 120, which is used to feedback the result of the touch operation. The touch feedback signal usually includes information such as the touch position and the touch response time. For example, the touch feedback signal: TOUCH_RESPONSE 100200100ms means that the touch response time at the coordinate (100, 200) is 100 milliseconds.

[0208] The touch display test task is a specific test task performed by the measurement circuit board 120, which is used to evaluate the touch display function of the chip. The touch display test task generally includes a touch response time test, a touch sensitivity test, a screen resolution test, etc. For example, a touch display test task: simulate a touch operation at the coordinates (100, 200) to test the touch response time.

[0209] The first task result is the test result data generated by the measurement circuit board 120 after the touch display test task is completed. The first task result generally includes test indicators such as touch response time, touch sensitivity, and screen resolution. For example, the first task result: the touch response time is 100 milliseconds, the touch sensitivity is 95%, and the screen resolution is 1920x1080.

[0210] An optional way to send motion control instructions to the robot 1310 is to send the motion control instructions to the robot 1310 through an interface, and another optional way is to send the motion control instructions to the robot 1310 through Ethernet, which is not limited here.

[0211] An optional way to send the touch display test command to the measurement circuit board 120 is to send the touch display test command to the measurement circuit board 120 through an interface. Another optional way is to send the touch display test command to the measurement circuit board 120 through Ethernet, which is not limited here.

[0212] An optional way of sending the touch feedback signal to measure the circuit board 120 is to send the touch feedback signal to measure the circuit board 120 through an interface.

[0213] An optional manner of sending the first control instruction corresponding to the first task result to the touch display screen 1320 is: sending the first control instruction corresponding to the first task result to the touch display screen 1320 through an interface.

[0214] Optionally, the auxiliary testing device 130 includes a mechanical arm 1310, a touch display screen 1320, and a mechanical arm control device for controlling the mechanical arm 130. Fig.11 A fifth structural diagram of a chip testing system provided by an embodiment of this specification is shown:

[0215] The robot arm 1310 is connected to the robot arm control device through the network, and the robot arm control device sends motion control commands through the network to make the robot arm 1310 move in the three axes of X, Y, and Z to complete the click operation on the touch display screen 1320. All functional operations that need to be completed by board-level peripherals are encapsulated into scripts with parameter control, and the main control device 110 sends motion control instructions to the robot arm 1310 through the interface, and sends touch display test instructions to the measurement circuit board 120, thereby starting the operation.

[0216] The chip to be tested 1210 is mounted on the measurement circuit board 120 , and is connected to a camera, a WIFI device, a BT device, a 4G device, and a TV device through multiple interfaces.

[0217] Take the measurement of the power domain power consumption of a more complex SoC application unit under different power modes (frequencies) as an example, such as testing "camera input->ISP image processing->DSI display image preview", the process involved is as follows Fig.12 As shown, Fig.12 A schematic diagram of a process flow of a mechanical arm and a touch display screen in a chip testing system provided by an embodiment of this specification is shown:

[0218] start;

[0219] Upload the camera display test program and the test task script to the SoC power consumption measurement circuit board 120 via the network;

[0220] The control device of the robot arm 1310 sends a motion control instruction through the network, so that the robot arm 1310 moves in the three axes of XYZ to complete the click operation on the touch display screen 1320;

[0221] The main control device 110 sends a performance test instruction through an interface, starts a test task script with parameter control, and executes the test task;

[0222] Finish.

[0223] In the embodiments of this specification, the chip test system uses a mechanical arm and a touch display screen as auxiliary test equipment, and sends motion control instructions and touch display test instructions through the main control device to achieve accurate testing of key performances such as chip touch response time and touch sensitivity. The system uses a mechanical arm to simulate user manual operation, touch the display screen for touch feedback, and combines the measurement circuit board to perform touch display test tasks and obtain the first task results, which improves test efficiency and accuracy and helps to improve the quality of chip products and user experience. In addition, the system supports multiple communication methods, enhances flexibility and adaptability, and meets the testing needs in different scenarios.

[0224] In an optional embodiment of the present specification, the main control device 110 is further used to generate a visual chart of the performance test results.

[0225] The visualization chart is a graphical representation of the performance test results generated by the main control device 110 in the chip test system 100, and is used to intuitively display the performance test results. The visualization chart converts complex test data into a form that is easy to understand and analyze through charts and colors. Visualization charts include line charts, bar charts, pie charts, scatter plots, heat maps, etc.

[0226] In the embodiments of this specification, a visual chart is used to show the readability of the performance test results, thereby improving the user experience of the chip testing system.

[0227] In an optional embodiment of this specification, Fig.13 The sixth structural diagram of a chip testing system provided by an embodiment of this specification is shown:

[0228] The chip testing system includes: a host computer, a DC power supply, a board-level measurement circuit, a measurement circuit board and auxiliary testing equipment.

[0229] The host computer is connected to the DC power supply, the measurement circuit board and the robot arm control device through the switch-network port to send instructions.

[0230] The chip to be tested and the power management chip are installed on the measurement circuit board. There are multiple power input paths between the power management chip and the multiple functional units of the chip to be tested. A corresponding measurement resistor is electrically connected to any power input path. The board-level measurement circuit collects power consumption parameters at both ends of each measurement circuit.

[0231] The power management chip and the DC power supply are electrically connected via the power port.

[0232] The chip to be tested is connected to the corresponding auxiliary test equipment through multiple interfaces on the measurement circuit board: the chip to be tested is connected to the camera through the CSI port, the chip to be tested is connected to WIFI, BT, and 4G through the SDIO port, the chip to be tested is connected to the TV through the HDMI port, and the chip to be tested is connected to the touch display through the I2C port and DSI port.

[0233] The robot arm control device controls the robot arm to simulate a click operation on the touch display screen.

[0234] See also Fig.14 , Fig.14 A schematic diagram of the structure of another chip testing system provided by an embodiment of the present specification is shown, wherein the chip testing system 1400 includes a main control device 1410 and a measuring circuit board 1420, wherein the measuring circuit board 1420 includes a RISC-V instruction set chip 14210, wherein the RISC-V instruction set chip 14210 includes a RISC-V compilation unit 14212 and a RISC-V processing unit 14214, and a measuring resistor is electrically connected to a power input path of the RISC-V instruction set chip 14210;

[0235] The main control device 1410 is used to send a performance test instruction to the measurement circuit board 1420, wherein the performance test instruction is used to run the chip to perform multiple test tasks according to a specific timing;

[0236] RISC-V compiling unit 14212, used for receiving performance test instructions and compiling the performance test instructions into a performance test instruction stream;

[0237] RISC-V processing unit 14214, for executing a plurality of test tasks in response to a performance test instruction stream;

[0238] The measuring circuit board 1420 is used to collect the working parameters of the RISC-V instruction set chip 14210 under multiple test tasks, and to measure the power consumption parameters of both ends of the resistor under multiple test tasks;

[0239] The main control device 1410 is also used to obtain the working parameters and power consumption parameters under multiple test tasks collected by the measurement circuit board 1420, and determine the performance test results of the RISC-V instruction set chip 14210 based on the working parameters and power consumption parameters under multiple test tasks.

[0240] The RISC-V compilation unit 14212 is a component of the RISC-V instruction set chip 14210, and is responsible for converting performance test instructions in the form of high-level language or intermediate language into a performance test instruction stream that can be directly executed by the processor. The role of the RISC-V compilation unit 14212 is to convert human-readable instructions into machine code so that the RISC-V processing unit 14214 can perform corresponding operations.

[0241] The RISC-V processing unit 14214 is another component of the RISC-V instruction set chip 14210, which directly executes the performance test instruction stream compiled by the RISC-V compilation unit 14212. The RISC-V processing unit 14214 is responsible for processing actual data and executing instructions, such as arithmetic and logical operations, data transmission, and control transfer.

[0242] The RISC-V compilation unit 14212 and the RISC-V processing unit 14214 are connected via a bus interface. The machine code compiled by the RISC-V compilation unit 14212 is transmitted to the RISC-V processing unit 14214 via the bus interface. The RISC-V processing unit 14214 reads and executes these instructions via the bus, thereby achieving efficient instruction transmission and execution. Specifically, this method ensures seamless connection from compilation to execution, and improves the efficiency and performance of audio processing.

[0243] The above is a schematic scheme of a chip test system 1400 applied to a RISC-V instruction set chip in this embodiment. It should be noted that the technical scheme of the chip test system 1400 is similar to the above Figure 1 - Fig.13 The technical solutions of the chip test system 100 provided in the embodiment of the specification belong to the same concept. For details not described in detail in the technical solution of the chip test system 1400 in the embodiment of the specification, please refer to the above Figure 1 - Fig.13 The embodiment of the specification provides a description of the technical solution of the chip testing system 100.

[0244] In the embodiment of this specification, the main control device automatically sends the performance test instruction to ensure that each test can be carried out under the same conditions, avoiding the problem of inconsistent test results caused by differences in human operation. In addition, multiple test tasks are executed according to the preset specific timing, which further ensures the consistency of the test process and the reliability of the performance test results. The measurement circuit board is directly integrated into the system, and the working parameters and power consumption parameters of the RISC-V instruction set chip can be collected in real time and accurately. Secondly, in terms of power consumption measurement, by electrically connecting the measurement resistor to the power input path of the RISC-V instruction set chip, the actual power consumption of the RISC-V instruction set chip can be more accurately monitored, reducing the impact of external environmental factors on the test results. In addition, the automated chip testing system greatly reduces the dependence on human resources, reduces the testing cost, and improves the testing efficiency.

[0245] See also Fig.15 , Fig.15 A flow chart of a chip testing method provided by an embodiment of the present specification is shown, and the method is applied to a chip testing system, wherein the chip testing system includes a main control device and a measuring circuit, the measuring circuit board includes a chip to be tested, and a measuring resistor is electrically connected to a power input path of the chip to be tested, and the method includes the following specific steps:

[0246] Step 1502: In response to the performance test instruction, run the chip to be tested to perform multiple test tasks, wherein the performance test instruction is used to run the chip to perform multiple test tasks according to a specific timing.

[0247] Step 1504: Collecting the operating parameters of the chip to be tested under multiple test tasks, and measuring the power consumption parameters of both ends of the resistor under multiple test tasks.

[0248] Step 1506: Acquire the operating parameters and power consumption parameters under multiple test tasks collected by the measurement circuit board, and determine the performance test result of the chip to be tested based on the operating parameters and power consumption parameters under the multiple test tasks.

[0249] The above is a schematic scheme of a chip testing method of this embodiment. It should be noted that the technical scheme of the chip testing method and the technical scheme of the above chip testing system belong to the same concept, and the details not described in detail in the technical scheme of the chip testing method can be referred to the description of the technical scheme of the above chip testing system.

[0250] In the embodiments of this specification, on the chip test system, the chip to be tested is automatically run to perform multiple test tasks in response to the performance test instructions, ensuring that each test can be performed under the same conditions, avoiding the problem of inconsistent test results caused by differences in human operations. In addition, multiple test tasks are executed according to a preset specific timing, further ensuring the consistency of the test process, ensuring the reliability of the performance test results, and collecting the working parameters and power consumption parameters of the chip to be tested in real time and accurately. Secondly, in terms of power consumption measurement, by electrically connecting the measuring resistor to the power input path of the chip to be tested, the actual power consumption of the chip can be more accurately monitored, reducing the impact of external environmental factors on the test results. In addition, the automated chip testing method greatly reduces the dependence on human resources, reduces testing costs, and improves testing efficiency.

[0251] See also Fig.16 , Fig.16 A flow chart of another chip testing method provided by an embodiment of the present specification is shown, and the method is applied to a main control device of a chip testing system, wherein the chip testing system further includes a measuring circuit, the measuring circuit board includes a chip to be tested, and a measuring resistor is electrically connected to a power input path of the chip to be tested, and the method includes the following specific steps:

[0252] Step 1602: Send a performance test instruction to a measurement circuit board, wherein the performance test instruction is used to run the chip to perform multiple test tasks according to a specific timing.

[0253] Step 1604: Obtain the operating parameters and power consumption parameters under multiple test tasks collected by the measurement circuit board, and determine the performance test results of the chip to be tested based on the operating parameters and power consumption parameters under the multiple test tasks, wherein the step of measuring the operating parameters and power consumption parameters under multiple test tasks collected by the measurement circuit board includes: responding to performance test instructions, running the chip to be tested to perform multiple test tasks, collecting the operating parameters of the chip to be tested under multiple test tasks, and measuring the power consumption parameters at both ends of the resistor under multiple test tasks.

[0254] The above is a schematic scheme of a chip testing method of this embodiment. It should be noted that the technical scheme of the chip testing method and the technical scheme of the above chip testing system belong to the same concept, and the details not described in detail in the technical scheme of the chip testing method can be referred to the description of the technical scheme of the above chip testing system.

[0255] In the embodiment of this specification, on the main control device, the performance test instruction is automatically sent to the measurement circuit board to automatically run the chip to be tested to perform multiple test tasks, ensuring that each test can be performed under the same conditions, avoiding the problem of inconsistent test results caused by differences in human operations. In addition, multiple test tasks are executed according to a preset specific timing, further ensuring the consistency of the test process, ensuring the reliability of the performance test results, and collecting the working parameters and power consumption parameters of the chip to be tested in real time and accurately. Secondly, in terms of power consumption measurement, by electrically connecting the measurement resistor to the power input path of the chip to be tested, the actual power consumption of the chip can be more accurately monitored, reducing the impact of external environmental factors on the test results. In addition, the automated chip testing method greatly reduces the dependence on human resources, reduces testing costs, and improves testing efficiency.

[0256] Fig.17 The structure block diagram of a main control device provided by an embodiment of the present specification is shown. The components of the main control device 1700 include but are not limited to a memory 1710 and a processor 1720. The processor 1720 is connected to the memory 1710 via a bus 1730, and the database 1750 is used to store data.

[0257] The master device 1700 also includes an access device 1740, which enables the master device 1700 to communicate via one or more networks 1760. Examples of these networks include a public switched telephone network (PSTN), a local area network (LAN), a wide area network (WAN), a personal area network (PAN), or a combination of communication networks such as the Internet. The access device 1740 may include one or more of any type of network interface (e.g., a network interface card (NIC)) of wired or wireless, such as an IEEE 802.11 wireless local area network (WLAN) wireless interface, a Worldwide Interoperability for Microwave Access (Wi-MAX) interface, an Ethernet interface, a Universal Serial Bus (USB) interface, a cellular network interface, a Bluetooth interface, and a Near Field Communication (NFC).

[0258] In one embodiment of the present specification, the above components of the main control device 1700 and Fig.17 Other components not shown in the figure may also be connected to each other, for example, via a bus. It should be understood that Fig.17 The main control device structure block diagram shown is only for the purpose of illustration, and is not intended to limit the scope of this specification. Those skilled in the art can add or replace other components as needed.

[0259] The main control device 1700 may be any type of stationary or mobile computing device, including a mobile computer or mobile computing device (e.g., a tablet computer, a personal digital assistant, a laptop computer, a notebook computer, a netbook, etc.), a mobile phone (e.g., a smart phone), a wearable computing device (e.g., a smart watch, smart glasses, etc.), or other types of mobile devices, or a stationary computing device such as a desktop computer or a personal computer (PC). The main control device 1700 may also be a mobile or stationary server.

[0260] The processor 1720 is used to execute the following computer program / instructions, which implement the steps of the above chip testing method when executed by the processor.

[0261] The above is a schematic scheme of a master control device of this embodiment. It should be noted that the technical scheme of the master control device and the technical scheme of the above chip test system belong to the same concept, and the details of the technical scheme of the master control device that are not described in detail can be found in the description of the technical scheme of the above chip test system.

[0262] An embodiment of the present specification also provides a computer-readable storage medium storing a computer program / instruction, which implements the content of the above-mentioned chip testing system when executed by a processor.

[0263] The above is a schematic scheme of a computer-readable storage medium of this embodiment. It should be noted that the technical scheme of the storage medium and the technical scheme of the chip test system described above are of the same concept, and the details not described in detail in the technical scheme of the storage medium can be found in the description of the technical scheme of the chip test system described above.

[0264] An embodiment of the present specification also provides a computer program product, including a computer program / instruction, which implements the content of the above-mentioned chip testing system when executed by a processor.

[0265] The above is a schematic scheme of a computer program product of this embodiment. It should be noted that the technical scheme of the computer program product and the technical scheme of the chip test system described above are of the same concept, and the details not described in detail in the technical scheme of the computer program product can be found in the description of the technical scheme of the chip test system described above.

[0266] The above is a description of a specific embodiment of the specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0267] The computer instructions include computer program codes, which may be in source code form, object code form, executable files or some intermediate forms, etc. The computer readable medium may include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal and software distribution medium, etc. It should be noted that the contents contained in the computer readable medium may be appropriately increased or decreased according to the requirements of patent practice. For example, in some regions, according to patent practice, computer readable media do not include electric carrier signals and telecommunication signals.

[0268] It should be noted that, for the above-mentioned method embodiments, for the sake of simplicity of description, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the embodiments of this specification are not limited by the order of the actions described, because according to the embodiments of this specification, some steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the embodiments of this specification.

[0269] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0270] The preferred embodiments of this specification disclosed above are only used to help explain this specification. The optional embodiments do not describe all the details in detail, nor do they limit the invention to only the specific implementation methods described. Obviously, many modifications and changes can be made according to the content of the embodiments of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the embodiments of this specification, so that technicians in the relevant technical field can well understand and use this specification. This specification is only limited by the claims and their full scope and equivalents.

Claims

1. A chip testing system, comprising a main control device and a measuring circuit board, wherein the measuring circuit board comprises a chip to be tested, and a measuring resistor is electrically connected to a power input path of the chip to be tested; The main control device is used to send a performance test instruction to the measurement circuit board, wherein: The performance test instructions are used to run the chip to perform multiple test tasks according to a specific timing; The measuring circuit board is used to respond to the performance test instruction, run the chip to be tested to perform the multiple test tasks, and collect the working parameters of the chip to be tested under the multiple test tasks, and the power consumption parameters of both ends of the measuring resistor under the multiple test tasks; The main control device is also used to obtain the working parameters and power consumption parameters under the multiple test tasks collected by the measurement circuit board, and determine the performance test results of the chip to be tested based on the working parameters and power consumption parameters under the multiple test tasks.

2. The system according to claim 1 further includes a DC power supply, which is electrically connected to the measurement circuit board. The measurement circuit board also includes a power management chip, which is electrically connected to the DC power supply. A measurement resistor is electrically connected to the power input path between the power management chip and the chip to be tested. 3 . The system according to claim 2 , wherein the power management chip is electrically connected to the DC power supply via a DC converter. 4 . The system according to claim 1 , wherein the chip to be tested comprises a plurality of functional units, a plurality of power input paths are provided between the power management chip and the plurality of functional units, and a corresponding measuring resistor is electrically connected to any power input path.

5. The system according to claim 4, wherein the plurality of functional units include any one of the first functional units, and a first measuring resistor is electrically connected to the power input path between the power management chip and the first functional unit; The main control device is also used to obtain the working parameters of the first functional unit collected by the measurement circuit board under the multiple test tasks, and the power consumption parameters of both ends of the first measurement resistor under the multiple test tasks, calculate the correlation between the working parameters and the power consumption parameters under the multiple test tasks, and determine the performance test results of the chip to be tested based on the correlation.

6. The system according to claim 4, wherein the plurality of functional units include at least two second functional units, and a first measuring resistor is electrically connected to a power input path between the power management chip and the second functional units; The main control device is also used to obtain the working parameters of the second functional unit under the multiple test tasks and the power consumption parameters of the two ends of the second measurement resistor under the multiple test tasks collected by the measurement circuit board, calculate the actual power consumption parameters of the two ends of the second measurement resistor under the multiple test tasks based on the working parameters under the multiple test tasks and the preset power consumption parameters of the preset functional unit, compare the actual power consumption parameters with the collected power consumption parameters, and determine the performance test results of the chip to be tested.

7. The system according to claim 1, wherein the measuring resistor comprises a first measuring resistor and a second measuring resistor, the first measuring resistor has a resistance greater than that of the second measuring resistor, the first measuring resistor and the second measuring resistor are connected in series, and the first measuring resistor is connected in parallel with the switch element.

8. The system according to claim 1-7, further comprising at least one auxiliary test device, wherein the at least one auxiliary test device is electrically connected to the measurement circuit board through a corresponding interface; The measuring circuit board is specifically used to send a first control instruction corresponding to a first test task to the at least one auxiliary test device in response to the performance test instruction, wherein: The first test task is any one of the multiple test tasks; The at least one auxiliary test device is used to execute the first test task in response to the first control instruction.

9. The system of claim 8, wherein the at least one auxiliary testing device comprises a robotic arm and a touch display screen; The main control device is further used to send motion control instructions to the robotic arm, and send touch display test instructions to the measurement circuit board; The mechanical arm is used to perform a corresponding touch operation on the touch display screen in response to the motion control instruction; The touch display screen is used to send a touch feedback signal to the measuring circuit board in response to the touch operation; The measuring circuit board is used for responding to the touch display test instruction, running the chip to be tested to perform the corresponding touch display test task based on the touch feedback signal, obtaining a first task result, and sending a first control instruction corresponding to the first task result to the touch display screen; The touch display screen is further used to display the first task result in response to the first control instruction.

10. According to the system of claim 1, the main control device is further used to generate a visual chart of the performance test results.

11. A chip testing system, comprising a main control device and a measuring circuit board, wherein the measuring circuit board comprises a RISC-V instruction set chip, wherein the RISC-V instruction set chip comprises a RISC-V compilation unit and a RISC-V processing unit, and a measuring resistor is electrically connected to a power input path of the RISC-V instruction set chip; The main control device is used to send a performance test instruction to the measurement circuit board, wherein: The performance test instructions are used to run the chip to perform multiple test tasks according to a specific timing; The RISC-V compiling unit is used to receive the performance test instruction and compile the performance test instruction into a performance test instruction stream; The RISC-V processing unit is used to execute the multiple test tasks in response to the performance test instruction stream; The measuring circuit board is used to collect the working parameters of the RISC-V instruction set chip under the multiple test tasks, and the power consumption parameters of both ends of the measuring resistor under the multiple test tasks; The main control device is also used to obtain the working parameters and power consumption parameters under the multiple test tasks collected by the measurement circuit board, and determine the performance test results of the RISC-V instruction set chip based on the working parameters and power consumption parameters under the multiple test tasks.

12. A chip testing method, applied to a chip testing system, wherein: The chip testing system includes a main control device and a measuring circuit, the measuring circuit board includes a chip to be tested, and a measuring resistor is electrically connected to a power input path of the chip to be tested, including: In response to the performance test instruction, the chip to be tested is operated to execute a plurality of test tasks, wherein the performance test instruction is used to operate the chip to execute the plurality of test tasks according to a specific timing sequence; Collecting the working parameters of the chip to be tested under the multiple test tasks and the power consumption parameters of both ends of the measuring resistor under the multiple test tasks; The operating parameters and power consumption parameters under the multiple test tasks collected by the measurement circuit board are obtained, and the performance test results of the chip to be tested are determined based on the operating parameters and power consumption parameters under the multiple test tasks.

13. A chip testing method, applied to a main control device of a chip testing system, wherein: The chip testing system further includes a measuring circuit, the measuring circuit board includes a chip to be tested, and a measuring resistor is electrically connected to a power input path of the chip to be tested, including: Sending a performance test instruction to the measurement circuit board, wherein the performance test instruction is used to run the chip to perform multiple test tasks according to a specific timing; Obtaining the operating parameters and power consumption parameters under the multiple test tasks collected by the measurement circuit board, and determining the performance test result of the chip to be tested based on the operating parameters and power consumption parameters under the multiple test tasks, wherein the step of the measurement circuit board collecting the operating parameters and power consumption parameters under the multiple test tasks includes: In response to the performance test instruction, the chip to be tested is run to execute the multiple test tasks, and the working parameters of the chip to be tested under the multiple test tasks and the power consumption parameters of both ends of the measurement resistor under the multiple test tasks are collected.

Images