Surface passivation treatment method for optimizing tunneling oxidation passivation cell

Abstract

The invention provides a surface passivation treatment method for optimizing a tunneling oxidation passivation battery, which comprises the following steps of: in a BOE cleaning step, putting an annealed silicon wafer into a mixed solution of groove type cleaning equipment, cleaning the silicon wafer in the mixed solution for more than 120 seconds, taking out the silicon wafer, cleaning the silicon wafer with sufficient DIW, putting the silicon wafer into an acid solution, and cleaning the silicon wafer in the acid solution for more than 120 seconds; the silicon wafer is taken out and completely cleaned with a large amount of DIW, bubbling is carried out in the cleaning process, and finally, the surface of the silicon wafer is passivated with a (NH4) 2S solution; and dividing the antireflection film into three layers for preparation in the antireflection film manufacturing step. According to the invention, the P-type emitter of the battery is passivated by sulfur, and aluminum oxide is assisted to accumulate negative charges to enhance the field passivation effect; a dangling bond is passivated on the surface of the silicon, and reduction of a process window caused by hydrogen passivation accumulation [H] sources in the preparation process of the silicon nitride is liberated; and performance degradation caused by dissipation of [H] in long-term use of the battery assembly is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of TOPCon battery production, and specifically, it shows a surface passivation treatment method for optimizing a tunneling oxidation passivation battery. Background Art

[0002] At present, after years of development of solar cells, taking into account the efficiency and manufacturing cost of the cells, TOPCon (Tunnel Oxide Passivated Contact Solar Cell) has been increasing its market share year by year due to its excellent surface passivation, high conversion efficiency and relatively low cost. At present, TOPCon cells are undoubtedly the mainstream in the market. TOPCon technology is mainly a method of preparing an ultra-thin tunnel oxide layer (SiOx) on the back of the cell and growing a heavily doped polysilicon layer (Poly-Si) on its surface, which together form a passivation contact structure. The non-conductive but extremely thin tunnel oxide layer allows high-concentration majority carriers (majority carriers) to pass through in the form of quantum tunneling, but it will block minority carriers; heavily doped Poly can change the energy band position of silicon, turning it into a P-type / N-type semiconductor, blocking electrons / holes from approaching. Therefore, TOPCon cells have high passivation ability and conversion efficiency, which also makes TOPCon cells the first choice for large-scale mass production.

[0003] However, the light absorption of the poly layer is parasitic light absorption and does not contribute to the photocurrent (Isc). Currently, TOPCon cells are only prepared on the back surface. If this structure is prepared on the front side as the light-absorbing surface, the parasitic light absorption of the poly layer will cause a significant reduction in Isc, which in turn reduces the efficiency of the cell. The surface state density of the silicon crystal surface can be reduced by depositing or growing a passivation layer on the cell surface, thereby reducing the surface recombination rate. Therefore, the current n-TOPCon cell does not have a TOPCon structure on the front side, but instead chooses a passivation structure of p+ emitter / aluminum oxide / silicon nitride.

[0004] At present, an aluminum oxide film is prepared on the front of the n-TOPCon cell as a passivation layer. Since the front surface of the general n-type cell is generally the positive electrode (P-type emitter), aluminum oxide has a large amount (1.3-2.0×10 13 cm -2 ) Fixed negative charge can produce a strong field passivation effect and passivate the P-type emitter. Therefore, the atomic layer deposited aluminum oxide film has a good passivation effect on the passivated P-type emitter.

[0005] However, there are a large number of silicon dangling bonds between the p+ emitter and alumina that are not passivated (such as Figure 1As shown in the figure, the current method is to add single substance [H] in the subsequent silicon nitride preparation, and activate single substance [H] during the sintering process. Single substance [H] has only one covalent bond, so it can combine with the dangling bonds on the silicon surface to passivate the interface.

[0006] The hydrogen-passivated single substance [H] comes from the reaction gases ammonia and silane during the preparation of silicon nitride, and is transported to the p+ emitter / aluminum oxide interface to complete the passivation through the thermal power during the sintering of the metal electrode. The transport of [H] is achieved due to the concentration gradient difference, but in the system of interface / [H]-containing layer / external environment, the external [H] content is obviously the lowest, and a large amount of [H] escapes to the outside world. Therefore, in order to ensure the hydrogen passivation effect, more [H] needs to be stored in the silicon nitride film layer, but this will affect the performance of the silicon nitride film layer, and during the long-term use of the battery after it is prepared as a component, because the volume of [H] is too small relative to the silicon atom, it is easy to break away from the interface constraints under the action of external energy and continue to escape over time.

[0007] Although the [H] stored in the silicon nitride film layer can serve as a supplement to a certain extent, overall, the [H] content is constantly decreasing, causing the battery efficiency and component power to continue to decline. Summary of the invention

[0008] The purpose of the present invention is to provide a surface passivation treatment method for optimizing tunneling oxidation passivation cells in view of the deficiencies of the prior art, wherein sulfur is used to passivate the interface before the aluminum oxide film is prepared.

[0009] Based on this, the present invention discloses a surface passivation treatment method for optimizing tunneling oxidation passivation cells. At present, the preparation method of tunneling oxidation passivation cells mainly includes the following steps: cleaning and texturing, boron diffusion, removal of glass layer and winding plating, alkali polishing, preparation of TOPCon structure on the back, annealing, BOE cleaning, front aluminum oxide passivation, anti-reflection film preparation, screen printing, wherein the main optimization direction is:

[0010] In the BOE cleaning step: first, the annealed silicon wafer is placed in a mixed solution of a tank cleaning device, wherein the mixed solution is NaOH, H2O2, and DIW in a volume ratio of 1:8:120, and the silicon wafer is cleaned in the mixed solution for more than 120 seconds, and the silicon wafer is taken out and cleaned with a sufficient amount of DIW, and then the silicon wafer is placed in an acid solution, wherein the acid solution is HF, HCl, and DIW in a volume ratio of 3:1:12, and the silicon wafer is taken out and completely cleaned with a large amount of DIW, and bubbling is performed during the cleaning, and finally the surface of the silicon wafer is passivated with a (NH4)2S solution;

[0011] In the anti-reflection film production steps: the anti-reflection film is prepared in three layers, the first anti-reflection film has a thickness of 15 to 20 nm, and the temperature during preparation does not exceed 240°C; the second anti-reflection film has a thickness of 15 to 20 nm, and the temperature during preparation does not exceed 350°C; the third anti-reflection film has a thickness of 40 to 50 nm, and the temperature during preparation is 480 to 500°C.

[0012] Preferably, when passivating the surface of the silicon wafer, the temperature of the (NH4)2S solution is 25-30° C. Since (NH4)2S is easily soluble in cold water but easily decomposes in hot water, the temperature of the (NH4)2S solution needs to be controlled to be close to room temperature.

[0013] Preferably, the concentration of the (NH4)2S solution is 18-20 wt %. Since the (NH4)2S aqueous solution is alkaline, there is a risk of corroding the pyramid velvet structure when its concentration is too high, so the concentration of the (NH4)2S solution needs to be controlled not to be too high.

[0014] Preferably, when passivating the silicon wafer surface, the cleaning time of the (NH4)2S solution is 250 to 300 seconds. Since sulfur passivation is a supplement to hydrogen passivation and AlO passivation, it does not require complete passivation, and since the (NH4)2S aqueous solution will corrode the silicon substrate, the passivation cleaning time should not be too long.

[0015] Preferably, after the silicon wafer is completely cleaned with a large amount of DIW, the surface of the silicon wafer is dried with nitrogen at 50° C. This is to prevent the sulfur passivation structure from being destroyed and the surface of the silicon wafer from being oxidized.

[0016] Preferably, when the silicon wafer is cleaned in the mixed solution, the temperature of the mixed solution is 45° C. The temperature should be appropriate mainly to clean organic impurities on the surface of the silicon wafer.

[0017] Compared with the prior art, the beneficial effects of the present invention are: using sulfur to passivate the P-type emitter of the battery to assist aluminum oxide in accumulating negative charges to enhance the field passivation effect; passivating the dangling bonds on the silicon surface to liberate the process window reduction caused by the accumulation of [H] sources for hydrogen passivation during the preparation of silicon nitride; and reducing the performance degradation caused by the escape of [H] during long-term use of battery components. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a schematic diagram showing that a large number of silicon dangling bonds between p+ emitter / aluminum oxide are not passivated;

[0019] Figure 2 is a schematic diagram showing the passivation of a covalent bond of a hydrogen atom to a silicon dangling bond;

[0020] Figure 3 is a schematic diagram showing the passivation of two covalent bonds of a sulfur atom connected to two silicon dangling bonds;

[0021] Figure 4 is a PL diagram showing the Base line (BL) sample of the conventional process;

[0022] Figure 5 PL diagram of a sample prepared according to an embodiment of the present invention;

[0023] Figure 6 It is a data chart showing the comparison of battery efficiency between the process of the embodiment of the present invention and the conventional process Base line. DETAILED DESCRIPTION

[0024] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making a clearer and more definite definition of the protection scope of the present invention.

[0025] The present invention proposes a surface passivation treatment method for optimizing a tunneling oxidation passivation battery, which mainly utilizes sulfur element to passivate the interface before preparing an aluminum oxide film layer.

[0026] The unit cell of single crystal silicon is mainly composed of a set of face-centered cubic lattices formed by the atoms at the top corners and face centers of the cube, and another set of face-centered cubic lattices formed by the atoms on the diagonal of the body. Therefore, it can be considered that the silicon crystal is composed of two sets of face-centered cubic lattices shifted by a quarter of the length along the diagonal of the body. This unit cell is called a diamond-type cubic unit cell. Each silicon atom has 4 covalent bonds, that is, each silicon atom needs to be connected to four atoms to avoid dangling bonds. The two-dimensional planar structure of single crystal silicon can be represented by Figure 1 Simple identification, in the body region, silicon atoms are closely connected, there are no dangling bonds, there are dangling bonds at the interface, [H] has a covalent bond to connect to the silicon dangling bond to passivate (such as Figure 2 As shown), the sulfur atom has two covalent bonds that can connect to two silicon dangling bonds for passivation (as shown Figure 3 shown).

[0027] Moreover, the sulfur atom is element 16 in group VII, which has strong oxidizing properties. The sulfurized surface helps the aluminum oxide passivation layer accumulate negative charges, which can better passivate the P-type emitter and improve battery efficiency.

[0028] Example:

[0029] A surface passivation treatment method for optimizing tunneling oxidation passivation cells comprises the following preparation steps:

[0030] (1) Cleaning and texturing: Select n-Type c-Si silicon wafers and perform texturing treatment to remove the surface cutting damage layer and form a textured velvet structure on the surface to reduce light loss.

[0031] Specifically, the silicon wafer is placed in a NaOH alkaline solution, the temperature of the NaOH solution is preferably set to about 65° C., the volume ratio of NaOH to DIW is 1:150, and after texturing, the silicon wafer is cleaned with DIW, dried and taken out.

[0032] (2) Boron diffusion: After texturing and cleaning, the silicon wafer is placed in a boron diffusion tube for boron diffusion. The diffusion is divided into four steps: pre-oxidation, deposition, advancement, and post-oxidation. Compared with traditional processes, it reduces process time and diffusion concentration.

[0033] Specifically, the deposition time is 90-120s, the advancement time is 350-400s, and the square resistance of the silicon wafer after the diffusion is completed is about 150Ω / □.

[0034] (3) Removal of glass layer and wrapping: Use chain-type single-sided HF equipment to remove the back BSG, and the volume ratio of HF and DIW in the machine is 1:10.

[0035] (4) Alkali polishing: Place the silicon wafer in an alkaline polishing tank. After alkaline polishing, use HCl+HF solution to clean the surface of the silicon wafer.

[0036] (5) Preparation of TOPCon structure on the back: The TOPCon structure is prepared on the back surface based on PVD / PECVD / LPCVD technology. First, an ultra-thin tunneling oxide layer is prepared, and then a doped amorphous silicon layer is prepared.

[0037] (6) Annealing: high temperature annealing is performed at 850°C for 2000s to activate the doped atoms.

[0038] (7) BOE cleaning: First, place the annealed silicon wafer in a mixed solution of a tank cleaning device. The mixed solution is NaOH, H2O2, and DIW in a volume ratio of 1:8:120. The temperature of the mixed solution is set to 45°C. The silicon wafer is cleaned in the mixed solution for more than 120 seconds. This is to clean the organic impurities on the surface of the silicon wafer. The silicon wafer is taken out and cleaned with a sufficient amount of DIW. Then, the silicon wafer is placed in an acid solution. The acid solution is HF, HCl, and DIW in a volume ratio of 3:1:12 to remove the oxide on the surface of the silicon wafer and reduce the metal ion residue by complexation. Since SiO reacts with HF to generate fluorosilicic acid H2SiF6, H2SiF6 and hydrolysis products will adhere to the surface of the silicon wafer. In order to prevent the subsequent sulfur passivation step from being interfered with, the taken out silicon wafer will be completely cleaned with a large amount of DIW, and bubbling will be performed during the cleaning. After complete cleaning, the surface of the silicon wafer is finally passivated with (NH4)2S solution.

[0039] Since (NH4)2S is easily soluble in cold water but easily decomposes in hot water, the temperature of the (NH4)2S solution needs to be controlled close to room temperature. Preferably, the temperature of the (NH4)2S solution is 25-30°C.

[0040] Since the (NH4)2S aqueous solution is alkaline, there is a risk of corroding the pyramid velvet structure when its concentration is too high. Therefore, the concentration of the (NH4)2S solution needs to be controlled not to be too high. Preferably, the concentration of the (NH4)2S solution is 18-20wt%.

[0041] Since sulfur passivation is a supplement to hydrogen passivation and AlO passivation, it does not need to be completely passivated, and since the (NH4)2S aqueous solution will corrode the silicon substrate, the passivation cleaning time should not be too long. Preferably, the cleaning time of the (NH4)2S solution is 250 to 300 seconds.

[0042] In order to prevent the sulfur passivation structure from being destroyed and to prevent the silicon wafer surface from being oxidized, after the silicon wafer is completely cleaned with a large amount of DIW, the surface of the silicon wafer is dried with nitrogen at 50°C.

[0043] (8) Front aluminum oxide passivation: Aluminum oxide passivation layer is prepared on the front surface of silicon wafer using atomic layer deposition (ALD).

[0044] (9) Anti-reflection film preparation: Silicon nitride (SiNx) anti-reflection film is prepared on the front and back sides of silicon wafers based on plasma enhanced chemical deposition (PECVD) to reduce light reflection.

[0045] Since the Si-S-Si bond after sulfur passivation is easily destroyed by high temperature, the aluminum oxide passivation layer deposited by ALD is only a few nanometers thick and cannot provide sufficient protection. Therefore, the manufacturing stage of the SiNx anti-reflection film is divided into multiple steps. In the initial stages such as leak detection and purging, the temperature should not exceed 200°C.

[0046] Specifically, the anti-reflection film is prepared in three layers. The thickness of the first anti-reflection film is 15 to 20 nm, and the temperature during preparation does not exceed 240°C. The thickness of the second anti-reflection film is 15 to 20 nm, and the temperature during preparation does not exceed 350°C. The thickness of the third anti-reflection film is 40 to 50 nm, and the temperature during preparation is 480 to 500°C.

[0047] In addition, the sulfur atom is the 16th element in group VII. Compared with the atomic size and unit cell structure of silicon, the 14th element in group IV, the sulfur element is larger. Coupled with the aluminum oxide passivation layer deposited by ALD and the SiNx anti-reflection layer covered by the temperature zone, the S element is wrapped on the surface of the silicon cell and cannot dissipate. In the subsequent preparation, even if the Si-S-Si bond is broken, the S element is still retained and recombine with the surface Si element to form a Si-S-Si bond after the temperature is lowered.

[0048] (10) Screen printing: Use screen printing equipment to apply metal slurry on the front and back of the battery, and then process it at high temperature in a sintering furnace to prepare metal grid lines, so that the metal material combines with silicon to form an alloy, and the photogenerated carriers are conducted out to complete the battery preparation.

[0049] The present invention optimizes the surface passivation step of the tunneling oxidation passivation battery, utilizes the sulfurized surface to help the aluminum oxide passivation layer accumulate negative charges, can better passivate the P-type emitter, and improves the battery efficiency.

[0050] After testing, the passivation ability of the sample battery prepared by the present invention is significantly improved, the Voc of the prepared battery is increased by about 1-2mV, and the final efficiency of the battery is increased by about 0.1% compared with the traditional TOPCon battery.

[0051] like Figure 4 , 5 As shown in Figure 6, the PL brightness of the sample treated by sulfur passivation of the present invention is increased by about 2.92% compared with the Base line (BL) sample of the traditional process, and the passivation performance is significantly improved.

[0052] The above are only some embodiments of the present invention. For those skilled in the art, several modifications and improvements can be made without departing from the creative concept of the present invention, which all belong to the protection scope of the present invention.

Claims

1. A surface passivation treatment method for optimizing tunneling oxidation passivation cells, the preparation method of tunneling oxidation passivation cells mainly includes the following steps: cleaning and texturing, boron diffusion, removal of glass layer and winding plating, alkali polishing, preparation of TOPCon structure on the back, annealing, BOE cleaning, front aluminum oxide passivation, anti-reflection film preparation, screen printing, characterized in that: In the BOE cleaning step: first, the annealed silicon wafer is placed in a mixed solution of a tank cleaning device, wherein the mixed solution is NaOH, H2O2, and DIW in a volume ratio of 1:8:120, and the silicon wafer is cleaned in the mixed solution for more than 120 seconds, and the silicon wafer is taken out and cleaned with a sufficient amount of DIW, and then the silicon wafer is placed in an acid solution, wherein the acid solution is HF, HCl, and DIW in a volume ratio of 3:1:12, and the silicon wafer is taken out and completely cleaned with a large amount of DIW, and bubbling is performed during the cleaning, and finally the surface of the silicon wafer is passivated with a (NH4)2S solution; In the anti-reflection film production steps: the anti-reflection film is prepared in three layers, the first anti-reflection film has a thickness of 15 to 20 nm, and the temperature during preparation does not exceed 240°C; the second anti-reflection film has a thickness of 15 to 20 nm, and the temperature during preparation does not exceed 350°C; the third anti-reflection film has a thickness of 40 to 50 nm, and the temperature during preparation is 480 to 500°C.

2. The surface passivation treatment method for optimizing tunneling oxidation passivation battery according to claim 1, characterized in that: When passivating the surface of the silicon wafer, the temperature of the (NH4)2S solution is 25-30°C.

3. The surface passivation treatment method for optimizing tunneling oxidation passivation battery according to claim 1, characterized in that: The concentration of the (NH4)2S solution is 18-20 wt%.

4. The surface passivation treatment method for optimizing tunneling oxidation passivation battery according to claim 1, characterized in that: When the surface of the silicon wafer is passivated, the cleaning time of the (NH4)2S solution is 250 to 300 seconds.

5. The surface passivation treatment method for optimizing tunneling oxidation passivation battery according to claim 1, characterized in that: After the silicon wafer is completely cleaned with a large amount of DIW, the surface of the silicon wafer is dried using nitrogen gas at 50°C.

6. The surface passivation treatment method for optimizing tunneling oxidation passivation battery according to claim 1, characterized in that: When the silicon wafer is cleaned in the mixed solution, the temperature of the mixed solution is 45°C.

Images