Method and system for judging quality of integrated chip packaging test data under abnormal distribution

Abstract

The invention discloses a method and a system for judging the quality of packaging test data of an integrated chip under abnormal distribution, belongs to the technical field of integrated chip detection, and solves the problem of how to judge the packaging quality of the integrated chip under the abnormal distribution. According to the test data distribution, different methods are selected to calculate the process capability index of the test data, and according to the data concentration degree and the process offset degree in the process capability index, the packaging quality grade of the integrated chip is judged; when the integrated chip packaging test data is in non-normal distribution, 1% significance level is used for filtering interference data with overlarge offset and a peak mean value is used for replacing a process mean value, so that a process capability index calculated by the integrated chip packaging test data under the non-normal distribution has higher anti-interference capability; and the reliability of judging the packaging quality of the integrated chip is higher.

Description

Technical Field

[0001] The invention belongs to the technical field of integrated chip detection, and relates to a method and system for judging the quality of integrated chip packaging test data under non-normal distribution. Background Art

[0002] With the rapid development of information technology, integrated circuits, as the core and foundation of the modern information technology industry, are facing unprecedented challenges and opportunities. However, the traditional integrated circuit technology route has encountered the bottlenecks of "power consumption wall", "storage wall" and "area wall", and it is difficult to cope with the growing computing needs. In order to break through these limitations, a new technical solution - core particle technology came into being. By integrating several core particles together, a high-performance, feature-rich integrated chip is formed to meet the diverse application needs. Integrated chip technology has opened up a new path for the development of my country's integrated circuit industry. Through independent research and development and the promotion of large-scale market demand, integrated chip technology not only effectively meets current needs, but also drives the progress of the entire industry chain.

[0003] Integrated chip technology can break through the current limitations of chip manufacturing area, promote the continuous improvement of chip integration and computing power, and break through the bottleneck of traditional packaging technology. By prefabricating and combining core particles, the chip design cycle can be reduced. Each core particle in the integrated chip can be manufactured separately through different processes to break through the limitations of a single process. As the integrated circuit process enters below 5nm, the size shrinkage is close to the physical limit, and it brings about a variety of problems such as reduced chip yield and wafer utilization. The slowdown of Moore's Law has become an important challenge for the development of integrated chips in my country and the world.

[0004] Existing integrated chips use a new design paradigm of "decomposition-combination-integration". "Decomposition" is to abstract a number of core prefabricated parts according to different characteristics, and "combination" is to combine the prefabricated parts into dedicated chips and systems as needed. After "integration" according to specific requirements, integrated chips are obtained. Integrated chip packaging test is the last test link after integrated chip packaging. Integrated chips that pass the test will be delivered to customers. Integrated chip packaging plays a vital role in the entire manufacturing process and the final test. Therefore, a method for studying the quality of integrated chip packaging is urgently needed.

[0005] With the rapid development of the modern economic system, product quality has become a key indicator for evaluating the competitiveness of enterprises. With the gradual development and evolution of product quality management methods, the performance of enterprises' products in the market has been significantly improved. The improvement of product quality has brought about a reduction in production costs and an increase in customer satisfaction and brand influence. The process capability index reflects whether the quality of products produced in the manufacturing process can be within the prescribed range, thereby meeting the quality standards required by customers. How to calculate the process capability index and use it to evaluate the quality of products is a problem that engineers have been solving. For example, the invention patent with application publication number CN118034221A discloses a quality control system for mixed-line production of multi-type microwave components, which calculates the product parameter data, process parameter data and equipment parameter data, obtains the process capability index CPK and transmits it to the process control system, and controls the product production status according to the evaluation result corresponding to the process capability index CPK. However, in the field of integrated chip testing, when judging the quality of integrated chip packaging, researchers only use experience to make judgments, and have not proposed relevant methods for systematically judging the packaging quality using integrated chip packaging test data. Especially when the test data is non-normally distributed, there is no suitable method to calculate the process capability index of the integrated chip packaging test data. Therefore, it is urgent to design a method for judging the quality of integrated chip packaging under non-normal distribution based on the process capability index. Summary of the invention

[0006] The technical problem to be solved by the present invention is how to judge the packaging quality of integrated chips under non-normal distribution.

[0007] The present invention solves the above technical problems through the following technical solutions:

[0008] The method for judging the quality of integrated chip packaging test data under non-normal distribution comprises the following steps:

[0009] Step 1, select integrated chip packaging test data;

[0010] Step 2: Use AD inspection to determine the distribution of integrated chip packaging test data;

[0011] Step 3, calculating the process capability index under the normal distribution of integrated chip packaging test data;

[0012] Step 4, calculating the process capability index under the non-normal distribution of integrated chip packaging test data;

[0013] Step 5: Use the data concentration level and the overall process deviation level to jointly determine the integrated chip packaging quality grade.

[0014] Furthermore, the step 1 is specifically as follows: obtaining corresponding test data obtained after the integrated chip packaging test, the test data type includes any type of test data such as voltage, current or time, and randomly taking a group of n data as a sample data set, where n≥50 and n is an integer.

[0015] Furthermore, the step 2 is specifically as follows: using AD test to determine whether the integrated chip packaging test data satisfies normal distribution, and providing the definition of AD normality test;

[0016] The AD test is used to determine whether the integrated chip packaging test data satisfies the normal distribution. Specifically, the test statistic and the critical value are calculated. If the test statistic is greater than the critical value, the original hypothesis is rejected, and it is considered that the sample data does not conform to the normal distribution, and step 4 is executed; if the test statistic is less than the critical value, the original hypothesis is not rejected, and it is considered that the sample data obeys the normal distribution, and step 3 is executed;

[0017] The AD normality test definition includes:

[0018] Null hypothesis H0: data follows a normal distribution;

[0019] Alternative hypothesis H1: The data follow a non-normal distribution.

[0020] Furthermore, the step 3 comprises the following steps:

[0021] Step 31, presetting the process specification upper limit USL and the process specification lower limit LSL;

[0022] Step 32, calculating the process standard deviation σ and process mean μ of the normal distribution sample data set of integrated chip packaging test data;

[0023] Step 33: Calculate the data concentration level. The data concentration level expression is as follows:

[0024]

[0025] In the formula, C p It represents the degree of data concentration, and d represents the distance between the upper and lower limits of the process specifications;

[0026] Step 34, calculate the overall deviation degree of the process, and execute step 5; the overall deviation degree of the process is as follows:

[0027]

[0028] In the formula, C pk Indicates the overall degree of deviation of the process.

[0029] Furthermore, step 4 includes the following steps:

[0030] Step 41, presetting the process specification upper limit USL and the process specification lower limit LSL;

[0031] Step 42: Calculate the data concentration level. The data concentration level expression is as follows:

[0032]

[0033] In the formula, C p Indicates the degree of data concentration, F 0.005 The horizontal axis value of 0.5% area of ​​the integrated chip package test data span, F 0.995 The horizontal axis value represents the 99.5% area of ​​the integrated chip package test data span;

[0034] Step 43: Obtain the peak value X in the line graph of the integrated chip packaging test data i and the number of data within the histogram boundary Y i , calculate the peak mean M m , the peak mean M m The expression is as follows:

[0035]

[0036] Step 44, calculate the overall deviation degree of the process, and execute step 5; the overall deviation degree of the process is as follows:

[0037]

[0038] In the formula, C pk Indicates the overall degree of deviation of the process.

[0039] Furthermore, the step 5 comprises the following steps:

[0040] Step 51: Set the data concentration level C p Grade, based on C p The value is used to grade the concentration of integrated chip package test data;

[0041] Step 52: Set the overall deviation degree C of the process pk Grade, based on C pk The size of the value is used to grade the overall deviation degree of the integrated chip packaging test data process;

[0042] Step 53: Set the integrated chip packaging quality grade, grade the integrated chip packaging quality according to the judgment criteria, and execute the corresponding processing principle on the graded integrated chip.

[0043] Furthermore, the step 51 is specifically as follows:

[0044] When C pWhen the value is greater than 2.0, the data concentration level is A;

[0045] When C p When the value is greater than 1.5 and less than 2.0, the data concentration level is B;

[0046] When C p When the value is greater than 1.33 and less than 1.5, the data concentration level is C;

[0047] When C p When the value is greater than 1.0 and less than 1.33, the data concentration level is D;

[0048] When C p When the value is less than 1.0, the data concentration level is E.

[0049] Furthermore, the step 52 is specifically as follows:

[0050] When C pk When the value is greater than 2.0, the overall deviation level of the process is A;

[0051] When C pk When the value is greater than 1.5 and less than 2.0, the overall deviation level of the process is Class B;

[0052] When C pk When the value is greater than 1.33 and less than 1.5, the overall deviation level of the process is C;

[0053] When C pk When the value is greater than 1.0 and less than 1.33, the overall deviation level of the process is D;

[0054] When C pk When the value is less than 1.0, the overall deviation level of the process is E.

[0055] Furthermore, the step 53 is specifically as follows:

[0056] When the data concentration level and the overall process deviation level are both level A, the integrated chip packaging quality level is level I, indicating that the integrated chip packaging quality is very good, but the process quality related to the data concentration level and the overall process deviation level can be reduced to reduce costs;

[0057] When either the data concentration level or the process overall deviation level is A and the other is B, the integrated chip packaging quality level is II, indicating that the integrated chip packaging quality is very good, and the process quality related to the data concentration level and the process overall deviation level can be appropriately reduced to reduce costs;

[0058] When either the data concentration level or the process overall deviation level is A and the other is C, the integrated chip packaging quality level is III, indicating that the integrated chip packaging quality is very good, and the process quality related to level A can be appropriately reduced to reduce costs;

[0059] When either the data concentration level or the process overall deviation level is B and the other is C, the integrated chip packaging quality level is IV, indicating that the integrated chip packaging quality is good and no improvement is needed;

[0060] When either the data concentration level or the process overall deviation level is A and the other is D, the integrated chip packaging quality level is V, indicating that the integrated chip packaging quality is acceptable and the cost can be reduced by appropriately reducing the process quality related to level A. At the same time, products with strict process requirements need to appropriately improve the process quality related to level D.

[0061] When either the data concentration level or the process overall deviation level is B and the other is D, the integrated chip packaging quality level is VI, indicating that the integrated chip packaging quality is acceptable, but if the product has strict process requirements, the process quality related to level D needs to be appropriately improved;

[0062] When either the data concentration level or the process overall deviation level is C and the other is D, the integrated chip packaging quality level is VII, indicating that the integrated chip packaging quality is acceptable, but if the product has strict process requirements, the overall process quality needs to be appropriately improved;

[0063] When either the data concentration level or the overall process deviation level is E, the integrated chip packaging quality level is VIII, indicating that the integrated chip packaging quality is poor and immediate process improvement is required.

[0064] An integrated chip packaging test data quality judgment system under non-normal distribution includes a data selection module, a data distribution module, a normal distribution module, a non-normal distribution module and a quality grading module;

[0065] The data selection module is used to select integrated chip packaging test data;

[0066] The data distribution module is used to use AD inspection to determine the distribution of integrated chip packaging test data;

[0067] The normal distribution module is used to calculate the process capability index under the normal distribution of integrated chip packaging test data;

[0068] The non-normal distribution module is used to calculate the process capability index under the non-normal distribution of integrated chip packaging test data;

[0069] The quality grading module is used to jointly determine the quality grading of integrated chip packaging by using the degree of data concentration and the degree of overall process deviation.

[0070] The advantages of the present invention are:

[0071] (1) The present invention determines the distribution of integrated chip packaging test data, selects different methods to calculate the process capability index of the test data according to the distribution of the test data, and determines the quality level of the integrated chip packaging according to the data concentration degree and process deviation degree in the process capability index; when the integrated chip packaging test data is non-normally distributed, a 1% significance level is used to filter out interference data with excessive deviation and replace the process mean with the peak mean, so that the process capability index calculated from the integrated chip packaging test data under non-normal distribution will have stronger anti-interference ability, higher credibility when judging the quality of the integrated chip packaging, and can accurately judge the quality of the integrated chip packaging. Compared with the traditional method, the integrated chip packaging quality can be clearly graded, and it has the advantages of easy simulation calculation and intuitive observation of chip packaging quality.

[0072] (2) The present invention uses the process capability index to evaluate the quality of integrated chip packaging, which can detect the weak links in the integrated chip packaging process, detect whether there are potential packaging quality problems and process improvement space in the integrated chip packaging process, improve the overall quality of integrated chip packaging, and help avoid unqualified products from entering the market and causing repair and recovery losses. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] Figure 1 It is a flow chart of a method for judging the quality of integrated chip packaging test data under non-normal distribution according to the first embodiment of the present invention;

[0074] Figure 2 is a probability density distribution diagram of integrated chip packaging test data under non-normal distribution in the first embodiment of the present invention;

[0075] Figure 3 It is a data line graph of integrated chip packaging test data under non-normal distribution according to the first embodiment of the present invention. DETAILED DESCRIPTION

[0076] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in combination with the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0077] The technical solution of the present invention is further described below in conjunction with the accompanying drawings and specific embodiments:

[0078] Embodiment 1

[0079] like Figure 1 Specifically, a method for judging the quality of integrated chip packaging test data under non-normal distribution is disclosed, comprising the following steps:

[0080] Step 1, select integrated chip packaging test data;

[0081] In this embodiment, the corresponding test data obtained after the integrated chip packaging test is first obtained, and the test data type includes any type of test data such as voltage (V), current (A) or time (s), and a group of n data in total is randomly selected as the sample data set of this embodiment. The sample data set can be randomly selected according to customer requirements or can be selected optionally, where n≥50 and n is an integer.

[0082] Step 2: Use AD inspection to determine the distribution of integrated chip packaging test data;

[0083] In this embodiment, AD test is used to determine whether the integrated chip packaging test data satisfies normal distribution, and the definition of AD normality test is given.

[0084] AD test is a statistical method used to test whether sample data conforms to a specific distribution. AD test determines whether the data conforms to the distribution by comparing the distribution of sample data with the theoretical distribution (such as normal distribution). In this embodiment, AD test is used to determine whether the integrated chip packaging test data conforms to the normal distribution. According to the distribution of the integrated chip test data after inspection, the method for calculating the process capability index is determined.

[0085] Since the data distribution of integrated chip packaging testing does not always conform to the normal distribution, especially when the data is affected by complex factors such as non-ideal production conditions and test environment, the use of AD testing can help determine the distribution characteristics of test data and thus select appropriate statistical analysis methods.

[0086] Furthermore, the AD test is used to determine whether the integrated chip packaging test data satisfies the normal distribution. Specifically:

[0087] Calculate the test statistic and critical value. If the test statistic is greater than the critical value, reject the null hypothesis and assume that the sample data does not conform to the normal distribution. Execute step 4. If the test statistic is less than the critical value, do not reject the null hypothesis and assume that the sample data conform to the normal distribution. Execute step 3.

[0088] Furthermore, the AD normality test definition includes:

[0089] Null hypothesis H0: data follows a normal distribution;

[0090] Alternative hypothesis H1: The data follow a non-normal distribution.

[0091] Step 3, calculating the process capability index of the integrated chip packaging test data under normal distribution;

[0092] In this embodiment, when calculating the process capability index under the normal distribution of integrated chip packaging test data, it is necessary to give the upper and lower limits of the process specifications, and calculate the process standard deviation and process mean at the same time.

[0093] Furthermore, the step 3 includes the following specific steps:

[0094] Step 31, presetting the process specification upper limit USL and the process specification lower limit LSL;

[0095] Step 32, calculating the process standard deviation σ and process mean μ of the normal distribution sample data set of integrated chip packaging test data;

[0096] Step 33: Calculate the data concentration level. The data concentration level expression is as follows:

[0097]

[0098] In the formula, C p Indicates the degree of data concentration, d indicates the distance between the upper and lower limits of the process specifications.

[0099] Step 34, calculate the overall deviation degree of the process, and execute step 5; the overall deviation degree of the process is as follows:

[0100]

[0101] In the formula, C pk Indicates the overall degree of deviation of the process.

[0102] Step 4, calculating the process capability index of the integrated chip packaging test data under non-normal distribution;

[0103] Since the process capability index tests the concentration and deviation of the test data, executing step 3 is only valid when the test data follows a normal distribution; when the data follows a non-normal distribution, the data must be processed first and then the concentration and deviation of the test data must be recalculated.

[0104] In this embodiment, when calculating the process capability index under the non-normal distribution of integrated chip packaging test data, different from the process capability index of normal distribution, this embodiment gives the upper and lower limits of the process specifications, and uses the abscissa corresponding to the area span in the probability density distribution diagram to calculate instead of the process standard deviation, such as Figure 2 As shown, the peak mean of the data line chart is used instead of the process mean. Figure 3 shown.

[0105] Furthermore, step 4 includes the following specific steps:

[0106] Step 41, presetting the process specification upper limit USL and the process specification lower limit LSL;

[0107] Step 42: Calculate the horizontal coordinate value F of the 0.5% area of ​​the integrated chip packaging test data span 0.005 and the abscissa value F spanning 99.5% of the area 0.995 , use F 0.995 -F 0.005 Instead of 6σ in step 3, the data concentration degree is calculated. The data concentration degree expression is as follows:

[0108]

[0109] In the formula, F 0.005 The horizontal axis value of 0.5% area of ​​the integrated chip package test data span, F 0.995 The horizontal axis value represents the 99.5% area of ​​the integrated chip package test data span;

[0110] Step 43: Obtain the peak value X in the line graph of the integrated chip packaging test data i and the number of data within the histogram boundary Y i , calculate the peak mean M m , the peak mean M m The expression is as follows:

[0111]

[0112] Step 44, calculate the overall deviation degree of the process, and execute step 5; the overall deviation degree of the process is as follows:

[0113]

[0114] In this embodiment, the data concentration level C p and the overall process deviation C pk The calculation of is independent of the process standard deviation σ and the process mean μ. The 1% significance level is used to filter out interference data with excessive offset and replace the process mean with the peak mean, so that the process capability index calculated from the integrated chip packaging test data under non-normal distribution will have stronger anti-interference ability and higher credibility when judging the quality of integrated chip packaging.

[0115] The results obtained by the process capability index calculation method based on the traditional non-normal distribution are often too high or too low, and cannot clearly grade the quality of integrated chip packaging. In addition, the traditional method is usually a mathematical calculation method, which is not easy to process intuitively. However, the process capability index of the integrated chip packaging test data under the non-normal distribution is calculated based on step 4 of this embodiment, which has the advantages of easy simulation calculation and intuitive observation of chip packaging quality.

[0116] Furthermore, the process capability index calculation method disclosed in step 4 of this embodiment can use step 4 to replace the process standard deviation and process mean in the process capability index calculation method to calculate its process capability index, regardless of whether the integrated chip packaging test data obeys a normal distribution or a non-normal distribution. When the integrated chip packaging test data obeys a non-normal distribution, the calculated data is closer to the true value, so that the method disclosed in this embodiment has a wider scope of application than other methods, and is more credible in judging the quality of integrated chip packaging.

[0117] Step 5: Integrated chip packaging quality grading;

[0118] In this embodiment, the data concentration degree C in the process capability index is used. p and the overall process deviation C pk To jointly judge the quality of integrated chip packaging, firstly, the data concentration degree C p and the overall process deviation C pk The two rating results are used to determine the quality level of the integrated chip packaging.

[0119] Furthermore, the step 5 includes the following specific steps:

[0120] Step 51: Set the data concentration level C p Grade, based on C p The value is used to grade the concentration of integrated chip package test data, specifically:

[0121] When C p When the value is greater than 2.0, the data concentration level is A;

[0122] When C p When the value is greater than 1.5 and less than 2.0, the data concentration level is B;

[0123] When C p When the value is greater than 1.33 and less than 1.5, the data concentration level is C;

[0124] When C p When the value is greater than 1.0 and less than 1.33, the data concentration level is D;

[0125] When Cp When the value is less than 1.0, the data concentration level is E.

[0126] Step 52: Set the overall deviation degree C of the process pk Grade, based on C pk The value is used to grade the overall deviation of the integrated chip packaging test data process, specifically:

[0127] When C pk When the value is greater than 2.0, the overall deviation level of the process is A;

[0128] When C pk When the value is greater than 1.5 and less than 2.0, the overall deviation level of the process is Class B;

[0129] When C pk When the value is greater than 1.33 and less than 1.5, the overall deviation level of the process is C;

[0130] When C pk When the value is greater than 1.0 and less than 1.33, the overall deviation level of the process is D;

[0131] When C pk When the value is less than 1.0, the overall deviation level of the process is E.

[0132] Step 53: Set the integrated chip packaging quality grade, grade the integrated chip packaging quality according to the judgment criteria, and execute the corresponding processing principle on the graded integrated chips, specifically:

[0133] When the data concentration level and the overall process deviation level are both level A, the integrated chip packaging quality level is level I, indicating that the integrated chip packaging quality is very good, but the process quality related to the data concentration level and the overall process deviation level can be reduced to reduce costs;

[0134] When either the data concentration level or the process overall deviation level is A and the other is B, the integrated chip packaging quality level is II, indicating that the integrated chip packaging quality is very good, and the process quality related to the data concentration level and the process overall deviation level can be appropriately reduced to reduce costs;

[0135] When either the data concentration level or the overall process deviation level is A and the other is C, the integrated chip packaging quality level is III, indicating that the integrated chip packaging quality is very good, and the process quality related to level A can be appropriately reduced to reduce costs; for example, if the data concentration level is A and the overall process deviation level is C, the process quality related to the data concentration level can be appropriately reduced to reduce costs;

[0136] When either the data concentration level or the process overall deviation level is B and the other is C, the integrated chip packaging quality level is IV, indicating that the integrated chip packaging quality is good and no improvement is needed;

[0137] When either the data concentration level or the process overall deviation level is A and the other is D, the integrated chip packaging quality level is V, indicating that the integrated chip packaging quality is acceptable and the cost can be reduced by appropriately reducing the process quality related to level A. At the same time, products with strict process requirements need to appropriately improve the process quality related to level D.

[0138] When either the data concentration level or the process overall deviation level is B and the other is D, the integrated chip packaging quality level is VI, indicating that the integrated chip packaging quality is acceptable, but if the product has strict process requirements, the process quality related to level D needs to be appropriately improved;

[0139] When either the data concentration level or the process overall deviation level is C and the other is D, the integrated chip packaging quality level is VII, indicating that the integrated chip packaging quality is acceptable, but if the product has strict process requirements, the overall process quality needs to be appropriately improved;

[0140] When either the data concentration level or the overall process deviation level is E, the integrated chip packaging quality level is VIII, indicating that the integrated chip packaging quality is poor and immediate process improvement is required.

[0141] In this embodiment, the integrated chip packaging quality level, judgment criteria and processing principles are shown in Table 1 below:

[0142] Table 1 Integrated chip packaging quality level, judgment criteria and processing principles

[0143]

[0144]

[0145] As can be seen from the above, when the integrated chip packaging quality level is I, it means that the integrated chip packaging quality is the best, but the process quality can be reduced to reduce costs. Levels II to VII indicate that the integrated chip packaging process is acceptable, but if it is a product with strict process requirements, the overall process quality needs to be appropriately improved. Level VIII indicates that the integrated chip packaging process needs to be improved immediately. This embodiment uses the process capability index to evaluate the integrated chip packaging quality, which can detect the weak links in the integrated chip packaging process, detect whether there are potential packaging quality problems and process improvement space in the integrated chip packaging process, improve the overall quality of the integrated chip packaging, and help avoid unqualified products from entering the market and causing repair and recovery losses.

[0146] The present invention also provides a system for judging the quality of integrated chip packaging test data under non-normal distribution, comprising a data selection module, a data distribution module, a normal distribution module, a non-normal distribution module and a quality grading module;

[0147] The data selection module is used to select integrated chip packaging test data;

[0148] The data distribution module is used to use AD inspection to determine the distribution of integrated chip packaging test data;

[0149] The normal distribution module is used to calculate the process capability index under the normal distribution of integrated chip packaging test data;

[0150] The non-normal distribution module is used to calculate the process capability index under the non-normal distribution of integrated chip packaging test data;

[0151] The quality grading module is used to jointly determine the quality grading of integrated chip packaging by using the degree of data concentration and the degree of overall process deviation.

[0152] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for judging the quality of integrated chip packaging test data under non-normal distribution, characterized in that: The following steps are involved: Step 1, select integrated chip packaging test data; Step 2: Use AD inspection to determine the distribution of integrated chip packaging test data; Step 3, calculating the process capability index under the normal distribution of integrated chip packaging test data; Step 4, calculating the process capability index under the non-normal distribution of integrated chip packaging test data; Step 5: Use the data concentration level and the overall process deviation level to jointly determine the integrated chip packaging quality grade.

2. The method for judging the quality of integrated chip packaging test data under non-normal distribution according to claim 1, characterized in that: The step 1 specifically includes: obtaining corresponding test data obtained after the integrated chip packaging test, wherein the test data type includes any type of test data such as voltage, current or time, and randomly taking a group of n data as a sample data set, where n≥50 and n is an integer.

3. The method for judging the quality of integrated chip packaging test data under non-normal distribution according to claim 1, characterized in that: The step 2 specifically includes: using AD test to determine whether the integrated chip packaging test data satisfies normal distribution, and providing the definition of AD normality test; The AD test is used to determine whether the integrated chip packaging test data meets the normal distribution. Specifically, the test statistic and the critical value are calculated. If the test statistic is greater than the critical value, the original hypothesis is rejected, and it is considered that the sample data does not meet the normal distribution, and step 4 is executed; If the test statistic is less than the critical value, the null hypothesis is not rejected and the sample data is considered to be normally distributed. Step 3 is executed. The AD normality test definition includes: Null hypothesis H0: data follows a normal distribution; Alternative hypothesis H1: The data follow a non-normal distribution.

4. The method for judging the quality of integrated chip packaging test data under non-normal distribution according to claim 3, characterized in that: The step 3 comprises the following steps: Step 31, presetting the process specification upper limit USL and the process specification lower limit LSL; Step 32, calculating the process standard deviation σ and process mean μ of the normal distribution sample data set of integrated chip packaging test data; Step 33: Calculate the data concentration level. The data concentration level expression is as follows: In the formula, C p It represents the degree of data concentration, and d represents the distance between the upper and lower limits of the process specifications; Step 34, calculate the overall deviation degree of the process, and execute step 5; the overall deviation degree of the process is as follows: In the formula, C pk Indicates the overall degree of deviation of the process.

5. The method for judging the quality of integrated chip packaging test data under non-normal distribution according to claim 3, characterized in that: The step 4 comprises the following steps: Step 41, presetting the process specification upper limit USL and the process specification lower limit LSL; Step 42: Calculate the data concentration level. The data concentration level expression is as follows: In the formula, C p Indicates the degree of data concentration, F 0.005 The horizontal axis value of 0.5% area of ​​the integrated chip package test data span, F 0.995 The horizontal axis value represents the 99.5% area of ​​the integrated chip package test data span; Step 43: Obtain the peak value X in the line graph of the integrated chip packaging test data i and the number of data within the histogram boundary Y i , calculate the peak mean M m , the peak mean M m The expression is as follows: Step 44, calculate the overall deviation degree of the process, and execute step 5; the overall deviation degree of the process is as follows: In the formula, C pk Indicates the overall degree of deviation of the process.

6. The method for judging the quality of integrated chip packaging test data under non-normal distribution according to claim 1, characterized in that: The step 5 comprises the following steps: Step 51: Set the data concentration level C p Grade, based on C p The value is used to grade the concentration of integrated chip package test data; Step 52: Set the overall deviation degree C of the process pk Grade, based on C pk The value is used to grade the overall deviation degree of the integrated chip packaging test data process; Step 53: Set the integrated chip packaging quality grade, grade the integrated chip packaging quality according to the judgment criteria, and execute the corresponding processing principle on the graded integrated chip.

7. The method for judging the quality of integrated chip packaging test data under non-normal distribution according to claim 6, characterized in that: The step 51 is specifically as follows: When C p When the value is greater than 2.0, the data concentration level is A; When C p When the value is greater than 1.5 and less than 2.0, the data concentration level is B; When C p When the value is greater than 1.33 and less than 1.5, the data concentration level is C; When C p When the value is greater than 1.0 and less than 1.33, the data concentration level is D; When C p When the value is less than 1.0, the data concentration level is E.

8. The method for judging the quality of integrated chip packaging test data under non-normal distribution according to claim 6, characterized in that: The step 52 is specifically as follows: When C pk When the value is greater than 2.0, the overall deviation level of the process is A; When C pk When the value is greater than 1.5 and less than 2.0, the overall deviation level of the process is Class B; When C pk When the value is greater than 1.33 and less than 1.5, the overall deviation level of the process is C; When C pk When the value is greater than 1.0 and less than 1.33, the overall deviation level of the process is D; When C pk When the value is less than 1.0, the overall deviation level of the process is E.

9. The method for judging the quality of integrated chip packaging test data under non-normal distribution according to claim 6, characterized in that: The step 53 is specifically as follows: When the data concentration level and the overall process deviation level are both level A, the integrated chip packaging quality level is level I, indicating that the integrated chip packaging quality is very good, but the process quality related to the data concentration level and the overall process deviation level can be reduced to reduce costs; When either the data concentration level or the process overall deviation level is A and the other is B, the integrated chip packaging quality level is II, indicating that the integrated chip packaging quality is very good, and the process quality related to the data concentration level and the process overall deviation level can be appropriately reduced to reduce costs; When either the data concentration level or the process overall deviation level is A and the other is C, the integrated chip packaging quality level is III, indicating that the integrated chip packaging quality is very good, and the process quality related to level A can be appropriately reduced to reduce costs; When either the data concentration level or the process overall deviation level is B and the other is C, the integrated chip packaging quality level is IV, indicating that the integrated chip packaging quality is good and no improvement is needed; When either the data concentration level or the process overall deviation level is A and the other is D, the integrated chip packaging quality level is V, indicating that the integrated chip packaging quality is acceptable and the cost can be reduced by appropriately reducing the process quality related to level A. At the same time, products with strict process requirements need to appropriately improve the process quality related to level D. When either the data concentration level or the process overall deviation level is B and the other is D, the integrated chip packaging quality level is VI, indicating that the integrated chip packaging quality is acceptable, but if the product has strict process requirements, the process quality related to level D needs to be appropriately improved; When either the data concentration level or the process overall deviation level is C and the other is D, the integrated chip packaging quality level is VII, indicating that the integrated chip packaging quality is acceptable, but if the product has strict process requirements, the overall process quality needs to be appropriately improved; When either the data concentration level or the overall process deviation level is E, the integrated chip packaging quality level is VIII, indicating that the integrated chip packaging quality is poor and immediate process improvement is required.

10. An integrated chip packaging test data quality judgment system under non-normal distribution, characterized in that: It includes data selection module, data distribution module, normal distribution module, non-normal distribution module and quality grading module; The data selection module is used to select integrated chip packaging test data; The data distribution module is used to use AD inspection to determine the distribution of integrated chip packaging test data; The normal distribution module is used to calculate the process capability index under the normal distribution of integrated chip packaging test data; The non-normal distribution module is used to calculate the process capability index under the non-normal distribution of integrated chip packaging test data; The quality grading module is used to jointly determine the quality grading of integrated chip packaging by using the degree of data concentration and the degree of overall process deviation.

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