Apparatus and method for grouping image patterns to determine wafer behavior during patterning

Abstract

Grouping image patterns using a trained machine learning model to determine wafer behavior in a patterning process is described. The described operations include converting one or more patterned process images including the image patterns into feature vectors based on a trained machine learning model. The feature vector corresponds to the image pattern. The described operations include grouping feature vectors having features indicative of image patterns that cause matched wafer and / or wafer defect behavior during the patterning process based on a trained machine learning model. The one or more patterned process images include a spatial image, a resist image, and / or other images. The grouped feature vectors may be used to: detect potential patterning defects on a wafer during a lithographic manufacturability test as part of optical proximity correction; adjusting the layout design of the mask; and / or generating a track gauge line / defect candidate list; and other uses.

Description

[0001] This application is a divisional application of the patent application with application number 201980083129.4, which entered the Chinese national phase on June 15, 2021 and the invention name is “Apparatus and method for grouping image patterns to determine chip behavior during patterning” (international application date is 2019-11-12, international application number is PCT / EP2019 / 081002). Technical Field

[0002] The present disclosure generally relates to mask manufacturing and patterning processes. More specifically, the disclosure relates to apparatus and methods for grouping image patterns that induce matching wafers and / or wafer defect behaviors during patterning processes using trained machine learning models. Background Art

[0003] A lithographic projection apparatus is a machine that applies a desired pattern onto a target portion of a substrate (e.g., a silicon wafer). A lithographic projection apparatus may be used, for example, in the manufacture of integrated circuits (ICs). In such a case, a patterning device (e.g., a mask) may provide a pattern corresponding to a single layer of the IC (a "design layout"), and this pattern may be transferred to a target portion of the substrate that has been coated with a layer of radiation-sensitive material ("resist") by methods such as irradiating the target portion of the substrate through the pattern on the patterning device. Typically, a single substrate comprises a plurality of adjacent target portions onto which the pattern is transferred successively, one target portion at a time, by the lithographic projection apparatus. Summary of the invention

[0004] According to an embodiment, a method for grouping image patterns using a trained machine learning model to determine wafer behavior during a patterning process is provided. The method includes converting one or more patterning process images including the image pattern into a feature vector based on the trained machine learning model. The feature vector corresponds to the image pattern. The method includes grouping feature vectors having features indicating image patterns that cause matching wafer behavior during the patterning process based on the trained machine learning model.

[0005] In an embodiment, the method for grouping image patterns to determine wafer behavior is a method for grouping image patterns to identify potential wafer defects in the patterning process. In an embodiment, the method further comprises grouping feature vectors having features indicating image patterns that cause matching wafer defect behavior in the patterning process based on a trained machine learning model.

[0006] In an embodiment, the one or more patterning process images include an aerial image and / or a resist image. In an embodiment, the method further comprises using the grouped feature vectors to facilitate detection of potential patterning defects on a wafer during lithography manufacturability verification (LMC).

[0007] In an embodiment, the trained machine learning model includes a trained first machine learning model and a trained second machine learning model. Converting one or more patterned process images including image patterns into feature vectors is based on the trained first machine learning model. Grouping feature vectors having features indicating image patterns causing matching wafers or wafer defect behavior is based on the trained second machine learning model.

[0008] In an embodiment, the first machine learning model is an image encoder trained to: extract features from an aerial image and / or a resist image indicating short-range aerial image pattern configuration and / or resist image pattern configuration and long-range pattern structures that affect wafer or wafer defect behavior; and encode the extracted features into a feature vector.

[0009] In an embodiment, the first machine learning model includes a loss function.

[0010] In an embodiment, grouping feature vectors having features indicating image patterns that cause matching wafers or wafer defect behavior based on the second machine learning model includes: grouping the feature vectors into a first group based on features indicating short-range spatial image pattern configuration and / or resist image pattern configuration; grouping the feature vectors into a second group based on the first group and a long-range pattern structure that affects wafer or wafer defect behavior, so that the second group includes a feature vector group having features indicating image patterns that cause matching wafer or wafer defect behavior during the patterning process.

[0011] In an embodiment, the method further comprises: training the first machine learning model using simulated aerial images and / or resist images.

[0012] In an embodiment, the method further comprises iteratively retraining the first machine learning model based on output from the first machine learning model and additional simulated space and / or resist images.

[0013] In an embodiment, the first machine learning model includes the loss function, and iteratively retraining the first machine learning model based on the output from the first machine learning model and the additional simulation space and / or resist image includes adjusting the loss function.

[0014] In an embodiment, the method further comprises training the second machine learning model using marked wafer defects from a wafer verification process.

[0015] In an embodiment, a given marked wafer defect includes information related to: a short-range spatial image pattern configuration and / or a resist image pattern configuration associated with the given marked wafer defect; a long-range pattern structure associated with the given marked wafer defect; a behavior of the given marked wafer defect during the patterning process; the location coordinates of the given marked wafer defect and the critical dimension at the location; an indication of whether the given marked wafer defect is a real defect; and / or information related to exposure of an image of the given marked wafer defect at the location.

[0016] In an embodiment, information regarding the short-range spatial image pattern configuration and / or the resist image pattern configuration associated with a given marked wafer defect and the long-range pattern structure associated with a given marked wafer defect is related to the probability of whether the given marked wafer defect is real.

[0017] In an embodiment, the method further comprises iteratively retraining the second machine learning model based on output from the second machine learning model, given labeled wafer defects, and additional labeled wafer defects from the wafer verification process.

[0018] In an embodiment, the feature vector describes the image pattern and comprises features related to LMC model terms and / or imaging conditions for the one or more patterning process images.

[0019] In an embodiment, the method includes grouping the feature vectors into a first group based on features indicative of the short-range space image pattern configuration and / or the resist image pattern configuration, and wherein the features indicative of the short-range space image pattern configuration and / or the resist image pattern configuration include features related to LMC model terms and / or imaging conditions for the one or more patterning process images.

[0020] In an embodiment, the method is used during an optical proximity correction (OPC) portion of the patterning process.

[0021] In an embodiment, the method further comprises identifying a group of potential wafer defects having matching wafer defect behavior in the patterning process based on grouping feature vectors having features indicative of image patterns causing the matching wafer defect behavior in the patterning process.

[0022] In an embodiment, the method further comprises adjusting a mask layout design of a mask of the patterning process based on the group of potential wafer defects having the matching wafer defect behavior in the patterning process. In an embodiment, the method is used to generate a gauge line / defect candidate list to enhance the accuracy and efficiency of wafer verification.

[0023] In an embodiment, the method further comprises predicting, based on the trained machine learning model, a grading indicator to indicate a relative severity of individual potential wafer defects, the grading indicator being a measure of the likelihood that a potential wafer defect will convert into one or more physical wafer defects.

[0024] According to another embodiment, a computer program product is provided. The computer program product includes a non-transitory computer-readable medium having instructions recorded thereon, and the instructions implement the above method when executed by a computer. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The above aspects and other aspects and features will become apparent to those of ordinary skill in the art upon review of the following description of specific embodiments in conjunction with the accompanying drawings, in which:

[0026] Figure 1 A lithographic apparatus according to an embodiment is schematically illustrated.

[0027] Figure 2 Embodiments of a lithography cell or cluster according to embodiments are schematically shown.

[0028] Figure 3 A flow chart illustrating a method for determining the presence of defects in a lithography process according to an embodiment.

[0029] FIG. 4 a illustrates how one isolated line of a pattern may have different optical proximity effect correction results according to an embodiment.

[0030] FIG. 4 b illustrates two patterns (for locations of interest) including potential defects according to an embodiment.

[0031] Figure 5 An overview of operations performed as part of the method and / or by the system according to an embodiment is illustrated.

[0032] Figure 6 The illustration converts one or more patterning process images including image patterns associated with locations of interest (eg, potential defect locations) into feature vectors according to an embodiment.

[0033] Figure 7 The illustration groups feature vectors having features indicative of image patterns that induce matching wafer or wafer defect behavior during patterning in accordance with an embodiment.

[0034] Figure 8 An example inspection device according to an embodiment is depicted.

[0035] Fig. 9 Another example inspection device according to an embodiment is schematically illustrated.

[0036] Fig.10 The relationship between the illumination spot and the measurement target of the inspection device according to the embodiment is illustrated.

[0037] Fig.11 The process of deriving a plurality of variables of interest based on measurement data according to an embodiment is schematically illustrated.

[0038] Fig.12 An embodiment of a scanning electron microscope (SEM) according to an embodiment is schematically depicted.

[0039] Fig.13 Embodiments of electron beam inspection apparatus according to embodiments are schematically depicted.

[0040] Fig.14 An example defect on a printed substrate according to an embodiment is illustrated.

[0041] Fig.15 An example flow chart for modeling and / or simulating at least a portion of a patterning process is depicted in accordance with an embodiment.

[0042] Fig.16 is a block diagram of an example computer system according to an embodiment.

[0043] Fig.17 According to the embodiment Figure 1 Schematic diagram of a similar lithography projection apparatus.

[0044] Fig.18 According to the embodiment Fig.17 A more detailed view of the devices in .

[0045] Fig.19 According to the embodiment Fig.17 and Fig.18 A more detailed view of the source collector module SO of the device. DETAILED DESCRIPTION

[0046] Optical Proximity Correction (OPC) enhances the integrated circuit patterning process by compensating for deformation that occurs during processing. Deformation occurs during processing because the features printed on the wafer are smaller than the wavelength of light used in the patterning and printing process. OPC verification identifies OPC errors or weaknesses in the post-OPC wafer design that could potentially cause patterning defects on the wafer. For example, ASM Tachyon Lithography Manufacturability Check (LMC) is an OPC verification product.

[0047] In order to avoid missing potential defects, users often set strict inspection specifications and use various types of inspections during lithography manufacturability inspection. This often leads to the identification of many potential patterning defects during lithography manufacturability inspection for full chip (wafer) verification. It is difficult to manually review the identified areas of the pattern and handle such a large number of potential patterning defects. A widely accepted solution is to group similar potential patterning defects into each group and manually review only the worst potential patterning defects in each group. If the pattern designs in the area with potential patterning defects are similar, it is assumed that the potential patterning defects are similar. However, this is not always the case. Often, defects behave differently, even if they are associated with similar pattern designs. In addition, the LMC process settings that define which pattern designs are considered similar or different may be too narrow (making it more likely that potential patterning defects that behave similarly are grouped into the same group, but increasing the total number of separate groups), or too broad (making it more likely that potential patterning defects that behave differently are grouped into the same group, but reducing the total number of separate groups).

[0048] A new pattern grouping method (and associated system) is described herein that simultaneously reduces the overall group count and groups potential patterning defects associated with matching defect behavior together in the same group. Unlike previous grouping methods and systems, the present method and system utilizes trained machine learning models and / or other components to group patterns based on information from aerial images, resist images, and / or other images rather than user design files (e.g., .gds files). The user does not need to specifically provide design information for the present method and system. The aerial images, resist images, and / or other images include image patterns associated with potential wafer defects in the patterning process. The present method and system group image (compared to the design) patterns to identify potential wafer defects that have (or will have) matching wafer (defect) behavior in the patterning process. As described herein, the present method and system utilize information in image buffers during image pattern grouping. For example, compared to traditional grouping processes based only on gds layers (design files), these buffers store lithography manufacturability inspection model terms, imaging conditions, and / or other information that enhances grouping consistency (e.g., providing more vector features as described below).

[0049] The machine learning model is adaptively trained using labels (information) associated with actual chip behavior (e.g., labeled chip defects). The machine learning model uses the labels to learn to predict which image patterns are more likely or less likely to eventually become actual physical chip defects and / or how those defects will behave. Among other advantages, this produces significantly improved grouping efficiency (e.g., the balance between the number of groups and the patterns in each group associated with the matching behavior) compared to previous systems and methods. This also allows the user to define and adjust the chip (defect) behavior that the user considers matching. Compared to previous methods and systems, the group count of the present method and system can be significantly reduced (when the same definition of matching behavior is used). Alternatively, when the group count is the same as in the previous method and system, the chip (defect) behavior is more consistent within the group in the present method and system.

[0050] Although the methods and systems are described throughout this disclosure as being associated with wafer defect behavior, it should be noted that these methods and systems can be used to group image patterns to determine any wafer behavior during the patterning process.

[0051] Before describing the embodiments in detail, it is instructive to present an example environment in which the embodiments may be implemented.

[0052] In one type of lithographic projection apparatus, in one operation, the pattern on the entire pattern forming device is transferred to a target portion. Such an apparatus is generally referred to as a stepper. In an alternative apparatus (generally referred to as a step-scanning apparatus), the projection beam is scanned over the pattern forming device along a given reference direction (the "scanning" direction), while the substrate is synchronously moved in a direction parallel or antiparallel to the reference direction. Different parts of the pattern on the pattern forming device are gradually transferred to a target portion. Because typically the lithographic projection apparatus will have a reduction ratio M (e.g., 4), the rate F at which the substrate is moved will be 1 / M times the rate at which the projection beam scans the pattern forming device. More information about the lithographic apparatus as described herein can be gathered, for example, from US 6,046,792, which is incorporated herein by reference.

[0053] Before the pattern is transferred from the pattern forming device to the substrate, the substrate may undergo various processes, such as primer coating, resist coating, and soft baking. After exposure, the substrate may undergo other processes ("post-exposure processes"), such as post-exposure baking (PEB), development, hard baking, and measurement / inspection of the transferred pattern. This series of processes is used as the basis for manufacturing a single layer of a device (e.g., an IC). The substrate may then undergo various processes, such as etching, ion implantation (doping), metallization, oxidation, chemical mechanical polishing, etc., all of which are intended to ultimately complete a single layer of the device. If the device requires multiple layers, the entire process or a variation thereof is repeated for each layer. Ultimately, the device will be set in each target portion on the substrate. These devices are then separated from each other by techniques such as slicing or cutting, whereby the individual devices can be mounted on a carrier, connected to pins, etc.

[0054] Thus, manufacturing devices (such as semiconductor devices) typically involves using multiple manufacturing processes to process a substrate (e.g., a semiconductor wafer) to form various features and multiple layers of the device. These layers and features are typically manufactured and processed using, for example, deposition, photolithography, etching, chemical mechanical polishing, and ion implantation. Multiple devices can be manufactured on multiple dies on a substrate and then separated into separate devices. This device manufacturing process can be considered a patterning process. The patterning process involves a patterning step, such as optical and / or nanoimprint lithography using a patterning device in a lithographic apparatus to transfer the pattern on the patterning device to the substrate, and typically but optionally involves one or more related pattern processing steps, such as resist development by a developing apparatus, substrate baking using a baking tool, etching using a pattern using an etching apparatus, etc.

[0055] As mentioned, photolithography is a core step in the manufacture of devices such as ICs, where patterns formed on a substrate define the functional elements of the device, such as microprocessors, memory chips, etc. Similar photolithography techniques are also used to form flat panel displays, microelectromechanical systems (MEMS), and other devices.

[0056] As semiconductor manufacturing processes continue to advance, over the decades, the size of functional elements has continued to decrease while the number of functional elements (such as transistors) per device has steadily increased, following a trend commonly referred to as "Moore's Law." In the current state of the art, multiple layers of a device are fabricated using a lithography projection apparatus that projects a design layout onto a substrate using illumination from a deep ultraviolet illumination source, thereby forming a single functional element having a size well below 100 nm (i.e., less than half the wavelength of the radiation from the illumination source (e.g., a 193 nm illumination source)).

[0057] This process in which features with dimensions smaller than the classical resolution limit of the lithographic projection apparatus are printed is generally referred to as low-k1 lithography, and is based on the resolution formula CD = k1 × λ / NA, where λ is the wavelength of the radiation employed (currently 248 nm or 193 nm in most cases), NA is the numerical aperture of the projection optics in the lithographic projection apparatus, CD is the "critical dimension" (usually the smallest feature size printed), and k1 is an empirical resolution factor. In general, the smaller k1 is, the more difficult it becomes to reproduce a pattern on a substrate that resembles the shape and dimensions planned by the designer to achieve specific electrical functionality and performance. To overcome these difficulties, complex fine-tuning steps are applied to the lithographic projection apparatus, the design layout, or the patterning device. These steps include, for example, but are not limited to: optimization of NA and optical coherence settings, customized illumination schemes, use of phase-shifting patterning devices, optical proximity correction (OPC, sometimes also called "optical and process correction") in the design layout, or other methods generally defined as "resolution enhancement techniques" (RET).

[0058] Figure 1 An embodiment of a lithographic apparatus LA is schematically depicted. The apparatus comprises:

[0059] - an illumination system (illuminator) IL configured to condition a radiation beam B (e.g. UV radiation, DUV radiation or EUV radiation);

[0060] - a support structure (eg mask table) MT configured to support a patterning device (eg mask) MA and connected to a first positioner PM configured to accurately position the patterning device according to certain parameters;

[0061] - a substrate table (e.g. wafer stage) WT (e.g. WTa, WTb or both) configured to hold a substrate (e.g. a resist coated wafer) W and connected to a second positioning device PW configured to accurately position the substrate according to certain parameters; and

[0062] - a projection system (e.g., a refractive projection lens system) PS configured to project the pattern imparted to the radiation beam B by the patterning device MA onto a target portion C (e.g., comprising one or more dies and often referred to as a field) of the substrate W, the projection system being supported on a reference frame (RF).

[0063] As depicted here, the device is of the transmissive type (eg using a transmissive mask). Alternatively, the device may be of the reflective type (eg using a programmable mirror array of the type mentioned above, or using a reflective mask).

[0064] The illuminator IL receives a radiation beam from a radiation source SO. For example, when the source is an excimer laser, the source and the lithographic apparatus may be separate entities. In such a case, the source is not considered to form part of the lithographic apparatus, and the radiation beam is transferred from the source SO to the illuminator IL by means of a beam delivery system BD comprising, for example, suitable directional mirrors and / or a beam expander. In other cases, for example, when the source is a mercury lamp, the source may be an integral part of the apparatus. The source SO and the illuminator IL together with the beam delivery system BD (where necessary) may be referred to as a radiation system.

[0065] The illuminator IL may vary the intensity distribution of the beam. The illuminator may be arranged to limit the radial extent of the radiation beam so that the intensity distribution within an annular region in a pupil plane of the illuminator IL is non-zero. Additionally or alternatively, the illuminator IL may be operable to limit the distribution of the beam in the pupil plane so that the intensity distribution in a plurality of equally spaced segments in the pupil plane is non-zero. The intensity distribution of the radiation beam in the pupil plane of the illuminator IL may be referred to as an illumination pattern.

[0066] The illuminator IL may comprise an adjuster AM configured to adjust the (angular / spatial) intensity distribution of the beam. Typically, at least the outer radial extent and / or the inner radial extent (typically referred to as σ-outer and σ-inner, respectively) of the intensity distribution in a pupil plane of the illuminator may be adjusted. The illuminator IL may be operable to change the angular distribution of the beam. For example, the illuminator may be operable to change the number and angular extent of the segments in the pupil plane in which the intensity distribution is non-zero. By adjusting the intensity distribution of the beam in the pupil plane of the illuminator, different illumination modes may be achieved. For example, by limiting the radial extent and the angular extent of the intensity distribution in the pupil plane of the illuminator IL, the intensity distribution may have a multipolar distribution, such as a dipole, quadrupole or hexapole distribution. The illumination mode may be obtained, for example, by inserting an optical device providing the desired illumination mode into the illuminator IL or by using a spatial light modulator.

[0067] The illuminator IL may be operable to change the polarization of the beam and may be operable to adjust the polarization using an adjuster AM. The polarization state of the radiation beam across the pupil plane of the illuminator IL may be referred to as a polarization mode. Using different polarization modes may allow a greater contrast to be achieved in the image formed on the substrate W. The radiation beam may be unpolarized. Alternatively, the illuminator may be arranged to polarize the radiation beam linearly. The polarization direction of the radiation beam may vary across the pupil plane of the illuminator IL. The polarization direction of the radiation may be different in different zones in the pupil plane of the illuminator IL. The polarization state of the radiation may be selected depending on the illumination mode. For a multipolar illumination mode, the polarization of each pole of the radiation beam may generally be perpendicular to the position vector of the pole in the pupil plane of the illuminator IL. For example, for a dipole illumination mode, the radiation may be linearly polarized in a direction substantially perpendicular to a line of two opposing segments bisecting a dipole. The radiation beam may be polarized in one of two different orthogonal directions, which may be referred to as an X polarization state and a Y polarization state. For a quadrupole illumination mode, the radiation in the segments of each pole may be linearly polarized in a direction substantially perpendicular to a line bisecting the segments. This polarization mode may be referred to as XY polarization. Similarly, for a hexapole illumination mode, the radiation in the segments of each pole may be linearly polarized in a direction substantially perpendicular to a line bisecting the segments. This polarization mode may be referred to as TE polarization.

[0068] In addition, the illuminator IL typically includes various other components, such as an integrator IN and a condenser CO. The illumination system may include various types of optical components for directing, shaping or controlling the radiation, such as refractive, reflective, magnetic, electromagnetic, electrostatic or other types of optical components, or any combination thereof.

[0069] The illuminator thus provides a conditioned radiation beam B having a desired uniformity and intensity distribution in cross-section.

[0070] The support structure MT supports the pattern forming device in a manner that depends on the orientation of the pattern forming device, the design of the lithographic equipment and other conditions such as whether the pattern forming device is maintained in a vacuum environment. The support structure can use mechanical, vacuum, electrostatic or other clamping techniques to hold the pattern forming device. The support structure can be, for example, a frame or a table, which can be fixed or movable as required. The support structure can ensure that the pattern forming device is in a desired position, for example relative to the projection system. Any use of the term "reticle" or "mask" in the present invention can be regarded as synonymous with the more general term "pattern forming device".

[0071] The term "patterning device" as used in the present invention should be broadly interpreted as referring to any device that can be used to impart a pattern in a target portion of a substrate. In an embodiment, the patterning device is any device that can be used to impart a pattern to a radiation beam in its cross-section so as to produce a pattern in the target portion of the substrate. It should be noted that, for example, if the pattern imparted to the radiation beam includes phase-shifting features or so-called assist features, the pattern may not exactly correspond to the desired pattern in the target portion of the substrate. Typically, the pattern imparted to the radiation beam will correspond to a specific functional layer in a device (such as an integrated circuit) produced in the target portion.

[0072] The patterning device may be transmissive or reflective. Examples of patterning devices include masks, programmable mirror arrays, and programmable LCD panels. Masks are well known in lithography and include mask types such as binary, alternating phase shift, and attenuated phase shift, as well as various hybrid mask types. An example of a programmable mirror array uses a matrix arrangement of small mirrors, each of which can be individually tilted so as to reflect an incident radiation beam in different directions. The tilted mirrors impart a pattern in the radiation beam reflected by the mirror matrix.

[0073] The term "projection system" as used herein should be interpreted broadly to cover any type of projection system, including refractive, reflective, catadioptric, magnetic, electromagnetic and electrostatic optical systems, or any combination thereof, as appropriate to the exposure radiation used or to other factors such as the use of an immersion liquid or the use of a vacuum. Any use of the term "projection lens" in this disclosure may be considered synonymous with the more general term "projection system".

[0074] The projection system PS has an optical transfer function that may be non-uniform and may affect the pattern imaged onto the substrate W. For unpolarized radiation, such effects can be fairly well described by two scalar maps that describe the transmission (apodization) and relative phase (aberration) of the radiation exiting the projection system PS as a function of the position in the pupil plane of the radiation. These scalar maps, which can be referred to as transmission maps and relative phase maps, can be expressed as linear combinations of a full set of basis functions. A particularly suitable set is the Zernike polynomials, which form a set of orthogonal polynomials defined on the unit circle. The determination of each scalar map may involve determining the coefficients in such an expansion. Since the Zernike polynomials are orthogonal on the unit circle, the Zernike coefficients may be determined by calculating the inner product of the measured scalar map with each Zernike polynomial in turn and dividing this inner product by the square of the norm of the Zernike polynomial.

[0075] The transmission map and the relative phase map are field and system dependent. That is, in general, each projection system PS will have a different Zernike expansion for each field point (i.e. for each spatial location in the image plane of the projection system). The relative phase of the projection system PS in its pupil plane can be determined by projecting radiation, for example from a point-like source in the object plane of the projection system PS (i.e. the plane of the patterning device MA) through the projection system PS and measuring the wavefront (i.e. the locus of points with the same phase) using a shearing interferometer. The shearing interferometer is a common path interferometer and therefore advantageously, no secondary reference beam is required to measure the wavefront. The shearing interferometer may comprise a diffraction grating (e.g. a two-dimensional grating) in the image plane of the projection system (i.e. the substrate table WT), and a detector arranged to detect an interference pattern in a plane conjugate to the pupil plane of the projection system PS. The interference pattern is related to the derivative of the phase of the radiation and the coordinates in the pupil plane in the shear direction. The detector may comprise an array of sensing elements such as a charge coupled device (CCD).

[0076] The projection system PS of the lithographic apparatus may not produce visible fringes, and therefore a phase stepping technique (such as moving a diffraction grating) may be used to enhance the accuracy of the wavefront determination. Stepping may be performed in the plane of the diffraction grating and in a direction perpendicular to the scanning direction of the measurement. The stepping range may be one grating period, and at least three (uniformly distributed) phase steps may be used. Thus, for example, three scanning measurements may be performed in the y direction, each scanning measurement being performed for a different position in the x direction. Such stepping of the diffraction grating effectively converts phase changes into intensity changes, allowing the phase information to be determined. The grating may be stepped in a direction perpendicular to the diffraction grating (z direction) to calibrate the detector.

[0077] The diffraction grating may be scanned sequentially in two perpendicular directions, which may coincide with the axes (x and y) of the coordinate system of the projection system PS or may be at an angle (such as 45 degrees) to these axes. The scanning may be performed over an integer number of grating periods (e.g., one grating period). The scanning averages the phase changes in one direction, allowing reconstruction of the phase changes in the other direction. This allows the wavefront to be determined as a function of the two directions.

[0078] The transmission (apodization) of the projection system PS in its pupil plane may be determined by projecting radiation, e.g. from a point-like source in the object plane of the projection system PS (i.e. the plane of the patterning device MA) through the projection system PS and measuring the intensity of the radiation in a plane conjugate to the pupil plane of the projection system PS using a detector. The same detector may be used as the one used to measure the wavefront to determine the aberrations.

[0079] The projection system PS may include a plurality of optical (e.g., lens) elements, and may further include an adjustment mechanism AM configured to adjust one or more of the optical elements so as to correct aberrations (phase variations in the pupil plane across the entire field). To achieve such adjustment, the adjustment mechanism may be operable to manipulate one or more optical (e.g., lens) elements within the projection system PS in one or more different ways. The projection system may have a coordinate system in which the optical axis of the projection system extends in the z direction. The adjustment mechanism may be operable to perform any combination of the following: displacing one or more optical elements; tilting one or more optical elements; and / or deforming one or more optical elements. The displacement of the optical element may be performed in any direction (x, y, z, or a combination thereof). The tilting of the optical element is typically performed out of a plane perpendicular to the optical axis by rotating around an axis in the x and / or y direction, but rotation around the z axis may be used for non-rotationally symmetric aspheric optical elements. The deformation of the optical element may include low-frequency shapes (e.g., astigmatism) and / or high-frequency shapes (e.g., free-form aspheric surfaces). Deformation of the optical element may be performed, for example, by using one or more actuators to apply forces to one or more sides of the optical element and / or by using one or more heating elements to heat one or more selected regions of the optical element. Typically, it is not possible to adjust the projection system PS to correct for apodization (variations in transmission across a pupil plane). A transmission map of the projection system PS may be used when designing a patterning device (e.g., mask) MA for the lithographic apparatus LA. Using computational lithography techniques, the patterning device MA may be designed to at least partially correct for apodization.

[0080] The lithographic apparatus may be of a type having two (dual stage) or more tables (e.g. two or more substrate tables WTa, WTb, two or more patterning device tables, substrate table WTa and table WTb below the projection system without dedicated substrates for use, for example, to facilitate measurement and / or cleaning, etc.). In these "multi-stage" machines, the additional tables may be used in parallel, or preparatory steps may be carried out on one or more tables while one or more other tables are being used for exposure. For example, alignment measurements may be made using an alignment sensor AS and / or level (height, inclination, etc.) measurements may be made using a level sensor (or leveling sensor) LS.

[0081] The lithographic apparatus may also be of a type in which at least a portion of the substrate may be covered by a liquid having a relatively high refractive index, such as water, so as to fill the space between the projection system and the substrate. Immersion liquid may also be applied to other spaces in the lithographic apparatus, such as the space between the patterning device and the projection system. Immersion techniques are well known in the art and are used to increase the numerical aperture of the projection system. The term "immersion" as used in the present invention does not mean that structures such as the substrate must be immersed in the liquid, but only means that the liquid is located between the projection system and the substrate during exposure.

[0082] In operation of the lithographic apparatus, a radiation beam is conditioned and provided by an illumination system IL. The radiation beam B is incident on a patterning device (e.g. a mask) MA held on a support structure (e.g. a mask table) MT and is patterned by the patterning device. Having traversed the patterning device MA, the radiation beam B passes through a projection system PS which focuses the beam onto a target portion C of a substrate W. With the aid of a second positioning device PW and a position sensor IF (e.g. an interferometer, a linear encoder, a 2-D encoder or a capacitive sensor), the substrate table WT can be accurately moved, for example in order to position different target portions C in the path of the radiation beam B. Similarly, the first positioning device PM and a further position sensor (in Figure 1The support structure MT may be used to accurately position the pattern forming device MA relative to the path of the radiation beam B, for example after mechanical retrieval from a mask library or during scanning. Typically, movement of the support structure MT may be achieved with the aid of a long-stroke module (coarse positioning) and a short-stroke module (fine positioning) forming part of the first positioning device PM. Similarly, movement of the substrate table WT may be achieved using a long-stroke module and a short-stroke module forming part of the second positioning device PW. In the case of a stepper (as opposed to a scanner), the support structure MT may be connected only to the short-stroke actuator, or may be fixed. The pattern forming device MA and the substrate W may be aligned using pattern forming device alignment marks M1, M2 and substrate alignment marks P1, P2. Although the substrate alignment marks as illustrated occupy dedicated target portions, the marks may be located in the spaces between target portions (these marks are referred to as scribe alignment marks). Similarly, in the case where more than one die is provided on the pattern forming device MA, the pattern forming device alignment marks may be located between the dies.

[0083] The depicted device may be used in at least one of the following modes:

[0084] 1. In step mode, the entire pattern imparted to the radiation beam is projected onto a target portion C at once while the support structure MT and the substrate table WT are kept substantially stationary (i.e. a single static exposure). Subsequently, the substrate table WT is shifted in the X and / or Y direction so that a different target portion C can be exposed. In step mode, the maximum size of the exposure field limits the size of the target portion C imaged in a single static exposure.

[0085] 2. In scan mode, the support structure MT and substrate table WT are scanned synchronously while a pattern imparted to the radiation beam is projected onto a target portion C (i.e. a single dynamic exposure). The speed and direction of the substrate table WT relative to the support structure MT may be determined by the (de-)magnification and image reversal characteristics of the projection system PS. In scan mode, the maximum size of the exposure field limits the width of the target portion in a single dynamic exposure (in the non-scanning direction), while the length of the scanning movement determines the height of the target portion (in the scanning direction).

[0086] 3. In another mode, the support structure MT is held substantially stationary, thereby holding the programmable patterning device, and the substrate table WT is moved or scanned while a pattern imparted to the radiation beam is projected onto a target portion C. In this mode, a pulsed radiation source is typically used and the programmable patterning device is updated as required after each movement of the substrate table WT or between successive radiation pulses during a scan. This mode of operation can be readily applied to maskless lithography utilizing a programmable patterning device, such as a programmable mirror array of the type mentioned above.

[0087] Combinations and / or variations on the above-described modes of use or entirely different modes of use may also be used.

[0088] Although specific reference may be made to the use of lithographic apparatus in IC manufacturing in the present invention, it should be understood that the lithographic apparatus described in the present invention may have other applications, such as manufacturing integrated optical systems, guidance and detection patterns for magnetic domain memory, liquid crystal displays (LCDs), thin film magnetic heads, etc. Those skilled in the art will appreciate that in the context of these alternative applications, any use of the term "wafer" or "die" in the present invention may be considered synonymous with the more general term "substrate" or "target portion", respectively. The substrates referred to in the present invention may be processed in, for example, a coating and developing system or track (a tool that typically applies a resist layer to a substrate and develops the exposed resist), or a measurement or inspection tool, before or after exposure. Where applicable, the disclosure in the present invention may be applied to these and other substrate processing tools. In addition, the substrate may be processed more than once, for example to produce a multi-layer IC, so that the term substrate used in the present invention may also refer to a substrate that already contains multiple processed layers.

[0089] The terms "radiation" and "beam" as used in the present invention encompass all types of electromagnetic radiation, including ultraviolet (UV) or deep ultraviolet (DUV) radiation (e.g., having a wavelength of 365, 248, 193, 157 or 126 nm) and extreme ultraviolet (EUV) radiation (e.g., having a wavelength in the range of 5 to 20 nm), as well as particle beams, such as ion beams or electron beams.

[0090] Various patterns on or provided by a pattern forming device may have different process windows, i.e., the space of process variables within which patterns within specifications will be produced. Examples of pattern specifications related to potential systematic defects include checking for necking, line pullback, line thinning, CD, edge placement, overlap, resist top loss, resist undercut and / or bridging. The process windows of all patterns on a pattern forming device or a region thereof may be obtained by merging the process windows of each individual pattern (e.g., overlapping the process windows). The boundaries of the process windows of all patterns contain the boundaries of the process windows of some of the individual patterns. In other words, these individual patterns limit the process windows of all patterns. These patterns may be referred to as "hot spots" or "process window limiting patterns (PWLP)", which are used interchangeably in the present invention. It is possible and economical to focus on hot spots when controlling a portion of a patterning process. When hot spots are defect-free, it is most likely that all patterns are defect-free.

[0091] like Figure 2As shown in , the lithography equipment LA can form part of a lithography unit LC (sometimes also referred to as a lithography cell or lithography cluster), which also includes equipment for performing pre-exposure and post-exposure processes on a substrate. Conventionally, these devices include one or more spin coaters SC for depositing one or more resist layers, one or more developers DE for developing the exposed resist, one or more chill plates CH and / or one or more baking plates BK. The substrate handling device or robot RO picks up one or more substrates from the input / output ports I / O1, I / O2, moves these substrates between different process equipment and transfers these substrates to the feed station LB of the lithography equipment. These devices, which are often collectively referred to as coating and developing systems or tracks, are controlled by a coating and developing system control unit or a track control unit TCU, which is itself controlled by a management control system SCS, which also controls the lithography equipment via a lithography control unit LACU. Thus, different devices can be operated to maximize throughput and processing efficiency.

[0092] In order to correctly and consistently expose a substrate exposed by a lithographic apparatus and / or to monitor a portion of a patterning process (e.g. a device manufacturing process) comprising at least one pattern transfer step (e.g. an optical lithography step), it is desirable to inspect a substrate or other object to measure or determine one or more properties, such as alignment, overlay (the overlay may be, for example, an overlay between structures in overlapping layers or between structures in the same layer that have been provided separately from the layer by, for example, a double patterning process), line thickness, critical dimension (CD), focus offset, material properties, etc. Therefore, a manufacturing facility in which a lithocell LC is located typically also comprises a metrology system MET, which measures some or all of the substrates W that have been processed in the lithocell, or other objects in the lithocell. The measurement system MET may be part of the lithocell LC, for example it may be part of the lithographic apparatus LA (such as an alignment sensor AS).

[0093] For example, one or more measured parameters may include: overlap between successive layers formed in or on a patterned substrate, critical dimensions (CD) of features formed in or on a patterned substrate (e.g., critical line width), focus or focus error of an optical lithography step, dose or dose error of an optical lithography step, optical aberration of an optical lithography step, etc. Such measurements may be performed on a target of the product substrate itself and / or on a dedicated metrology target provided on the substrate. The measurements may be performed after resist development but before etching, or may be performed after etching.

[0094] There are various techniques for measuring structures formed during the patterning process, including the use of scanning electron microscopes, image-based metrology tools, and / or various special tools. As discussed above, a fast and non-invasive form of a special metrology tool is a measurement tool in which a radiation beam is directed onto a target on the surface of a substrate and the properties of the scattered (diffracted / reflected) beam are measured. By evaluating one or more properties of the radiation scattered by the substrate, one or more properties of the substrate can be determined. This can be referred to as diffraction-based metrology. One such application of such diffraction-based metrology is in the measurement of feature asymmetry within a target. This can be used as a measure of overlap, for example, but other applications are also known. For example, asymmetry can be measured by comparing relative portions of the diffraction spectrum (e.g., comparing the -1 order with the +1 order in the diffraction spectrum of a periodic grating). This can be performed as described above and as described in, for example, U.S. Patent Application Publication No. US2006-066855, which is incorporated herein by reference in its entirety. Another application of diffraction-based metrology is in the measurement of feature width (CD) within a target. Such techniques may use the devices and methods described below.

[0095] Therefore, in a device manufacturing process (e.g., a patterning process or a lithography process), a substrate or other object may be subjected to various types of measurements during or after the process. The measurement may determine whether a particular substrate is defective, may adjust the process and the equipment used in the process (e.g., aligning two layers on a substrate or aligning a pattern forming device with a substrate), may measure the performance of the process and equipment, or may be used for other purposes. Examples of measurements include optical imaging (e.g., optical microscopy), non-imaging optical measurements (e.g., diffraction-based measurements, such as ASML YieldStar metrology tools, ASML SMASH metrology systems), mechanical measurements (e.g., profile detection using a stylus, atomic force microscopy (AFM)), and / or non-optical imaging (e.g., scanning electron microscopy (SEM)). The Smart Alignment Sensor Hybrid (SMASH) system as described in U.S. Pat. No. 6,961,116, which is incorporated herein by reference in its entirety, uses a self-referencing interferometer that produces two overlapping and relatively rotated images of an alignment mark, detects intensity in a pupil plane where Fourier transforms of the images cause interference, and extracts position information from the phase difference between the diffraction orders of the two images, which is expressed as intensity variations in the interference orders.

[0096] The measurement results may be provided directly or indirectly to the supervisory control system SCS. If an error is detected, the exposure of subsequent substrates (especially if the inspection can be completed quickly and quickly enough that one or more other substrates of the batch are still to be exposed) and / or the subsequent exposure of the exposed substrate may be adjusted. In addition, the exposed substrate may be stripped and reworked to improve yield, or discarded, thereby avoiding further processing of substrates known to be defective. In the case where only some target portions of the substrate are defective, further exposure may be performed only on those target portions that meet the specifications.

[0097] Within the metrology system MET, the metrology equipment is used to determine one or more properties of a substrate, and in particular, to determine how one or more properties of different substrates vary or how different layers of the same substrate vary from layer to layer. As mentioned above, the metrology equipment may be integrated into the lithographic apparatus LA or the lithography cell LC, or may be a separate device.

[0098] In order to achieve the measurement, one or more targets may be provided on the substrate. In an embodiment, the target is specially designed and may include a periodic structure. In an embodiment, the target is a part of a device pattern, for example, a periodic structure of the device pattern. In an embodiment, the device pattern is a periodic structure of a memory device (e.g., a bipolar transistor (BPT), a bit line contact (BLC), etc.).

[0099] In an embodiment, the target on the substrate may include one or more one-dimensional periodic structures (e.g., gratings) that are printed such that after development, the periodic structural features are formed by solid resist lines. In an embodiment, the target may include one or more two-dimensional periodic structures (e.g., gratings) that are printed such that after development, the one or more periodic structures are formed by solid resist guide posts or vias in the resist. The bars, guide posts or vias may alternatively be etched into the substrate (e.g., etched into one or more layers on the substrate).

[0100] In an embodiment, one of the parameters of interest in the patterning process is overlap. Overlap can be measured using dark field scatterometry, in which the zeroth order of diffraction (corresponding to specular reflection) is blocked and only higher orders are processed. Examples of dark field measurements can be found in PCT patent application publications WO 2009 / 078708 and WO 2009 / 106279, which are hereby incorporated by reference in their entirety. Further developments of the technology have been described in U.S. patent application publications US2011-0027704, US2011-0043791, and US2012-0242970, which are hereby incorporated by reference in their entirety. Diffraction-based overlap using dark field detection of diffraction orders enables overlap measurement of smaller targets. These targets can be smaller than the irradiation spot and can be surrounded by device product structures on the substrate. In an embodiment, multiple targets can be measured in one radiation capture.

[0101] Figure 3A flow chart of a method for determining the location of a potential defect (e.g., a "hot spot") in a lithography process according to an embodiment is shown. In process P311, a site of interest is identified based on a process design pattern. The details of the method are described below, but in general, the site of interest can be identified by analyzing a pattern on a pattern forming device using an empirical model or a computational model. In the empirical model, an image of the pattern (e.g., a resist image, an optical image, an etching image) is not simulated. Instead, the empirical model predicts the site of interest based on the correlation between the processing parameters, the parameters of the pattern, and the site of interest. For example, the empirical model can be a classification model or a database of defect-prone patterns. In the computational model, a portion or characteristic of the image is calculated or simulated, and the site of interest is identified based on the portion or the characteristic. For example, a site of interest corresponding to a potential line pullback defect can be identified by finding a line end that is too far away from its desired position. A site of interest corresponding to a potential bridging defect can be identified by finding a location where two lines are unexpectedly joined. A site of interest corresponding to a potential overlay defect can be identified by finding two features that are unexpectedly overlaid or unexpectedly not overlaid on a separate layer. Empirical models are generally less computationally expensive than computational models. The process window of the part of interest can be determined based on the position and the process window of the individual position and / or the process window of the part of interest can be compiled into a mapping-that is, the process window that varies with the position is determined. This process window mapping can characterize the layout-specific sensitivity and processing margin of the pattern. In another example, the part of interest and / or its process window can be experimentally determined, such as by FEM wafer inspection or suitable measurement tools. A group of parts of interest may include those defects that cannot be detected in post-development inspection (ADI) (usually optical inspection), such as resist top loss, resist undercut, and the like. Conventional inspections only reveal defects at the part of interest after irreversibly processing (e.g., etching) the substrate, when the wafer cannot be reprocessed. However, simulations can be used to determine where defects may occur and to what extent the severity may be. Based on this information, a decision can be made to use a more accurate inspection method (and typically more time consuming) to detect specific hot spots / possible defects to determine whether the defect / wafer requires reprocessing, or a decision can be made to reprocess the imaging of a specific resist layer (remove the resist layer with the resist top loss defect and re-coat the wafer to re-image that specific layer) before performing an irreversible process (e.g., etching).

[0102] In process P312, the processing parameters according to which the processing of the portion of interest (e.g., imaging or etching onto the substrate) is performed are determined. The processing parameters may be local-dependent on the position, the tube core, or both. The processing parameters may be global-independent of the position and the tube core. An exemplary way to determine the processing parameters is to determine the state of the lithographic equipment. For example, the laser bandwidth, focus, dose, source parameters, projection optical device parameters, and the spatial or temporal variation of these parameters can be measured from the lithographic equipment. Another exemplary way is to infer the processing parameters from the measurement performed on the substrate or from the data obtained by the operator of the processing equipment. For example, the measurement may include inspecting the substrate using a diffraction tool (e.g., ASML YieldStar), an electron microscope, or other suitable inspection tools. The processing parameters for any position on the processed substrate (including the identified portion of interest) can be obtained. The processing parameters can be compiled into a mapping that varies with position-lithographic parameters or process conditions. Of course, other processing parameters can be expressed as a function of position, that is, expressed as a mapping. In an embodiment, the processing parameters can be determined before and preferably immediately before each portion of interest is processed.

[0103] In process P313, the presence, probability of presence, characteristics, or a combination thereof of potential defects at the site of interest are determined based on the processing parameters and / or other information based on which the site of interest is processed. This determination may include comparing the processing parameters with the process window of the site of interest - if the processing parameters fall within the process window, there are no defects; if the processing parameters fall outside the process window, at least one defect is expected to exist. Suitable empirical models (including statistical models) may also be used to make this determination. For example, a classification model may be used to provide the probability of the presence of a defect. Another way to make this determination is to use a computational model to simulate an image or expected patterned profile of the site of interest based on the processing parameters and measure the image or profile parameters. In an embodiment, the processing parameters may be determined immediately after processing a pattern or substrate (i.e., before processing a pattern or the next substrate). The determined presence and / or characteristics of a defect may be used as a basis for a decision to dispose (secondary processing or acceptance). In an embodiment, the processing parameters may be used to calculate a moving average of a lithography parameter. The moving average is used to capture long-term drifts of lithography parameters without being disturbed by short-term fluctuations.

[0104] In an embodiment, the part of interest is identified based on a simulated image of a pattern on a substrate. Once the simulation of the patterning process is completed (e.g., including a process model, such as an OPC model and a manufacturability inspection model), the potential weaknesses that vary with process conditions in the design, i.e., the part of interest, can be calculated according to one or more definitions (e.g., certain rules, thresholds, or indicators). The part of interest can be determined based on an absolute CD value, one or more rates of change of CD relative to the parameters that vary in the simulation ("CD sensitivity"), a slope of spatial image intensity, or NILS (i.e., "edge slope" or "normalized image logarithmic slope", often abbreviated as "NILS"). (This indicates a lack of clarity or image blur, where the edge of the resist feature is expected (calculated from a simple threshold / bias model or a more complete resist model)). Alternatively, the part of interest can be determined based on a set of predetermined rules such as those used in a design rule checking system, the set of predetermined rules including but not limited to line end pullback, corner rounding, proximity to adjacent features, pattern necking or pinching, and other indicators of pattern deformation relative to the desired pattern. The CD sensitivity to small changes in mask CD is a lithographic parameter known as MEF (Mask Error Factor) MEEF (Mask Error Enhancement Factor). Calculation of MEF with focus and exposure provides an indication of the probability that mask process variation convolved with wafer process variation will result in unacceptable pattern degradation for a particular pattern element. Regions of concern can also be identified based on variations in overlay error relative to underlying or subsequent process layers and CD variations, or by sensitivity to variations in overlay and / or CD between exposures in a multi-exposure process.

[0105] In an embodiment, pattern fidelity metrology can be performed as a guided defect inspection, where a simulation tool is used to identify patterns that are likely to fail, and the simulation tool guides the inspection system to the location of the identified pattern in the wafer to improve the efficiency of the inspection system. The inspection system acquires and analyzes the pattern / hotspot / defect image on the wafer. For example, the wafer image can be acquired from a reflection image of an optical system (dark field or bright field inspection system) or an electron beam system.

[0106] Electron beam systems have higher resolution than optical systems, but they are also relatively slow and scanning the entire wafer image is not practical. To speed up electron beam inspection (or even speed up optical systems), simulations are configured to guide the inspection system to look at areas on the wafer where the probability of defects occurring is relatively high within the wafer. As a result, the inspection process can be accelerated by several orders of magnitude without loss of defect capture accuracy.

[0107] Each chip design contains a large number of patterns, and only a small portion of the patterns are likely to cause defects. For example, these patterns can be areas of concern or "hot spots". Defects occur due to process variations (e.g., variations in process parameters such as focus and dose) and hot spots are those patterns that are likely to fail first or have a higher probability of failure due to such process variations. Process simulations can be performed to identify hot spots without the need for actual wafers and inspection tools.

[0108] Thus, guided inspection employs simulation to identify a very small number of locations of interest ("hot spots") relative to the larger design layout of the chip or wafer, and then drives the inspection system to focus on inspecting areas on the wafer corresponding to the patterns in the locations of interest, and not inspecting the rest of the wafer, thereby increasing throughput by several orders of magnitude.

[0109] Various aspects of pattern fidelity metrology and methods for hotspot determination or verification are discussed in detail in various patents / patent applications, which are incorporated herein by reference in their entirety. For example, U.S. patent application 15 / 546,592 describes process variability-aware adaptive inspection and measurement, which discusses, for example, defect prediction methods based on changes in process parameters for defect discovery. U.S. patent application 15 / 821,051 describes hotspot identification of process windows or overlapping process windows based on areas of concern (e.g., process window limit patterns or hotspot patterns) of design layouts. U.S. patent application 15 / 580,515 describes a method for defect verification that aligns a measurement image with a first image of a wafer (e.g., a simulated image) and employs a verification process and threshold feedback associated with alignment / misalignment of the images. PCT patent application publication WO2017080729A1 describes a method for identifying process window boundaries for improved hotspot discovery.

[0110] Existing solutions related to computational lithography (e.g., pattern fidelity metrology / monitoring for wafer defect inspection as previously discussed) employ modules such as computational hotspot detection (CHD) (e.g., software), which use computational lithography models to identify hotspots (parts of interest) in the full chip to guide inspection equipment (e.g., electron beam). CHD is configured to perform beyond OPC verification (e.g., defects related to OPC) and discover process window defects, and may also generate tens of thousands of parts of interest (hotspots) for full chip design. Due to the fast turnaround time requirements and the relatively low speed of measurement using inspection tools, only a small portion (e.g., thousands of parts per million) of hotspots in the full wafer may be inspected. To address this problem, the computational model employs a grading indicator (also referred to as a grade) to indicate the severity of individual hotspots. The severity of a hotspot is a measure of the degree of possibility that a hotspot pattern will be converted into one or more physical wafer defects. For example, a high degree hotspot means that the hotspot may be converted into a defect, and the actual count of such defects associated with the hotspot may be relatively high compared to other patterns. Therefore, such hotspots will also be graded higher. A low level hot spot means that it is unlikely to convert into one or more defects and the actual defect count on the wafer will likely be small or non-existent. Such a hot spot will be graded lower.

[0111] Based on the classification, the inspection system can select a small number of sites of interest (e.g., hot spots with relatively high grades) for defect inspection. Therefore, accurate identification of the sites of interest (hot spots) and their degree / grading is critical to ensure a high capture rate (i.e., more true positives or more data revealing defects associated with the pattern) and a low nuisance rate (i.e., fewer false positives or less data associated with defect-free patterns).

[0112] As mentioned previously, due to the amount of time and resources required to make the measurements, measurements via the metrology tool are performed on a limited number of locations of interest (e.g., hotspot locations) on the printed wafer. Incorrect hotspot grading may direct the inspection equipment to less important locations (e.g., non-hotspot locations) on the printed substrate, thereby spending (or wasting) tool time inspecting patterns that are unlikely to cause real defects.

[0113] After the mask design including OPC for auxiliary features (e.g., SRAF and SERIF), the next step is mask verification, such as OPC verification. Mask verification is a standard step in the mask data preparation (MDP) process for factory verification of finished masks before sending the mask design for manufacturing or manufacturing facilities. The purpose of this mask verification is to identify errors or weaknesses in the design after OPC that will potentially cause patterning defects on the printed substrate. In an embodiment, this mask verification can be performed using software that adopts lithography manufacturability verification (LMC or LMC+), such as Tachyon software that adopts LMC rules. LMC+ can refer to a lithography verification platform that is configured to address verification challenges at advanced nodes (1X and sub-10 nm technology nodes). The re-architecture focuses on three main goals: accuracy, performance, and ease of use. LMC+ can include elements such as core engines for image / contour simulation and defect measurement, flexible inspection processes, and user-configurable detectors. The accuracy of mask verification depends on the accuracy of the patterning process model including the OPC model. Inaccuracies in the process model lead to missing real defects on the substrate or defects that are not real and are obstacles. In an embodiment, a defect refers to a feature or a portion of a feature that does not meet the specification when imaged on the substrate. For example, a defect can be necking, hole closure, merged holes, etc.

[0114] Some defects identified via LMC are also sent for substrate inspection or monitoring. In an embodiment, the locations on the mask corresponding to defects identified by LMC are referred to as locations of interest or hot spots. In an embodiment, a location of interest (hot spot) may be defined as a location on the mask that has a high probability of becoming a real defect when the pattern associated with the location of interest (hot spot) is imaged on the substrate.

[0115] For example, ASML's pattern fidelity metrology (PFM) product relies on certain patterns or their locations (e.g., hot spots) identified by LMC to direct electron beam inspection only to specific locations on the printed substrate to improve efficiency. Due to the turnaround time requirements for PFM and the speed of the inspection tool, PFM is only able to inspect a small portion of the entire printed substrate, typically thousands of these locations (e.g., hot spots). To address this inspection problem, the desired patterns identified by LMC (e.g., associated with hot spots) need to be graded based on the likelihood that they will become real defects when imaged on the substrate, and PFM relies on this hot spot grading to select a small portion of hot spots for inspection. Therefore, accurately identifying the locations of concern (hot spots) and their intensities is a step that can be performed to ensure high capture rates and low hindrance rates for PFM.

[0116] Process models, including OPC models, may be inaccurate due to several approximations used to improve the speed of the simulation process. Therefore, a more conservative approach is used, where strict specifications are imposed on the pattern or features therein so as not to miss potential defects. However, the result is a large number of locations of interest that correspond to nuisance defects (i.e., defects that may not appear on the actual printed substrate) are inspected.

[0117] Errors in defect identification via LMC may also affect the grading of locations of concern (hot spots). When grading is inaccurate, the wrong hot spot list is used for the guided inspection, which may result in missing real defects on the printed substrate, which may not be in the sampled hot spot list, or using a large number of nuisance defects that waste inspection time.

[0118] As described above, the methods and systems described herein facilitate grouping image pattern locations of interest (associated with potential defects) with a reduced total group count, while still grouping potential patterned defects associated with matching defect behavior together in the same group. More generally, the methods and systems can be used to group any image pattern to determine wafer behavior during patterning. The methods and systems utilize trained machine learning models, as described below. This improves the LMC (and / or LMC+) process for the user and / or has other advantages.

[0119] Current LMC and / or LMC+ grouping methods are based on user-defined gds (e.g., an electronic file type that defines a design) layers. The gds layers are typically pre-resolution enhancement technology (RET) designs. Defects with the same pattern matching (PM) layer in a specific matching range are grouped into the same group. The PM range is a key factor in the current grouping process. The larger the PM range that produces a larger group count, the smaller the PM range that groups designs associated with potential defects with different behaviors into the same group. As technology nodes continue to shrink, both the potential defect count and the potential defect shape diversity increase. Therefore, it becomes more challenging to achieve a balance between accurate behavior-based grouping and the overall number of groups. In addition, the PM range is typically a global value that applies equally to all patterns, while a more appropriate PM range can be determined based on a combination of imaging conditions and pattern geometry that varies between different patterns.

[0120] In a typical system, the pre-RET design is often used for the PM layer, which means that separate patterns (with potential defect sites of interest) with the same pre-RET design within the defined PM range will be considered to have the same wafer behavior (e.g., for grouping or some other future processing). However, separate patterns often have very different post-RET configurations and (e.g.) scatter grid placements (and therefore have very different behaviors), even if their pre-RET designs are the same. While the profile CDs of separate patterns around different potential defect sites may be similar due to constraints in the OPC correction process, the aerial images (AI) and resist images (RI) of separate patterns around the potential defect sites may have significant differences, which may cause large differences in the behavior of the patterns (e.g., defects) on the final wafer.

[0121] By way of non-limiting example, FIG. 4a illustrates how one isolated line 400 of a pattern 402 may have different OPC correction results 404 and 406. FIG. 4a illustrates a main OPC structure 408 and a sub-resolution assist feature (SRAF) 410. As shown in FIG. 4a, the same pre-RET design (pattern 402) may have different scatter grids (SBARs) and / or other post-RET configurations 404 and 406. The pre-RET design is used for a PM layer (not shown in FIG. 4a). As described above, multiple individual patterns (with potential defect sites of interest) having the same pre-RET design within a defined PM range will be considered to have the same wafer behavior (e.g., for grouping or some other future processing). However, as shown in FIG. 4a, multiple individual patterns often have different post-RET configurations and (e.g.) scatter grid placements (and thus have very different behaviors) even if their pre-RET designs are the same.

[0122] Various factors may affect the final on-wafer behavior of defects. These factors are sensitive to long-range pattern features (e.g., surrounding features outside the immediate area of ​​the image pattern site of interest associated with the potential defect). Unfortunately, in typical systems, for LMC and / or LMC+, most of the long-range features that will affect the post-resist (final) wafer (e.g., defect) behavior are not considered. By way of non-limiting example, FIG. 4b illustrates two patterns 446 and 448 (for the site of interest) including potential defects 450 and 452. Areas 451 and 453 of patterns 446 and 448 (e.g., pattern matching (PM) ranges in a typical system) appear to have the same design 454, and thus will be grouped into the same group by a typical system. However, if different long-range features 456 and 458 of patterns 446 and 448 are considered, potential defects 450 and 452 may ultimately behave differently on the wafer due to the different long-range features 456 and 458 surrounding defects 450 and 452.

[0123] Compared to typical systems, when grouping image patterns that cause matching (e.g., defects or other) wafer behaviors during the patterning process, the present methods and systems utilize patterning process images (e.g., aerial images, resist images, etc.) and consider long-range features and other information, rather than using pre-RET designs (e.g., .gds files) and ignoring long-range features. These new pattern grouping methods and systems eliminate the disadvantages of grouping based on pre-RET designs. The present methods and systems are configured to consider aerial images, resist images, etc., short-range and long-range pattern features, and / or other information, so that patterns indicating defects with the same design within a limited range are separated into different groups if their behaviors on the final wafer are predicted to be different. At the same time, the present methods and systems are configured so that patterns indicating defects with different designs but matching behaviors on the wafer are grouped together.

[0124] Because final on-wafer behavior is difficult to detect (e.g., average CD / EP error compared to simulation results or other metrics extracted from wafer SEM images), the present method and system utilizes machine learning based pattern grouping, where a machine learning model is trained to predict final wafer (and / or wafer defect) behavior based on (spatial, resist, etc.) images of the pattern.

[0125] As an example, a machine learning model can be and / or include a mathematical equation, an algorithm, a plotted graph, a chart, a network (e.g., a neural network), and / or other tools and machine learning model components or elements. For example, a machine learning model can be and / or include one or more neural networks having an input layer, an output layer, and one or more intermediate or hidden layers. In some embodiments, the one or more neural networks can be and / or include a deep neural network (e.g., a neural network having one or more intermediate or hidden layers between the input layer and the output layer).

[0126] The one or more neural networks may be based on a large collection of neuron units (or artificial neurons). The one or more neural networks may not strictly imitate the way biological brains work (e.g., via multiple large clusters of multiple biological neurons connected by axons). Each neuron unit of the neural network may be connected to many other neuron units of the neural network. Such connections may strengthen or inhibit their influence on the activation state of the connected neuron units. In some embodiments, each individual neuron unit may have a summation function that combines the values ​​of all its inputs. In some embodiments, each connection (or neuron unit itself) may have a threshold function so that the signal must exceed the threshold before it is allowed to propagate to other neuron units. These neural network systems may be self-learning and trained, rather than explicitly programmed, and may perform significantly better in certain problem-solving areas compared to traditional computer programs. In some embodiments, the one or more neural networks may include multiple layers (e.g., where the signal path traverses from the front-end layer to the back-end layer). In some embodiments, the neural network may utilize backpropagation techniques, where forward stimulation is used to reset weights for the "front-end" neuron units. In some embodiments, stimulation and inhibition of the one or more neural networks may flow more freely, where connections interact in a more chaotic and complex manner. In some embodiments, the one or more intermediate layers of the neural network include one or more convolutional layers, one or more recurrent layers, and / or other layers.

[0127] The one or more neural networks may be trained using training data. The training data may include a set of training samples. Each sample may be a pair including: an input object (a patterned process image including an image pattern of a location of interest (e.g., a location including a potential defect) and / or a vector associated with a particular image (the vector may be referred to as a feature vector); and a desired output value (also referred to as a management signal), such as an indication of final wafer and / or defect behavior. A training algorithm analyzes the training data and adjusts the behavior of the neural network by adjusting parameters of the neural network (e.g., weights of the one or more layers) based on the training data. For example, assume that a set of N (the count of the input data set) training samples is of the form {(x1, y1), (x2, y2), …, (x N ,y N )} so that x i is the eigenvector of the ith example and y iis its management signal, then the training algorithm seeks a neural network g: X→Y, where X is the input space and Y is the output space. A feature vector is a vector that represents an object (e.g., a pattern image in the above example). The size of the feature vector depends on the neural network structure. In some embodiments, the input sample can be a single object or an object / feature vector pair, which also depends on the neural network structure. The vector space associated with these vectors is often called the feature space. After training, the neural network can be used to make predictions using new samples.

[0128] Figure 5 An overview of operations 500 as part of the present method and / or performed by the present system is illustrated. For example, the present method includes converting 502 one or more patterning process images 504 including image patterns of locations of interest (e.g., potential defect locations) into feature vectors 506 based on a trained machine learning model. The feature vectors 506 correspond to features 508 of the image patterns. The present method includes grouping 510 the feature vectors having features indicative of image patterns that induce matching (e.g., defective or other) wafer behavior during the patterning process based on the trained machine learning model. In some embodiments, the present method for grouping image patterns to determine wafer behavior is a method for grouping image patterns to identify potential wafer defects during the patterning process, and the method includes grouping 510 the feature vectors having features indicative of image patterns that induce matching wafer defect behavior during the patterning process based on the trained machine learning model. In some embodiments, as Figure 5 As shown, the method includes one or more verification operations 511 (e.g., SEM inspection of a physical wafer having defects predicted by a machine learning model to have the same defect behavior, etc.), wherein the one or more verification operations 511 are configured to verify that the grouping predicted by the machine learning model includes defects that produce matching defect behavior (which can be used (for example) to train the machine learning model).

[0129] In some embodiments, the one or more patterning process images include an aerial image, a resist image, and / or other images 512. In some embodiments, the method is used during the OPC portion of the patterning process. In some embodiments, the grouped feature vectors are used to detect potential patterning defects on a wafer during lithography manufacturability inspection. For example, during an LMC operation, an aerial image, a resist image, a mask image, and / or other images may be generated and stored as a temporary file. In some embodiments, the feature vector describes the image pattern and includes features associated with the LMC and / or LMC+model terms and / or imaging conditions 514 (e.g., a scanner fingerprint) for one or more patterning process images. However, other uses of the method are contemplated.

[0130] In some embodiments, the trained machine learning model includes a trained first machine learning model and a trained second machine learning model, and / or other trained machine learning models. In some embodiments, converting one or more patterned process images including image patterns into feature vectors is based on the trained first machine learning model. In some embodiments, the first machine learning model is an image encoder (e.g., a convolutional neural network) that is trained to extract features from an aerial image and / or a resist image, the features indicating a long-range pattern structure that affects the behavior of a wafer or wafer defect and a short-range aerial image pattern configuration and / or a resist image pattern configuration. In some embodiments, feature extraction separates local features of an image from global features. The first machine learning model is configured to encode the extracted features into a feature vector. In other words, a separate aerial image and / or resist image of an image pattern including a portion of interest (e.g., a possible defect portion) is encoded and compressed into a low-dimensional feature vector (which can also be decoded into an aerial image and / or resist image with limited deformation compared to the original image).

[0131] Figure 6 The diagram illustrates converting 600 one or more patterned process images 602 including image patterns associated with a location of interest (e.g., a possible defect location) into a feature vector. Converting the one or more patterned process images including image patterns associated with a location of interest (e.g., a possible defect location) into a feature vector may be and / or include encoding the one or more patterned process images into a feature vector using an encoder 604 (e.g., an encoder architecture) utilizing the first machine learning model and / or other machine learning models. Figure 6 In the example shown in , the patterning process image 602 may be a 128×128×3 (this resolution is not intended to be limiting) mask image, aerial image, resist image, and / or other image. Figure 6 In the example shown in , conversion and / or encoding 600 includes inputting an image 602 into a neural network 606 (e.g., a convolutional encoder portion of the neural network 606), performing a flattening operation 608, and extracting short-range features 610 and long-range features 612 and encoding them into feature vectors. Figure 6 The specific examples shown in should not be considered limiting. The present methods and systems may use one or more other techniques for image compression.

[0132] Figure 6Also illustrated is decoding 614 the feature vector into an image 616. In this example, image 616 may be similar and / or identical to image 602. Decoding 614 may be performed using a decoder 615 (decoder architecture) of the first machine learning model and / or other machine learning models. Figure 6 As shown, decoding 614 may include decoding and / or deconvolution operations 616, 618, 620, and 622 performed based on the short-range features 610 and / or the long-range features 612 of the feature vector. In some embodiments, the decoding and / or deconvolution operations 616, 618, 620, and 622 include operations 616 and 620, as well as convolution decoding operations 618 and 622. (For example, the neural network may be fully connected so that all neurons in the previous layer are connected to each neuron in the current layer so that each neuron in the current layer can process all information from the previous layer). The decoding and / or deconvolution operations 620 and 622 form part of a path 624, and output 626 a portion or image 628 of an image 630 associated with a central area of ​​the image (e.g., at or near a possible defect site) based on the short-range features 610. These images 628 or portions of images 630 may have a resolution of, for example, 32×32×3 (this is not intended to be limiting). For example, this may include utilizing a high recovery rate of low-dimensional short-range features. Decoding and / or deconvolution operations 616 and 618 form a portion of path 640 based on short-range features 610 and / or long-range features 612 and output 642 a complete image 644. These images 642 may have a resolution of (for example) 128×128×3 (this is not intended to be limiting). For example, this may include utilizing a moderate recovery rate of high-dimensional (for example, all) features.

[0133] In some embodiments, the first machine learning model includes a loss function. Thus, the first machine learning model is configured such that some image information is discarded after the (encoding) compression step. However, the first machine learning model is trained such that relevant image information related to the wafer (defect) behavior is not discarded. For example, an image (e.g., Figure 6 630) shown in 630 can be weighted higher (as part of a loss function, for example) than features from other areas of the image. In some embodiments, the first machine learning model is trained using simulated space images and / or resist images. In some embodiments, the first machine learning model is iteratively retrained based on output from the first machine learning model and additional simulated space and / or resist images. In some embodiments, the first machine learning model includes the loss function, and iteratively retraining the first machine learning model based on output from the first machine learning model and additional simulated space and / or resist images includes adjusting the loss function.

[0134] In some embodiments, grouping feature vectors having features indicating image patterns causing matching wafers or wafer defect behavior is based on a trained second machine learning model. In some embodiments, such grouping can be and / or include clustering and / or other forms of grouping. In some embodiments, grouping feature vectors having features indicating image patterns causing matching wafers or wafer defect behavior based on the second machine learning model includes: grouping feature vectors into a first group based on features indicating short-range spatial image pattern configurations and / or resist image pattern configurations; and grouping feature vectors into a second group based on the first group and long-range pattern structures affecting wafer or wafer defect behavior.

[0135] Features indicative of short-range spatial image pattern configurations and / or resist image pattern configurations include features associated with LMC and / or LMC+model terms and / or imaging conditions for the one or more patterning process images, and / or other information. Such information does not include, for example, information about wafer defect behavior. Grouping the feature vectors into a first group can be, for example, a coarse clustering in which images corresponding to vectors in a given first group share similar spatial and / or resist image patterns in a region of interest (e.g., at or near a portion of the pattern corresponding to a potential wafer defect).

[0136] The second group includes a group of feature vectors having features indicative of image patterns that cause matching wafers or wafer defect behavior during patterning. The second group is grouped (or clustered) based on the full feature vectors (short-range and long-range image pattern configuration features, features related to LMC and / or LMC+model terms and / or imaging conditions, etc.). Using data from a wafer verification process (e.g., Figure 5The second machine learning model is trained using labeled wafer defects of operation 511 shown in . For example, as part of LMC and / or LMC+ operations, a large aerial image, resist image, and / or other image of a pattern at or near a potential defect site is paired with actual defect coordinate information. In some embodiments, a given labeled wafer defect includes information related to: a short-range aerial image pattern configuration and / or a resist image pattern configuration associated with a given labeled wafer defect; a long-range pattern structure associated with a given labeled wafer defect; the behavior of a given labeled wafer defect during patterning; the coordinates of a site of a given labeled wafer defect and a critical dimension at said site; an indication of whether a given labeled wafer defect is a real defect; information related to exposure of an image of a given labeled wafer defect at said site (e.g., delta_focus, delta_dos, overlay error, and / or other process errors); and / or other information. In some embodiments, information related to the short-range spatial image pattern configuration and / or the resist image pattern configuration associated with a given marked wafer defect and the long-range pattern structure associated with a given marked wafer defect is related to the probability of whether the given marked wafer defect is real.

[0137] Using this training, and with the full feature vector as input, the second machine learning model outputs a second set of feature vectors (wherein the second set includes a set of feature vectors having features indicative of image patterns that induce matching wafers or wafer defect behavior during patterning). In some embodiments, the second machine learning model is iteratively retrained based on output from the second machine learning model, given flagged wafer defects, additional flagged wafer defects from a wafer verification process, and / or other information.

[0138] Figure 7 Illustrated is grouping 700 of feature vectors 702 having features indicative of image patterns that induce matching wafers or wafer defect behavior during patterning. Figure 7 7. The process of converting (encoding) 704 one or more patterning process images 706 including image patterns associated with locations of interest (eg, potential defect locations) into feature vectors 702 (also shown in FIG. Figure 6 The feature vector 702 has a short-range feature 710 and a long-range feature 712. Figure 7The diagram illustrates grouping 714 of feature vectors 702 into a (“roughly”) first group 716 based on features 710 that are indicative of a short-range spatial image pattern configuration and / or a resist image pattern configuration (e.g., grouping geometrically similar images), and grouping 718 of feature vectors into second groups 720, 722 based on the first group 716, the short-range features 710, and long-range pattern structures 712 (e.g., all features) that affect a wafer or wafer defect behavior (e.g., both the short-range features 710 and the long-range features 712 affect wafer defect behavior). Figure 7 Also illustrated 748 is how feature vectors 702 grouped into first group 716 share similar corresponding aerial images and / or resist images 750 within group 752 .

[0139] In some embodiments, the method includes identifying groups of potential wafer defects having matching wafer defect behavior during the patterning process based on grouping feature vectors having features indicative of image patterns causing matching wafer defect behavior during the patterning process. This may include, for example, manual inspection of the potential defects that have been classified in each group, etc., as described above. Figure 7 In the example shown in , the defect candidates that are ultimately inspected by the SEM can be labeled as risky or safe. These risky and safe defects should have been grouped into different groups by the machine learning model. If there is no grouping, this information can be fed back into the model to further train the model. New SEM verification labels can be continuously fed into the second machine learning model to improve the final (second) grouping (clustering) results. This example is not intended to be limiting. It should be noted that the user can also use other criteria to separate different wafer behaviors and retrain the second machine learning model (and / or any other machine learning model of the present method and system) to output enhanced grouping results.

[0140] In some embodiments, the method includes adjusting the mask layout design of the mask of the patterning process based on the potential wafer defect group with matching wafer defect behavior during the patterning process. In some embodiments, the method is used to generate a gauge line / defect candidate list to enhance the accuracy and efficiency of wafer verification. For example, when a user identifies several confirmed wafer defect locations, the system can be configured to trace the defects back to the group to which they belong. Other defect candidates within the same group may have a higher risk that they are also wafer defects. The system can be configured to provide other high-risk candidate locations in the form of a gauge line file and / or in other forms. In some embodiments, the method also includes predicting a grading indicator based on a trained machine learning model to indicate the relative severity of a separate potential wafer defect. The grading indicator can be a measure of the degree of possibility that a potential wafer defect will be converted into one or more physical wafer defects. In this way, higher risk potential defects can be prioritized, for example, for inspection and / or other purposes. As another example, when the user completes the grouping using the ML method, there may be some groups within which no images have been examined by the SEM for verification. Since the wafer behavior within each group determined by the present system will be much more consistent compared to traditional grouping methods, the user can randomly select one or several sites from each group for further SEM verification. Other applications are contemplated.

[0141] Figure 8 An example inspection apparatus (e.g., a scatterometer) is depicted. The scatterometer comprises a broadband (white light) radiation projector 2 that projects radiation onto a substrate W. The redirected radiation is passed to a spectrometer detector 4, which measures the spectrum 10 (intensity as a function of wavelength) of the specularly reflected radiation, as for example in Figure 8 Based on this data, the processor PU can, for example, perform rigorous coupled wave analysis and nonlinear regression, or perform the same as Figure 8 The structure or profile that resulted in the detected spectrum is reconstructed by comparing the simulated spectra to the library shown at the lower right of FIG. 1 . Typically, for the reconstruction, the general form of the structure is known, and some variables are assumed based on knowledge of the process by which the structure was made, leaving only a few variables of the structure to be determined from the measured data. Such an inspection device can be configured as a normal incidence inspection device or an oblique incidence inspection device.

[0142] Fig. 9Another inspection apparatus that may be used is shown in . In this arrangement, radiation emitted by a radiation source 2 is collimated using a lens system 12 and transmitted through an interference filter 13 and a polarizer 17, and is reflected by a partially reflective surface 16 and focused into a spot S on a substrate W via an objective lens 15, which has a high numerical aperture (NA), desirably at least 0.9 or at least 0.95. Immersion inspection apparatus (using a relatively high refractive index fluid, such as water) may even have a numerical aperture of more than 1.

[0143] For example, in the lithography equipment LA ( Figure 1 ), one or more substrate tables may be provided to hold the substrate W during measurement operations. The substrate tables may be in the form of Figure 1 The substrate table WT of the inspection device is similar or identical. In the example where the inspection device is integrated with the lithographic device, the substrate table can even be the same substrate table. Coarse positioning means and fine positioning means can be provided to the second positioning device PW, which is configured to accurately position the substrate relative to the measuring optical system. Various sensors and actuators are provided, for example, to obtain the position of the target of interest and bring the target of interest into position under the objective lens 15. Usually, many measurements will be made on the target at different locations across the substrate W. The substrate support can be moved in the X and Y directions to obtain different targets, and in the Z direction to obtain the desired location of the target relative to the focus of the optical system. For example, when in practice the optical system can remain substantially stationary (usually in the X and Y directions, but possibly also in the Z direction) and only the substrate moves, it is convenient to consider and describe the operation as if the objective lens is brought into different locations relative to the substrate. Assuming that the relative position of the substrate to the optical system is correct, it does not matter in principle which of the substrate and the optical system moves in the real world, or whether both move, or a combination of part of the optical system moving (e.g. in the Z direction and / or in the tilt direction) while the rest of the optical system is stationary and the substrate moves (e.g. in the X and Y directions and optionally also in the Z direction and / or in the tilt direction).

[0144] The radiation redirected by the substrate W then passes through the partially reflective surface 16 into the detector 18 for detection of the spectrum. The detector 18 may be located at the back-projected focal plane 11 (i.e., at the focal length of the lens system 15), or the plane 11 may be re-imaged onto the detector 18 using auxiliary optics (not shown). The detector may be a two-dimensional detector, enabling measurement of a two-dimensional angular scatter spectrum of the substrate target 30. The detector 18 may be, for example, a CCD or CMOS sensor array, and may use an integration time of, for example, 40 milliseconds per frame.

[0145] The reference beam can be used, for example, to measure the intensity of the incident radiation. To make such a measurement, when the radiation beam is incident on the partially reflective surface 16, a portion of the radiation beam is transmitted through the partially reflective surface 16 as a reference beam towards the reference reflector 14. The reference beam is then projected onto a different portion of the same detector 18 or alternatively onto a different detector (not shown).

[0146] One or more interference filters 13 may be used to select wavelengths of interest in the range of, say, 405 to 790 nm or even lower, such as 200 to 300 nm. The interference filters may be tunable, rather than comprising a collection of different filters. Gratings may be used in place of interference filters. An aperture stop or spatial light modulator (not shown) may be provided in the illumination path to control the range of angles of incidence of the radiation on the target.

[0147] The detector 18 can measure the intensity of the redirected radiation at a single wavelength (or narrow wavelength range), the intensity of the redirected radiation at multiple wavelengths separately, or the intensity of the redirected radiation integrated over a certain wavelength range. In addition, the detector can separately measure the intensity of the transverse magnetic polarized radiation and the transverse electric polarized radiation, and / or the phase difference between the transverse magnetic polarized radiation and the transverse electric polarized radiation.

[0148] The target 30 on the substrate W can be a one-dimensional grating, which is printed so that after development, the grating is formed by solid resist lines. The substrate target 30 can be a two-dimensional grating, which is printed so that after development, the grating is formed by solid resist guide posts or through holes in the resist. The grating, guide posts or through holes can be etched into or onto the substrate (for example, etched into one or more layers on the substrate). The pattern (for example, the pattern of grating, guide posts or through holes) is sensitive to changes in the patterning process (for example, optical aberrations, focus changes, dose changes, etc. in the lithographic projection equipment (specifically, the projection system PS)) and will show changes in the printed grating. Therefore, the measured data of the printed grating is used to reconstruct the grating. One or more parameters of the one-dimensional grating (such as line width and / or shape) or one or more parameters of the two-dimensional grating (such as guide post or through hole width or length or shape) can be input to the reconstruction process performed by the processor PU based on knowledge of the printing step and / or other inspection processes.

[0149] In addition to the measurement of parameters by reconstruction, angle-resolved scatterometry is also used for the measurement of asymmetry of features in the product and / or resist pattern. A particular application of asymmetry measurement is for overlay measurements, where the target 30 comprises a set of periodic features that are overlaid on another set of periodic features. Figure 8 or Fig. 9The concept of asymmetry measurement of an instrument is described, for example, in U.S. Patent Application Publication US2006-066855, which is incorporated herein in its entirety. In short, while the positions of the diffraction orders in the diffraction spectrum of a target are determined solely by the periodicity of the target, asymmetries in the diffraction spectrum are indicative of asymmetries in the individual features that make up the target. Fig. 9 In an instrument where the detector 18 may be an image sensor, such asymmetry in the diffraction orders appears directly as an asymmetry in the pupil image recorded by the detector 18. Such asymmetry may be measured by digital image processing in the unit PU and may be calibrated relative to a known overlap value.

[0150] Fig.10 illustrates a plan view of a typical target 30, and Fig. 9 In order to obtain a diffraction spectrum without interference from surrounding structures, in an embodiment, the target 30 is a periodic structure (e.g., a grating) that is larger than the width (e.g., diameter) of the illumination spot S. The width of the spot S may be smaller than the width and length of the target. In other words, the target is "underfilled" by illumination, and the diffraction signal is substantially free of any signal from product features and the like located outside the target itself. Irradiation arrangements 2, 12, 13, 17 ( Fig. 9 ) may be configured to provide illumination of uniform intensity across the entire back focal plane of the objective 15. Alternatively, illumination may be restricted to an on-axis direction or an off-axis direction, for example by including an aperture in the illumination path.

[0151] Fig.11 An example process for determining values ​​of one or more variables of interest for a target pattern 30 based on measurement data obtained using metrology is schematically depicted. Radiation detected by detector 18 provides a measured radiation distribution 1108 for the target 30. For a given target 30, a radiation distribution 1112 may be calculated / simulated from a parameterized model 1106 using, for example, a numerical Maxwell solver 1110. The parameterized model 1106 shows example layers of various materials that make up and are associated with the target. The parameterized model 1106 may include one or more of the variables for features and layers of the portion of the target under consideration, which may be varied and derived. As shown in FIG. Fig.11As shown in , one or more of the variables may include a thickness t of one or more layers, a width w (e.g., CD) of one or more features, a height h of one or more features, and / or a sidewall angle α of one or more features. Although not shown, one or more of the variables may also include, but are not limited to: a refractive index (e.g., real or complex refractive index, refractive index tensor, etc.) of one or more layers, an extinction coefficient of one or more layers, an absorptivity of one or more layers, resist loss during development, a footing of one or more features, and / or a line edge roughness of one or more features. The initial values ​​of the variables may be the initial values ​​expected for the target being measured. The measured radiation distribution 1108 is then compared to the calculated radiation distribution 1112 at 1112 to determine the difference between the two. If there is a difference, the value of one or more of the variables of the parameterized model 1106 may be varied, a new calculated radiation distribution 1112 calculated and compared to the measured radiation distribution 1108, until there is a sufficient match between the measured radiation distribution 1108 and the calculated radiation distribution 1112. At this point, the values ​​of the variables of the parameterized model 1106 provide a good or optimal match to the geometry of the actual target 30. In an embodiment, a sufficient match exists when the difference between the measured radiation distribution 1108 and the calculated radiation distribution 1112 is within a tolerance threshold.

[0152] Fig.12 Schematically depicting an embodiment of an electron beam inspection apparatus 200. A primary electron beam 202 emitted from an electron source 201 is converged by a condenser lens 203 and then passes through a beam deflector 204, an EB deflector 205 and an objective lens 206 to irradiate a substrate 1200 on a substrate stage 1201 at a focal point.

[0153] When the substrate 1200 is irradiated with the electron beam 202, secondary electrons or second electrons are generated from the substrate 1200. The secondary electrons are deflected by the E×B deflector 205 and detected by the secondary electron detector 207. A two-dimensional electron beam image can be obtained by detecting the electrons generated from the sample, synchronously, for example, scanning the electron beam in two dimensions by the beam deflector 204 or repeatedly scanning the electron beam 202 in the X or Y direction by the beam deflector 204, and continuously moving the substrate 1200 in the other direction of the X or Y direction by the substrate stage 1201. Thus, in an embodiment, the electron beam inspection device has a field of view for the electron beam defined by an angular range, and the electron beam can be provided by the electron beam inspection device into the angular range (for example, the angular range that the deflector 204 can provide for the electron beam 202 to pass through). Thus, the spatial range of the field of view is the spatial range to which the angular range of the electron beam can be irradiated on a surface (wherein the surface can be stationary or can move relative to the field).

[0154] The signal detected by the secondary electron detector 207 is converted into a digital signal by an analog / digital (A / D) converter 208, and the digital signal is sent to the image processing system 300. In an embodiment, the image processing system 300 may have a memory 303 for storing all or part of the digital image for processing by a processing unit 304. The processing unit 304 (e.g., specially designed hardware, or a combination of hardware and software, or a computer-readable medium including software) is configured to convert or process the digital image into a data set representing the digital image. In an embodiment, the processing unit 304 is configured or programmed to cause the method described herein to be performed. In addition, the image processing system 300 may have a storage medium 301 configured to store the digital image and the corresponding data set in a reference database. The display device 301 can be connected to the image processing system 300 so that the operator can perform the necessary operations of the equipment with the help of a graphical user interface.

[0155] Fig.13 The system is used to inspect a sample 90 (such as a substrate) on a sample platform 88, and includes a charged particle beam generator 81, a condenser lens module 82, a probe forming objective lens module 83, a charged particle beam deflection module 84, a secondary charged particle detector module 85, and an image forming module 86.

[0156] The charged particle beam generator 81 generates a primary charged particle beam 91. The condenser lens module 82 condenses the generated primary charged particle beam 91. The probe forming objective lens module 83 focuses the condensed primary charged particle beam into a charged particle beam probe 92. The charged particle beam deflection module 84 causes the formed charged particle beam probe 92 to scan across the surface of the area of ​​interest on the sample 90 fastened on the sample platform 88. In an embodiment, the charged particle beam generator 81, the condenser lens module 82 and the probe forming objective lens module 83 or their equivalent designs, alternatives or any combination thereof together form a charged particle beam probe generator that generates a scanning charged particle beam probe 92.

[0157] The secondary charged particle detector module 85 detects secondary charged particles 93 (also together with other reflected or scattered charged particles from the sample surface) emitted from the sample surface once bombarded by the charged particle beam probe 92 to produce a secondary charged particle detection signal 94. The image forming module 86 (e.g., a computing device) is coupled to the secondary charged particle detector module 85 to receive the secondary charged particle detection signal 94 from the secondary charged particle detector module 85 and thereby form at least one scanning image. In an embodiment, the secondary charged particle detector module 85 and the image forming module 86 or their equivalent designs, alternatives, or any combination thereof together form an image forming device that forms a scanning image from the detected secondary charged particles emitted from the sample 90 bombarded by the charged particle beam probe 92.

[0158] In an embodiment, the monitoring module 87 is coupled to the image forming module 86 of the image forming device to monitor, control, etc. the patterning process and / or derive parameters for patterning process design, control, monitoring, etc. using the scanned image of the sample 90 received from the image forming module 86. Thus, in an embodiment, the monitoring module 87 is configured or programmed to cause the method described herein to be performed. In an embodiment, the monitoring module 87 comprises a computing device. In an embodiment, the monitoring module 87 comprises a computer program for providing the functionality herein and encoded on a computer readable medium, the computer readable medium forming the monitoring module 87 or being disposed within the monitoring module 87.

[0159] In an embodiment, similar to using a probe to inspect a substrate Fig.12 Electron beam inspection tools, such as Fig.12 Compared to the CD SEM depicted in the Fig.13The electron current in the system is significantly larger, so that the probe spot is large enough so that the inspection speed can be faster. However, due to the larger probe spot, the resolution may not be as high as that of a CD SEM. In embodiments, the inspection device discussed above may be a single beam or multi-beam device, without limiting the scope of the present disclosure.

[0160] Can process from e.g. Fig.12 and / or Fig.13 The SEM images of the system are extracted to extract contours describing the edges of objects representing device structures in the image. These contours are then quantified via a metric such as CD, typically at user-defined cut lines. Thus, the images of device structures are typically compared and quantified via a metric such as edge-to-edge distance (CD) measured on the extracted contours or a simple pixel difference between the images.

[0161] Fig.14 Example defects such as footing 1402 and necking 1412 defect types are illustrated. These example defects may be observed for certain settings of process variables such as dose / focus. For footing defects, de-scumming may be performed to remove the footing 1404 at the substrate. For necking 2412 defects, the resist thickness may be reduced by removing the top layer 1414. In an embodiment, another defect behavior may be whether defects caused by some areas of concern may be fixed via a post-patterning process. For example, areas of concern that cause defects may be grouped together, defects that may be fixed in a post-patterning process and occur less frequently than other defects.

[0162] Fig.15 An exemplary flow chart for modeling and / or simulating portions of a patterning process is illustrated in . As will be appreciated, the models may represent different patterning processes and need not include all of the models described below. Source model 1500 represents the optical characteristics of the illumination of the patterning device (including the radiation intensity distribution, bandwidth, and / or phase distribution). Source model 1500 may represent the optical characteristics of the illumination, including, but not limited to: numerical aperture settings, illumination sigma, i.e., illumination mean square deviation (σ) settings, and any particular illumination shape (e.g., off-axis radiation shapes such as toroidal, quadrupole, dipole, etc.), where the mean square deviation σ (or sigma) is the outer radial extent of the illuminator.

[0163] The projection optics model 1510 represents the optical properties of the projection optics (including changes in the radiation intensity distribution and / or phase distribution caused by the projection optics). The projection optics model 1510 may represent the optical properties of the projection optics, including aberrations, distortions, one or more refractive indices, one or more physical sizes, one or more physical dimensions, etc.

[0164] The patterning device / design layout model module 1520 captures how the design features are arranged in the pattern of the patterning device and may include a representation of the detailed physical properties of the patterning device, as described, for example, in U.S. Pat. No. 7,587,704, which is incorporated by reference in its entirety. In an embodiment, the patterning device / design layout model module 1520 represents the optical properties (including changes in radiation intensity distribution and / or phase distribution caused by a given design layout) of a design layout (e.g., a device design layout corresponding to features of an integrated circuit, memory, electronic device, etc.), which is a representation of the arrangement of features on or formed by the patterning device. Since the patterning device used in the lithographic projection apparatus can be changed, it is desirable to separate the optical properties of the patterning device from the optical properties of the rest of the lithographic projection apparatus, including at least both the illumination element and the projection optics. The goal of the simulation is often to accurately predict, for example, edge placement and CD, which can then be compared to the device design. The device design is typically defined as a pre-OPC patterning device layout and will be provided in a standardized digital file format such as GDSII or OASIS.

[0165] An aerial image 1530 may be simulated based on the source model 1500, the projection optics model 1510, and the patterning device / design layout model 1520. The aerial image (AI) is the radiation intensity distribution at substrate level. The optical properties of the lithographic projection apparatus (e.g., the properties of the illuminator, patterning device, and projection optics) dictate the aerial image.

[0166] A resist layer on a substrate is exposed by an aerial image, and the aerial image is transferred to the resist layer as a latent image "resist image" (RI) therein. The resist image (RI) can be defined as the spatial distribution of the solubility of the resist in the resist layer. A resist model 1540 can be used to simulate a resist image 1550 based on the aerial image 1530. A resist model can be used to calculate a resist image based on an aerial image, an example of which can be found in U.S. Patent Application Publication No. US 2009-0157360, the disclosure of which is hereby incorporated by reference in its entirety. A resist model typically describes the effects of chemical processes occurring during resist exposure, post-exposure baking (PEB), and development in order to predict, for example, the profile of a resist feature formed on a substrate, and is therefore typically only related to these properties of the resist layer (e.g., the effects of chemical processes occurring during exposure, post-exposure baking, and development). In an embodiment, the optical properties of the resist layer, such as refractive index, film thickness, propagation and polarization effects, may be captured as part of the projection optics model 1510 .

[0167] Typically, the connection between the optical model and the resist model is the simulated spatial image intensity within the resist layer, which originates from the projection of radiation onto the substrate, refraction at the resist interface and multiple reflections in the resist film stack. The radiation intensity distribution (spatial image intensity) is transformed into a latent "resist image" by absorption of the incident energy, which is further modified by diffusion processes and various loading effects. Efficient simulation methods that are fast enough for full-chip applications approximate the actual three-dimensional intensity distribution in the resist stack by means of a two-dimensional spatial (and resist) image.

[0168] In an embodiment, the resist image may be used as input to the post-pattern transfer process model module 1560. The post-pattern transfer process model 1560 defines the performance of one or more post-resist development processes (eg, etching, developing, etc.).

[0169] The simulation of the patterning process can, for example, predict the profile, CD, edge placement (e.g., edge placement error), etc. in the resist and / or etch image. Thus, the goal of the simulation is to accurately predict, for example, edge placement of the printed pattern, and / or aerial image intensity slope, and / or CD, etc. These values ​​can be compared to the intended design to, for example, correct the patterning process, identify locations where defects are predicted to occur, etc. The intended design is typically defined as a pre-OPC design layout that can be provided in a standardized digital file format such as GDSII or OASIS or other file formats.

[0170] Thus, the model formulation describes the known physical and chemical effects of the overall process, and each of the model parameters desirably corresponds to a different physical or chemical effect. Thus, the model formulation sets an upper limit on how well the model can be used to simulate the overall manufacturing process.

[0171] Fig.161 is a block diagram illustrating a computer system 100 that can assist in implementing the methods, processes, or systems disclosed herein. The computer system 100 includes a bus 102 or other communication mechanism for communicating information, and a processor 104 (or multiple processors 104 and 105) coupled to the bus 102 for processing information. The computer system 100 also includes a main memory 106, such as a random access memory (RAM) or other dynamic storage device, coupled to the bus 102 for storing information and instructions to be executed by the processor 104. The main memory 106 can also be used to store temporary variables or other intermediate information during the execution of instructions to be executed by the processor 104. The computer system 100 also includes a read-only memory (ROM) 108 or other static storage device coupled to the bus 102 for storing static information and instructions for the processor 104. A storage device 110, such as a magnetic disk or optical disk, is provided and coupled to the bus 102 for storing information and instructions.

[0172] The computer system 100 may be coupled to a display 112 via the bus 102, such as a cathode ray tube (CRT) or a flat panel or touch panel display for displaying information to a computer user. An input device 114 including alphanumeric and other keys is coupled to the bus 102 for communicating information and command selections to the processor 104. Another type of user input device is a cursor control 116, such as a mouse, trackball, or cursor direction keys, for communicating direction information and command selections to the processor 104 and for controlling movement of a cursor on the display 112. This input device typically has two degrees of freedom in two axes, a first axis (e.g., x) and a second axis (e.g., y), which allows the device to specify a position in a plane. A touch panel (screen) display may also be used as an input device.

[0173] According to one embodiment, a portion of one or more methods described herein may be performed by computer system 100 in response to processor 104 executing one or more sequences of one or more instructions contained in main memory 106. Such instructions may be read into main memory 106 from another computer-readable medium such as storage device 110. Executing the sequence of instructions contained in main memory 106 causes processor 104 to perform the process steps described herein. One or more processors in a multi-processing arrangement may also be employed to execute the sequence of instructions contained in main memory 106. In alternative embodiments, hard-wired circuitry may be used in place of, or in combination with, software instructions. Thus, the description herein is not limited to any specific combination of hardware circuitry and software.

[0174] As used herein, the term "computer-readable medium" refers to any medium that participates in providing instructions to the processor 104 for execution. Such media can take many forms, including but not limited to non-volatile media, volatile media, and transmission media. Non-volatile media include, for example, optical or magnetic disks, such as storage device 110. Volatile media include dynamic memory, such as main memory 106. Transmission media include coaxial cables, copper wires, and optical fibers, including cables that constitute bus 102. Transmission media can also take the form of sound waves or light waves, such as those generated during radio frequency (RF) and infrared (IR) data communications. Common forms of computer-readable media include, for example, floppy disks, flexible disks, hard disks, magnetic tapes, any other magnetic media, CD-ROMs, DVDs, any other optical media, punch cards, paper tapes, any other physical media with hole patterns, RAM, PROMs and EPROMs, FLASH-EPROMs, any other memory chips or cartridges, and carrier waves described below, or any other media from which a computer can read.

[0175] Various forms of computer readable media may be involved in carrying one or more sequences of one or more instructions to the processor 104 for execution. For example, the instructions may be initially carried on a disk of a remote computer. The remote computer may load the instructions into its dynamic memory and send the instructions over a telephone line using a modem. A modem local to the computer system 100 may receive data on the telephone line and convert the data into an infrared signal using an infrared transmitter. An infrared detector connected to the bus 102 may receive the data carried in the infrared signal and place the data on the bus 102. The bus 102 carries the data to the main memory 106, from which the processor 104 retrieves and executes the instructions. The instructions received by the main memory 106 may optionally be stored on the storage device 110 before or after being executed by the processor 104.

[0176] The computer system 100 may also include a communication interface 118 coupled to the bus 102. The communication interface 118 provides bidirectional data communication coupled to a network link 120 connected to a local network 122. For example, the communication interface 118 may be an integrated services digital network (ISDN) card or a modem to provide a data communication connection to a corresponding type of telephone line. As another example, the communication interface 118 may be a local area network (LAN) card to provide a data communication connection to a compatible LAN. A wireless link may also be implemented. In any such implementation, the communication interface 118 sends and receives electrical, electromagnetic, or optical signals carrying digital data streams representing various types of information.

[0177] The network link 120 typically provides data communication to other data devices through one or more networks. For example, the network link 120 can provide a connection to a host computer through a local area network 122 or to a data device operated by an Internet Service Provider (ISP) 126. The ISP 126 in turn provides data communication services through a global packet data communication network, now commonly referred to as the "Internet" 128. Both the local area network 122 and the Internet 128 use electrical, electromagnetic or optical signals that carry digital data streams. The signals through the various networks and the signals on the network link 120 and through the communication interface 118, which carry the digital data to and from the computer system 100, are exemplary forms of carrier waves that transport the information.

[0178] The computer system 100 can send messages and receive data, including program code, through the network, network link 120 and communication interface 118. In the example of the Internet, the server 130 can transmit the requested code for the application program through the Internet 128, ISP 126, local area network 122 and communication interface 118. For example, one such downloaded application can provide all or part of the method described herein. The received code can be executed by the processor 104 when it is received, and / or stored in the storage device 110 or other non-volatile storage device for later execution. In this way, the computer system 100 can obtain application code in the form of a carrier wave.

[0179] Fig.17 An exemplary lithographic projection apparatus that can be used in conjunction with the techniques described herein is schematically depicted. The apparatus comprises:

[0180] - an illumination system IL for conditioning the radiation beam B. In this particular case, the illumination system further comprises a radiation source SO;

[0181] - a first object table (eg patterning device table) MT having a patterning device holder for holding a patterning device MA (eg mask table) and connected to a first positioner for accurately positioning the patterning device relative to the item PS;

[0182] - a second object table (substrate table) WT having a substrate holder for holding a substrate W (e.g. a silicon wafer coated with resist) and connected to a second positioner for accurately positioning the substrate relative to the item PS;

[0183] - a projection system ("lens") PS (eg a refractive, reflective or catadioptric optical system) for imaging the irradiated portion of the patterning device MA onto a target portion C of the substrate W (eg comprising one or more dies).

[0184] As described herein, the apparatus is of the transmissive type (e.g., employing a transmissive patterning device). However, in general, it may be of the reflective type (e.g., employing a reflective patterning device). The apparatus may employ a different kind of patterning device than a classical mask; examples include a programmable mirror array or an LCD matrix.

[0185] A source SO (e.g. a mercury lamp or an excimer laser, laser produced plasma (LPP) EUV source) generates a radiation beam. This beam is fed into an illumination system (illuminator) IL, for example directly or after having traversed a conditioning device such as a beam expander Ex. The illuminator IL may comprise an adjustment device AD ​​for setting the outer radial extent and / or the inner radial extent (commonly referred to as σ-outer and σ-inner, respectively) of the intensity distribution in the beam. In addition, the illuminator IL will typically comprise various other components, such as an integrator IN and a condenser CO. In this way, the beam B impinging on the patterning device MA has a desired uniformity and intensity distribution in its cross section.

[0186] about Fig.17 It should be noted that, although the source SO may be within the housing of the lithographic projection apparatus (this is often the case when the source SO is, for example, a mercury lamp), it may also be remote from the lithographic projection apparatus, the radiation beam it generates being directed into the apparatus (for example, with the aid of appropriate directing mirrors); the latter situation is often the case when the source SO is an excimer laser (for example, based on KrF, ArF or F2 laser action).

[0187] The beam PB is then intercepted at the patterning device MA which is held on the patterning device table MT. Having traversed the patterning device MA, the beam PB passes through a lens PL which focuses said beam B onto a target portion C of the substrate W. With the aid of the second positioning device (and the interferometry device IF), the substrate table WT can be accurately moved, for example in order to position a different target portion C in the path of the beam PB. Similarly, the first positioning device may be used to accurately position the patterning device MA relative to the path of the beam B, for example after mechanically acquiring the patterning device MA from a patterning device library or during a scan. Typically, movement of the object table MT, WT will be realized with the aid of a long-stroke module (coarse positioning) and a short-stroke module (fine positioning), which are not explicitly depicted. However, in the case of a stepper (as opposed to a step-and-scan tool), the patterning device table MT may be connected to the short-stroke actuator only, or may be fixed.

[0188] The depicted tool can be used in two different modes:

[0189] - in step mode, the patterning device table MT is kept substantially stationary and the entire patterning device image is projected at once (i.e. a single "flash") onto a target portion C. The substrate table WT is then shifted in the x and / or y direction so that a different target portion C can be irradiated by the beam PB;

[0190] - In scan mode, essentially the same applies, except that a given target portion C is not exposed in a single "flash". Alternatively, the patterning device table MT can be moved at a velocity v in a given direction (the so-called "scanning direction", e.g. the y-direction) so that the projection beam B is scanned over the patterning device image; while the substrate table WT is simultaneously moved in the same or opposite direction at a velocity V=Mv, where M is the magnification of the lens PL (typically M=1 / 4 or 1 / 5). In this way, a relatively large target portion C can be exposed without having to compromise on resolution.

[0191] Fig.18 The apparatus 1000 is shown in more detail, including a source collector module SO, an illumination system IL, and a projection system PS. The source collector module SO is constructed and arranged to maintain a vacuum environment in an enclosure 220 of the source collector module SO. A plasma 210 emitting EUV radiation may be formed by a discharge-generated plasma source. EUV radiation may be generated by a gas or vapor, such as xenon, lithium vapor, or tin vapor, wherein a very hot plasma 210 is generated to emit radiation in the EUV range of the electromagnetic spectrum. For example, a very hot plasma 210 is generated by causing a discharge of an at least partially ionized plasma. In order to effectively generate radiation, it may be necessary to have, for example, a partial pressure of 10 Pa of Xe, Li, Sn vapor, or any other suitable gas or vapor. In an embodiment, an excited plasma of tin (Sn) is provided to generate EUV radiation.

[0192] The radiation emitted by the hot plasma 210 is transferred from the source chamber 211 to the collector chamber 212 via an optional gas barrier or contaminant trap 230 (also referred to as a contaminant barrier or foil trap in some cases) positioned in or behind an opening in the source chamber 211. The contaminant trap 230 may include a channel structure. The contaminant trap 230 may also include a gas barrier, or a combination of a gas barrier and a channel structure. As is known in the art, the contaminant trap or contaminant barrier 230 further shown herein includes at least a channel structure.

[0193] The collector chamber 211 may include a radiation collector CO which may be a so-called grazing incidence collector. The radiation collector CO has an upstream radiation collector side 251 and a downstream radiation collector side 252. Radiation traversing the collector CO may be reflected by the grating spectral filter 240 and then focused at a virtual source point IF along the optical axis indicated by the dash-dot line "O". The virtual source point IF is often referred to as an intermediate focus, and the source collector module is arranged so that the intermediate focus IF is located at or near an opening 221 in the enclosure structure 220. The virtual source point IF is an image of the radiation emitting plasma 210.

[0194] The radiation then traverses an illumination system IL which may include a faceted field mirror arrangement 22 and a faceted pupil mirror arrangement 24 arranged to provide a radiation beam 21 having a desired angular distribution at the patterning device MA, and a radiation intensity having a desired uniformity at the patterning device MA. After reflection of the radiation beam 21 at the patterning device MA held by the support structure MT, a patterned beam 26 is formed and the patterned beam 26 is imaged by the projection system PS via reflective elements 28, 30 onto a substrate W held by a substrate table WT.

[0195] There may typically be more elements than shown in the illumination optics unit IL and the projection system PS. Depending on the type of lithographic apparatus, a grating spectral filter 240 may optionally be present. Furthermore, there may be more mirrors than shown in the figures, for example there may be more than 200 in the projection system PS. Fig.18 1-6 additional reflective elements beyond the elements shown.

[0196] like Fig.18 The collector optics CO shown is depicted as a nested collector with grazing incidence reflectors 253, 254 and 255, merely as an example of a collector (or collector mirror). The grazing incidence reflectors 253, 254 and 255 are arranged axially symmetrically around the optical axis O, and this type of collector optics CO can be used in combination with a discharge produced plasma source, often referred to as a DPP source.

[0197] Alternatively, the source collector module SO may be as follows Fig.19 A portion of an LPP radiation system is shown. The laser LA is arranged to deposit laser energy into a fuel such as xenon (Xe), tin (Sn) or lithium (Li), thereby producing a highly ionized plasma 210 with an electron temperature of several tens of electron volts. High-energy radiation produced during deexcitation and recombination or recombination of these ions is emitted from the plasma, collected by a near normal incidence collector optic CO, and focused onto an opening 221 in an enclosure 220.

[0198] The following aspects may be used to further describe the embodiments:

[0199] 1. A method for grouping image patterns using a trained machine learning model to determine wafer behavior during a patterning process, the method comprising:

[0200] converting one or more patterning process images including the image pattern into a feature vector based on the trained machine learning model, the feature vector corresponding to the image pattern; and

[0201] Feature vectors having features indicative of image patterns that induce matching wafer behavior during the patterning process are grouped based on the trained machine learning model.

[0202] 2. The method of clause 1, wherein the method for grouping image patterns to determine wafer behavior is a method for grouping image patterns to identify potential wafer defects in the patterning process, the method further comprising:

[0203] Feature vectors having features indicative of image patterns that induce matching wafer defect behavior during the patterning process are grouped based on the trained machine learning model.

[0204] 3. The method according to aspect 1 or 2, wherein the one or more patterning process images include an aerial image and / or a resist image.

[0205] 4. The method of any one of clauses 1 to 3, further comprising: using the grouped feature vectors to facilitate detection of potential patterning defects on a wafer during lithography manufacturability verification (LMC).

[0206] 5. A method according to any one of aspects 1 to 4, wherein the trained machine learning model includes a trained first machine learning model and a trained second machine learning model, wherein converting one or more patterned process images including image patterns into feature vectors is based on the trained first machine learning model, and wherein grouping feature vectors having features indicating image patterns that cause matching wafers or wafer defect behavior is based on the trained second machine learning model.

[0207] 6. The method of clause 5, wherein the first machine learning model is an image encoder trained to:

[0208] Features are extracted from the aerial image and / or the resist image that indicate:

[0209] a short-range spatial image pattern configuration and / or a resist image pattern configuration; and

[0210] Long-range pattern structures that affect wafer or wafer defect behavior; and

[0211] The extracted features are encoded into feature vectors.

[0212] 7. A method according to aspect 6, wherein the first machine learning model includes a loss function.

[0213] 8. The method of clause 6 or 7, wherein grouping feature vectors having features indicative of image patterns causing matching wafers or wafer defect behavior based on the second machine learning model comprises:

[0214] grouping the feature vectors into a first group based on features indicative of a short range spatial image pattern configuration and / or a resist image pattern configuration, and

[0215] grouping the feature vectors into a second group based on the first group and a long-range pattern structure that affects the wafer or wafer defect behavior,

[0216] Such that the second set includes a set of feature vectors having characteristics indicative of image patterns that induce matching wafers or wafer defect behavior during patterning.

[0217] 9. The method according to any one of Aspects 5 to 8 further includes: using simulated aerial images and / or resist images to train the first machine learning model.

[0218] 10. The method according to aspect 9 also includes: iteratively retraining the first machine learning model based on the output from the first machine learning model and additional simulation space and / or resist images.

[0219] 11. A method according to aspect 10, wherein the first machine learning model includes the loss function, and iteratively retraining the first machine learning model based on the output from the first machine learning model and the additional simulation space and / or resist image includes adjusting the loss function.

[0220] 12. The method according to any one of aspects 5 to 11 further comprises: training the second machine learning model using marked wafer defects from a wafer verification process.

[0221] 13. A method according to aspect 12, wherein a given marked wafer defect includes information related to: a short-range spatial image pattern configuration and / or a resist image pattern configuration associated with the given marked wafer defect; a long-range pattern structure associated with the given marked wafer defect; a behavior of the given marked wafer defect during the patterning process; a location coordinate of the given marked wafer defect and a critical dimension at the location; an indication of whether the given marked wafer defect is a real defect; and / or information related to exposure of an image of the given marked wafer defect at the location.

[0222] 14. A method according to aspect 13, wherein information related to the short-range spatial image pattern configuration and / or the resist image pattern configuration associated with a given marked wafer defect and the long-range pattern structure associated with the given marked wafer defect is related to the probability of whether the given marked wafer defect is real.

[0223] 15. The method according to aspect 14 also includes: iteratively retraining the second machine learning model based on the output from the second machine learning model, given labeled wafer defects, and additional labeled wafer defects from the wafer verification process.

[0224] 16. A method according to any one of aspects 1 to 15, wherein the feature vector describes the image pattern and comprises features related to LMC model terms and / or imaging conditions for the one or more patterning process images.

[0225] 17. A method according to clause 16, wherein the method comprises grouping the feature vectors into a first group based on features indicative of the short range space image pattern configuration and / or the resist image pattern configuration, and

[0226] The features indicative of the short-range spatial image pattern configuration and / or the resist image pattern configuration include features associated with LMC model terms and / or imaging conditions for the one or more patterning process images.

[0227] 18. The method of any one of clauses 1 to 17, wherein the method is used during an optical proximity correction (OPC) portion of the patterning process.

[0228] 19. The method of clause 18, further comprising: identifying a group of potential wafer defects having matching wafer defect behavior in the patterning process based on grouping feature vectors having features indicative of image patterns causing the matching wafer defect behavior in the patterning process.

[0229] 20. The method of clause 19, further comprising adjusting a mask layout design of a mask of the patterning process based on the group of potential wafer defects having the matching wafer defect behavior in the patterning process.

[0230] 21. The method of any one of clauses 1 to 20, wherein the method is used to generate a gauge line / defect candidate list to enhance the accuracy and efficiency of wafer verification.

[0231] 22. The method according to any one of aspects 1 to 21 further includes: predicting a grading indicator to indicate the relative severity of individual potential wafer defects based on a trained machine learning model, wherein the grading indicator is a measure of the likely extent to which a potential wafer defect will convert into one or more physical wafer defects.

[0232] 23. A computer program product comprising a non-transitory computer readable medium having recorded thereon instructions, the instructions when executed by a computer implementing the method according to any one of aspects 1 to 22.

[0233] The concepts disclosed herein can simulate or mathematically model any general imaging system for imaging sub-wavelength features, and may be particularly useful in emerging imaging technologies that are capable of producing wavelengths with increasingly smaller sizes. Emerging technologies already in use include extreme ultraviolet (EUV) lithography that is capable of producing 193 nm wavelengths by using ArF lasers and even 157 nm wavelengths by using fluorine lasers. In addition, EUV lithography is capable of producing wavelengths in the range of 20 to 5 nm by using a synchrotron or by using high energy electrons to impinge on a material (solid or plasma) in order to produce photons in this range.

[0234] Although the concepts disclosed herein may be used for imaging on substrates such as silicon wafers, it should be understood that the disclosed concepts may be used with any type of lithography imaging system, for example, a lithography imaging system for imaging on substrates other than silicon wafers.

[0235] In addition, the term "projection optical element" as used herein should be broadly interpreted (in addition to what is described above) to cover various types of optical systems, including, for example, refractive optical devices, reflective optical devices, apertures, and reflective refractive optical devices. The term "projection optical element" may also include components that operate according to any of these design types for guiding, shaping or controlling the projection radiation beam collectively or individually. The term "projection optical element" may include any optical component in a lithographic projection device, regardless of where the optical component is located on the optical path of the lithographic projection device. The projection optical element may include optical components for shaping, adjusting and / or projecting the radiation from the source before the radiation passes through the pattern forming device, or optical components for shaping, adjusting and / or projecting the radiation after the radiation passes through the pattern forming device. Projection optical elements typically do not include a source and a pattern forming device.

[0236] The description herein is intended to be illustrative rather than limiting. Accordingly, those skilled in the art will appreciate that modifications may be made to the described invention without departing from the scope of the claims set forth below.

Claims

1. A computer program product, the computer program product comprising a non-transitory computer-readable medium having instructions recorded thereon, the instructions being configured to, when executed by a computer system, cause the computer system to perform at least the following operations: executing the trained machine learning model to convert one or more patterning process images including the image pattern into a feature vector, the feature vector corresponding to the image pattern, and the image pattern including an actual image or predicted image of a pattern as formed on a mask, an actual aerial image or predicted aerial image of a mask pattern as exposed or etched on a substrate, and / or an actual image or predicted image of a mask pattern; executing the trained machine learning model to group feature vectors having features indicative of image patterns that induce matching wafer behavior during patterning; and The grouped feature vectors are used to facilitate detection of potential patterning defects on the wafer.

2. The computer program product of claim 1 , configured to group image patterns to identify potential wafer defects in the patterning process; and, The instructions configured to cause the computer system to group the feature vectors are configured to group feature vectors having features indicative of image patterns that induce matching wafer defect behavior during a patterning process based on the trained machine learning model. 3 . The computer program product of claim 1 , the one or more patterning process images comprising an aerial image and / or a resist image.

4. The computer program product of claim 1 , wherein the trained machine learning model comprises a trained first machine learning model and a trained second machine learning model; wherein instructions configured to cause the computer system to convert the one or more patterned process images are executed based on the first machine learning model, converting the one or more patterned process images includes converting the image patterns into feature vectors, and wherein instructions configured to cause the computer system to group feature vectors having features indicative of image patterns that cause matching wafer behavior are executed based on the second machine learning model.

5. The computer program product of claim 4, wherein the first machine learning model is an image encoder trained to: extracting features from the image indicative of: a first range of image pattern configurations; and a second range of pattern structures different from the first range that affect the behavior of the wafer; and The extracted features are encoded into feature vectors.

6. The computer program product according to claim 5, wherein: The instructions configured to cause the computer system to group feature vectors having features indicative of image patterns that cause matching wafer behavior, when executed by the computer system based on the second machine learning model, are configured to cause the computer system to perform at least the following operations: grouping the feature vectors into a first group based on features indicative of the image pattern configuration of the first range, and grouping the feature vectors into a second group based on the pattern structure of the first group and the second range, Such that said second set comprises a set of feature vectors having features indicative of image patterns causing said matching wafer behavior during said patterning process.

7. The computer program product of claim 4, wherein: Using simulated images to train the first machine learning model; or The second machine learning model is trained using labeled wafer defects from a wafer verification process.

8. A computer program product according to claim 7, wherein the first machine learning model includes a loss function, and the instructions are further configured to iteratively retrain the first machine learning model based on the output from the first machine learning model and additional simulated images, including adjusting the loss function.

9. The computer program product of claim 7, wherein a given marked wafer defect includes information related to: (i) a first range of image pattern configurations associated with the given marked wafer defect, or (ii) a second range of pattern configurations different from the first range associated with the given marked wafer defect, or (iii) both (i) and (ii), and wherein (iv) information relating to the image pattern configuration of the first range associated with the given marked wafer defect, or (v) information relating to the pattern structure of the second range associated with the given marked wafer defect, or (vi) both of (iv) and (v) above, is related to the probability of whether the given marked wafer defect is real.

10. The computer program product of claim 1, wherein the feature vector describes the image pattern and includes features related to optical proximity calibration model terms and / or imaging conditions for the one or more patterning process images.

11. The computer program product of claim 10, wherein the instructions are configured to group the feature vectors into a plurality of groups based on features indicative of a range of image pattern configurations, and The features indicative of the range of image pattern configurations include features associated with optical proximity calibration model terms and / or imaging conditions for the one or more patterning process images.

12. The computer program product of claim 1 , wherein the instructions are further configured to train the machine learning model configured to predict wafer behavior by grouping feature vectors having features indicative of image patterns that induce matching wafer behavior during the patterning process.

13. The computer program product of claim 7, wherein the instructions are further configured to iteratively retrain the second machine learning model based on output from the second machine learning model, the given labeled wafer defects, and additional labeled wafer defects from the wafer verification process.

14. The computer program product of claim 4, wherein the first range is shorter than the second range.

15. The computer program product of claim 1, wherein the instructions are further configured to perform optical proximity correction based on the grouped feature vectors.

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