Data synchronization method and device for heterogeneous debugger

Abstract

The invention relates to the technical field of heterogeneous computing, and discloses a data synchronization method and device for a heterogeneous debugger, and the method comprises the steps: obtaining a host end program and an equipment end program, and carrying out the instrumentation of a synchronization function in the host end program and the equipment end program; setting an internal breakpoint of the host end and an internal breakpoint of the equipment end by using a synchronization function; the host end and the equipment end are synchronously controlled by using the internal breakpoint of the host end, so that the synchronous control of the heterogeneous debugger on the host end and the equipment end is realized; and carrying out synchronous control on the computing cores of the equipment end by utilizing the internal breakpoints of the equipment end. According to the method, the strong dependence between the heterogeneous debugger and the driver is decoupled, so that the cohesion of the software stack is stronger, the deadlock between calculation cores is avoided, and the stability of program operation is improved.

Description

Technical Field

[0001] The present invention relates to the field of heterogeneous computing technology, and in particular to a data synchronization method and device for a heterogeneous debugger. Background Art

[0002] In heterogeneous computing, programs on the host and device sides are usually responsible for different tasks. The host-side program is responsible for preparing and transmitting computing data, while the device-side program is responsible for computing the transmitted data and transmitting the computing results back to the host side. The host and device sides need to be synchronized, and different computing cores on the device side also need to be synchronized. Therefore, the handling of the synchronization mechanism is extremely critical during debugging.

[0003] During the synchronization process of related heterogeneous debuggers, due to the limitations of the debugger's own architecture and the need to drive sending signals for debugging, the heterogeneous debugger cannot fully control the entire process of data synchronization. Summary of the invention

[0004] In view of this, the present invention provides a data synchronization method and device for a heterogeneous debugger to solve the problem that the heterogeneous debugger cannot completely control the entire process of data synchronization.

[0005] In a first aspect, the present invention provides a data synchronization method for a heterogeneous debugger, comprising:

[0006] Get the host program and the device program, and insert synchronization functions in the host program and the device program respectively;

[0007] Use synchronization functions to set internal breakpoints on the host and device;

[0008] Use the host's internal breakpoints to synchronize control of the host and device;

[0009] Use the internal breakpoints on the device to synchronize and control the computing cores on the device.

[0010] The data synchronization method for a heterogeneous debugger provided in this embodiment obtains a host-side program and a device-side program, and inserts synchronization functions in the host-side program and the device-side program respectively; then uses the synchronization functions to set internal breakpoints on the host side and the device side; uses the internal breakpoints on the host side to perform synchronization control on the host side and the device side, thereby realizing synchronization control of the host side and the device side by the heterogeneous debugger, decoupling the strong dependency between the heterogeneous debugger and the driver, and making the software stack more cohesive; uses the internal breakpoints on the device side to perform synchronization control between computing cores on the device side, thereby avoiding deadlock between computing cores and improving the stability of program operation.

[0011] In an optional implementation, a host-side program and a device-side program are obtained, and synchronization functions are inserted into the host-side program and the device-side program respectively, where the synchronization functions include a hostSync function and a deviceSync function; including:

[0012] Perform semantic analysis on the host program. If the host program has a Kernel function, insert the hostSync function at the end of the Kernel function.

[0013] The backend instructions of the device-side program are downgraded. If there is a return node in the device-side program, the device-side function exit is determined based on the return node, and the deviceSync function is inserted at the device-side function exit.

[0014] The data synchronization method for a heterogeneous debugger provided in this embodiment performs semantic analysis on the host-side program. If the host-side program has a Kernel function, a hostSync function is inserted at the end of the Kernel function. The insertion of the host-side synchronization function is realized, laying a foundation for setting internal breakpoints on the host side. The back-end instruction of the device-side program is downgraded. If a return node exists in the device-side program, the device-side function exit is determined based on the return node, and the deviceSync function is inserted at the device-side function exit, thereby realizing the insertion of the device-side synchronization function and laying a foundation for setting internal breakpoints on the device side.

[0015] In an optional implementation, semantic analysis is performed on the host program. If the host program has a Kernel function, a hostSync function is inserted at the end of the Kernel function, including:

[0016] When traversing the AST nodes of the function declaration in the host program, if the global attribute exists in the AST node of the function declaration, the current function is a Kernel function, and it is determined whether the compilation item in the host program is the -g option;

[0017] If the compilation option is -g, the hostSync function is inserted at the end of the Kernel function.

[0018] The data synchronization method for a heterogeneous debugger provided in this embodiment, during the process of traversing the AST nodes of function declarations in the host-side program, if there is a global attribute in the AST nodes of the function declarations, the current function is a Kernel function, and it is determined whether the compilation item in the host-side program is the -g option; if the compilation item is the -g option, the hostSync function is inserted at the end of the Kernel function; the insertion of the synchronization function in the host-side program is implemented, laying the foundation for the setting of internal breakpoints on the host side.

[0019] In an optional implementation, using a synchronization function to set a host-side internal breakpoint and a device-side internal breakpoint includes:

[0020] Create a hostSync breakpoint in the host program and use the hostSync breakpoint as an internal breakpoint on the host.

[0021] Start the debugged program. When the debugged program runs to the device-side Kernel function, search for the device-side synchronization function.

[0022] A deviceSync breakpoint is set in the device-side program based on the device-side synchronization function, and the deviceSync breakpoint is used as an internal breakpoint on the device-side.

[0023] The data synchronization method for a heterogeneous debugger provided in this embodiment creates a hostSync breakpoint in a host-side program and uses the hostSync breakpoint as an internal breakpoint on the host side, thereby realizing the setting of a synchronization breakpoint in the host-side program, and laying a foundation for synchronously controlling the host side and the device side by using the internal breakpoint on the host side; starting the debugged program, and when the debugged program runs to the device-side Kernel function, searching for the device-side synchronization function; setting a deviceSync breakpoint in the device-side program based on the device-side synchronization function, and using the deviceSync breakpoint as an internal breakpoint on the device side, thereby realizing the setting of a synchronization breakpoint in the device-side program, and laying a foundation for synchronously controlling the computing cores on the device side by using the internal breakpoint on the device side.

[0024] In an optional implementation, using the internal breakpoint of the host end to synchronously control the host end and the device end includes:

[0025] Get the breakpoint type through the main thread. If the breakpoint type is hostSync breakpoint, notify the device-side monitoring thread.

[0026] Initialize the device side and set the initial synchronization variables through the device side monitoring thread;

[0027] The device-side monitoring thread synchronization variable is queried through the main thread. If the device-side monitoring thread synchronization variable is the initial synchronization variable, the host-side program is controlled to stop running;

[0028] Execute the device-side program through the device-side monitoring thread, and set the end synchronization variable when the device-side program execution ends;

[0029] If the device-side monitoring thread synchronization variable is the end synchronization variable, the host-side program is controlled to continue running.

[0030] The data synchronization method for a heterogeneous debugger provided in this embodiment obtains the breakpoint type through the main thread. If the breakpoint type is a hostSync breakpoint, the device-side monitoring thread is notified; the device-side is initialized and the initial synchronization variable is set through the device-side monitoring thread; the device-side monitoring thread synchronization variable is queried through the main thread, and if the device-side monitoring thread synchronization variable is the initial synchronization variable, the host-side program is controlled to stop running; the device-side program is executed through the device-side monitoring thread, and when the device-side program execution ends, the end synchronization variable is set; if the device-side monitoring thread synchronization variable is the end synchronization variable, the host-side program is controlled to continue running, thereby realizing the synchronous control of the host and device sides by the internal breakpoint of the host side, decoupling the strong dependency between the heterogeneous debugger and the driver, and making the software stack more cohesive.

[0031] In an optional implementation, using the internal breakpoints of the device to synchronously control the computing cores of the device includes:

[0032] If the current computing core executes to the deviceSync breakpoint, and there is another computing core stopped by the deviceSync breakpoint, the current focus is switched to the other computing core for debugging.

[0033] Alternatively, if the current computing core executes to the deviceSync breakpoint, and other computing cores are stopped at the deviceSync breakpoints, then other computing cores are controlled to exit execution.

[0034] The data synchronization method for a heterogeneous debugger provided in this embodiment switches the current focus to other computing cores for debugging if the current computing core executes to the deviceSync breakpoint and there is another computing core that is stopped by the deviceSync breakpoint, and switches the current focus to an adjacent computing core for debugging; or, if the current computing core executes to the deviceSync breakpoint and other computing cores are all stopped at the deviceSync breakpoint, controls the other computing cores to exit running, thereby realizing synchronous control between computing cores on the device side by utilizing internal breakpoints on the device side, avoiding deadlock between computing cores, and improving the stability of program running.

[0035] In a second aspect, the present invention provides a data synchronization device for a heterogeneous debugger, the device comprising:

[0036] The plug-in module is used to obtain the host-side program and the device-side program, and to plug the synchronization function in the host-side program and the device-side program respectively;

[0037] A setting module is used to set internal breakpoints on the host side and internal breakpoints on the device side using synchronization functions;

[0038] A first control module, used for synchronously controlling the host end and the device end by utilizing the internal breakpoint of the host end;

[0039] The second control module is used to perform synchronization control between computing cores on the device side by utilizing internal breakpoints on the device side.

[0040] In a third aspect, the present invention provides a computer device, comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the data synchronization method for a heterogeneous debugger of the above-mentioned first aspect or any corresponding embodiment thereof by executing the computer instructions.

[0041] In a fourth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to cause a computer to execute the data synchronization method for a heterogeneous debugger according to the first aspect or any corresponding embodiment thereof.

[0042] In a fifth aspect, the present invention provides a computer program product, comprising computer instructions for causing a computer to execute the data synchronization method for a heterogeneous debugger according to the first aspect or any corresponding embodiment thereof. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0044] Figure 1 is a flow chart of a data synchronization method for a heterogeneous debugger according to an embodiment of the present invention;

[0045] Figure 2 is a flow chart of another data synchronization method for heterogeneous debuggers according to an embodiment of the present invention;

[0046] Figure 3 It is a flowchart of inserting synchronization functions in a host-side program and a device-side program according to an embodiment of the present invention;

[0047] Figure 4 is a flow chart of another data synchronization method for a heterogeneous debugger according to an embodiment of the present invention;

[0048] Figure 5 is a schematic diagram of a process of setting internal breakpoints on a host side and internal breakpoints on a device side by using a synchronization function according to an embodiment of the present invention;

[0049] Figure 6 is a flow chart of another data synchronization method for a heterogeneous debugger according to an embodiment of the present invention;

[0050] Figure 7 It is a schematic diagram of a process of synchronously controlling a host end and a device end by using an internal breakpoint of the host end according to an embodiment of the present invention;

[0051] Figure 8 is a schematic diagram of a process of synchronously controlling computing cores on a device side by using internal breakpoints on the device side according to an embodiment of the present invention;

[0052] Fig. 9 is a structural block diagram of a data synchronization device for a heterogeneous debugger according to an embodiment of the present invention;

[0053] Fig.10 It is a schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0054] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0055] With the continuous development of heterogeneous computing and heterogeneous parallel programming technologies, traditional single-architecture debuggers can no longer meet the debugging needs of heterogeneous computing processes represented by AI (Artificial Intelligence) computing; therefore, the single-architecture debuggers in the underlying tool chain have gradually begun to develop in the direction of heterogeneous debugging; in this process, the primary problem encountered is how to achieve synchronous processing between heterogeneous processors during debugging; in addition, how to synchronize different computing cores in the same architecture processor is also a problem to be solved.

[0056] In heterogeneous computing, programs on the host and device sides usually have different tasks. The host-side program is responsible for preparing and transmitting computing data, while the device-side program is responsible for computing the transmitted data and transmitting the computing results back to the host side. Therefore, there is naturally a waiting process: the host side needs to wait for the device-side data to be calculated before proceeding to the next step. The same waiting process is also required during the debugging process.

[0057] Furthermore, similar synchronization requirements may exist between computing cores on the device side. For example, one group of computing cores may be responsible for calculating one part of the data, while another group of computing cores may be responsible for calculating another part of the data. After the two parts of the data are calculated, the calculation results are summarized. Therefore, the handling of the synchronization mechanism is particularly important during debugging.

[0058] The related heterogeneous debugger uses cuda-gdb (a debugging tool specifically used for debugging applications running on the system). This debugger is used to debug heterogeneous programs running on the graphics card. The synchronization between the host and device ends is strongly dependent on the driver. The driver will actively send a signal to the debugger in the synchronization function to indicate that the host program needs to be stopped and wait for the device program.

[0059] Depending on the hardware device, there are multiple synchronization schemes between different computing cores on the device side. For graphics cards, since they use the SIMT (Single Instruction Multiple Threads) architecture, the synchronization between computing cores is mainly ensured by SIMT STACK (a hardware component used to manage the status information of each thread in the thread block in the SIMT architecture). SIMT STACK ensures that the PC (Program Counter) positions of computing cores running the same branch are consistent, while computing cores in different branches will wait for the SIMT STACK component to perform a PC rollback operation, thereby achieving hardware-level synchronization between computing cores; in contrast, related AI chips achieve synchronization between computing cores at the software level by inserting synchronization instructions.

[0060] The host-side and device-side synchronization schemes of related heterogeneous debuggers cause a coupling phenomenon, which makes it impossible for the heterogeneous debugger to actively and completely control the entire synchronization process; if the driver's signal sending mechanism fails, it is necessary to troubleshoot the host and device sides at the same time; during the troubleshooting process, if debugging is required, the host and device sides must be debugged at the same time, which increases the complexity of the debugging process.

[0061] The synchronization between computing cores on the device side of the related heterogeneous debugger needs to rely on dedicated SIMT STACK components to be implemented; this solution is closely related to the architecture. If the device does not adopt the SIMT architecture, this synchronization solution cannot be used.

[0062] The synchronous instruction stubbing method of related heterogeneous debuggers has side effects, because the synchronous instruction itself can cause the device-side program to be blocked; if used improperly, it can easily cause deadlock between computing cores, which has a high risk; in addition, this method also relies on the synchronous instructions existing in the instruction set.

[0063] In order to solve the above technical problems, an embodiment of the present invention provides a data synchronization method for a heterogeneous debugger, which is applied to a heterogeneous debugger, and the heterogeneous debugger has an automatic plug-in function and a synchronization management function of the heterogeneous debugger. By using a compiler to plug the synchronization function of the host-side program and the device-side program, the strong dependency between the heterogeneous debugger and the driver is decoupled, so that the cohesion of the software stack is enhanced; compared with directly using synchronization instructions, the use of plugged synchronization functions can avoid the side effects that may be caused by synchronization instructions, such as deadlock between computing cores, thereby improving the stability of the system; in addition, the problem of the lack of hardware synchronization mechanism in non-SIMT architecture processors is solved from the software level.

[0064] According to an embodiment of the present invention, an embodiment of a data synchronization method for a heterogeneous debugger is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0065] In this embodiment, a data synchronization method for a heterogeneous debugger is provided, which can be used for the above-mentioned heterogeneous debugger. Figure 1 is a flow chart of a data synchronization method for a heterogeneous debugger according to an embodiment of the present invention. Figure 1 As shown, the process includes the following steps:

[0066] Step S101, obtaining a host-side program and a device-side program, and inserting synchronization functions in the host-side program and the device-side program respectively.

[0067] Specifically, a heterogeneous compiler compiles a program in two stages: compiling the host-side program and compiling the device-side program. The host-side program and the device-side program are two key components of a heterogeneous debugger. The host-side program runs on a general-purpose processor and is responsible for complex control and scheduling tasks. The device-side program runs on a domain-specific processor and is responsible for performing large-scale parallel computing and domain-specific computing tasks.

[0068] Furthermore, two synchronization functions are automatically inserted after the host-side Kernel function and at the device-side function exit, respectively referred to as hostSync (used to synchronize the execution flow between the host and device) function and deviceSync (used to synchronize the execution flow between the computing cores on the device) function.

[0069] Step S102, using a synchronization function to set internal breakpoints on the host side and internal breakpoints on the device side.

[0070] Specifically, during the debugging process, the heterogeneous debugger will look for two synchronization functions inserted by the compiler and set them as internal breakpoints. However, since these two functions are host-side functions and device-side functions respectively, the processes for setting host-side internal breakpoints and device-side internal breakpoints are different. The host-side internal breakpoints are set when the debugger waits for the initialization target of the process, and the device-side internal breakpoints need to wait for the device-side Kernel function to start and report before being set.

[0071] Step S103, using the internal breakpoint of the host end to synchronously control the host end and the device end.

[0072] Step S104, utilizing the internal breakpoints of the device to perform synchronization control between computing cores on the device.

[0073] The data synchronization method for a heterogeneous debugger provided in this embodiment obtains a host-side program and a device-side program, and inserts synchronization functions in the host-side program and the device-side program respectively; then uses the synchronization functions to set internal breakpoints on the host side and the device side; uses the internal breakpoints on the host side to perform synchronization control on the host side and the device side, thereby realizing synchronization control of the host side and the device side by the heterogeneous debugger, decoupling the strong dependency between the heterogeneous debugger and the driver, and making the software stack more cohesive; uses the internal breakpoints on the device side to perform synchronization control between computing cores on the device side, thereby avoiding deadlock between computing cores and improving the stability of program operation.

[0074] In this embodiment, a data synchronization method for a heterogeneous debugger is provided, which can be used for the above-mentioned heterogeneous debugger. Figure 2 is a flow chart of a data synchronization method for a heterogeneous debugger according to an embodiment of the present invention. Figure 2 As shown, the process includes the following steps:

[0075] Step S201, obtaining a host-side program and a device-side program, and inserting synchronization functions in the host-side program and the device-side program respectively.

[0076] Specifically, the above step S201 includes:

[0077] Step S2011, performing semantic analysis on the host program, if the host program has a Kernel function, inserting a hostSync function at the end of the Kernel function.

[0078] In some optional embodiments, such as Figure 3 As shown, the above step S2011 includes:

[0079] Step a1, in the process of traversing the AST nodes of the function declaration in the host program, if there is a global attribute in the AST node of the function declaration, the current function is a Kernel function, and it is determined whether the compilation item in the host program is a -g (a debugging option of the compiler) option.

[0080] Specifically, during the compilation of the host-side program, the front-end semantic analysis is performed on the AST (Abstract Syntax Tree) syntax tree in the host-side program, and the AST nodes of the function declarations in the host-side program are traversed. That is, during the semantic analysis, all the AST nodes of the function definitions and declarations in the host-side program are analyzed once.

[0081] Furthermore, if there is a global attribute in the function declaration, there is a Kernel function, which means that there is a scenario where the host and device are synchronized. If it is determined that the -g option is used for compilation, the Kernel function is instrumented at this time.

[0082] Step a2: If the compilation option is -g, insert the hostSync function at the end of the Kernel function.

[0083] Step S2012, downgrade the backend instructions of the device-side program. If there is a return (return value) node in the device-side program, determine the device-side function exit based on the return node, and insert the deviceSync function at the device-side function exit.

[0084] Specifically, in order to ensure that the function exit of any device can be intercepted by the stub function, when compiling the device-side program, it is necessary to perform stub when downgrading the function exit in the back-end instruction downgrade stage. The instruction downgrade stage mainly downgrades the intermediate node to a machine node. When the return node is found, the function exit downgrade process will be entered. In this process, it is determined whether the current compilation is -g. If so, the device-side synchronous stub function will be inserted.

[0085] Furthermore, in the compilation process of the device-side program, there is a stage of back-end instruction downgrading; the main task of this stage is to downgrade the intermediate nodes to machine nodes; when the compiler recognizes the return node, it triggers the function exit downgrading process; in this process, the compiler checks whether the -g compilation option is currently enabled. If the -g compilation option is enabled, the compiler inserts the deviceSync function at the device-side function exit.

[0086] Step S202: Use the synchronization function to set the internal breakpoints of the host and the device. Figure 1 Step S102 of the illustrated embodiment will not be described in detail here.

[0087] Step S203: Use the internal breakpoints of the host to synchronize the host and the device. Figure 1 Step S103 of the illustrated embodiment will not be described in detail here.

[0088] Step S204: Use the internal breakpoints of the device to synchronize the computing cores of the device. Figure 1 Step S104 of the illustrated embodiment will not be described in detail here.

[0089] The data synchronization method for a heterogeneous debugger provided in this embodiment performs semantic analysis on the host-side program. If the host-side program has a Kernel function, a hostSync function is inserted at the end of the Kernel function. The insertion of the host-side synchronization function is realized, laying a foundation for setting internal breakpoints on the host side. The back-end instruction of the device-side program is downgraded. If a return node exists in the device-side program, the device-side function exit is determined based on the return node, and the deviceSync function is inserted at the device-side function exit, thereby realizing the insertion of the device-side synchronization function and laying a foundation for setting internal breakpoints on the device side.

[0090] In this embodiment, a data synchronization method for a heterogeneous debugger is provided, which can be used for the above-mentioned heterogeneous debugger. Figure 4 is a flow chart of a data synchronization method for a heterogeneous debugger according to an embodiment of the present invention. Figure 4 As shown, the process includes the following steps:

[0091] Step S401, obtain the host-side program and the device-side program, and insert synchronization functions in the host-side program and the device-side program respectively. Figure 2 Step S201 of the illustrated embodiment will not be described in detail here.

[0092] Step S402, using a synchronization function to set internal breakpoints on the host side and internal breakpoints on the device side.

[0093] Specifically, Figure 5 As shown, the above step S402 includes:

[0094] Step S4021, create a hostSync breakpoint in the host program, and use the hostSync breakpoint as an internal breakpoint of the host.

[0095] Specifically, a wait process is started in the heterogeneous debugger process space, and a hostSync internal breakpoint is created in the target initialization phase.

[0096] Step S4022, start the debugged program, and when the debugged program runs to the device-side Kernel function, search for the device-side synchronization function.

[0097] Specifically, after the hostSync breakpoint is created, the debugged program starts to run in the resume (resume after interruption) process, and when the debugged program runs to the Kernel function on the device side, the breakpoint is reported to the heterogeneous debugger process space.

[0098] Step S4023, setting a deviceSync breakpoint in the device-side program based on the device-side synchronization function, and using the deviceSync breakpoint as an internal breakpoint of the device-side.

[0099] Specifically, start searching for the symbol of the synchronization function (deviceSync function) in the device-side program, and after finding it, set the deviceSync internal breakpoint.

[0100] Step S403: Use the internal breakpoints of the host to synchronize the host and the device. Figure 2 Step S203 of the illustrated embodiment will not be described in detail here.

[0101] Step S404: Use the internal breakpoints of the device to synchronize the computing cores of the device. Figure 2 Step S204 of the illustrated embodiment will not be described in detail here.

[0102] The data synchronization method for a heterogeneous debugger provided in this embodiment creates a hostSync breakpoint in a host-side program and uses the hostSync breakpoint as an internal breakpoint on the host side, thereby realizing the setting of a synchronization breakpoint in the host-side program, and laying a foundation for synchronously controlling the host side and the device side by using the internal breakpoint on the host side; starting the debugged program, and when the debugged program runs to the device-side Kernel function, searching for the device-side synchronization function; setting a deviceSync breakpoint in the device-side program based on the device-side synchronization function, and using the deviceSync breakpoint as an internal breakpoint on the device side, thereby realizing the setting of a synchronization breakpoint in the device-side program, and laying a foundation for synchronously controlling the computing cores on the device side by using the internal breakpoint on the device side.

[0103] In this embodiment, a data synchronization method for a heterogeneous debugger is provided, which can be used for the above-mentioned heterogeneous debugger. Figure 6 is a flow chart of a data synchronization method for a heterogeneous debugger according to an embodiment of the present invention. Figure 6 As shown, the process includes the following steps:

[0104] Step S601, obtain the host-side program and the device-side program, and insert synchronization functions in the host-side program and the device-side program respectively. Figure 4 Step S401 of the illustrated embodiment will not be described in detail here.

[0105] Step S602: Use the synchronization function to set the internal breakpoints of the host and the device. Figure 3 Step S402 of the illustrated embodiment will not be described in detail here.

[0106] Step S603, using the internal breakpoint of the host end to synchronously control the host end and the device end.

[0107] Specifically, Figure 7 As shown, the above step S603 includes:

[0108] Step S6031, obtain the breakpoint type through the main thread, if the breakpoint type is a hostSync breakpoint, notify the device-side monitoring thread.

[0109] Specifically, after the main thread enters the wait process, the type of the current breakpoint is determined. If the current breakpoint is a hostSync breakpoint, the device-side monitoring thread is notified.

[0110] Step S6032: Initialize the device side through the device side monitoring thread and set the initial synchronization variables.

[0111] Specifically, the device-side monitoring thread waits for notification from the main thread, the device-side starts initialization, and after initialization, the device-side synchronization variables are set.

[0112] Step S6033, query the device-side monitoring thread synchronization variable through the main thread, if the device-side monitoring thread synchronization variable is the initial synchronization variable, then control the host-side program to stop running.

[0113] Specifically, the main thread queries the device side and monitors the synchronization variables of the device side. If the synchronization variables of the device side are detected, the host side program is stopped.

[0114] Step S6034, executing the device-side program through the device-side monitoring thread, and setting the end synchronization variable when the device-side program execution is completed.

[0115] Specifically, the device-side monitoring thread monitors the running status of the device-side program, and if it is monitored that the running of the device-side program ends, an end synchronization variable is set.

[0116] Step S6035: If the device-side monitoring thread synchronization variable is the end synchronization variable, the host-side program is controlled to continue running.

[0117] Specifically, the main thread queries the synchronization variable of the device-side monitoring thread. If the end synchronization variable is queried, the host-side program is controlled to continue running.

[0118] Step S604, utilizing the internal breakpoints of the device to perform synchronization control between computing cores on the device.

[0119] Specifically, Figure 8 As shown, the above step S604 includes:

[0120] Step S6041: If the current computing core executes to the deviceSync breakpoint, and there is another computing core that is stopped by the deviceSync breakpoint, the current focus is switched to the other computing core for debugging.

[0121] Specifically, in the process of using the internal breakpoints on the device side to synchronously control the computing cores on the device side: the computing core 1 on the device side first executes to the deviceSync breakpoint, and the breakpoint hit behavior will be monitored by the heterogeneous debugger, and then it will start to determine whether there are other computing cores that are still stopped by the breakpoint. If the computing core 2 is stopped by the breakpoint, the current focus is switched to the computing core 2. The user can choose to debug the computing core 2 at this time, or continue running directly.

[0122] Step S6042, or, if the current computing core executes to the deviceSync breakpoint, and the other computing cores are stopped at the deviceSync breakpoint, then the other computing cores are controlled to exit execution.

[0123] Specifically, if computing core 2 does not have a breakpoint at this time, the debugger will determine whether other computing cores have stopped at the deviceSync breakpoint. If all computing cores have stopped at the deviceSync breakpoint, it means that all computing cores have completed the calculation and can exit. The debugger controls all computing cores to continue running and exit.

[0124] The data synchronization method for a heterogeneous debugger provided in this embodiment obtains the breakpoint type through the main thread. If the breakpoint type is a hostSync breakpoint, the device-side monitoring thread is notified; the device-side is initialized and the initial synchronization variable is set through the device-side monitoring thread; the device-side monitoring thread synchronization variable is queried through the main thread, and if the device-side monitoring thread synchronization variable is the initial synchronization variable, the host-side program is controlled to stop running; the device-side program is executed through the device-side monitoring thread, and when the device-side program execution ends, the end synchronization variable is set; if the device-side monitoring thread synchronization variable is the end synchronization variable, the host-side program is controlled to continue running, thereby realizing the synchronization control of the host and device sides by the internal breakpoint of the host side, solving the problem of synchronization. It couples the strong dependency between heterogeneous debuggers and drivers, making the software stack more cohesive; if the current computing core executes to the deviceSync breakpoint, and there is another computing core stopped by the deviceSync breakpoint, the current focus is switched to the other computing core for debugging, and the current focus is switched to the adjacent computing core for debugging; or, if the current computing core executes to the deviceSync breakpoint, and other computing cores are stopped at the deviceSync breakpoint, the other computing cores are controlled to exit running, realizing the synchronous control of the computing cores on the device side by using the internal breakpoints on the device side, avoiding deadlock between computing cores, and improving the stability of program running.

[0125] In this embodiment, a data synchronization device for a heterogeneous debugger is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and the descriptions that have been made will not be repeated. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0126] This embodiment provides a data synchronization device for a heterogeneous debugger, such as Fig. 9 As shown, including:

[0127] The plugging module 901 is used to obtain the host-side program and the device-side program, and to insert synchronization functions in the host-side program and the device-side program respectively.

[0128] The setting module 902 is used to set the internal breakpoints of the host end and the internal breakpoints of the device end by using the synchronization function.

[0129] The first control module 903 is used to synchronously control the host end and the device end by utilizing the internal breakpoint of the host end.

[0130] The second control module 904 is used to perform synchronization control between computing cores on the device side by utilizing internal breakpoints on the device side.

[0131] In some optional implementations, the plugging module 901 includes:

[0132] The first insertion unit is used to perform semantic analysis on the host-side program, and if the host-side program has a Kernel function, insert a hostSync function at the end of the Kernel function.

[0133] The second insertion unit is used to downgrade the backend instructions of the device-side program. If there is a return node in the device-side program, the device-side function exit is determined based on the return node, and the deviceSync function is inserted at the device-side function exit.

[0134] In some optional embodiments, the first insertion unit includes:

[0135] The judgment subunit is used to judge whether the compilation item in the host program is the -g option if there is a global attribute in the AST node of the function declaration in the host program during the traversal of the AST node of the function declaration, and the current function is a Kernel function.

[0136] Insert subunit, used to insert hostSync function at the end of Kernel function if the compilation item is -g option.

[0137] In some optional implementations, the setting module 902 includes:

[0138] The creation unit is used to create a hostSync breakpoint in the host program and use the hostSync breakpoint as an internal breakpoint on the host.

[0139] The search unit is used to start the debugged program and search for the device-side synchronization function when the debugged program runs to the device-side Kernel function.

[0140] The setting unit is used to set a deviceSync breakpoint in the device-side program based on the device-side synchronization function, and use the deviceSync breakpoint as an internal breakpoint of the device-side.

[0141] In some optional implementations, the first control module 903 includes:

[0142] The notification unit is used to obtain the breakpoint type through the main thread. If the breakpoint type is a hostSync breakpoint, the device-side monitoring thread is notified.

[0143] The initialization unit is used to initialize the device side and set the initial synchronization variables through the device side monitoring thread.

[0144] The query unit is used to query the device-side monitoring thread synchronization variable through the main thread. If the device-side monitoring thread synchronization variable is the initial synchronization variable, the host-side program is controlled to stop running.

[0145] The execution unit is used to execute the device-side program through the device-side monitoring thread, and set the end synchronization variable when the device-side program is executed.

[0146] The control unit is used to control the host-side program to continue running if the device-side monitoring thread synchronization variable is the end synchronization variable.

[0147] In some optional implementations, the second control module 904 includes:

[0148] The switching unit is used to switch the current focus to the other computing core for debugging if the current computing core executes to the deviceSync breakpoint and there is another computing core stopped by the deviceSync breakpoint.

[0149] The exit unit is used to control other computing cores to exit if the current computing core executes to the deviceSync breakpoint and other computing cores are stopped at the deviceSync breakpoint.

[0150] The further functional description of each of the above modules and units is the same as that of the above corresponding embodiments and will not be repeated here.

[0151] The data synchronization device for a heterogeneous debugger in this embodiment is presented in the form of a functional unit, where the unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that executes one or more software or fixed programs, and / or other devices that can provide the above functions.

[0152] The embodiment of the present invention also provides a computer device having the above Fig. 9 A data synchronization device for a heterogeneous debugger is shown.

[0153] See also Fig.10 , Fig.10 is a schematic diagram of the structure of a computer device provided by an optional embodiment of the present invention, such as Fig.10As shown, the computer device includes: one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components are connected to each other using different buses for communication, and can be installed on a common mainboard or installed in other ways as needed. The processor can process instructions executed in the computer device, including instructions stored in or on the memory to display the graphical information of the GUI on an external input / output device (such as a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories. Similarly, multiple computer devices can be connected, and each device provides some necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Fig.10 A processor 10 is taken as an example.

[0154] The processor 10 may be a central processing unit, a network processor or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be a dedicated integrated circuit, a programmable logic device or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic or any combination thereof.

[0155] The memory 20 stores instructions executable by at least one processor 10, so that the at least one processor 10 executes the method shown in the above embodiment.

[0156] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created according to the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely arranged relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0157] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid state drive; the memory 20 may also include a combination of the above types of memory.

[0158] The computer device also includes an input device 30 and an output device 40. The processor 10, the memory 20, the input device 30 and the output device 40 may be connected via a bus or other means. Fig.10 The example of connecting through bus is taken in the following.

[0159] The input device 30 can receive input digital or character information, and generate key signal input related to the user settings and function control of the computer device, such as a touch screen, a keypad, a mouse, a track pad, a touch pad, an indicator bar, one or more mouse buttons, a trackball, a joystick, etc. The output device 40 may include a display device, an auxiliary lighting device (e.g., an LED) and a tactile feedback device (e.g., a vibration motor), etc. The above-mentioned display device includes but is not limited to a liquid crystal display, a light emitting diode, a display and a plasma display. In some optional embodiments, the display device can be a touch screen.

[0160] The embodiment of the present invention also provides a computer-readable storage medium. The method according to the embodiment of the present invention can be implemented in hardware, firmware, or can be implemented as a computer code that can be recorded in a storage medium, or can be implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and will be stored in a local storage medium through a network download, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state hard disk, etc.; further, the storage medium can also include a combination of the above types of memories. It can be understood that a computer, a processor, a microprocessor controller, or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor, or hardware, the method shown in the above embodiment is implemented.

[0161] A part of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the existence of the computer program instruction in a computer-readable medium includes, but is not limited to, a source file, an executable file, an installation package file, etc., and accordingly, the way in which the computer program instruction is executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium accessible to the computer.

[0162] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A data synchronization method for a heterogeneous debugger, characterized in that: include: Obtain a host-side program and a device-side program, and insert synchronization functions in the host-side program and the device-side program respectively; Using the synchronization function to set the internal breakpoints of the host end and the internal breakpoints of the device end; Using the internal breakpoint of the host end to synchronously control the host end and the device end; The internal breakpoints of the device are used to perform synchronization control between computing cores of the device.

2. The method according to claim 1, characterized in that Obtain a host-side program and a device-side program, and insert synchronization functions in the host-side program and the device-side program respectively, wherein the synchronization functions include a hostSync function and a deviceSync function; including: Performing semantic analysis on the host-side program, and if the host-side program has a Kernel function, inserting the hostSync function at the end of the Kernel function; The device-side program is downgraded to backend instructions. If a return node exists in the device-side program, a device-side function exit is determined based on the return node, and the deviceSync function is inserted at the device-side function exit.

3. The method according to claim 2, characterized in that The performing semantic analysis on the host-side program and inserting the hostSync function at the end of the Kernel function if the host-side program has a Kernel function comprises: In the process of traversing the AST nodes of the function declaration in the host-side program, if the AST node of the function declaration has a global attribute, the current function is a Kernel function, and it is determined whether the compilation item in the host-side program is a -g option; If the compilation item is the -g option, the hostSync function is inserted at the end of the Kernel function.

4. The method according to claim 1, characterized in that The method of using the synchronization function to set the internal breakpoints of the host end and the internal breakpoints of the device end includes: Creating a hostSync breakpoint in the host-side program, and using the hostSync breakpoint as an internal breakpoint of the host-side; Start the debugged program, and when the debugged program runs to the device-side Kernel function, search for the device-side synchronization function; A deviceSync breakpoint is set in the device-side program based on the device-side synchronization function, and the deviceSync breakpoint is used as an internal breakpoint of the device-side.

5. The method according to claim 1, characterized in that The method of synchronously controlling the host end and the device end by utilizing the internal breakpoint of the host end includes: Obtain the breakpoint type through the main thread, and if the breakpoint type is the hostSync breakpoint, notify the device-side monitoring thread; Initializing the device side and setting initial synchronization variables through the device side monitoring thread; Querying the device-side monitoring thread synchronization variable through the main thread, and if the device-side monitoring thread synchronization variable is the initial synchronization variable, controlling the host-side program to stop running; Executing the device-side program through the device-side monitoring thread, and setting an end synchronization variable when the execution of the device-side program ends; If the device-side monitoring thread synchronization variable is the end synchronization variable, the host-side program is controlled to continue running.

6. The method according to claim 1, characterized in that The using the internal breakpoints of the device end to synchronously control the computing cores of the device end includes: If the current computing core executes to the deviceSync breakpoint, and there is another computing core stopped by the deviceSync breakpoint, the current focus is switched to the other computing core for debugging; Alternatively, if the current computing core executes to a deviceSync breakpoint, and the other computing cores are all stopped at the deviceSync breakpoint, the other computing cores are controlled to exit execution.

7. A data synchronization device for a heterogeneous debugger, characterized in that: The device comprises: An insert module, used for acquiring a host-side program and a device-side program, and inserting synchronization functions in the host-side program and the device-side program respectively; A setting module, used for setting the internal breakpoints of the host end and the internal breakpoints of the device end by using the synchronization function; A first control module, used for synchronously controlling the host end and the device end by utilizing the internal breakpoint of the host end; The second control module is used to use the internal breakpoints of the device end to perform synchronization control between the computing cores of the device end.

8. A computer device, characterized in that: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the data synchronization method for a heterogeneous debugger according to any one of claims 1 to 6 by executing the computer instructions.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the data synchronization method for a heterogeneous debugger according to any one of claims 1 to 6.

10. A computer program product, characterized in that The method comprises computer instructions, wherein the computer instructions are used to cause a computer to execute the data synchronization method for a heterogeneous debugger according to any one of claims 1 to 6.

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