Josephson static random access memory
By designing an electrically coupled superconducting loop and SFQ pulse control based on the Josephson junction, a high-performance static random access memory is realized, which solves the problems of fastness and multi-port support in the prior art, and realizes high-density and logic circuit-compatible manufacturing.
Patent Information
- Application Number
- CN202380057386.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-07-27
- Filing Date
- 2023-07-24
- Publication Date
- 2025-05-16
AI Technical Summary
Existing Josephson junction-based static random access memory (SRAM) is difficult to achieve fast, dense and support multiple read and write ports sufficiently, and the manufacturing process is incompatible with the process of high-performance logic circuits.
A memory device based on the Josephson junction is designed, including multiple electrically coupled superconducting loops. The storage and elimination of magnetic flux quantums is achieved through the combination of control signals and single-flux quantum (SFQ) pulses, supporting series arrangement and wave pipeline operation, and synchronous control is used using the Josephson transmission line and the global resonant clock network.
It realizes high-performance static random access memory (JSRAM), supports multiple read and write ports, has a density of up to 5MB/cm2, a clock rate of 30GHz, and can be manufactured using the same process as high-performance SFQ logic circuits, avoiding complex conversion processes and physical components.