Control system and method of Heric bridge single-phase energy storage inverter

Abstract

The invention discloses a control system of a Helic bridge single-phase energy storage inverter in the technical field of power electronics, and the system comprises a voltage outer loop periodic error iterative correction QPR regulator which is used for carrying out the quasi-proportional resonance regulation and periodic error iterative correction processing of a voltage error signal to generate a reference current signal; the current inner loop load disturbance feedforward PR regulator is used for carrying out proportional resonance regulation and feedforward control error correction processing on the current error signal to obtain a control signal; and the pulse driving controller is used for generating a PWM (Pulse Width Modulation) signal by performing time domain conversion, phase delay and same-side unipolar modulation processing on the control signal and comparing the control signal with a carrier signal, and controlling the on-off of a switching tube in the Herac bridge module after the PWM signal is amplified by a driving circuit so as to realize accurate control on the output voltage and current of the inverter. The stability and reliability of the energy storage inverter system are improved, and the electric energy conversion efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and particularly relates to a control system and a control method for a energy storage inverter. Background Art

[0002] Currently, single-phase energy storage inverters are increasingly widely used, but the existing inverter technologies still have deficiencies. In terms of the topology of the grid-side inverter in a single-phase energy storage inverter system, common ones include H4 bridge, H6 bridge, and Heric bridge circuits. Currently, the Heric bridge circuit is relatively widely used in single-phase energy storage inverter systems. However, due to the complex distribution of drive control signals for the switching tubes, especially under different working conditions, it is difficult to meet the requirements of efficient, reliable, and stable operation on the grid side. On the control strategy level, the traditional PI control method performs poorly in dealing with the complex working conditions of energy storage inversion. When switching between different operation modes, such as grid connection and off-grid, inversion and rectification switching, impact current and voltage fluctuations are likely to occur, which reduces the power quality and system reliability. There is an urgent need for the technology of the present invention to break through these bottlenecks. Summary of the Invention

[0003] The present invention provides a control system and a method for a Heric bridge single-phase energy storage inverter, which solve the above deficiencies.

[0004] The object of the present invention is achieved as follows: A control system for a Heric bridge single-phase energy storage inverter, comprising:

[0005] A voltage outer-loop periodic error iterative correction QPR regulator, which is used to compare the feedback signal of the output voltage sampling of the Heric bridge single-phase energy storage inverter circuit with the output voltage given signal, generate a voltage error signal, and perform quasi-proportional resonance regulation and periodic error iterative correction processing on it to generate a reference current signal, and transmit it to the current inner-loop load disturbance feedforward PR regulator;

[0006] A current inner-loop load disturbance feedforward PR regulator, which is used to compare the reference current signal with the feedback signal of the inductor current sampling and the feedforward signal generated by the load resistance disturbance, generate a current error signal, and perform proportional resonance regulation and feedforward control correction error processing on it to obtain a control signal;

[0007] A pulse drive controller, which is used to perform time-domain conversion, phase delay, and same-side unipolar modulation processing on the control signal, compare it with a carrier signal to generate a PWM signal, and control the on-off of the switching tubes in the Heric bridge module after amplification by a drive circuit to achieve precise control of the output voltage and current of the inverter.

[0008] Further, the voltage outer-loop periodic error iterative correction QPR regulator is built-in with a periodic error iterative corrector, which is embedded in front of the QPR regulator and is used to first add the voltage error signal to the signal processed by Q(z)z -N and then perform periodic delay through z -N to strengthen the periodic information processing. The processed signal enters the compensator. The compensator compensates for the phase lag and amplitude attenuation of the system, improves the frequency response. The compensated signal is input to the discrete characteristic link of the controlled object to achieve good tracking of the reference signal and effective suppression of interference. The discrete signal passes through the QPR regulator to provide high gain at specific frequency points through its proportional resonance characteristic, suppress harmonic generation, achieve precise regulation of the voltage error, and simultaneously generate the reference current signal required for the current inner loop.

[0009] Further, the current inner-loop load disturbance feedforward PR regulator includes a current inner-loop PR regulator and a load disturbance feedforward. The reference current is obtained from the output of the voltage outer-loop periodic error iterative QPR regulator, representing the desired current value of the system. At the same time, it is compared with the feedback value of the inductor current sampling signal and the feedforward signal generated by the load resistance disturbance, and the generated current error signal is sent to the current inner-loop PR regulator. The load disturbance feedforward compensates in advance for the current fluctuation caused by the load change. This signal is superimposed on the output signal of the current inner-loop PR regulator to form a control signal, which acts on the inductor module to regulate the inductor current signal, and then generates the output current through the load resistance. The inductor current is instantaneously feedback for current limiting protection to ensure the system operates within a safe range.

[0010] Further, the pulse driver converts the control signal through a time-domain conversion link from the complex frequency domain form to a time-domain signal to meet the requirements of subsequent signal processing based on time characteristics, obtaining an AC positive half-cycle modulation wave. Then, the time-domain signal is phase-delayed by half a cycle to obtain an AC negative half-cycle modulation wave. At the same time, the AC positive half-cycle modulation wave and the AC negative half-cycle modulation wave are sent into a selector using the same-side unipolar modulation method, and the same-side modulation wave with all instantaneous values greater than 0 is output. It is input to a comparator together with a triangular carrier wave to generate a PWM signal, which is amplified by a drive circuit to control the on and off of the switching tubes in the Heric bridge module to achieve precise control of the output voltage and current of the inverter.

[0011] Further, the specific comparison process inside the comparator is as follows:

[0012] When the AC positive half-cycle modulation wave is greater than the triangular carrier wave, the pulse control signals of switching tubes Q1 and Q4 output high levels to form a high-frequency signal. At the same time, the pulse control signal of switching tube Q5 outputs high level with high-frequency complementarity, and the pulse control signal of switching tube Q6 outputs high level with low-frequency modulation. When the AC negative half-cycle modulation wave is greater than the triangular carrier wave, the pulse control signals of switching tubes Q2 and Q3 output high levels to form a high-frequency signal. At the same time, the pulse control signal of switching tube Q5 outputs high level with low-frequency modulation, and the pulse control signal of switching tube Q6 outputs high level with high-frequency complementarity.

[0013] A control method for a Heric-bridge single-phase energy storage inverter includes the following steps:

[0014] Step 1): After comparing the feedback signal of the output voltage sampling of the Heric-bridge inverter circuit with the output voltage given signal, the generated voltage error signal is sent to the voltage outer-loop periodic error iterative correction QPR regulator to generate a reference current signal;

[0015] Step 2): After comparing the reference current signal with the feedback signal of the inductor current sampling and the feed-forward signal generated by the load resistance disturbance, the generated current error signal is sent to the current inner-loop load disturbance feed-forward PR regulator to obtain a control signal;

[0016] Step 3): The control signal is processed through time-domain conversion, phase delay, same-side unipolar modulation, etc., compared with the carrier signal to generate a PWM signal, and after being amplified by the drive circuit, it controls the on and off of the switching tubes in the Heric-bridge module to achieve precise control of the output voltage and current of the inverter.

[0017] Further, step 1) specifically includes:

[0018] Compare the output voltage given signal with the feedback voltage signal, and after the generated voltage error signal eliminates the periodic signal without static error through the periodic error iterative corrector, input it into the voltage outer-loop QPR regulator; the periodic error iterative corrector adopts an embedded algorithm structure, embedded in front of the QPR regulator. The original voltage error signal is first added to the signal processed by Q(z)z -N processing, and then through z -N periodic delay to strengthen the periodic information processing. The processed signal enters the compensator, and the compensator compensates for the phase lag and amplitude attenuation of the system to improve the frequency response. The compensated signal is input to the discrete characteristic link of the controlled object. Subsequently, the voltage outer-loop QPR regulator provides high gain at a specific frequency point through its proportional resonance characteristic to suppress harmonic generation, achieve precise regulation of the voltage error, and at the same time generate the reference current signal required by the current inner-loop.

[0019] Further, step 2) specifically includes:

[0020] The reference current signal output by the voltage loop is used as the given value of the current loop, compared with the feedback inductor current signal and the feedforward signal generated by the load resistance disturbance, generating an error signal and inputting it into the current inner-loop PR regulator; the current fluctuation caused by the load change is compensated in advance through the load disturbance feedforward, and this signal is superimposed on the output signal of the current inner-loop PR regulator to form a control signal, which acts on the inductor module to regulate the inductor current signal, and then generates an output current through the load resistance. The inductor current is instantaneously feedback for current limiting protection to ensure that the system operates within a safe range.

[0021] Further, step 3) specifically includes:

[0022] The control signal is converted from the complex frequency domain form to the time domain signal through the time domain conversion link to meet the requirements of subsequent signal processing based on time characteristics, obtaining the AC positive half-cycle modulation wave, and then delaying the phase of the time domain signal by half a cycle to obtain the AC negative half-cycle modulation wave; the AC positive half-cycle modulation wave and the AC negative half-cycle modulation wave are sent to the selector to output the same-side modulation wave with all instantaneous values greater than 0, which is input into the comparator together with the triangular carrier wave to generate a PWM signal, and after being amplified by the drive circuit, it controls the on and off of the switching tubes in the Heric bridge module to achieve precise control of the output voltage and current of the inverter.

[0023] Further, the comparison process is specifically as follows:

[0024] When the AC positive half-cycle modulation wave is greater than the triangular carrier wave, the pulse control signals of switching tubes Q1 and Q4 output high levels to form a high-frequency signal. At the same time, the pulse control signal of switching tube Q5 outputs high-frequency complementarily, and the pulse control signal of switching tube Q6 outputs high level with low-frequency modulation; when the AC negative half-cycle modulation wave is greater than the triangular carrier wave, the pulse control signals of switching tubes Q2 and Q3 output high levels to form a high-frequency signal. At the same time, the pulse control signal of switching tube Q5 outputs high level with low-frequency modulation, and the pulse control signal of switching tube Q6 outputs high-frequency complementarily.

[0025] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0026] The advantages of the present invention are remarkable. For the grid-side Heric inverter circuit in the single-phase energy storage inverter system, the voltage outer-loop periodic error iterative correction QPR regulator adopted can effectively suppress periodic disturbances and harmonics, accurately adjust the voltage error, and generate accurate reference current signals. The introduced current inner-loop load disturbance feedforward PR regulator can quickly respond to load mutations, compensate for current fluctuations using the feedforward signal, and combine the inductor current feedback current limiting protection to stably output the current. The same-side unipolar modulation method of the pulse drive controller can effectively reduce the switching tube loss and extend its service life. In short, the technology and method of this invention achieve precise voltage and current control, improve the stability and reliability of the energy storage inverter system, increase the power conversion efficiency, are applicable to various power conversion modes, and the parameters can be flexibly adjusted to meet the application requirements of multiple working conditions.

[0027] The present invention is applicable to various scenarios that require efficient power conversion and precise control, covering grid-connected power generation, PFC (power factor correction) rectification, off-grid inversion, etc., and is committed to providing stable and efficient power processing solutions for energy storage systems, distributed energy access and other fields. Brief Description of the Drawings

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only the embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained according to the provided drawings.

[0029] Figure 1 The control method and system general block diagram of the Heric bridge single-phase energy storage inverter of the present invention.

[0030] Figure 2 The control method and system module schematic diagram of the Heric bridge single-phase energy storage inverter of the present invention.

[0031] Figure 3 The switching tube control pulse timing diagram of the same-side unipolar modulation method of the Heric bridge single-phase energy storage inverter of the present invention.

[0032] Figure 4 The simulation working waveform of the off-grid inversion mode of the Heric bridge single-phase energy storage inverter of the present invention.

[0033] Figure 5 The simulation working waveform of the grid-connected rectification mode of the Heric bridge single-phase energy storage inverter of the present invention.

[0034] Figure 6 The experimental drive waveform of the same-side unipolar modulation method of the Heric bridge single-phase energy storage inverter of the present invention.

[0035] Figure 7 The steady-state experimental working waveforms of the off-grid inverter of the Heric-bridge single-phase energy storage inverter of the present invention during no-load operation.

[0036] Figure 8 The steady-state experimental working waveforms of the off-grid inverter of the Heric-bridge single-phase energy storage inverter of the present invention during full-load operation.

[0037] Figure 9 The working waveforms of the load-shedding experiment of the off-grid inverter of the Heric-bridge single-phase energy storage inverter of the present invention when a load is suddenly applied.

[0038] Figure 10 The working waveforms of the load-shedding experiment of the off-grid inverter of the Heric-bridge single-phase energy storage inverter of the present invention when a load is suddenly removed.

[0039] Figure 11 The steady-state experimental working waveforms of the grid-connected rectifier of the Heric-bridge single-phase energy storage inverter of the present invention.

[0040] Figure 1 The symbol names in

[0041] <![CDATA[v oref > Output voltage reference signal <![CDATA[i ref > Reference current signal <![CDATA[v o > Output voltage sampling signal <![CDATA[i L > Inductor current sampling signal <![CDATA[v f > Feedback voltage signal <![CDATA[i f > Feedback current signal <![CDATA[v oerr > Voltage error signal <![CDATA[i oerr > Current error signal <![CDATA[v reg > Common-side modulation wave signal <![CDATA[i rf > Load disturbance feedforward signal <![CDATA[v ca > Triangular carrier signal <![CDATA[v gt > Pulse control signal

[0042] Figure 2 The symbol names in

[0043] <![CDATA[V bus > DC bus voltage <![CDATA[C dc > Input-side decoupling capacitor <![CDATA[Q 1~6 > Switching transistor <![CDATA[D 1~6 > Body diode of the switching transistor <![CDATA[V gt1~6 > Pulse control signal of the switching transistor <![CDATA[L 1、2 > Resonant inductor <![CDATA[C g > DC-blocking capacitor <![CDATA[k uf > Voltage feedback coefficient <![CDATA[i c > Capacitor current <![CDATA[k if > Current feedback coefficient <![CDATA[T si > Time constant <![CDATA[z -N > Period delay link Q(z) Response characteristic constant <![CDATA[k pwm > PWM link gain C(z) Compensator transfer function <![CDATA[u i (s)]]> Frequency-domain control signal P(z) Discrete-domain transfer function <![CDATA[u i (t)]]> Time-domain control signal <![CDATA[v reg1 > AC positive half-cycle modulation signal <![CDATA[v reg2 > AC negative half-cycle modulation signal

[0044] Other symbol names are the same as those in Figure 1 The symbol names in;

[0045] Figure 3 The symbol names in are the same as those in Figure 1 、 2 The symbol names in; Specific implementation manners

[0046] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0047] Such as Figure 1As shown in the figure, the component composition of the present invention is as follows: a voltage outer loop periodic error iterative correction QPR regulator 1, a current inner loop load disturbance feedforward PR regulator 2, and a pulse drive controller 3; they form a closed-loop control with the Heric bridge single-phase energy storage inverter 4, where the voltage outer loop periodic error iterative correction QPR regulator 1 and the current inner loop load disturbance feedforward PR regulator 2 can be implemented through programs and program configurations in the CPU.

[0048] As Figure 2 shown, a control method and system for a Heric bridge single-phase energy storage inverter, where the Heric bridge single-phase energy storage inverter module 4 consists of a DC bus voltage V bus , an input side decoupling capacitor C dc , a partial bridge arm composed of four switching tubes Q 1~4 and their anti-parallel diodes D 1~4 , and another bridge arm circuit composed of two switching tubes Q 5 , Q 6 and their associated diodes D 5 , D 6 ; there is also an output filter, including a resonant inductor L 1、2 and a DC blocking capacitor C g ; in addition, there are drive signals V gt1~6 for controlling the switching tubes, etc., which together form the Heric bridge single-phase energy storage inverter module 4.

[0049] Voltage and current sampling signals are sampled from the Heric bridge single-phase energy storage inverter module 4, including an output voltage sampling signal v o , an inductor current sampling signal i L ; the output voltage reference value v oref is used as the desired voltage target of the system, and is compared with the feedback value v o of the output voltage sampling signal v f . The difference between the two forms a voltage error signal v oerr and is sent to the voltage outer loop periodic error iterative QPR regulator 1; the voltage outer loop periodic error iterative QPR regulator 1 consists of a periodic error iterative corrector 101 and a voltage outer loop QPR regulator. The periodic error iterative corrector 101 adopts an embedded algorithm structure and is embedded in front of the voltage outer loop QPR regulator.

[0050] In the periodic error iterative corrector 101, the signal processed by Q(z)z -N is added to the original voltage error signal v oerr , and then passes through z -NThe periodic delay link further delays the signal, strengthens the processing of periodic information, and the output signal enters the compensator C(z). The compensator compensates for the phase lag and amplitude attenuation of the system, improves the frequency response characteristics of the system, enables the system to better track the reference signal and suppress interference, and the compensated signal is input to the discrete characteristic link P(z) of the controlled object. Specifically:

[0051] Assume that the period of the error signal is L, then the signal model of the periodic error iterative corrector can be expressed as

[0052]

[0053] Its discrete transfer function is expressed as

[0054]

[0055] The transfer function H(z) of the periodic error iterative corrector is as follows:

[0056]

[0057] Written in the form of a difference equation as

[0058]

[0059] Where N is the number of sampling times in one period, Q(z) is to enhance the stability of the system and make the closed-loop poles of the system inside the unit circle. Generally, a constant less than 1 is taken. Here, Q(z)=0.95, and K is the number of phase compensation times; every time a control period (i.e., N steps) passes, the system output is accumulated once, and the output of the previous period is weakened by 5% and then added to the current value of the input to ensure the stability of the system.

[0060] The voltage outer-loop QPR regulator provides high gain at specific frequency points through its proportional resonance characteristics, suppresses harmonic generation, realizes precise regulation of voltage error, and at the same time generates the reference current signal required by the current inner loop. Its signal model can be expressed as:

[0061]

[0062] The transfer function of the voltage outer-loop QPR regulator is:

[0063]

[0064] At the given cut-off frequency of f s and phase margin of Φ,

[0065]

[0066] The parameters of the voltage outer-loop QPR regulator at this time can be obtained through the above formula , , where \(G_{i\_Regulated\_Closed}(s)\) is the closed-loop transfer function of the current loop after regulation, \(k\) uf is the voltage feedback coefficient, is the bandwidth parameter, is the resonance frequency, is the proportionality coefficient, is the resonance coefficient.

[0067] The current inner-loop load disturbance feedforward PR regulator 2 is composed of the current inner-loop PR regulator and the load disturbance feedforward 201; the reference current \(i\) ref of the current inner-loop load disturbance feedforward PR regulator 2 is obtained from the output of the voltage outer-loop periodic error iterative QPR regulator 1, representing the desired current value of the system. At the same time, it is compared with the feedback value \(i\) L of the inductor current sampling signal \(i\) f and the feedforward signal \(i\) L generated by the load resistance \(R\) rf disturbance. The generated current error signal \(i\) oerr is sent to the current inner-loop PR regulator.

[0068] The output signal of the current inner-loop PR regulator enters the PWM link, where \(k\) pwm is the gain of the PWM link, which amplifies the signal. forms a first-order inertia link, which affects the signal transmission and response speed. After being processed by this link, the control signal \(u\) i (s) output by the current inner-loop PR regulator is obtained. This signal is used for subsequent drive control of the power device; the control signal \(u\) i (s) acts on the inductor link, and its transfer function is , where \(L\) is the inductor value, \(r\) L is the equivalent series resistance of the inductor. This link reflects the resistance characteristic of the inductor to the current change and the influence of the inductor's own resistance. Under this action, the actual inductor current \(i\) L is generated. A part of the inductor current \(i\) L flows through the capacitor link as the capacitor current \(i\) c , and a part flows to the load disturbance feedforward 201 as the load current \(i\) o . The load current \(i\) o is related to the load resistance \(R\) L , and the load disturbance feedforward current signal \(i\) rf is generated based on the load change conditions such as the load resistance \(R\) L to compensate for the influence of the load disturbance on the current in advance and participate in the formation of the current error signal at the same time. The capacitor current \(i\) c and the load current \(i\) oJointly affect the output voltage; the actual inductor current i L It is also fed back to the front end of the system through the current feedback link, where k if is the current feedback gain, used to adjust the magnitude of the feedback signal, constitutes a first-order inertial link, affecting the transmission and response characteristics of the feedback signal. The feedback signal i f continues to be compared with the reference current i ref and so on to form a new current error signal. This cycle is repeated to continuously adjust the system current to ensure that the output current is stable and meets the requirements of the reference current. At the same time, the load disturbance feedforward mechanism is used to quickly respond to the impact of load changes.

[0069] The load disturbance feedforward signal i o (s) is calculated as follows:

[0070]

[0071]

[0072] The signal model of the current inner-loop PR regulator can be expressed as:

[0073]

[0074] The current error signal

[0075]

[0076] The control signal u i (s) is calculated as follows:

[0077]

[0078] where k ff is the current feedforward coefficient, is the resonant frequency, is the proportionality coefficient, is the resonance coefficient;

[0079] The voltage-current double-loop sampling controller module, characterized in that the current inner-loop closed-loop transfer function is

[0080]

[0081] The voltage outer-loop closed-loop transfer function is

[0082]

[0083] Considering the load disturbance feedback term is

[0084]

[0085] Considering that the load disturbance feedforward term is

[0086]

[0087] The transfer function of the voltage and current double-loop sampling controller module is

[0088] The complex frequency domain control signal u i (s) output by the current inner-loop load disturbance feedforward PR regulator 2 is converted from the complex frequency domain form to the time-domain signal u i (t) through the time-domain conversion link to meet the requirements of subsequent signal processing based on time characteristics, and the positive half-cycle modulation wave v reg1 of the alternating current is obtained. Then, the time-domain signal u i (t) is phase-delayed by half a cycle to obtain the negative half-cycle modulation wave v reg2 of the alternating current.

[0089] The positive half-cycle modulation wave v reg1 of the alternating current and the negative half-cycle modulation wave v reg2 of the alternating current are sent to the selector, and the in-phase modulation wave v reg with all instantaneous values greater than 0 is output. It is input to the comparator together with the triangular carrier wave v ca . When the positive half-cycle modulation wave v reg1 of the alternating current is greater than the triangular carrier wave v ca , the pulse control signals v gt1 and v gt4 of the switching tubes Q1 and Q4 output high levels to form a high-frequency signal. At the same time, the pulse control signal v gt6 of the switching tube Q6 outputs a high level for low-frequency modulation; when the negative half-cycle modulation wave v reg2 of the alternating current is greater than the triangular carrier wave v ca , the pulse control signals v gt2 and v gt3 of the switching tubes Q2 and Q3 output high levels to form a high-frequency signal. At the same time, the pulse control signal v gt5 of the switching tube Q5 outputs a high level for low-frequency modulation.

[0090] The switching tube control pulse timing diagram of the in-phase single-polarity modulation method 202 is as shown in Figure 3 . v ca is a non-negative triangular carrier wave; v reg1 and v reg2 are respectively the positive half-cycle modulation wave and the negative half-cycle modulation wave of the alternating current, and v reg1 and v reg2 are in antiphase; v gt1~6 are respectively the pulse control signals of the switching tubes Q 1~6 .

[0091] During the positive half - cycle of the power grid in the rectification mode, the pulse control signal v of Q5 gt5 is in high - frequency switching operation. The pulse control signal v of Q1 gt1 is the same as the pulse control signal v of Q4 gt4 and is complementary to and in high - frequency operation with the pulse control signal v of Q5 gt5 During the negative half - cycle of the power grid, the pulse control signal v of Q6 gt6 is in high - frequency switching operation. The pulse control signal v of Q2 gt2 is the same as the pulse control signal v of Q3 gt3 and is complementary to and in high - frequency operation with the pulse control signal v of Q6 gt6 Taking the positive half - cycle of the power grid as an example for further analysis, whether Q6 is always on or always off during the positive half - cycle of the power grid will not affect the Boost boost function of the Heric bridge. Therefore, similar to the positive half - cycle of the inverter mode, Q6 can be made to be always on during the positive half - cycle of rectification to reduce switching losses. Similarly, for Q5 working in the negative - half - cycle rectification, Q5 can be made to be always on, similar to the negative half - cycle of the inverter mode, to reduce switching losses.

[0092] Similarly, during the positive half - cycle of the power grid in the inverter mode, the pulse control signal v of Q5 gt5 is in high - frequency switching operation. The pulse control signal v of Q1 gt1 is the same as the pulse control signal v of Q4 gt4 and is complementary to and in high - frequency operation with the pulse control signal v of Q5 gt5 During the negative half - cycle of the power grid, the pulse control signal v of Q6 gt6 is in high - frequency switching operation. The pulse control signal v of Q2 gt2 is the same as the pulse control signal v of Q3 gt3 and is complementary to and in high - frequency operation with the pulse control signal v of Q6 gt6 Taking the positive half - cycle of the power grid as an example for further analysis, if Q5 operates at high frequency during the positive half - cycle of the power grid, it will not affect the current loop in the inverter mode. Similarly, if Q6 operates at high frequency during the negative half - cycle of the inverter, it will not affect the current loop in the inverter mode.

[0093] The generated pulse signal enters the drive circuit. The drive circuit amplifies and processes the pulse signal and outputs six drive signals V gt1~6 which are respectively used to drive the switching tubes Q 1~6 of power devices such as the Heric - bridge module, thereby controlling the on - off of the switching tubes and achieving precise regulation of the output voltage and current of the inverter.

[0094] A specific embodiment of the present invention is as follows:

[0095] Adopt Figure 2The shown Heric-bridge single-phase energy storage inverter module 4 is connected to the power grid as the main circuit of the inverter. The control method includes a voltage outer-loop periodic error iterative correction QPR regulator 1, a current inner-loop load disturbance feedforward PR regulator 2, and a pulse drive control module 3, which constitute the system of the Heric single-phase energy storage inverter.

[0096] The system power of the Heric single-phase energy storage inverter module 4 is 10 kW, and the DC bus voltage V bus is 400 V, the input-side decoupling capacitor C dc is 470 μF, and the resonant inductors L 1、2 are both 325 μH each, the DC-blocking capacitor C g is 20 μF, the grid voltage Vg is 220 V, the gain k pwm of the PWM link is taken as 0.16, the voltage feedback coefficient k uf is taken as 1, the current feedback coefficient k if is taken as 1. The switching transistors Q1 - Q6 are N-channel MOSFETs of ON Semiconductor, model FCH072N60 (rated voltage 500 V, rated current 48 A), and the switching frequency is 20 kHz. Figure 2 Among them, D1 - D6 are the body diodes of the switching transistors Q1 - Q6.

[0097] When the Heric single-phase energy storage inverter is in grid-connected inversion operation, the converter converts DC electrical energy into AC electrical energy matching the power grid to realize power feeding to the power grid; when the Heric single-phase energy storage inverter is in off-grid inversion operation, it can also supply power to local loads from the DC bus through the converter to meet the power distribution and utilization requirements under different working conditions; when the Heric single-phase energy storage inverter is in rectification operation, it converts the alternating current (AC) from the power grid into direct current (DC) and provides a stable DC voltage for the DC bus for subsequent power supply to DC loads or charging of energy storage devices, etc. And the three working modes can be smoothly switched through programs. This energy bidirectional flow technology helps to improve the utilization efficiency of electrical energy and the stability of the system.

[0098] Figure 2 Among them, the voltage-current double-loop sampling controller composed of the voltage outer-loop periodic error iterative correction QPR regulator 1 and the current inner-loop load disturbance feedforward PR regulator 2 is implemented by the digital chip TMS320F28075 of Texas Instruments. Voltage and current sampling signals are obtained by sampling from the Heric-bridge single-phase energy storage inverter module 4, including the output voltage sampling signal v o , and the inductor current sampling signal i L ; the output voltage reference value v oref serves as the desired voltage target of the system, and the feedback value v o of the output voltage sampling signal v fCompare them, and the difference between the two forms a voltage error signal v oerr Sent to the voltage outer loop periodic error iterative QPR regulator 1; the voltage outer loop periodic error iterative QPR regulator 1 is characterized by consisting of a periodic error iterative corrector 101 and a voltage outer loop QPR regulator. The periodic error iterative corrector 101 adopts an embedded algorithm structure and is embedded in front of the voltage outer loop QPR regulator.

[0099] In the periodic error iterative corrector 101, the signal processed by Q(z)z -N Is added to the original voltage error signal v oerr Then, it passes through z -N Periodic delay link again to further delay the signal and strengthen the processing of periodic information. The output signal enters the compensator C(z). The compensator compensates for the phase lag and amplitude attenuation of the system, improves the frequency response characteristics of the system, enables the system to better track the reference signal and suppress interference. The compensated signal is input to the discrete characteristic link P(z) of the controlled object.

[0100] Figure 2 The reference current i ref Of the current inner loop load disturbance feedforward PR regulator 2 before the disturbance is obtained from the output of the voltage outer loop periodic error iterative QPR regulator 1, representing the desired current value of the system. At the same time, it is compared with the feedback value i L Of the inductor current sampling signal i f And the feedforward signal i L Generated by the load resistance R rf Of the disturbance. The generated current error signal i oerr Is sent to the current inner loop PR regulator. The output signal of the current inner loop PR regulator enters the PWM link, where k pwm Is the gain of the PWM link and plays a role in amplifying the signal. Forms a first-order inertia link, which affects the transmission and response speed of the signal. After being processed by this link, the control signal u i (s) output by the current inner loop PR regulator is obtained. This signal is used for subsequent drive control of the power device; the control signal u i (s) acts on the inductor link, and its transfer function is , where L is the inductance value and r L Is the equivalent series resistance of the inductor. This link reflects the hindrance characteristic of the inductor to the current change and the influence of the inductor's own resistance. Under this action, the actual inductor current i L Is generated. A part of the inductor current i L Flows through the capacitor link as the capacitor current i c , and a part flows to the load disturbance feedforward 201 as the load current i o ​o is related to the load resistor R L and the load disturbance feedforward current signal i rf is generated based on the load changes such as the load resistor R L to compensate in advance for the influence of load disturbances on the current, and at the same time participates in the formation of the current error signal. The capacitor current i c and the load current i o jointly affect the output voltage; the actual inductor current i L is also fed back to the front end of the system through the current feedback link, where k if is the current feedback gain, used to adjust the magnitude of the feedback signal, constitutes a first-order inertia link, affecting the transmission and response characteristics of the feedback signal. The feedback signal i f continues to be compared with the reference current i ref etc. to form a new current error signal. In this way, the cycle is repeated to achieve continuous regulation of the system current to ensure that the output current is stable and meets the requirements of the reference current, and at the same time, quickly respond to the influence brought by load changes through the load disturbance feedforward mechanism.

[0101] Figure 2 The complex frequency domain control signal u i (s) output by the load disturbance feedforward PR regulator 2 in the current inner loop adopts the same-side unipolar modulation method 202. Through the time-domain conversion link, it is converted from the complex frequency domain form to the time-domain signal u i (t) to meet the requirements of subsequent signal processing based on time characteristics, and the AC positive half-cycle modulation wave v reg1 is obtained. Then, the time-domain signal u i (t) is phase-delayed by half a cycle to obtain the AC negative half-cycle modulation wave v reg2 . The AC positive half-cycle modulation wave v reg1 and the AC negative half-cycle modulation wave v reg2 are sent to the selector, and the same-side modulation wave v reg with all instantaneous values greater than 0 is output, and is input into the comparator together with the triangular carrier wave v ca . As shown in Figure 3 , when the AC positive half-cycle modulation wave v reg1 is greater than the triangular carrier wave v ca , the pulse control signals v gt1 and v gt4 of the switching tubes Q1 and Q4 output high levels, constituting a high-frequency signal. At the same time, the pulse control signal v gt6 of the switching tube Q6 outputs a high level for low-frequency modulation; when the AC negative half-cycle modulation wave v reg2 is greater than the triangular carrier wave v ca , the pulse control signals v gt2 and vgt3 Outputs a high level to form a high-frequency signal. At the same time, the pulse control signal v of the switching transistor Q5 gt5 Outputs a high level for low-frequency modulation.

[0102] The bidirectional working simulation waveforms of the Heric single-phase energy storage inverter at the rated power are as Figure 4 、 Figure 5 shown. From top to bottom, they are the driving waveforms of the full-bridge switching transistors, AC voltage, AC current, and DC bus voltage waveforms. Figure 4 They are the steady-state simulation working waveforms in the off-grid inverter mode. Figure 5 They are the steady-state working waveforms in the grid-connected rectifier mode. It can be seen that under the action of the voltage outer-loop periodic error iterative correction QPR regulator 1, the current inner-loop load disturbance feedforward PR regulator 2, and the pulse drive control module 3, the AC output voltage in the inverter mode has a high sinusoidality, and the discharging DC bus voltage can be stabilized at the given value of 400V. The grid-side current in the rectifier mode also has a high sinusoidality, achieving high power factor rectification, and the charging DC bus voltage can also be stabilized at the given value of 400V.

[0103] Under the same-side unipolar modulation method 202, the experimental driving waveforms of the Heric-bridge single-phase energy storage inverter are as Figure 6 shown. From bottom to top, CH1 is the pulse control signal waveforms v gt2 、v gt3 of the switching transistors Q2 and Q3, CH2 is the pulse control signal waveform v gt6 of the switching transistor Q6, CH3 is the pulse control signal waveform vgt5 of the switching transistor Q5, and CH4 is the pulse control signal waveforms vgt1 and vgt4 of the switching transistors Q1 and Q4.

[0104] In the off-grid inverter mode, the experimental working waveforms of the Heric-bridge single-phase energy storage inverter in the no-load working state are as Figure 7 shown, and the experimental working waveforms in the full-load (rated power 600W) working state are as Figure 8 shown. Figure 7 、 8The waveform of the inverter output voltage is shown in the CH2 channel. It can be seen that the voltage peak values at no-load and full-load are approximately 310V, and the corresponding effective values are close to 220V. The waveform of the inverter output current is shown in the CH4 channel. The current value is small at no-load, and there are obvious waveform changes in the current at full-load. The effective value is close to 3.9A. The waveform periods in both states are approximately 20ms, corresponding to a frequency of 50Hz. In these two states, the inverter output voltage can be stabilized at 220V / 50Hz with good sinusoidality. Although it is usually difficult for an off-grid inverter to be stable under no-load conditions, under the control of the current voltage outer-loop periodic error iterative correction QPR regulator 1, the current inner-loop load disturbance feedforward PR regulator 2, and the pulse drive control module 3, the Heric-bridge single-phase energy storage inverter system has good steady-state performance.

[0105] To further verify the dynamic regulation ability of the Heric-bridge single-phase energy storage inverter under closed-loop control when the load power changes, a 500W load sudden addition and removal experiment was carried out on the basis of no-load. The experimental waveforms are as Figure 9 、 10 shown. The CH2 channel is the inverter output voltage, and the CH3 channel is the inverter output current. Among them, Figure 9 is the waveform of the sudden addition of load experiment. At the moment of suddenly adding a 500W load, the inverter output voltage fluctuates slightly and then quickly returns to stability. The inverter output current rises rapidly when the load is suddenly added and tends to be stable after a period of time. Figure 10 is the waveform of the sudden removal of load experiment. At the moment of suddenly removing a 500W load, the inverter output voltage fluctuates slightly and then quickly returns to steady state. The inverter output current then drops rapidly and finally tends to be stable. Under the input of a 400V DC bus provided by the front stage, the inverter output voltage fluctuates slightly at the moment of loading and unloading, but the converter completes the regulation at a relatively fast speed and returns to stability, proving that the Heric-bridge single-phase energy storage inverter under the current control scheme not only has excellent steady-state performance but also has good dynamic performance and can adapt to the rapid change of load power.

[0106] In the grid-connected rectification mode, the steady-state experimental working waveform of the Heric-bridge single-phase energy storage inverter at the rated charging power (Po = 300W) is as Figure 11 shown. When using Figure 1Under the control strategy of the voltage outer-loop periodic error iterative correction QPR regulator 1 and the current inner-loop load disturbance feedforward PR regulator 2 shown, there is a double-frequency power frequency ripple in the rectified DC bus voltage, but it can be stabilized near the given value of 400V, providing stable DC power supply for the front-stage DC / DC circuit. At the same time, the grid-side current has a high sinusoidality and the phase tracks the grid voltage phase. By performing fast Fourier decomposition on the grid-side current waveform data in MATLAB, the power factor under the rated charging power can reach above 0.99, and the total harmonic distortion is within 4.5%, meeting the system performance indicators.

[0107] From the above description, it can be seen that a control method and system for a Heric bridge single-phase energy storage inverter proposed by the present invention have the following main advantages:

[0108] (1) Precise control of voltage and current: The periodic error iterative correction QPR regulator adopted by the voltage outer loop combines the advantages of periodic error iterative correction and the QPR regulator, can continuously correct the interference and error in each period, greatly eliminate the harmonics of the output waveform, and reduce the total harmonic distortion rate of the output voltage; the load disturbance feedforward PR regulator introduced by the current inner loop has good adaptability to load mutations, uses the feedforward signal to compensate in advance for the current fluctuations caused by load changes, and can implement effective current limiting protection in combination with the inductor current feedback, and achieve stable output current, ultimately realizing the precise control of the output voltage and current of the energy storage inverter;

[0109] (2) Improve system performance: The same-side unipolar modulation method adopted by the pulse drive controller can reduce the switching loss of the switching tube, improve the overall efficiency of the inverter, extend the service life of the switching tube, and greatly improve the reliability and stability of the energy storage inverter system.

[0110] (3) The proposed control method is not only applicable to single-phase bidirectional energy storage systems based on Heric circuits, but also applicable to energy storage systems of other circuits; it can be extended and applied to three-phase energy storage systems, and can also be applied to electric vehicle bidirectional charging piles to achieve V2G and V2H applications.

[0111] The description of the above embodiments is only used to help understand the method and its core idea of the present invention. It should be noted that for those of ordinary skill in the art of this technology, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims

1. A control system for a Heric bridge single-phase energy storage inverter, characterized in that: include: The voltage outer loop periodic error iterative correction QPR regulator is used to compare the feedback signal of the output voltage sampling of the Heric bridge single-phase energy storage inverter circuit with the output voltage given signal to generate a voltage error signal, and perform quasi-proportional resonance regulation and periodic error iterative correction processing on it to generate a reference current signal, and transmit it to the current inner loop load disturbance feedforward PR regulator; A current inner loop load disturbance feedforward PR regulator is used to compare the reference current signal with the feedback signal of the inductor current sampling and the feedforward signal generated by the load resistance disturbance to generate a current error signal, and perform proportional resonance regulation and feedforward control error correction processing on the current error signal to obtain a control signal; The pulse drive controller is used to convert the control signal into a PWM signal through time domain conversion, phase delay, and same-side unipolar modulation, and compare it with the carrier signal to generate a PWM signal, which is then amplified by the drive circuit to control the on and off of the switch tube in the Heric bridge module to achieve precise control of the inverter output voltage and current.

2. The control system of a Heric bridge single-phase energy storage inverter according to claim 1, characterized in that: The voltage outer loop period error iterative correction QPR regulator has a built-in period error iterative corrector, which is embedded in front of the QPR regulator to convert the voltage error signal into a period error signal after Q(z)z -N The processed signals are added and then passed through z -N The periodic delay strengthens the periodic information processing. The processed signal enters the compensator, which compensates for the phase lag and amplitude attenuation of the system and improves the frequency response. The compensated signal is input into the discrete characteristic link of the controlled object to achieve good tracking of the reference signal and effective suppression of interference. The discretized signal is passed through the QPR regulator through its proportional resonance characteristics to provide high gain at a specific frequency point, suppress harmonic generation, achieve precise regulation of the voltage error, and generate the reference current signal required for the current inner loop.

3. The control system of a Heric bridge single-phase energy storage inverter according to claim 2, characterized in that: The current inner loop load disturbance feedforward PR regulator includes a current inner loop PR regulator and a load disturbance feedforward; the reference current is obtained by the output of the voltage outer loop periodic error iterative QPR regulator, representing the current value expected by the system, and is compared with the feedback value of the inductor current sampling signal and the feedforward signal generated by the load resistance disturbance, and the generated current error signal is sent to the current inner loop PR regulator; the load disturbance feedforward compensates for the current fluctuation caused by the load change in advance, and the signal is superimposed on the output signal of the current inner loop PR regulator to form a control signal, which acts on the inductor module to adjust the inductor current signal, and then generates an output current through the load resistance, and the inductor current is instantaneously fed back for current limiting protection to ensure that the system operates within a safe range.

4. The control system of a Heric bridge single-phase energy storage inverter according to claim 3, characterized in that: The pulse driver converts the control signal from the complex frequency domain form to the time domain signal through the time domain conversion link to meet the requirements of subsequent signal processing based on time characteristics, and obtains an AC positive half-cycle modulation wave. The time domain signal is then phase-delayed by half a cycle to obtain an AC negative half-cycle modulation wave. At the same time, the AC positive half-cycle modulation wave and the AC negative half-cycle modulation wave are sent to the selector using the same-side unipolar modulation method, and the same-side modulation wave with instantaneous values ​​all greater than 0 is output. The same-side modulation wave is input into the comparator together with the triangular carrier for comparison to generate a PWM signal, which is amplified by the driving circuit to control the on and off of the switch tube in the Heric bridge module to achieve precise control of the output voltage and current of the inverter.

5. The control system of a Heric bridge single-phase energy storage inverter according to claim 4, characterized in that: The specific comparison process in the comparator is: When the AC positive half-cycle modulation wave is greater than the triangular carrier, the pulse control signals of the switch tubes Q1 and Q4 output high levels to form high-frequency signals. At the same time, the pulse control signal of the switch tube Q5 is output at a high frequency and complementary, and the pulse control signal of the switch tube Q6 is modulated at a low frequency and outputs a high level; when the AC negative half-cycle modulation wave is greater than the triangular carrier, the pulse control signals of the switch tubes Q2 and Q3 output high levels to form high-frequency signals. At the same time, the pulse control signal of the switch tube Q5 is modulated at a low frequency and outputs a high level, and the pulse control signal of the switch tube Q6 is output at a high frequency and complementary.

6. A control method for a Heric bridge single-phase energy storage inverter, using the control system of the Heric bridge single-phase energy storage inverter according to any one of claims 1 to 4, characterized in that: The following steps are involved: Step 1) After the feedback signal of the output voltage sampling of the Heric bridge inverter circuit is compared with the output voltage given signal, the generated voltage error signal is sent to the voltage outer loop periodic error iterative correction QPR regulator to generate a reference current signal; Step 2) After comparing the reference current signal with the feedback signal of the inductor current sampling and the feedforward signal generated by the load resistance disturbance, the generated current error signal is sent to the current inner loop load disturbance feedforward PR regulator to obtain a control signal; Step 3) The control signal is processed by time domain conversion, phase delay, same-side unipolar modulation, etc., and compared with the carrier signal to generate a PWM signal, which is amplified by the drive circuit to control the on and off of the switch tube in the Heric bridge module to achieve precise control of the inverter output voltage and current.

7. The control method of a Heric bridge single-phase energy storage inverter according to claim 6, characterized in that: Step 1) specifically includes: The output voltage given signal is compared with the feedback voltage signal to generate a voltage error signal. After the periodic error iterative corrector eliminates the periodic signal without static error, it is input into the voltage outer loop QPR regulator. The periodic error iterative corrector adopts an embedded algorithm structure and is embedded in front of the QPR regulator. The original voltage error signal is first compared with the Q(z)z -N The processed signals are added and then passed through z -N The periodic delay strengthens the periodic information processing. The processed signal enters the compensator, which compensates for the phase lag and amplitude attenuation of the system and improves the frequency response. The compensated signal is input into the discrete characteristic link of the controlled object. Then, the voltage outer loop QPR regulator provides high gain at a specific frequency point through its proportional resonance characteristics, suppresses the generation of harmonics, realizes precise regulation of voltage errors, and generates the reference current signal required by the current inner loop.

8. The control method of a Heric bridge single-phase energy storage inverter according to claim 7, characterized in that: Step 2) specifically includes: The reference current signal output by the voltage loop is used as the given value of the current loop, and is compared with the feedback inductor current signal and the feedforward signal generated by the load resistance disturbance to generate an error signal and input it into the current inner loop PR regulator; the current fluctuation caused by the load change is compensated in advance by the load disturbance feedforward, and the signal is superimposed with the output signal of the current inner loop PR regulator to form a control signal, which acts on the inductor module to adjust the inductor current signal, and then generates an output current through the load resistance. The inductor current is instantaneously fed back for current limiting protection to ensure that the system operates within a safe range.

9. The control method of a Heric bridge single-phase energy storage inverter according to claim 8, characterized in that: Step 3) specifically includes: The control signal is converted from a complex frequency domain form to a time domain signal through a time domain conversion link to meet the requirements of subsequent signal processing based on time characteristics, and an AC positive half-cycle modulation wave is obtained. The time domain signal is then phase delayed by half a cycle to obtain an AC negative half-cycle modulation wave. The AC positive half-cycle modulation wave and the AC negative half-cycle modulation wave are sent to a selector to output a same-side modulation wave whose instantaneous values ​​are all greater than 0. The same-side modulation wave is input into a comparator together with a triangular carrier for comparison to generate a PWM signal. After being amplified by a driving circuit, the switch tube in the Heric bridge module is controlled to be turned on and off, so as to achieve precise control of the output voltage and current of the inverter.

10. The control method of a Heric bridge single-phase energy storage inverter according to claim 9, characterized in that: The specific comparison process is: When the AC positive half-cycle modulation wave is greater than the triangular carrier, the pulse control signals of the switch tubes Q1 and Q4 output high levels to form high-frequency signals. At the same time, the pulse control signal of the switch tube Q5 is output at a high frequency and complementary, and the pulse control signal of the switch tube Q6 is modulated at a low frequency and outputs a high level; when the AC negative half-cycle modulation wave is greater than the triangular carrier, the pulse control signals of the switch tubes Q2 and Q3 output high levels to form high-frequency signals. At the same time, the pulse control signal of the switch tube Q5 is modulated at a low frequency and outputs a high level, and the pulse control signal of the switch tube Q6 is output at a high frequency and complementary.

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