Parameter optimization method for chip electromagnetic fault injection test and computer equipment

Abstract

The invention discloses a parameter optimization method for a chip electromagnetic fault injection test, and the method comprises the steps: collecting a large number of electromagnetic fault injection test data of a training chip, and constructing a training data set; training a plurality of models by using the constructed training data set, and establishing a mapping relationship between the electromagnetic fault injection parameter and the attack success rate; collecting a small amount of electromagnetic fault injection test data of the novel-type chip to be tested; carrying out transfer learning on the trained model by using data of a chip to be tested with a new model, and selecting an optimal model from the models after transfer learning; determining a value range of electromagnetic fault injection parameters of a chip to be detected of a new type, constructing a multi-dimensional parameter space, and generating uniformly distributed parameter combinations by using a Latin hypercube sampling method; and inputting the parameter combinations into the optimal model, predicting the attack success rate of each parameter combination, and selecting the optimal parameter combination of the electromagnetic fault injection test. According to the method, the electromagnetic fault injection parameter combination can be automatically optimized, and the manual tuning cost is reduced.

Description

Technical Field

[0001] The present invention belongs to the field of electromagnetic fault injection testing, and particularly relates to a method for optimizing parameters of chip electromagnetic fault injection testing and a computer device. Background Art

[0002] Electromagnetic fault injection testing is an important means to evaluate the functional safety of chips. Its core lies in triggering chip faults by adjusting electromagnetic parameters (such as frequency, intensity, coordinate position, etc.) to verify its anti-interference ability. During the testing process, there are multiple test conditions and parameters that need to be reasonably selected, otherwise it will affect the testing efficiency and accuracy. Traditional methods rely on manual experience for parameter selection and optimization, but they have the following problems: (1) High cost: A large number of repeated experiments are required to explore effective parameter combinations, which is time-consuming and wastes resources seriously; (2) Low efficiency: Manual tuning is difficult to cover the multi-dimensional electromagnetic fault injection parameter space, it is difficult to master the optimal parameter combination, and it is easy to fall into the result of local optimum; (3) Poor transferability: For newly designed chips to be tested, due to physical property differences, traditional models cannot be directly transferred, and the test parameters need to be re-adjusted and optimized. When performing electromagnetic fault injection testing on the same series of chips currently, parameter tuning still depends on independent testing for each model. This method fails to fully utilize the similarities between the same series of chips and historical test data, resulting in a time-consuming and costly detection process. Summary of the Invention

[0003] The purpose of the present invention is to provide a method for optimizing parameters of chip electromagnetic fault injection testing, a computer device, a computer-readable storage medium, and a computer program product, which can automatically optimize the electromagnetic fault injection parameter combination, reduce the cost of manual tuning, realize the rapid transfer of the parameter optimization model between different models of chips, reduce the need for data of newly designed chips to be tested, and improve the efficiency and accuracy of parameter tuning in small-sample scenarios.

[0004] To achieve the above object, one aspect of the present invention provides a method for optimizing parameters of chip electromagnetic fault injection testing, including: Step S1, collecting a large amount of electromagnetic fault injection test data of training chips to construct a training data set; Step S2, using the constructed training data set to train multiple models to establish a mapping relationship between electromagnetic fault injection parameters and the attack success rate; Step S3, collecting a small amount of electromagnetic fault injection test data of the newly designed chip to be tested and integrating it into the same data set input format as the training data set; Step S4, using the data of the newly designed chip to be tested for transfer learning of the trained model to make the model adapt to the data of the newly designed chip to be tested, and selecting the optimal model from the transferred and learned model; Step S5: Determine the value range of the electromagnetic fault injection parameters for the new model chip to be tested, construct a multi-dimensional parameter space of the electromagnetic fault injection parameters, and use the Latin hypercube sampling method to generate uniformly distributed parameter combinations; Step S6: Input the generated parameter combinations into the optimal model after transfer learning, predict the attack success rate of each parameter combination, and select the optimal parameter combination for the electromagnetic fault injection test according to the predicted attack success rate.

[0005] Preferably, in step S2, the multiple models include a random forest model, a gradient boosting model, a gradient enhancement model, and a neural network model; In step S4, the transfer learning strategy includes: For the random forest model, adapt to the data of the new model chip to be tested by dynamically adjusting the number of trees and adopting a class weight balancing strategy; For the gradient boosting model and the gradient enhancement model, reduce the learning rate to 50% of the original value and dynamically set the number of weak learners according to the data scale of the new model chip to be tested; For the neural network model, retain the original network structure, reduce the learning rate to 50% and increase the number of iterations to fully adapt to the data of the new model chip to be tested.

[0006] Preferably, in step S4, comprehensively evaluate the model after transfer learning through two indicators: the F1 score and the area under the ROC curve, and determine the model with the highest score as the optimal model.

[0007] Preferably, in step S2, the electromagnetic fault injection parameters include the X-axis coordinate, the Y-axis coordinate, the power, and the delay; in step S5, the multi-dimensional parameter space is a four-dimensional parameter space.

[0008] Preferably, in step S6, sort all the parameter combinations according to the predicted attack success rate, and select the top 10 parameter combinations with the highest attack success rate as the optimal parameter combination for the electromagnetic fault injection test.

[0009] Another aspect of the present invention provides a computer device, including a memory, a processor, and a computer program stored on the memory, and the processor executes the computer program to implement the steps of the above method.

[0010] Another aspect of the present invention provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above method are implemented.

[0011] Another aspect of the present invention provides a computer program product, including a computer program, and when the computer program is executed by a processor, the steps of the above method are implemented.

[0012] The parameter optimization method, computer device, computer-readable storage medium, and computer program product for chip electromagnetic fault injection testing according to the above aspects of the present invention can automatically optimize the electromagnetic fault injection parameter combination, reduce the manual tuning cost, achieve the rapid migration of the parameter optimization model between different types of chips, reduce the demand for data of the new type of chip under test, and improve the efficiency and accuracy of parameter tuning in small sample scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] To more clearly illustrate the technical solutions of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts: Figure 1 is a flowchart of a method for optimizing chip electromagnetic fault injection parameters according to an embodiment of the present invention; Figure 2 is a structural diagram of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0014] To make the objectives, technical solutions, and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, rather than all embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.

[0015] An embodiment of the present invention provides a method for optimizing chip electromagnetic fault injection parameters. As Figure 1 shown, the method for optimizing chip electromagnetic fault injection parameters according to the embodiment of the present invention includes steps S1 to S6.

[0016] In step S1, a large amount of electromagnetic fault injection test data of training chips is collected to provide training data for the model in step S2.

[0017] A large number of electromagnetic fault injection tests are performed on the training chips, and the result of each fault injection is a sampling point. The test results are processed and integrated into the input format of the data set allowed in the model of step S2. The allowed input format of the data set is as follows, where the attack success flag is 0 / 1, where 0 indicates that the attack is not successful, and 1 indicates that the attack is successful and a fault is triggered (attack successful): Sampling point X-axis coordinate; (2) Sampling point Y-axis coordinate; (3) Sampling point power; (4) Sampling point delay; (5) Sampling point attack success flag.

[0018] In step S2, multiple models in the model library are trained using the constructed training data set. In one embodiment, the multiple models include four models: Gradient Boosting Model (GBM), Random Forest Model (RF), Extreme Gradient Boosting (XGBoost), and Convolutional Neural Network Model (CNN).

[0019] The trained models establish a non - linear mapping relationship between the fault injection parameters (feature variables) and the attack success rate (target variable) through a supervised learning framework, and are capable of undertaking the prediction task of predicting the attack success probability for a set of fault injection parameters.

[0020] In step S3, a small amount of electromagnetic fault injection test data of the new - type chip to be tested is collected: the new - type chip to be tested is subjected to a small amount of electromagnetic fault injection tests, and the test results are processed and integrated into the same data set input format as the training data set in step S1.

[0021] In step S4, transfer learning is applied to make the models adapt to the new - type chips. Specifically, a small amount of data of the chips to be tested in step S3 is used for transfer learning of the four models trained in step S2, and four transfer - learned models adapted to the data in step S3 are obtained. Through an optimal model selection mechanism for these four transfer - learned models, an optimal model is obtained for predicting the optimal parameter combination in step S6.

[0022] In one embodiment, a transfer learning technique of parameter fine - tuning is adopted. This method retains the basic knowledge structure of the original model, and at the same time makes the model efficiently adapt to the electromagnetic fault response characteristics of the new - type chips to be tested by precisely adjusting specific parameters (such as learning rate, number of trees, class weights, etc.). The core objective of the present invention is to make full use of the rich electromagnetic fault injection data (source domain) of the training chips to enhance the prediction ability of the model on the new - type chips to be tested (target domain), and significantly reduce the demand for test data of the new - type chips to be tested. In the present invention, the source domain and the target domain have a high degree of similarity, and this simple transfer learning framework is already effective enough.

[0023] The transfer learning of the embodiments of the present invention includes adaptation strategies for different models and an optimal model selection mechanism, and includes the following steps: (a) Data pre - processing and standardization: Here, the data is sourced from the electromagnetic fault injection test data of the new - type chips to be tested collected in step S3.

[0024] (b)Adopt different transfer learning strategies for different models: (i) The random forest model adapts to the data of the new model chips to be tested by dynamically adjusting the number of trees and adopting a class weight balancing strategy; (ii) The gradient boosting model reduces the learning rate to 50% of the original value and dynamically sets the number of weak learners according to the scale of the new data; (iii) The gradient enhancement model also improves the adaptability of the model to the new model chips to be tested by halving the learning rate and dynamically adjusting the number of weak learners; (iv) The neural network model retains the original network structure, reduces the learning rate to 50% and increases the number of iterations to fully adapt to the characteristics of the new model chips to be tested.

[0025] (c)Model performance evaluation: The performance of the model after transfer learning is comprehensively evaluated by two indicators, the F1 score and the area under the ROC curve (AUC). The model with the highest F1 score and AUC score is determined as the optimal model. Using this optimal model selection mechanism, the most suitable prediction model for the characteristics of the new model chips can be selected by comprehensively evaluating the performance of different transfer learning models.

[0026] In step S5, determine the numerical range of the electromagnetic fault injection parameters for the new model chips and perform sampling. In one embodiment, determine the value ranges of the four parameters in the fault injection test data of the new model chips to be tested in step S3. For example, the power range is (0% - 100%), thus obtaining a four-dimensional parameter space of the electromagnetic fault injection parameters.

[0027] For the above-obtained four-dimensional parameter space, use the Latin hypercube sampling method to generate 10,000 groups of stratified uniformly covered sample points, ensuring that the marginal distribution of each dimension is uniform and there is no aggregation area in the multi-dimensional space coverage. The form of each parameter combination is as follows: (X-axis coordinate, Y-axis coordinate, power, delay).

[0028] Through the Latin hypercube sampling method for the electromagnetic fault injection parameter space, it can ensure that uniformly distributed sampling points are generated in the multi-dimensional parameter space, effectively cover the parameter space and improve the sampling efficiency. Through 10,000 groups of sampling points, efficient parameter space exploration can be achieved.

[0029] In step S6, predict the optimal parameter combination for the electromagnetic fault injection test of the new model chips to be tested. Specifically, input the 10,000 groups of uniformly distributed parameter combinations generated in step S5 into the optimal model obtained in step S4, and predict the attack success rate for each parameter combination. Sort the 10,000 parameter combinations based on the predicted attack success rate, and take the top 10 parameter combinations with the highest attack success rate as the optimal parameter combination for the electromagnetic fault injection test.

[0030] In summary, the parameter optimization method for chip electromagnetic fault injection testing in the embodiments of the present invention is an electromagnetic fault injection parameter optimization method based on multi-model integration and transfer learning. By combining the prediction capabilities of multiple models (gradient boosting model, random forest model, gradient enhancement model, and neural network model), and through transfer learning technology, knowledge transfer from training chip data to new model chips to be tested is achieved. Specifically, the method in the embodiments of the present invention fully analyzes historical chip electromagnetic fault injection test data, uses artificial intelligence algorithms to learn and obtain the relationship between the attack success probability of sample points and each electromagnetic fault injection parameter (including X-axis coordinate, Y-axis coordinate, power, delay); on this basis, using the similarity between the current new model chip to be tested and historical data, transfer learning is carried out, so as to predict the optimal parameter combination that can be used for the electromagnetic fault injection test of the current chip under test, so that the electromagnetic fault injection test can be completed quickly and efficiently, greatly improving the test efficiency.

[0031] The method in the embodiments of the present invention has the following beneficial effects: (1) Automatically optimize parameter combination: By introducing an automatic optimization method, the parameter combination can be automatically adjusted during the electromagnetic fault injection process, thereby reducing the cost of manual intervention and tuning. The optimization process is more efficient and can significantly improve the experimental efficiency.

[0032] (2) Rapid cross-chip model migration: Rapid cross-chip model migration is achieved, enabling rapid adaptation and tuning of electromagnetic fault injection parameters during the testing of new model chips to be tested, reducing the need for a large amount of data. This is particularly effective in small-sample scenarios, improving the parameter tuning efficiency and accuracy of new model chips to be tested.

[0033] (3) Reduce experimental costs: By reducing the dependence on manual tuning and a large amount of labeled data, the overall cost of electromagnetic fault injection experiments is significantly reduced. The optimized automatic process reduces the investment in manpower and time, improving the overall economic benefits of the experiment.

[0034] The embodiments of the present invention also provide a computer device, which may be a server, and its internal structure diagram may be as Figure 2As shown. The computer device includes a processor, a memory, and a network interface connected via a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store the operation parameter data of each framework. The network interface of the computer device is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor, the steps of the method according to the embodiments of the present invention are implemented.

[0035] Those skilled in the art can understand that Figure 2 the structure shown in is only a block diagram of some structures related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0036] An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the method according to the embodiments of the present invention are implemented.

[0037] An embodiment of the present invention further provides a computer program product, including a computer program. When the computer program is executed by a processor, the steps of the method according to the embodiments of the present invention are implemented.

[0038] Only some exemplary embodiments of the present invention have been described above by way of illustration. Undoubtedly, for those of ordinary skill in the art, without departing from the spirit and scope of the present invention, the described embodiments can be modified in various different ways. Therefore, the above drawings and descriptions are illustrative in nature and should not be construed as limiting the scope of protection of the claims of the present invention.

Claims

1. A parameter optimization method for chip electromagnetic fault injection testing, characterized in that: include: Step S1, collecting electromagnetic fault injection test data of a large number of training chips to construct a training data set; Step S2, training multiple models using the constructed training data set to establish a mapping relationship between electromagnetic fault injection parameters and attack success rate; Step S3, collecting a small amount of electromagnetic fault injection test data of the new model chip to be tested, and integrating it into a data set input format that is the same as the training data set; Step S4, using the new model chip data to be tested to perform transfer learning on the trained model, so that the model adapts to the new model chip data to be tested, and selecting the optimal model from the transfer learning models; Step S5, determining the value range of the electromagnetic fault injection parameter of the new model chip to be tested, constructing a multidimensional parameter space of the electromagnetic fault injection parameter, and using the Latin hypercube sampling method to generate a uniformly distributed parameter combination; Step S6, inputting the generated parameter combination into the optimal model after transfer learning, predicting the attack success rate of each parameter combination, and selecting the optimal parameter combination for electromagnetic fault injection test according to the predicted attack success rate.

2. The method according to claim 1, characterized in that In step S2, the plurality of models include a random forest model, a gradient boosting model, a gradient enhancement model, and a neural network model; In step S4, the transfer learning strategy includes: For the random forest model, the number of trees is dynamically adjusted and the category weight balancing strategy is adopted to adapt to the data of the new model chip to be tested; For the gradient boosting model and the gradient enhancement model, reduce the learning rate to 50% of the original value and dynamically set the number of weak learners according to the data scale of the new model chip to be tested; For the neural network model, the original network structure is retained, the learning rate is reduced to 50% and the number of iterations is increased to fully adapt to the data of the new model chip to be tested.

3. The method according to claim 1 or 2, characterized in that In step S4, the model after transfer learning is comprehensively evaluated using two indicators, the F1 score and the area under the ROC curve, and the model with the highest score is determined as the optimal model.

4. The method according to claim 1 or 2, characterized in that: In step S2, the electromagnetic fault injection parameters include X-axis coordinates, Y-axis coordinates, power and delay; in step S5, the multi-dimensional parameter space is a four-dimensional parameter space.

5. The method according to claim 1 or 2, characterized in that: In step S6, all parameter combinations are sorted according to the predicted attack success rates, and the top 10 parameter combinations in terms of attack success rates are selected as the optimal parameter combinations for the electromagnetic fault injection test.

6. A computer device comprising a memory, a processor and a computer program stored in the memory, characterized in that: The processor executes the computer program to implement the steps of the method according to any one of claims 1 to 5.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are implemented.

8. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are implemented.

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