Memory fault prediction method and device

The prediction of memory failures through the dual-task neural network model has solved the problem of the inability to accurately predict memory failures in the existing technology, and achieved more accurate failure prediction and improved system stability.

CN120144351AActive Publication Date: 2025-06-13INSPUR SUZHOU INTELLIGENT TECH CO LTD
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Patent Information

Application Number
CN202510622044.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-14
Publication Date
2025-06-13
Estimated Expiration
2045-05-14

AI Technical Summary

Technical Problem

The prior art is difficult to accurately predict the number of times memory correction errors and the probability of memory uncorrectable errors, which cannot effectively reduce the impact of memory failures on system operation.

Method used

Using the dual-task neural network model, by obtaining the operating status data of the target device memory and using the shared layer to perform feature extraction, the first task layer predicts the number of errors that can be corrected, and the second task layer predicts the probability of uncorrectable errors.

Benefits of technology

By making full use of the correlation between the number of memory CE occurrences and the probability of UCE occurrence, the prediction results are more accurate, effectively reducing the impact of memory failure on system operation.

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Abstract

The invention discloses a memory fault prediction method and device, and relates to the technical field of artificial intelligence. The running state data is used for indicating n attributes in a first time period in the target equipment; performing feature extraction on the operation state data to obtain state feature data corresponding to the operation state data; determining a first prediction result by using the state feature data; the first prediction result is used for indicating the number of times that correctable errors occur in the memory in the second time period; determining a second prediction result by using the state feature data; the second prediction result is used for indicating the probability that uncorrectable errors occur in the memory within the third time period. According to the method, the technical effect of accurately predicting the number of times that correctable errors occur in the memory and the probability that uncorrectable errors occur in the memory is achieved.
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Description

Technical Field

[0001] The present disclosure relates to the field of artificial intelligence technology, and particularly to a method and device for predicting memory faults. Background Art

[0002] Currently, in devices such as servers, with the continuous increase in memory frequency and particle density, the load on the memory during operation is also increasing, which increases the possibility of memory failures.

[0003] Among them, memory faults are mainly divided into two categories: Correctable Error (CE) and Uncorrectable Error (UCE). Among them, CE refers to an error that can be automatically repaired through hardware or software mechanisms, such as single-bit errors. Such errors usually do not immediately cause the system to crash, and through Error-Correcting Code (ECC) technology, they can be automatically detected and repaired. UCE refers to an error that cannot be repaired through existing mechanisms and is likely to cause the system to crash or restart, such as storage unit failures, multi-bit errors, etc. Memory UCE errors are one of the main reasons for system crashes.

[0004] Among them, if the number of correctable errors that occur in the memory and the probability of uncorrectable errors that occur in the memory can be predicted in advance for a period of time in the future, the impact of memory faults on system operation can be reduced by isolating faulty memory in advance.

[0005] Therefore, how to accurately predict the number of correctable errors that occur in the memory and the probability of uncorrectable errors that occur in the memory is a problem that needs to be solved currently. Summary of the Invention

[0006] The present disclosure provides a method and device for predicting memory faults, so as to at least solve the problem in the related art that the number of correctable errors that occur in the memory and the probability of uncorrectable errors that occur in the memory cannot be accurately predicted.

[0007] The present disclosure provides a method for predicting memory faults, including: obtaining operation status data; the operation status data is used to indicate n attributes of the memory of a target device within a first time period; n is a positive integer. Feature extraction is performed on the operation status data through a shared layer of a dual-task neural network model to obtain status feature data corresponding to the operation status data. Through a first task layer of the dual-task neural network model, the status feature data is used to determine a first prediction result; the first prediction result is used to indicate the number of correctable errors that occur in the memory within a second time period; the second time period is after the first time period. Through a second task layer of the dual-task neural network model, the status feature data is used to determine a second prediction result; the second prediction result is used to indicate the probability of uncorrectable errors that occur in the memory within a third time period; the third time period is after the first time period.

[0008] The present disclosure also provides a model training method, including: obtaining x training samples and labels respectively corresponding to the x training samples; wherein, the x training samples include n attributes of the memory of a target device within x different time periods, n is a positive integer; the labels corresponding to each training sample include the number of correctable errors that occur in the memory within a first preset time period after the time period corresponding to the training sample, and whether uncorrectable errors occur in the memory within a second preset time period after the time period corresponding to the training sample. The dual-task neural network model is trained by supervised learning using the x training samples and the labels respectively corresponding to the x training samples. Among them, the dual-task neural network model includes: a shared layer, a first task layer and a second task layer; wherein, the shared layer is used to: perform feature extraction on n attributes of the memory within a first time period to obtain status feature data; the first task layer is used to: use the status feature data to determine a first prediction result; the second task layer is used to: use the status feature data to determine a second prediction result; wherein, the first prediction result is used to indicate the number of correctable errors that occur in the memory within a second time period; the second prediction result is used to indicate the probability of uncorrectable errors that occur in the memory within a third time period; the second time period and the third time period are after the first time period.

[0009] The present disclosure also provides a memory fault prediction device, including: an acquisition unit configured to acquire operation state data; the operation state data is used to indicate n attributes of the memory of the target device within a first time period; n is a positive integer; a processing unit configured to extract features from the operation state data through a shared layer of a dual-task neural network model to obtain state feature data corresponding to the operation state data; the processing unit is further configured to determine a first prediction result by using the state feature data through a first task layer of the dual-task neural network model; the first prediction result is used to indicate the number of correctable errors that occur in the memory within a second time period; the second time period is after the first time period; the processing unit is further configured to determine a second prediction result by using the state feature data through a second task layer of the dual-task neural network model; the second prediction result is used to indicate the probability of uncorrectable errors that occur in the memory within a third time period; the third time period is after the first time period.

[0010] The present disclosure also provides a model training device, including: an acquisition unit configured to acquire x training samples and labels respectively corresponding to the x training samples; wherein, the x training samples include: n attributes of the memory of the target device within x different time periods, n is a positive integer; the label corresponding to each training sample includes: the number of correctable errors that occur in the memory within a first preset time period after the time period corresponding to the training sample, and whether uncorrectable errors occur in the memory within a second preset time period after the time period corresponding to the training sample. A training unit configured to perform supervised learning training on the dual-task neural network model by using the x training samples and the labels respectively corresponding to the x training samples. Wherein, the dual-task neural network model includes: a shared layer, a first task layer and a second task layer; wherein, the shared layer is configured to: extract features from n attributes of the memory within a first time period to obtain state feature data; the first task layer is configured to: determine a first prediction result by using the state feature data; the second task layer is configured to: determine a second prediction result by using the state feature data; wherein, the first prediction result is used to indicate the number of correctable errors that occur in the memory within a second time period; the second prediction result is used to indicate the probability of uncorrectable errors that occur in the memory within a third time period; the second time period and the third time period are after the first time period.

[0011] The present disclosure also provides an electronic device, including: a memory configured to store a computer program; a processor configured to implement the steps of any one of the above memory fault prediction methods when executing the computer program, or, the processor is configured to implement the steps of any one of the above model training methods when executing the computer program.

[0012] The present disclosure also provides a computer-readable storage medium storing a computer program, where the computer program, when executed by a processor, implements the steps of any one of the above-mentioned memory fault prediction methods, or the computer program, when executed by a processor, implements the steps of any one of the above-mentioned model training methods.

[0013] The present disclosure also provides a computer program product including a computer program, where the computer program, when executed by a processor, implements the steps of any one of the above-mentioned memory fault prediction methods, or the computer program, when executed by a processor, implements the steps of any one of the above-mentioned model training methods.

[0014] In the above method of the present disclosure, a dual-task neural network model is first constructed. The dual-task neural network model can use n attributes (referred to as operating state data) of the memory of the target device during a previous period of time (referred to as the first period) to predict the number of correctable errors that occur in the memory during a subsequent period of time (referred to as the second period) to obtain a first preset result, and predict the probability of uncorrectable errors that occur in the memory during a subsequent period of time (referred to as the third period) to obtain a second prediction result. Among them, considering that there is a correlation between the number of CE occurrences and the probability of UCE occurrences in the memory. Therefore, there is also a correlation between the feature information used to predict the number of CE occurrences and the feature information used to predict the probability of UCE occurrences. Therefore, in this dual-task neural network model, the shared layer can first be used to extract features from the operating state data of the memory during the first period to obtain state feature data. Then, in the first task layer, the above state feature data is used to predict the number of CE occurrences during the second period (i.e., determine the first prediction result), and in the second task layer, the above state feature data is used to predict the probability of UCE occurrences during the third period (i.e., determine the second prediction result). In this way, the correlation between the number of CE occurrences and the probability of UCE occurrences can be fully utilized, making the predicted number of CE occurrences and the probability of UCE occurrences more accurate. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] To more clearly illustrate the embodiments of the present disclosure, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0016] Figure 1 FIG. 1 is one of the schematic structural diagrams of a dual-task neural network model provided by an embodiment of the present disclosure; Figure 2 FIG. 2 is another schematic structural diagram of a dual-task neural network model provided by an embodiment of the present disclosure; Figure 3 One of the schematic flowcharts of a model training method provided by an embodiment of the present disclosure; Figure 4 Two of the schematic flowcharts of a model training method provided by an embodiment of the present disclosure; Figure 5 Three of the schematic flowcharts of a model training method provided by an embodiment of the present disclosure; Figure 6 One of the schematic flowcharts of a memory fault prediction method provided by an embodiment of the present disclosure; Figure 7 Two of the schematic flowcharts of a memory fault prediction method provided by an embodiment of the present disclosure; Figure 8 Three of the schematic flowcharts of a memory fault prediction method provided by an embodiment of the present disclosure; Figure 9 A regression prediction scatter plot for predicting the number of CE occurrences provided by an embodiment of the present disclosure; Figure 10 A schematic diagram of the statistical results of MSE values and MAE values under three algorithm types provided by an embodiment of the present disclosure; Figure 11 A schematic diagram of the statistical results of precision, recall, and F1 scores under three algorithm types provided by an embodiment of the present disclosure; Figure 12 A schematic structural diagram of a memory fault prediction device provided by an embodiment of the present disclosure; Figure 13 A schematic structural diagram of a model training device provided by an embodiment of the present disclosure; Figure 14 A schematic structural diagram of an electronic device provided by an embodiment of the present disclosure. Detailed implementation manners

[0017] Next, the technical solutions in the embodiments of the present disclosure will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the protection scope of the present disclosure.

[0018] It should be noted that in the description of the present disclosure, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, such that a process, method, article or device including a series of elements not only includes those elements but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. The terms "first", "second", etc. in the present disclosure are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0019] To enable those skilled in the art of the present technology to better understand the solutions of the present disclosure, the present disclosure will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0020] To accurately predict the number of correctable errors that occur in the memory and the probability of uncorrectable errors that occur in the memory, an embodiment of the present disclosure provides a technical solution. In this technical solution: A dual-task neural network model can be constructed. As Figure 1 shown, the dual-task neural network model 10 can utilize n attributes (referred to as operating state data) of the memory of the target device during a previous period of time (referred to as the first period) to predict the number of correctable errors that occur in the memory during a subsequent period of time (referred to as the second period), obtaining a first preset result, and to predict the probability of uncorrectable errors that occur in the memory during a subsequent period of time (referred to as the third period), obtaining a second prediction result.

[0021] Among them, considering that there is a correlation between the number of CE occurrences and the probability of UCE occurrences in the memory. Therefore, there is also a correlation between the feature information used to predict the number of CE occurrences and the feature information used to predict the probability of UCE occurrences. Therefore, as Figure 1 shown, in the dual-task neural network model 10, the shared layer 101 can first be used to extract features from the operating state data of the memory during the first period, obtaining state feature data. Then, in the first task layer 102, the above state feature data is used to predict the number of CE occurrences during the second period (i.e., to determine the first prediction result), and in the second task layer 103, the above state feature data is used to predict the probability of UCE occurrences during the third period (i.e., to determine the second prediction result). In this way, the correlation between the number of CE occurrences and the probability of UCE occurrences can be fully utilized, making the predicted number of CE occurrences and the probability of UCE occurrences more accurate.

[0022] In some implementation manners, such as Figure 2As shown in the figure, the shared layer 101 may include: a feature extraction layer 1011 constructed using a Long Short Term Memory Network (LSTM) and a shared feature layer 1012 constructed using a Full Connect Network (FCN).

[0023] Among them, the feature extraction layer 1011 is used to extract features from the operation state data of the input dual-task neural network model 10. The shared feature layer 1012 is used to fuse the feature data output by the feature extraction layer 1011 to obtain state feature data.

[0024] In some implementation manners, the above first task layer may be a machine learning model constructed using a full connect network, and the second task layer may be a machine learning model constructed using a probabilistic neural network.

[0025] Next, a model training method for the dual-task neural network model 10 provided in the embodiments of the present application will be introduced in combination with examples. Specifically, the execution subject of this model training method may be a model training device. When this model training device runs, it can be used to execute all or part of the steps in the model training method provided in the embodiments of the present application. Among them, in actual application, the functions of this model training device can be implemented by an electronic device such as a personal computer (including a desktop computer, a laptop computer, a handheld computer, and a notebook computer), or a smart phone, a server, etc.; or, the functions of the above model training device can also be implemented by some hardware / software devices in the above electronic devices. The embodiments of the present application do not impose special restrictions on the specific form of the model training device.

[0026] As Figure 3 shown, the model training method provided in the embodiments of the present application may include: S201. The model training device obtains x training samples and the labels respectively corresponding to the x training samples.

[0027] Among them, the x training samples include n attributes of the memory of the target device at x different time periods. Here, n is a positive integer.

[0028] In some implementation manners, the n attributes may specifically include one or more of the following: working voltage, ambient temperature, working frequency, power, data refresh rate, read / write latency, the number of row failures that occur in the memory during the current time period, the number of column failures that occur in the memory during the current time period, the number of correctable errors that occur in the memory during the current time period, and the number of uncorrectable errors that occur in the memory during the current time period.

[0029] For example, taking 10h (hours) as a time period, x training samples may include: training sample s1, training sample s2, training sample s3, …, training sample sx. Among them, training sample s1 includes: n attributes of the memory detected during the period from time t to time t + 10h; training sample s2 includes: n attributes of the memory detected during the period from time t + 10h to time t + 20h; training sample s3 includes: n attributes of the memory detected during the period from time t + 20h to time t + 30h, and so on for other training samples.

[0030] In addition, the label corresponding to each training sample includes: the number of correctable errors that occur in the memory within a first preset time period after the time period corresponding to the training sample.

[0031] For example, continuing the above example, taking the first preset time period as 1h, the label of the above training sample s1 includes: the number of correctable errors that occur in the memory within 1h after the period from time t to time t + 10h; the label of the above training sample s2 includes: the number of correctable errors that occur in the memory within 1h after the period from time t + 10h to time t + 20h, and so on for the labels of other training samples.

[0032] In addition, the label corresponding to each training sample further includes: the probability of uncorrectable errors that occur in the memory within a second preset time period after the time period corresponding to the training sample.

[0033] For example, continuing the above example, taking the second preset time period as 1h, the label of the above training sample s1 includes: the probability of uncorrectable errors that occur in the memory within 1h after the period from time t to time t + 10h; the label of the above training sample s2 includes: the probability of uncorrectable errors that occur in the memory within 1h after the period from time t + 10h to time t + 20h, and so on for the labels of other training samples.

[0034] It can be understood that in the actual application process, the durations of the above first preset time period and the second preset time period may be the same. For example, in the above example, both the first preset time period and the second preset time period are 1 hour. In addition, the durations of the above first preset time period and the second preset time period may also be different. The values of the first preset time period and the second preset time period can be determined according to needs, and no limitation is made in this embodiment of the present disclosure.

[0035] S202. The model training device uses x training samples and the labels respectively corresponding to the x training samples to perform supervised learning training on the dual-task neural network model 10.

[0036] In some implementation manners, such as Figure 4As shown, S202 may specifically include: S2021. The model training device performs data dimensionality reduction on each of the x training samples to obtain x dimensionality-reduced training samples.

[0037] S2022. The model training device uses the x dimensionality-reduced training samples and the labels corresponding to the x training samples respectively to perform supervised learning training on the dual-task neural network model.

[0038] Among them, by performing data dimensionality reduction on the x training samples, the data volume in the training samples can be simplified, and the information density of the training samples can be improved, thereby helping to improve the model training efficiency.

[0039] Specifically, as Figure 5 shown, S2021 may include: S20211. The model training device uses the x training samples to calculate the correlation coefficient matrix corresponding to n attributes .

[0040] Exemplarily, the data included in the x training samples can be de-centered first. Specifically, the mean value of the numerical values of the y-th attribute in the x training samples can be calculated, and then the numerical value of the y-th attribute of each training sample in the x training samples can be subtracted from the above mean value, so as to obtain the de-centered data.

[0041] Among them, the data set included in the x de-centered training samples can be expressed as the following formula (1): Formula (1) where represents the data included in the x training samples, represents the numerical value of the n-th attribute arranged in the front-back order of the x training samples. Exemplarily, , where represents the time period corresponding to the numerical value of the n-th attribute in the training sample. Another example, represents the memory working voltage set, represents the memory ambient temperature set, etc.

[0042] Furthermore, the correlation coefficient matrix R corresponding to n attributes can be calculated using the following formula (2): Formula (2) where cov represents calculating covariance.

[0043] S20212. The model training device determines n eigenvectors of the correlation coefficient matrix and n eigenvalues corresponding to the n eigenvectors.

[0044] Among them, the calculation process of the eigenvectors and eigenvalues of the correlation coefficient matrix R can refer to the content of related technologies and will not be elaborated here.

[0045] Among them, the n eigenvalues can be expressed as: . Among them, .

[0046] The n eigenvectors corresponding to the n eigenvalues can be expressed as . Among them, .

[0047] After determining the n eigenvectors ( ), each training sample among the x training samples can be projected onto the feature spaces corresponding to the n eigenvectors to obtain a new data set as shown in Equation Three below: Equation Three Among them, .

[0048] S20213. The model training device determines p eigenvectors corresponding to p target eigenvalues from the n eigenvectors.

[0049] Among them, the p target eigenvalues are: the top p eigenvalues among the n eigenvalues sorted in descending order of value.

[0050] In some designs, the top p eigenvalues can specifically be: the top p eigenvalues among the n eigenvalues sorted in descending order of value whose cumulative information contribution rate is greater than the contribution rate threshold.

[0051] Specifically, the cumulative information contribution rate can be calculated through the following Equation Four: Equation Four Among them, the above-mentioned top p eigenvalues can specifically be: the top p eigenvalues that make the cumulative information contribution rate greater than the contribution rate threshold (for example, the contribution rate threshold can be 0.9, 0.95, or 0.99, etc.).

[0052] S20214. The model training device projects each training sample among the x training samples onto the feature spaces corresponding to the p eigenvectors to obtain x dimensionality-reduced training samples.

[0053] Among them, each dimensionality-reduced training sample contains p items of feature data.

[0054] Specifically, the data set included in the x dimensionality-reduced training samples can be expressed as Equation Five below: Equation Five Among them, represents the data included in x dimensionality-reduced training samples. Among them, The calculation process of can refer to the calculation process of Equation 3 above. includes: the value of the p-th feature data arranged in the front-back order of x dimensionality-reduced training samples. Exemplarily, , where represents the time period The value of the p-th feature data in the training sample corresponding to.

[0055] In the above implementation, considering that: the cumulative contribution rate of information corresponding to the current p feature values When approaching 1, it indicates that in the data set , the feature data corresponding to the first p feature values (i.e., ) already contains most of the feature information of the original data set, while the feature data corresponding to the last n - p feature values (i.e., ) contains very little useful feature information and can be regarded as noise. At this time, the feature data (i.e., ) can be selected to replace the original data set for training the model, thereby achieving data dimensionality reduction and denoising.

[0056] In some implementations, the loss function used to train the dual-task neural network model 10 satisfies: The loss function is the weighted sum result of the first function and the second function .

[0057] Among them, the first function is used to reflect the accuracy of the output result of the first task layer. The second function is used to reflect the accuracy of the output result of the second task layer.

[0058] Exemplarily, the loss function can be expressed as the following Equation 6: Equation 6 Among them, is the weight value of the first function , is the weight value of the second function . In addition, and represent the uncertainty parameters of the task, which are used to ensure that the magnitudes of the first function and the second function are relatively close. In the actual application process, and can be preset values, or and Can be optimized together with the weights and biases of neurons in a neural network.

[0059] In the above implementation, in order to enable the learning process of the model to fit both the prediction task of the number of CEs that occur in the memory and the prediction task of the probability of UCEs that occur in the memory, the first function And the second function The weighted sum result of is used as the loss function for model training, so as to ensure the training effects of the two tasks.

[0060] In some designs, considering that for the prediction task of the number of CEs that will occur in the future memory, the mean squared error can be used as its loss function. Therefore, the above first function Can be expressed as Equation Seven below: Equation Seven Where x is the number of training samples; Represents the predicted value of the number of CEs that occur in the memory output by the model when the input is the t-th training sample; Represents the number of CEs that occur in the memory in the label of the t-th training sample.

[0061] In addition, in some designs, considering that for the prediction task of the probability of UCEs that will occur in the future memory, binary cross-entropy can be used as its loss function. Therefore, the above-mentioned second function Can be expressed as Equation Eight below: Equation Eight Where x is the number of training samples; Represents the predicted value of the probability of UCEs that occur in the memory output by the model when the input is the t-th training sample; Represents the true situation of whether UCEs occur in the memory in the label of the t-th training sample.

[0062] In some designs, considering that when the model is overly inclined to fit a certain subtask, the effects of other subtasks are often negatively affected, resulting in a relative decline in its performance. Therefore, in order to prevent the learning process of the model from being dominated by a subtask and thus showing learning skew, the weight values of the first function and the second function in the loss function in the present disclosure can be adjusted in the following manner: At the j-th model optimization, the first function The corresponding weight value Is positively correlated with the degree of loss reduction of the output result of the first task layer within a preset training process, and the second function The corresponding weight value It is positively correlated with the degree of loss reduction of the output result of the second task layer during the preset training process. Among them, the preset training process includes the model training process from the (j - 1)-th model optimization to the j-th model optimization.

[0063] In the above design, it is considered that: during the model training process from the (j - 1)-th model optimization to the j-th model optimization, if a sub-task has a large reduction in loss, it indicates that the sub-task has more precisely learned the features and rules in the data during the training process. At this time, the weight value of the corresponding function can be increased during the j-th model optimization to pay more attention to the training of this sub-task in the subsequent training process. When the speed of loss reduction of the sub-task slows down, it indicates that the learning efficiency of the sub-task decreases. At this time, the weight value of the corresponding function can be decreased during the j-th model optimization to pay more attention to the training of other sub-tasks in the subsequent training process.

[0064] In other designs, if the loss of the output result of the first task layer increases during the preset training process, then during the j-th model optimization, the weight value corresponding to the first function is set to zero. Or, if the loss of the output result of the second task layer increases during the preset training process, then during the j-th model optimization, the weight value corresponding to the second function is set to zero.

[0065] In the above design, it is considered that: when there is an increase in the loss of a sub-task, it indicates that there may be a local minimum in the optimization process of the loss function of this sub-task. Therefore, by setting the weight of this sub-task to zero, the training step will only depend on the gradients of other sub-tasks whose losses are still decreasing, which helps the gradient to escape the local minimum of this sub-task.

[0066] Next, combined with an example, the adjustment method of the weight values of the above first function and the second function will be introduced in detail: Suppose, is the weight value of the function where the function can be any one of the first function or the second function . represents the weight value of the function during the j-th model optimization. represents the value of the function during the j-th model optimization. Then, the value of can be determined using the following Equation Nine: Equation Nine where the auxiliary parameter satisfies the following Equation Ten: Equation Ten Auxiliary loss function Satisfy the following formula XI: Formula XI It can be seen that when determining the value of using the following formula IX On the one hand, when the loss of subtask i increases (i.e., , ), then the value of is 0. On the other hand, when the loss of subtask i is less, the value of is positively correlated with the degree of less loss.

[0067] Next, a method for predicting memory faults using the dual-task neural network model 10 will be introduced in combination with an example. Specifically, the execution subject of the memory fault prediction method can be a memory fault prediction device. When the memory fault prediction device runs, it can be used to execute all or part of the steps in the memory fault prediction method provided in the embodiments of the present application. Among them, in the actual application process, the functions of the memory fault prediction device can be implemented by an electronic device such as a personal computer (including desktop computers, laptop computers, handheld computers, and notebook computers), or a smart phone, a server, etc.; or, the functions of the above memory fault prediction device can also be implemented by some hardware / software devices in the above electronic devices. The embodiments of the present application do not impose special restrictions on the specific form of the memory fault prediction device.

[0068] As Figure 6 shown, the memory fault prediction method provided in the embodiments of the present application may include: S301. The memory fault prediction device acquires operation status data.

[0069] Among them, the operation status data is used to indicate n attributes of the memory of the target device within the first time period. Wherein, n is a positive integer.

[0070] In some implementation manners, the n attributes may specifically include one or more of the following ten attributes: operating voltage, ambient temperature, operating frequency, power, data refresh rate, read / write latency, the number of row faults that occurred in the memory during the current time period, the number of column faults that occurred in the memory during the current time period, the number of correctable errors that occurred in the memory during the current time period, and the number of uncorrectable errors that occurred in the memory during the current time period.

[0071] In some implementation manners, after acquiring the n attributes of the memory of the target device within the first time period, data dimensionality reduction may be performed first to simplify the data volume, and then the simplified data may be used for prediction, so as to improve the accuracy of the prediction result. Therefore, as Figure 7 shown, S301 may specifically include: S3011. The memory fault prediction device obtains n pieces of status data.

[0072] Among them, the n pieces of status data are respectively used to indicate n attributes of the memory of the target device within the first time period.

[0073] For example, the n pieces of status data include: operating voltage, ambient temperature, operating frequency, power, data refresh rate, read / write latency, the number of row faults that occurred in the memory during the current time period, the number of column faults that occurred in the memory during the current time period, the number of correctable errors that occurred in the memory during the current time period, and the number of uncorrectable errors that occurred in the memory during the current time period, these ten pieces of status data.

[0074] S3012. The memory fault prediction device performs data dimensionality reduction on the n pieces of status data to obtain operating status data.

[0075] In some implementation manners, principal component analysis (PCA) can be used to perform data dimensionality reduction on the n pieces of status data. Specifically, as Figure 8 shown, S3012 may include: S30121. The memory fault prediction device obtains the correlation coefficient matrix corresponding to the n attributes.

[0076] Exemplarily, the correlation coefficient matrix R corresponding to the n attributes can be calculated using Equation Two in the above text.

[0077] Equation Two S30122. The memory fault prediction device determines n eigenvectors of the correlation coefficient matrix, and n eigenvalues corresponding to the n eigenvectors.

[0078] S30123. The memory fault prediction device determines p eigenvectors corresponding to p target eigenvalues from the n eigenvectors.

[0079] Among them, the p target eigenvalues are: the first p eigenvalues sorted in descending order of numerical value among the n eigenvalues.

[0080] For example, the p target eigenvalues can be the first p eigenvalues calculated according to Equation Four in the above text such that the cumulative contribution rate of information is greater than the contribution rate threshold (for example, the contribution rate threshold can be 0.9, 0.95, or 0.99, etc.).

[0081] S30124. The memory fault prediction device projects the n pieces of status data onto the feature space corresponding to the p eigenvectors to obtain operating status data including p pieces of feature data.

[0082] For example, the n state data can be decentralized first to obtain a data set : .

[0083] Among them, represents the value after decentralizing the nth state data.

[0084] Specifically, the value after decentralizing the nth state data can be obtained by subtracting the mean value of the state data from the original value of the nth state data (where the mean value can be obtained by collecting multiple samples and then calculating the mean of the multiple samples).

[0085] In addition, the p feature vectors include: . Among them, .

[0086] Then, by projecting the n state data onto the feature spaces corresponding to the p feature vectors, the operating state data , that is .

[0087] Among them, .

[0088] Among them, are the p item feature data in the operating state data.

[0089] S302. The memory fault prediction device extracts features from the operating state data through the shared layer of the dual-task neural network model to obtain the state feature data corresponding to the operating state data.

[0090] Specifically, the memory fault prediction device can input the operating state data into the shared layer 101 of the dual-task neural network model 10 to obtain the state feature data corresponding to the operating state data output by the shared layer 101.

[0091] S303. The memory fault prediction device determines the first prediction result by using the state feature data through the first task layer of the dual-task neural network model.

[0092] Among them, the first prediction result is used to indicate: the number of correctable errors that occur in the memory during the second time period; the second time period is after the first time period.

[0093] Specifically, the memory fault prediction device can input the state feature data corresponding to the operating state data output by the shared layer 101 into the first task layer 102 to obtain the first prediction result output by the first task layer 102.

[0094] S304. The memory fault prediction device determines a second prediction result by using the state feature data through the second task layer of the dual-task neural network model.

[0095] Among them, the second prediction result is used to indicate the probability that an uncorrectable error occurs in the memory within a third time period. The third time period is after the first time period.

[0096] Specifically, the memory fault prediction device may input the state feature data corresponding to the operation state data output by the shared layer 101 into the second task layer 103 to obtain the second prediction result output by the second task layer 103.

[0097] In some implementation manners, the second prediction result includes prediction information indicating whether an uncorrectable error will occur in the memory within the third time period.

[0098] For example, the second task layer 103 may first obtain a prediction score between 0 and 1 according to the state feature data corresponding to the operation state data output by the shared layer 101, and this prediction score is used to indicate the probability that an uncorrectable error occurs in the memory within the third time period. Then the second task layer 103 may determine the above prediction information according to the above prediction score. For example, when the prediction score is greater than the score threshold, the prediction information obtained by the second task layer 103 indicates that an uncorrectable error will occur in the memory within the third time period; when the prediction score is less than or equal to the score threshold, the prediction information obtained by the second task layer 103 indicates that an uncorrectable error will not occur in the memory within the third time period.

[0099] In the technical solution provided by the present disclosure, a dual-task neural network model is constructed. Among them, the dual-task neural network model 10 can utilize n attributes (referred to as operating state data) of the memory of the target device during a previous period of time (referred to as the first period) to predict the number of correctable errors that occur in the memory during a subsequent period of time (referred to as the second period), obtaining a first preset result, and predicting the probability of uncorrectable errors that occur in the memory during a subsequent period of time (referred to as the third period), obtaining a second prediction result. Moreover, in the dual-task neural network model 10, it may include a shared layer 101, a first task layer 102, and a second task layer 103. Among them, first, the shared layer 101 can be used to extract features from the operating state data of the memory during the first period, obtaining state feature data. Then, in the first task layer 102, the above state feature data is used to predict the number of CE occurrences during the second period (i.e., determine the first prediction result), and in the second task layer 103, the above state feature data is used to predict the probability of UCE occurrences during the third period (i.e., determine the second prediction result). In this way, the correlation between the number of CE occurrences and the probability of UCE occurrences can be fully utilized, making the predicted number of CE occurrences and the probability of UCE occurrences more accurate.

[0100] Specifically, Figure 9 In (a), it is a regression prediction scatter plot for predicting the number of CE occurrences when the second task layer (hereinafter referred to as the "CE" type) is removed from the dual-task neural network model 10 provided in the embodiment of the present disclosure; Figure 9 In (b), it is a regression prediction scatter plot for predicting the number of CE occurrences when the weight values of the first function and the second function in the loss function are set to fixed values (hereinafter referred to as the "CE+UCE" type) based on the dual-task neural network model 10 provided in the embodiment of the present disclosure; Figure 9 In (c), it is a regression prediction scatter plot for predicting the number of CE occurrences when the weight values of the first function and the second function in the loss function are dynamically adjusted (hereinafter referred to as the "CE+UCE+WeightAdj" type) based on the dual-task neural network model 10 provided in the embodiment of the present disclosure. It can be seen that Figure 9 In (c), the prediction points are more closely distributed near the y=x reference line, while the prediction points of other models show an obvious discrete distribution trend. Therefore, it can be seen that by utilizing the additional supervision information provided by the UCE classification task in the multi-task learning framework and dynamically adjusting the weight values of the first function and the second function in the loss function, the accuracy of model prediction can be further improved.

[0101] In addition, the prediction accuracy of the number of memory CE times is measured by the Mean Absolute Error (MAE) shown in Equation (12) and the Mean Squared Error (MSE) shown in Equation (13).

[0102] Equation (12) Equation (13) Among them, represents the number of samples, represents the true value, represents the predicted value.

[0103] Figure 10 shows the MSE values and MAE values statistically obtained under the three algorithm types of "CE", "CE + UCE", and "CE + UCE + WeightAdj". The specific numerical statistics are shown in Table 1 below.

[0104]

[0105] It can be seen that the "CE + UCE + WeightAdj" method proposed by the present invention is significantly superior to other comparison models in terms of both MAE and MSE metrics. Its MAE value (3.1257) is reduced by 39.9% compared with the single-task CE model (5.2115), and its MSE value (15.5323) is reduced by 58.0% compared with the single-task model (37.0351). It is worth noting that when a dual-task structure is adopted but dynamic weight adjustment is not introduced (CE + UCE), its MSE value (45.3586) is actually higher than that of the single-task model. This is because in multi-task learning without weight adjustment, the two tasks interfere with each other, resulting in a decline in regression performance. And dynamic weight adjustment helps to balance the tasks and improve the overall performance. Therefore, the synergistic effect of multi-task learning needs to rely on a reasonable weight allocation mechanism to be effectively exerted.

[0106] In addition, the prediction accuracy of whether memory UCE occurs is measured by the Precision shown in Equation (14), the Recall shown in Equation (15), and the F1-Score shown in Equation (16).

[0107] Equation (14) Equation (15) Equation (16) Among them, represents the true positive cases, that is, the number of samples correctly predicted as positive by the model. represents the false positive cases, that is, the number of samples incorrectly predicted as positive by the model. Represents a false negative example, i.e., a sample that the model wrongly predicts as a negative class.

[0108] Figure 11 Shows the statistical results of precision, recall, and F1-score in three cases: when removing the first task layer (hereinafter referred to as the "UCE" type) based on the dual-task neural network model 10 provided in the embodiments of the present disclosure, when setting the weight values of the first function and the second function in the loss function to fixed values (hereinafter referred to as the "CE+UCE" type) based on the dual-task neural network model 10 provided in the embodiments of the present disclosure, and when adding a dynamic adjustment of the weight values of the first function and the second function in the loss function (hereinafter referred to as the "CE+UCE+WeightAdj" type) based on the dual-task neural network model 10 provided in the embodiments of the present disclosure. The specific values are shown in Table 2.

[0109]

[0110] It can be seen that in the UCE classification task, the "UCE" type model has a low precision but a high recall, indicating that the model tends to predict many samples as positive classes, resulting in many false positives. The "CE+UCE+WeightAdj" type model achieves the best performance in all three metrics of precision (0.7143), recall (0.7143), and F1-score (0.7143). Compared with the "UCE" type model, the F1-score has increased by 71.4%, and the increase in precision (142.9%) is particularly significant. This shows that the joint training framework effectively alleviates the phenomenon of high false positive predictions in the "UCE" type model. The classification prediction result graph shows that the true positive (TP) region of the method proposed in the present invention has significantly expanded, while the false positive (FP) region has significantly shrunk, indicating that the model can more accurately distinguish normal memory from faulty memory about to undergo UCE.

[0111] It is worth noting that although the "CE+UCE" type model maintains a relatively high recall (0.8571), its precision (0.4286) is still significantly lower than that of the complete model. This verifies the necessity of the dynamic weight adjustment mechanism, which automatically balances the loss weights of the two tasks during training, not only retaining the high sensitivity of UCE prediction but also significantly improving the prediction specificity.

[0112] In summary, when performing the CE regression and UCE classification tasks simultaneously, there is a significant synergistic enhancement effect between the two tasks. In the complete model, the MAE of the in-memory CE prediction is reduced by 39.9% compared to the single-task model, while the F1 score of the UCE prediction is increased by 71.4%. The dual-task model (CE+UCE) without dynamic weights even has a higher MSE (45.3586) for in-memory CE prediction than the single-task model (37.0351), indicating that when there is a significant difference in the loss scales of the two tasks, fixed weights will lead to an unbalanced training process.

[0113] Based on the same inventive concept, as an implementation of the above method, an embodiment of the present application further provides a memory fault prediction device. This embodiment corresponds to the foregoing method embodiment. For ease of reading, the details in the foregoing method embodiment will not be described one by one in this embodiment. However, it should be clear that the memory fault prediction device in this embodiment can correspondingly implement some or all of the content in the foregoing method embodiment.

[0114] An embodiment of the present application provides a memory fault prediction device. Figure 12 As a structural schematic diagram of the memory fault prediction device, as Figure 12 shown, the memory fault prediction device 40 includes: An acquisition unit 401, configured to acquire operation state data; the operation state data is used to indicate: n attributes of the memory of the target device within a first time period; n is a positive integer; A processing unit 402, configured to extract features from the operation state data through a shared layer of a dual-task neural network model to obtain state feature data corresponding to the operation state data; The processing unit 402 is further configured to determine a first prediction result by using the state feature data through a first task layer of the dual-task neural network model; the first prediction result is used to indicate: the number of correctable errors that occur in the memory within a second time period; the second time period is after the first time period; The processing unit 402 is further configured to determine a second prediction result by using the state feature data through a second task layer of the dual-task neural network model; the second prediction result is used to indicate: the probability of uncorrectable errors that occur in the memory within a third time period; the third time period is after the first time period.

[0115] In some implementation manners, the acquisition unit 401, configured to acquire operation state data, includes: The acquisition unit 401 is configured to acquire n state data items; the n state data items are respectively used to indicate n attributes of the memory of the target device within a first time period; The acquisition unit 401 is configured to perform data dimensionality reduction on the n state data items to obtain operation state data.

[0116] In some implementations, an acquisition unit 401 is configured to perform data dimensionality reduction on n items of status data to obtain operation status data, including: The acquisition unit 401 is configured to acquire a correlation coefficient matrix corresponding to n attributes; The acquisition unit 401 is configured to determine n eigenvectors of the correlation coefficient matrix and n eigenvalues corresponding to the n eigenvectors; The acquisition unit 401 is configured to determine, from the n eigenvectors, p eigenvectors corresponding to p target eigenvalues; the p target eigenvalues are the top p eigenvalues sorted in descending order of magnitude among the n eigenvalues; The acquisition unit 401 is configured to project the n items of status data onto a feature space corresponding to the p eigenvectors to obtain operation status data including p items of feature data.

[0117] In some implementations, the shared layer includes a feature extraction layer constructed by using a long short-term memory network and a shared feature layer constructed by using a fully connected network; The processing unit 402 is further configured to perform feature extraction on the operation status data through the shared layer of the dual-task neural network model to obtain status feature data corresponding to the operation status data, including: The processing unit 402 is further configured to perform feature extraction on the operation status data through the feature extraction layer; The processing unit 402 is further configured to fuse the feature data output by the feature extraction layer through the shared feature layer to obtain status feature data.

[0118] In some implementations, the first task layer is a machine learning model constructed by using a fully connected network; the second task layer is a machine learning model constructed by using a probabilistic neural network.

[0119] In some implementations, the n attributes include one or more of the following: working voltage, ambient temperature, working frequency, power, data refresh rate, read / write latency, number of row failures in the memory within a first time period, number of column failures in the memory within a first time period, number of correctable errors in the memory within a first time period, and number of uncorrectable errors in the memory within a first time period.

[0120] Based on the same inventive concept, as an implementation of the above method, an embodiment of the present application further provides a model training apparatus. This embodiment corresponds to the foregoing method embodiment. For ease of reading, details of the foregoing method embodiment are not described one by one in this embodiment. However, it should be clear that the model training apparatus in this embodiment can correspondingly implement some or all of the content in the foregoing method embodiment.

[0121] An embodiment of the present application provides a model training apparatus, Figure 13As a schematic structural diagram of the model training device, as shown in Figure 13 shown, the model training device 50 includes: An acquisition unit 501, configured to acquire x training samples and labels respectively corresponding to the x training samples; wherein, the x training samples include: n attributes of the memory of the target device at x different time periods, and n is a positive integer; the labels corresponding to each training sample include: the number of correctable errors that occur in the memory within a first preset time period after the time period corresponding to the training sample, and whether an uncorrectable error occurs in the memory within a second preset time period after the time period corresponding to the training sample; A training unit 502, configured to perform supervised learning training on the dual-task neural network model by using the x training samples and the labels respectively corresponding to the x training samples; Among them, the dual-task neural network model includes: a shared layer, a first task layer, and a second task layer; wherein, the shared layer is configured to: extract feature data of n attributes of the memory within a first time period to obtain state feature data; the first task layer is configured to: use the state feature data to determine a first prediction result; the second task layer is configured to: use the state feature data to determine a second prediction result; wherein, the first prediction result is used to indicate: the number of correctable errors that occur in the memory within a second time period; the second prediction result is used to indicate: the probability of an uncorrectable error occurring in the memory within a third time period; the second time period and the third time period are after the first time period.

[0122] The memory fault prediction device 40 and the model training device 50 provided in the embodiments of the present application can execute the methods provided in any of the above embodiments, and their implementation principles and technical effects are similar, which will not be elaborated here.

[0123] The embodiments of the present application further provide an electronic device, as shown in Figure 14 shown, the electronic device includes a memory 601 and a processor 602. A computer program is stored in the memory 601, and the processor 602 is configured to run the computer program to execute the steps in the embodiments of the above memory fault prediction method, or the processor 602 is configured to run the computer program to execute the steps in the embodiments of the above model training method.

[0124] The embodiments of the present disclosure further provide a computer-readable storage medium, in which a computer program is stored. Wherein, the computer program is configured to execute the steps in any of the above embodiments of the memory fault prediction method when running, or the computer program is configured to execute the steps in any of the above embodiments of the model training method when running.

[0125] In an exemplary embodiment, the above computer-readable storage medium may include, but is not limited to: various media such as USB flash drives, read-only memory (ROM for short), random access memory (RAM for short), external hard drives, magnetic disks, or optical discs that can store computer programs.

[0126] Embodiments of the present disclosure also provide a computer program product. The above computer program product includes a computer program. When the computer program is executed by a processor, it implements the steps in any of the above embodiments of the memory fault prediction method, or when the computer program is executed by a processor, it implements the steps in any of the above embodiments of the model training method.

[0127] Embodiments of the present disclosure also provide another computer program product, including a non-volatile computer-readable storage medium. The non-volatile computer-readable storage medium stores a computer program. When the computer program is executed by a processor, it implements the steps in any of the above embodiments of the memory fault prediction method, or when the computer program is executed by a processor, it implements the steps in any of the above embodiments of the model training method.

[0128] Those skilled in the art can further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of the two. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Skilled professionals can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present disclosure.

[0129] The above has introduced the method provided by the present disclosure in detail. Specific examples are used herein to elaborate on the principles and implementation manners of the present disclosure. The description of the above embodiments is only used to help understand the method and its core idea of the present disclosure. It should be noted that for those of ordinary skill in the art in the technical field, without departing from the principle of the present disclosure, several improvements and modifications can be made to the present disclosure, and these improvements and modifications also fall within the protection scope of the claims of the present disclosure.

Claims

1. A memory fault prediction method, characterized in that: include: Get running status data; The operation status data is used to indicate: n properties of the memory of the target device in a first time period; n is a positive integer; Performing feature extraction on the running status data through a shared layer of a dual-task neural network model to obtain status feature data corresponding to the running status data; Determining a first prediction result by using the state feature data through the first task layer of the dual-task neural network model; the first prediction result is used to indicate: the number of correctable errors that occur in the memory within a second time period; The second time period is after the first time period; Determining a second prediction result by using the state feature data through the second task layer of the dual-task neural network model; the second prediction result is used to indicate: a probability of an uncorrectable error occurring in the memory within a third time period; The third time period is after the first time period.

2. The method according to claim 1, characterized in that The obtaining of the running status data includes: Acquire n items of status data; the n items of status data are respectively used to indicate n properties of the memory of the target device within the first time period; Performing data dimension reduction on the n items of status data to obtain the operating status data.

3. The method according to claim 2, characterized in that The performing data dimension reduction on the n items of status data to obtain the running status data includes: Obtaining the correlation coefficient matrix corresponding to the n attributes; Determine n eigenvectors of the correlation coefficient matrix, and n eigenvalues ​​corresponding to the n eigenvectors; Determine p eigenvectors corresponding to p target eigenvalues ​​from the n eigenvectors; the p target eigenvalues ​​are: the first p eigenvalues ​​of the n eigenvalues ​​sorted from largest to smallest in terms of numerical value; The n items of status data are projected onto the feature space corresponding to the p feature vectors to obtain the operating status data containing the p items of feature data.

4. The method according to claim 1, characterized in that The shared layer includes: a feature extraction layer constructed using a long short-term memory network, and a shared feature layer constructed using a fully connected network; The step of extracting features from the running status data through the shared layer of the dual-task neural network model to obtain status feature data corresponding to the running status data includes: Performing feature extraction on the operating status data through the feature extraction layer; The feature data output by the feature extraction layer are fused through the shared feature layer to obtain the state feature data.

5. The method according to claim 1, characterized in that: The first task layer is a machine learning model constructed using a fully connected network; the second task layer is a machine learning model constructed using a probabilistic neural network.

6. The method according to claim 1, characterized in that The n attributes include one or more of the following: operating voltage, ambient temperature, operating frequency, power, data refresh rate, read and write delay, the number of row failures that occur in the memory during the first time period, the number of column failures that occur in the memory during the first time period, the number of correctable errors that occur in the memory during the first time period, and the number of uncorrectable errors that occur in the memory during the first time period.

7. A model training method, characterized in that: The method comprises: Obtain x training samples and labels corresponding to the x training samples respectively; wherein the x training samples include: n attributes of the memory of the target device in x different time periods, where n is a positive integer; the label corresponding to each training sample includes: the number of correctable errors occurring in the memory in a first preset time period after the time period corresponding to the training sample, and whether an uncorrectable error occurs in the memory in a second preset time period after the time period corresponding to the training sample; Using the x training samples and the labels corresponding to the x training samples, respectively, to perform supervised learning training on the dual-task neural network model; Wherein, the dual-task neural network model includes: a shared layer, a first task layer and a second task layer; wherein, the shared layer is used to: perform feature extraction on the n attributes of the memory within a first time period to obtain state feature data; the first task layer is used to: use the state feature data to determine a first prediction result; the second task layer is used to: use the state feature data to determine a second prediction result; wherein, the first prediction result is used to indicate: the number of correctable errors that occur in the memory within a second time period; the second prediction result is used to indicate: the probability of an uncorrectable error occurring in the memory within a third time period; the second time period and the third time period are after the first time period.

8. The method according to claim 7, characterized in that The loss function used for training the dual-task neural network model satisfies: the loss function is the weighted sum of the first function and the second function; wherein the first function is used to reflect the accuracy of the output result of the first task layer; and the second function is used to reflect the accuracy of the output result of the second task layer.

9. The method according to claim 8, characterized in that During the j-th model optimization, the weight value corresponding to the first function is positively correlated with the degree of loss reduction of the output result of the first task layer in a preset training process, and the weight value corresponding to the second function is positively correlated with the degree of loss reduction of the output result of the second task layer in the preset training process; The preset training process includes the model training process from the j-1th model optimization to the jth model optimization.

10. The method according to claim 9, characterized in that If the loss of the output result of the first task layer increases in the preset training process, the weight value corresponding to the first function is set to zero during the j-th model optimization; Alternatively, if the loss of the output result of the second task layer increases within the preset training process, the weight value corresponding to the second function is set to zero during the j-th model optimization.

11. The method according to claim 7, characterized in that The method of performing supervised learning training on the dual-task neural network model by using the x training samples and the labels corresponding to the x training samples respectively includes: Performing data dimensionality reduction on each of the x training samples to obtain x dimensionality-reduced training samples; The dual-task neural network model is trained in a supervised manner using the x dimensionality reduction training samples and the labels corresponding to the x training samples.

12. The method according to claim 11, characterized in that The performing data dimensionality reduction on each training sample in the x training samples to obtain x dimensionality-reduced training samples comprises: Using the x training samples, calculate the correlation coefficient matrix corresponding to the n attributes; Determine n eigenvectors of the correlation coefficient matrix, and n eigenvalues ​​corresponding to the n eigenvectors; Determine p eigenvectors corresponding to p target eigenvalues ​​from the n eigenvectors; the p target eigenvalues ​​are: the first p eigenvalues ​​of the n eigenvalues ​​sorted from largest to smallest in terms of numerical value; Each training sample in the x training samples is projected to the feature space corresponding to the p feature vectors to obtain x reduced-dimensionality training samples; wherein each reduced-dimensionality training sample contains p items of feature data.

13. A memory fault prediction device, characterized in that: include: An acquisition unit, used for acquiring operation status data; The operation status data is used to indicate: n properties of the memory of the target device in a first time period; A processing unit, configured to extract features from the running status data through a shared layer of a dual-task neural network model to obtain status feature data corresponding to the running status data; The processing unit is further used to determine a first prediction result by using the state feature data through the first task layer of the dual-task neural network model; the first prediction result is used to indicate: the number of correctable errors that occur in the memory in a second time period; the second time period is after the first time period; The processing unit is further used to determine a second prediction result by using the state feature data through the second task layer of the dual-task neural network model; the second prediction result is used to indicate: the probability of an uncorrectable error occurring in the memory within a third time period; The third time period is after the first time period.

14. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the memory fault prediction method according to any one of claims 1 to 6 when executing the computer program; Alternatively, a processor is used to implement the steps of the model training method as described in any one of claims 7 to 12 when executing the computer program.

15. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the memory fault prediction method as described in any one of claims 1 to 6, or the computer program, when executed by a processor, implements the steps of the model training method as described in any one of claims 7 to 12.

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