Battery piece side face passivation method

Abstract

The method for passivating the side face of the battery piece comprises the following steps that S1, texturing treatment is carried out; s2, boron diffusion; s3, removing the edge of the back surface and the borosilicate glass at the edge; s4, performing alkali polishing on the back surface, removing the phosphorus-doped polycrystalline silicon layer wound and expanded on the edge and the back surface, and reserving the phosphorus-doped polycrystalline silicon layer and the borosilicate glass layer on the front surface; s5, depositing on the back surface of the polished silicon wafer to form a tunneling oxide layer; s6, phosphorus diffusion; s7, removing phosphorosilicate glass layers on the front surface and the edge by using HF; s8, RCA cleaning is carried out; s9, using laser slicing to divide the battery piece into two parts; s10, passivating the boron diffusion surface and the front surface to form an aluminum oxide layer; s11, film coating is carried out; according to the invention, the power output is increased, the power of the module can be improved by 6-8 W by combining the N-type TOPCon technology, and the efficiency is improved by more than 0.2%.

Description

Technical Field

[0001] The present invention belongs to the field of solar cell processing, and in particular relates to a method for passivating the side surface of a solar cell. Background Art

[0002] When manufacturing a solar cell, the whole solar cell needs to be cut. Edge damage will be caused during the cutting process, resulting in a reduction in the efficiency of the solar cell. Small-sized solar cells have a larger perimeter-to-area ratio, which makes the edge damage more obvious. In addition to the loss of open-circuit voltage VOC, the main loss is the fill factor FF (caused by the loss of pFF). By cutting and repairing in advance, the purpose of efficiency improvement can be achieved.

[0003] In order to reduce the current and heat loss of the solar cell and improve the output power of the solar cell, currently, the solar cells are cut in half and then assembled by series soldering. Half-cell solar cells have become the mainstream products. However, correspondingly, cutting the solar cell will damage the interface characteristics of the edge surface of the solar cell; a large number of dangling bonds are generated on the edge surface after cutting to form a recombination center (edge recombination); the edge recombination of the solar cell causes a loss of solar cell efficiency and directly leads to a loss of the power of the solar cell.

[0004] Disadvantages of the prior art: 1. There is edge damage. 2. The power of the solar cell is low. 3. After manufacturing the finished product, the cutting loss rate is high. Summary of the Invention

[0005] In view of this, the present invention aims to provide a method for passivating the side surface of a solar cell to solve at least one technical problem in the background art.

[0006] To achieve the above object, the technical solution of the present invention is realized as follows: A method for passivating the side surface of a solar cell includes the following steps: S1: Texturing the silicon wafer; S2: Boron diffusion to form a phosphorus-doped polysilicon layer and a borosilicate glass layer, and the phosphorus-doped polysilicon layer and the borosilicate glass layer are diffused around the back edge; S3: Using HF to remove the borosilicate glass around the back edge and at the edge; S4: Back-side alkaline polishing to remove the phosphorus-doped polysilicon layer around the edge and at the back side, and retain the phosphorus-doped polysilicon layer and the borosilicate glass layer on the front side; S5: Depositing on the back side of the polished silicon wafer to form a tunneling oxide layer and an amorphous silicon layer; S6: Phosphorus diffusion to dope the amorphous silicon layer on the back side and at the edge to form a phosphorus-doped amorphous silicon layer and a phosphosilicate glass layer; S7: Using HF to remove the phosphosilicate glass layer on the front side and at the edge; S8: Perform RCA cleaning to remove the phosphorus-doped amorphous silicon layer on the front and edges, as well as the amorphous silicon layer, tunneling oxide layer on the front, and phosphosilicate glass layer on the back; S9: Use laser slicing to cut the solar cell into two halves; S10: Form an alumina layer on the boron diffusion surface and the front passivation; S11: Coat the film. After back passivation, deposit a silicon oxynitride antireflection film and a silicon nitride antireflection film on the alumina film layer in sequence; S12: Screen printing, sintering, and light injection.

[0007] Furthermore, the texturing in step S1 is carried out in a tank cleaning equipment; The temperature of texturing is 75 - 85 °C, the time is 4 - 6 min, and the thinning amount of the silicon wafer is 0.36 - 0.42 g.

[0008] Furthermore, the boron diffusion in step S2 includes: the temperature is 860 - 880 °C, the furnace tube pressure is 90 - 110 mbar, introduce 2900 - 3100 Sccm of O 2 , the introduction time is 170 - 190 s to form a polysilicon layer; then introduce 2000 Sccm of N 2 to purge for 0.5 - 1.5 min, and then introduce 190 - 210 Sccm of BCL 3 , 600 - 700 Sccm of O 2 , 3900 - 4100 Sccm of N 2 , the introduction time is 600 - 800 s for boron diffusion deposition, then introduce 2400 - 2600 Sccm of N 2 to purge for 0.5 - 1.5 min, raise the temperature to 900 - 1000 °C, the furnace tube pressure is 400 - 500 mbar, introduce 3900 - 4100 Sccm of N 2 , the introduction time is 500 - 600 s, raise the temperature to 1000 - 1100 °C, the furnace tube pressure is 200 - 400 mbar, introduce 9000 - 11000 sccm of O 2 , the introduction time is 4500 - 4700 s to form a phosphorus-doped polysilicon layer and a backside edge wrap-around diffusion of the borosilicate glass layer, forming a sheet resistance of 250 - 350 Ω / Sq.

[0009] Furthermore, in step S3, use HF to remove the backside edge wrap-around diffusion and the borosilicate glass on the edge, adopt chain cleaning, and the polishing is carried out in a tank cleaning equipment, and the cleaning solution of the tank cleaning equipment is KOH; The temperature of cleaning is 60 - 70 °C, the time is 210 - 230 s, and the thinning amount of the silicon wafer is 0.1 - 0.3 g.

[0010] Further, the backside alkaline polishing in step S4 is carried out in a tank cleaning device, and the cleaning solution of the tank cleaning device is KOH; the cleaning temperature is 60 - 70 °C, the time is 210 - 230 s, and the thinning amount of the silicon wafer is 0.1 - 0.3 g.

[0011] Further, the backside deposition of the polished silicon wafer in step S5 includes oxidizing at a temperature above 600 °C with 35000 - 37000 sccm of O 2 for 470 - 490 s, evacuating, purging oxygen, then introducing 800 - 1000 sccm of silane, with a reaction time of 1500 - 1700 s and a pressure of 250 - 350 mbar.

[0012] Further, in step S5, the thickness of the tunneling oxide layer is 1.4 - 1.6 nm, and the thickness of the amorphous silicon layer is 115 nm - 160 nm.

[0013] Further, in step S6, a phosphorus - doped amorphous silicon layer is formed by thermal diffusion in a tube furnace. At a temperature of 900 - 940 °C, 850 - 900 sccm of PClO 3 gas is introduced, the oxygen flow rate is 700 - 900 sccm, and the time is 50 - 70 min.

[0014] Further, in step S10, trimethylaluminum and water are introduced into the furnace tube to form an ALO X film with a thickness of 5 - 10 nm.

[0015] Further, in step S11, the anti - reflection film of silicon oxynitride and silicon nitride deposited on the alumina film layer after backside passivation includes using a graphite boat as a carrier, placing the silicon wafer into the furnace tube, and introducing 1100 - 1300 sccm of silane, 5100 - 5300 sccm of ammonia gas, and 7300 - 7500 sccm of nitrous oxide at a temperature of 500 °C, with a pressure of 1500 - 1700 mbar, a radio - frequency power of 230000 - 250000 W, and a duty cycle of 50:1200 - 1300; the reaction time is 260 - 280 s to form an anti - reflection film of silicon oxynitride with a thickness of 35 - 45 nm; When the temperature is raised to 510 °C, 2700 - 2900 sccm of silane and 9000 - 11000 sccm of ammonia gas are introduced, with a pressure of 1500 - 1700 mbar, a radio - frequency power of 230000 - 250000 W, and a duty cycle of 50:900 - 1100, and the reaction time is 600 - 610 s to form an anti - reflection film of silicon nitride with a thickness of 1 - 5 nm.

[0016] Compared with the prior art, the method for side passivation of a battery cell described in the present invention has the following advantages: 1. Reduce the investment cost and improve the yield of finished battery cells.

[0017] 2. Compensate for the loss after edge cutting.

[0018] 3. Increase power output. Combining with N-type TOPCon technology can increase the power of the module by 6 - 8W and the efficiency by more than 0.2%.

[0019] 4. Reduce production loss. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The drawings forming a part of the present invention are used to provide a further understanding of the present invention. The schematic embodiments and descriptions thereof of the present invention are used to explain the present invention and do not constitute an improper limitation to the present invention. In the drawings: Figure 1 It is a schematic diagram of a method for passivating the side of a solar cell according to an embodiment of the present invention (P ＋ is a phosphorus-doped polysilicon layer, BSG is a borosilicate glass layer, LP Poly is a tunneling oxide layer and an amorphous silicon layer, PSG is a phosphosilicate glass layer, N ＋- Poly is a phosphorus-doped amorphous silicon layer, AlO x is an aluminum oxide layer, SiN x is an antireflection film of silicon oxynitride and an antireflection film of silicon nitride); Figure 2 It is a schematic diagram of the finished product prepared by a method for passivating the side of a solar cell according to an embodiment of the present invention (a is the diagram after phosphorus diffusion in step S6, b is the diagram after laser slicing in step S9, c is the diagram after coating in step S11, and d is the diagram of the finished product after step S12). DETAILED DESCRIPTION OF THE EMBODIMENTS

[0021] It should be noted that, without conflict, the embodiments in the present invention and the features in the embodiments can be combined with each other.

[0022] The present invention will be described in detail below with reference to the drawings and in combination with the embodiments.

[0023] A method for preparing a TOPCon solar cell, characterized in that the method comprises the following steps: 1. Texturing: Utilize the anisotropic etching characteristics of silicon in a low-concentration alkaline solution. After etching for a certain time, a "pyramid" structure is formed on the surface of the silicon wafer. Silicon can react with a sodium hydroxide solution to generate sodium silicate and release hydrogen; The chemical reaction is: Si + 2NaOH + H 2 O = Na 2 SiO 3 + 2H 2 ↑ Using a slot-type cleaning equipment, NaOH is used during cleaning, the temperature is maintained at 80 °C, the time is 5 min, and the wafer thinning amount is controlled within 0.36 - 0.42 g.

[0024] 2. Boron diffusion: Raise the furnace tube temperature to 870 °C, the furnace tube pressure is 100 mbar, introduce 3000 Sccm of O 2 , the introduction time is 180 s to form a polysilicon layer, and then introduce 2000 Sccm of N 2 for purging for 1 min.

[0025] Maintain the furnace tube temperature at 870 °C, the furnace tube pressure at 100 mbar, and introduce 200 Sccm of BCL 3 , 650 Sccm of O 2 , 4000 Sccm of N 2 , the introduction time is 700 s for boron diffusion deposition, and then introduce 2500 Sccm of N 2 for purging for 1 min.

[0026] Raise the temperature to 950 °C, the furnace tube pressure is 300 mbar, and introduce 4000 Sccm of N 2 , the introduction time is 550 s to further push the boron atoms in the borosilicate glass layer into the silicon substrate.

[0027] Raise the temperature to 1040 °C, the furnace tube pressure is 300 mbar, and introduce 10000 sccm of O 2 , the introduction time is 4600 s to form a phosphorus-doped polysilicon layer and a borosilicate glass layer, and the back edge of the phosphorus-doped polysilicon layer and the borosilicate glass layer has a wrap-around diffusion. Finally, phosphorus diffuses into the N-type silicon wafer to form a sheet resistance of 250 - 350 Ω / Sq.

[0028] 3. Remove borosilicate glass: HF is used to remove the borosilicate glass on the back and edges.

[0029] Use HF to remove the wrap-around diffusion on the back edge and the borosilicate glass on the edge. The borosilicate glass is cleaned using a chain cleaner, and HF solution is used to remove the BSG on the edge and surface. Polishing uses a slot-type equipment, using KOH, the temperature is 65 °C, the time is 220 s, and the wafer thinning amount is controlled within 0.1 - 0.3 g.

[0030] 4. Backside alkaline polishing to remove the phosphorus-doped polysilicon layer with wrap-around diffusion on the edge and back, and retain the phosphorus-doped polysilicon layer and the borosilicate glass layer on the front; Polishing uses a slot-type equipment, using KOH, the temperature is 65 °C, the time is 220 s, and the wafer thinning amount is controlled within 0.1 - 0.3 g.

[0031] 5. Deposit on the back of the polished silicon wafer to form a tunneling oxide layer.

[0032] Deposition principle of the tunneling oxide layer: Oxygen is introduced at high temperature. Oxygen reacts with silicon to produce silicon oxide. The reaction equation is: O 2 + Si SiO x ; Raise the temperature in the diffusion furnace tube above 600 °C. Introduce 36000 sccm of oxygen into the tube for 480 s for oxidation. Then evacuate the vacuum and clean the oxygen in the furnace tube. Introduce 900 sccm of silane into the furnace tube with a reaction time of 1600 s and a furnace tube pressure of 300 mbar to form the tunneling oxide layer and the amorphous silicon layer.

[0033] 6. Phosphorus diffusion: Phosphorus doping is carried out on the amorphous silicon layer on the back and edges to form a phosphorus-doped amorphous silicon layer and a phosphosilicate glass layer; Principle of the polysilicon layer: Silane is introduced at high temperature. Silane thermally decomposes into silicon and hydrogen. The reaction equation is: SiH 4 (gas) = Si (solid) + H 2 Through the LPCVD equipment, deposit the tunneling oxide layer and the amorphous silicon layer on the back of the polished silicon substrate. The thickness of the tunneling oxide layer is 1.5 nm, and the thickness of the amorphous silicon layer is 115 nm - 160 nm.

[0034] POCl 3 Decomposes at high temperature (>600 °C) to generate phosphorus pentachloride (PCl 5 ) and phosphorus pentoxide (P 2 O 5 ). The reaction formula is as follows: 5POCl 3 → high temperature (>600 °C) → 3PCl 5 + P 2 0 5 4PCl 5 + 5O 2 --- excess O 2 → 2P 2 0 5 + 10Cl 2 Form a phosphorus-doped polysilicon layer by means of thermal diffusion in a tube furnace: At a temperature of 920 °C, introduce 870 sccm of PClO 3 gas with an oxygen flow rate of 800 sccm and a process time of 60 min; Use HF to remove the borosilicate glass on the front and edges, remove PSG: Etching process, and clean and remove the residual phosphosilicate glass on the surface and edges of the silicon wafer; RCA cleaning, remove the polysilicon layer on the front and edges, and the front BSG; Laser slicing, divide the battery cell into two; First, a cutting channel penetrating the surface is machined on the back of the battery using a laser, and then the battery chip is broken along the cutting channel by a mechanical method. The laser is used to locally and rapidly heat the material, and the subsequent supporting cooling technology generates a non-uniform temperature field. This temperature field generates a temperature gradient on the material surface, thereby inducing the generation of thermal stress. Among them, the area within the laser spot is in a compressive stress state, while the areas before and after the laser spot are in a tensile stress state. Since the compressive stiffness of brittle materials is much greater than their tensile strength, when the tensile stress reaches the fracture strength of the material, the material will fracture, and the fracture will stably expand along with the moving track of the laser and subsequent cooling.

[0035] An alumina layer is formed on the boron diffusion surface and the front surface passivation. The raw material for preparing Al 2 O 3 is TMA (trimethylaluminum), and the reaction equation is 2AL(CH 3 ) 3 +3H 2 O = Al 2 O 3 +6CH 4 ; TMA and water are introduced into the furnace tube for 30 cycles to form an ALO X film with a thickness of 5 - 10 nm.

[0036] 11. Coating: After back surface passivation, a silicon oxynitride reflective film and a silicon nitride antireflection film are sequentially deposited on the alumina film layer. The preparation of silicon oxynitride mainly adds an N 2 O pipeline in the furnace tube, and a 1 - 5 nm silicon oxynitride film is added on the conventional back passivation layer alumina thin film. The principle formula is: SiH 4 +NH 3 +N 2 O → Si y ON x +H 2 ; SiH 4 +NH 3 → Si x N y H z ; Using a graphite boat as a carrier, place the silicon wafer into the furnace tube, heat it up to 500 °C, introduce 1200 sccm of silane, 5200 sccm of ammonia, and 7400 sccm of nitrous oxide, with a pressure of 1600 mbar, a radio frequency power of 240000 W, a duty cycle of 50 to 1250, and a reaction time of 270 s to form a silicon oxynitride film with a thickness of 35 - 45 nm. Then heat it up to 510 °C, introduce 2800 sccm of silane and 10000 sccm of ammonia, with a pressure of 1600 mbar, a radio frequency power of 240000 W, a duty cycle of 50 to 1000, and a reaction time of 605 s to form an antireflection film of silicon nitride with a thickness of 1 - 5 nm.

[0037] 12. Screen printing: Loading -> First printing (back electrode) -> Oven -> Second printing (back surface field) -> Oven -> Third printing (main grid) -> Oven -> Fourth printing (fine grid) -> Sintering.

[0038] The efficiency of this application is increased by more than 0.2%, the power of the module is increased by 6 - 8 W, the module does not need to be cut, and the yield of the finished battery is improved.

[0039] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A method for side passivation of a battery cell, characterized in that: The steps include: S1: Texturing treatment of silicon wafer; S2: Boron expansion to form a phosphorus-doped polysilicon layer and a borosilicate glass layer, and the back edges of the phosphorus-doped polysilicon layer and the borosilicate glass layer are expanded around; S3: Use HF to remove the borosilicate glass on the back edge and the edge; S4: back side alkali polishing, removing the phosphorus-doped polysilicon layer on the edge and back side, and retaining the phosphorus-doped polysilicon layer and borosilicate glass layer on the front side; S5: depositing on the back side of the polished silicon wafer to form a tunneling oxide layer and an amorphous silicon layer; S6: Phosphorus diffusion, phosphorus doping the amorphous silicon layer at the back and edge to form a phosphorus-doped amorphous silicon layer and a phosphorus silicon glass layer; S7: Use HF to remove the phosphosilicate glass layer on the front and edge; S8: performing RCA cleaning to remove the phosphorus-doped amorphous silicon layer on the front and edge, the amorphous silicon layer and the tunneling oxide layer on the front, and the phosphorus silicon glass layer on the back; S9: Use laser slicing to split the battery into two parts; S10: forming an aluminum oxide layer on the boron diffusion surface and the front passivation; S11: coating, after back passivation, a silicon oxynitride anti-reflection film and a silicon nitride anti-reflection film are sequentially deposited on the aluminum oxide film layer; S12: Screen printing, sintering, light injection.

2. A method for side passivation of a cell according to claim 1, characterized in that: The texturing in step S1 is carried out in a tank cleaning device; The temperature of texturing is 75-85℃, the time is 4-6min, and the thinning amount of silicon wafer is 0.36-0.42g.

3. A cell side passivation method according to claim 1, characterized in that: In step S2, the boron diffusion includes setting the temperature to 860-880°C, the furnace pressure to 90-110 mbar, introducing 2900-3100 Sccm of O2 for 170-190 seconds, and forming a polysilicon layer; Then, 2000 Sccm of N2 was introduced for 0.5-1.5 min, and then 190-210 Sccm of BCL3, 600-700 Sccm of O2, and 3900-4100 Sccm of N2 were introduced for 600-800 s for boron diffusion deposition, and then 2400-2600 Sccm of N2 was introduced for 0.5-1.5 min, the temperature was raised to 900-1000 ° C, and the furnace tube pressure was increased to 200 ° C. The pressure is 400-500mbar, 3900-4100Sccm of N2 is introduced for 500-600s, the temperature is raised to 1000-1100 degrees, the furnace tube pressure is 200-400mbar, 9000-11000sccm of O2 is introduced for 4500-4700s, and a phosphorus-doped polysilicon layer and a borosilicate glass layer are formed around the back edge to form a square resistance of 250-350Ω / Sq.

4. A cell side passivation method according to claim 1, characterized in that: In step S3, HF is used to remove the borosilicate glass on the back edge and the edge, and chain cleaning is adopted. Polishing is performed in a tank cleaning device, and the cleaning liquid of the tank cleaning device is KOH; The cleaning temperature is 60-70°C, the time is 210-230s, and the thinning amount of the silicon wafer is 0.1-0.3g.

5. A cell side passivation method according to claim 1, characterized in that: In step S4, the back side alkaline polishing is performed in a tank cleaning device, the cleaning liquid of the tank cleaning device is KOH; the cleaning temperature is 60-70°C, the time is 210-230s, and the thinning amount of the silicon wafer is 0.1-0.3g.

6. A cell side passivation method according to claim 1, characterized in that: The back side deposition of the polished silicon wafer in step S5 includes oxidation at a temperature above 600°C, introducing 35000-37000sccm of O2 for 470-490s, evacuating, removing oxygen, and then introducing 800-1000sccm of silane for 1500-1700s at a pressure of 250-350mbar.

7. A cell side passivation method according to claim 6, characterized in that: In step S5, the thickness of the tunnel oxide layer is 1.4-1.6 nm, and the thickness of the amorphous silicon layer is 115 nm-160 nm.

8. A cell side passivation method according to claim 1, characterized in that: In step S6, a phosphorus-doped amorphous silicon layer is formed by thermal diffusion in a tubular furnace. At a temperature of 900-940° C., 850-900 sccm of PClO3 gas and an oxygen flow rate of 700-900 sccm are introduced for 50-70 min.

9. A cell side passivation method according to claim 1, characterized in that: In step S10, trimethylaluminum and water are introduced into the furnace tube to form an ALO layer with a thickness of 5-10 nm. X membrane.

10. A cell side passivation method according to claim 1, characterized in that: In step S11, after the back surface passivation, an anti-reflection film of silicon oxynitride and silicon nitride is deposited on the aluminum oxide film layer, including using a graphite boat as a carrier, placing a silicon wafer in a furnace tube, introducing 1100-1300sccm of silane, 5100-5300sccm of ammonia, 7300-7500sccm of nitrous oxide, pressure 1500-1700mbar, RF power 230000-250000W, duty cycle 50:1200-1300; reaction time 260-280s, forming a 35-45nm silicon oxynitride anti-reflection film; The temperature was raised to 510°C, 2700-2900sccm of silane and 9000-11000sccm of ammonia were introduced, the pressure was 1500-1700mbar, the RF power was 230000-250000W, the duty cycle was 50 to 1000, the reaction time was 605 seconds, and a 1-5nm silicon nitride anti-reflection film was formed.

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