Semiconductor laser chip with current modulation and preparation method thereof

Abstract

The invention provides a semiconductor laser chip with a current modulation function and a preparation method, and relates to the field of semiconductor laser chips, and the semiconductor laser chip comprises a substrate layer, an n-type limiting layer, an n-type waveguide layer, a quantum well active region, a p-type waveguide layer, a first p-type limiting layer, a second p-type limiting layer and a contact layer which are sequentially stacked from bottom to top, the anti-reflection cavity surface and the high-reflection cavity surface are arranged on the two opposite sides of the second p-type limiting layer, the functional area is arranged between the anti-reflection cavity surface and the high-reflection cavity surface and comprises a current injection sub-area and a current blocking sub-area, the current injection sub-area is provided with a plurality of injection tips, the current blocking sub-area is provided with a plurality of blocking tips, and the injection tips and the blocking tips are arranged on the first p-type limiting layer. The injection tip is arranged between any two adjacent blocking tips; two grooves formed in the first p-type limiting layer penetrate through the second p-type limiting layer and the contact layer, and the two grooves are located in the two opposite sides of the current injection sub-region and the current blocking sub-region. According to the semiconductor laser chip, the light emitting power and the light beam quality of the semiconductor laser chip can be improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor laser chips, and particularly to a semiconductor laser chip with current modulation and a preparation method thereof. Background Art

[0002] High-power semiconductor laser chips are key components in modern laser technology and can be used as pump light sources for solid-state laser chips and fiber laser chips. They are mainly applied in industrial processing and advanced manufacturing, such as laser cutting, laser welding, laser drilling, laser cladding, 3D printing, etc., and can also be used as direct semiconductors in high-power processing systems. Continuously increasing output power and brightness are crucial for improving the performance of laser systems and enabling new applications. Commercially available high-power semiconductor laser chips usually adopt a wide-strip structure. Affected by factors such as the thermal lens effect and longitudinal spatial temperature and current non-uniformity, the power of the semiconductor laser chip will reach saturation, and at the same time, the transverse optical parameter product increases rapidly with the increase of current.

[0003] Chinese patent application with publication number CN116316054B discloses a laser chip with a current non-injection layer and a preparation method thereof. In the laser chip, a step is formed by recessing a part of the ridge waveguide layer in contact with the front end face. A current non-injection layer is provided on the step, and the third electrode is grown above the current non-injection layer. The present invention uses the current non-injection layer technology to prepare a current non-injection layer on the emission cavity surface side of the laser chip and grow a third electrode above the current non-injection layer. However, it is difficult to fully control the carriers in the p-type semiconductor depletion layer to move towards the active region in the above scheme. There is still a high carrier diffusion and aggregation at the local cavity surface, and the resulting thermal lens distortion leads to the appearance of high-order modes, thus unable to effectively suppress the light absorption at the cavity surface, which will cause the output light power of the semiconductor laser chip to decrease. Therefore, it is very necessary to provide a semiconductor laser chip with a small horizontal divergence angle and a preparation method thereof to improve the output light power and beam quality of the semiconductor laser chip. Summary of the Invention

[0004] In view of this, the present invention provides a semiconductor laser chip with current modulation and a preparation method thereof. Through two trenches opened in the first p-type confinement layer and penetrating the second p-type confinement layer and the contact layer, the current injection in the cavity length direction is regulated to gradually change from the high-reflection cavity surface to the anti-reflection cavity surface, reducing the carrier density and expansion amplitude at the edge of the front cavity surface, so that the gain of the high-order side modes is correspondingly reduced, and the output light power and beam quality are improved.

[0005] The present invention provides a semiconductor laser chip with current modulation, including a substrate layer, an n-type confinement layer, an n-type waveguide layer, a quantum well active region, a p-type waveguide layer, a first p-type confinement layer, a second p-type confinement layer, and a contact layer stacked in sequence from bottom to top, wherein,

[0006] The contact layer includes an anti-reflection cavity surface, a functional region, and a high-reflection cavity surface. The anti-reflection cavity surface and the high-reflection cavity surface are disposed on opposite sides of the second p-type confinement layer. The functional region is disposed between the anti-reflection cavity surface and the high-reflection cavity surface. The functional region includes a current injection sub-region and a current blocking sub-region. The current injection sub-region has a plurality of injection tips, and the current blocking sub-region has a plurality of blocking tips. The injection tips are disposed between any two adjacent blocking tips, and the injection tips and the blocking tips are arranged alternately. The projection of the current blocking sub-region and the current injection sub-region is located on the same horizontal plane, and the current blocking sub-region is higher than the current injection sub-region;

[0007] Two trenches opened in the first p-type confinement layer penetrate through the second p-type confinement layer and the contact layer, and the two trenches are located on opposite sides of the current injection sub-region and the current blocking sub-region. The trenches are filled with an insulating medium.

[0008] Based on the above technical solutions, preferably, a first blocking groove is opened between the anti-reflection cavity surface and the functional region along the width direction of the semiconductor laser chip, and a second blocking groove is opened between the high-reflection cavity surface and the functional region along the width direction of the semiconductor laser chip.

[0009] Based on the above technical solutions, preferably, the trenches penetrate through the first p-type confinement layer, the second p-type confinement layer, and the contact layer, and the trenches extend to the anti-reflection cavity surface and the high-reflection cavity surface respectively along the length direction of the semiconductor laser chip.

[0010] More preferably, both the injection tips and the blocking tips are isosceles triangles, and the apex angles of the injection tips and the blocking tips satisfy:

[0011] 0.1 ≤ tan(θ / 2) ≤ 0.2

[0012] where θ represents the apex angle of the injection tip or the blocking tip.

[0013] More preferably, the second p-type confinement layer and the contact layer stacked in sequence form a ridge waveguide structure, and the ridge waveguide structure is used to regulate the current to be gradually injected from the high-reflection cavity surface to the anti-reflection cavity surface in the cavity length direction, so as to suppress the thermal lens effect.

[0014] More preferably, the ratio of the ridge width of the ridge waveguide structure to the number of injection tips in the current injection sub-region satisfies:

[0015] 8 ≤ L / n ≤ 12

[0016] Wherein, L represents the ridge width of the ridge waveguide structure, and n represents the number of injection tips in the current injection sub-region.

[0017] More preferably, the height of the ridge waveguide structure is 500 - 800 nm.

[0018] More preferably, the width of the trench is 0.5 μm - 1 μm, and the distance between the trench and the edge of the ridge waveguide structure is at least 5 μm.

[0019] More preferably, the substrate layer includes an n-type substrate and an n-type buffer layer, and both the n-type substrate and the n-type buffer layer include any one of GaAs, InP, GaSb, and GaN.

[0020] In the second aspect of the present application, a method for manufacturing a semiconductor laser chip with current modulation is provided, which is used to manufacture a semiconductor laser chip with current modulation, and includes:

[0021] Manufacture an epitaxial wafer, where the epitaxial wafer includes an n-type confinement layer, an n-type waveguide layer, a quantum well active region, a p-type waveguide layer, a first p-type confinement layer, a second p-type confinement layer, and a contact layer epitaxially grown in sequence on the substrate layer;

[0022] Take out the epitaxial wafer from the MOCVD reaction chamber, etch from the contact layer located at the topmost layer of the epitaxial wafer, and etch away part of the conductive medium in the second p-type confinement layer and the contact layer to expose the ridge waveguide structure formed by the second p-type confinement layer and the contact layer;

[0023] Perform double-stripe structure etching on the ridge waveguide structure to form a trench penetrating through the first p-type confinement layer, the second p-type confinement layer, and the contact layer, and fill the trench with SiO2 or SiN medium; and

[0024] Etch out a current injection region in the contact layer, and sequentially fabricate a P-side electrode and an N-side electrode on opposite sides of the epitaxial wafer to complete the fabrication of the semiconductor laser.

[0025] The semiconductor laser chip with current modulation and the manufacturing method provided by the present invention have the following beneficial effects compared with the prior art:

[0026] (1) By arranging injection tips and blocking tips alternately in the contact layer, the injection position and distribution of current can be effectively controlled, reducing the problems of local current over-density or leakage, thereby reducing the risk of local overheating and the laser threshold. In addition, the anti-reflection cavity facet, functional region, and high-reflection cavity facet designed in the contact layer provide a clear optical partition for the entire cavity. The reasonable configuration of the current injection and blocking functional regions makes the coupling between the injected carriers and the optical field more matched, which is conducive to suppressing the lasing of non-target optical modes and improving the beam quality and spectral purity of the laser output. The two grooves opened in the first p-type confinement layer and passing through the second p-type confinement layer and the contact layer realize the regulation of the current to be injected gradually from the high-reflection cavity facet to the anti-reflection cavity facet in the cavity length direction, reducing the carrier density at the edge of the front cavity facet and the temperature gradient in the cavity length direction, thereby suppressing the thermal lens effect, reducing the gain of the high-order side modes, and increasing the output optical power. At the same time, by introducing a double-stripe structure laterally, the high-order modes can be effectively suppressed, and further, the broadening of the lateral divergence angle can be effectively suppressed, improving the beam quality.

[0027] (2) Using the grooves to clearly isolate the preset current injection sub-region and current blocking sub-region in the first p-type confinement layer helps to confine the carriers in a predetermined region. By extending along the chip length direction to the anti-reflection and high-reflection cavity facets, an accurate current path spanning multiple layers is realized, enabling the injected current to be concentrated in the optimized lasing region, avoiding edge diffusion, thereby reducing local overheating and threshold current. At the same time, the grooves not only penetrate the first and second p-type confinement layers and the contact layer but also directly act on the intersection interface with the cavity facet. The filled insulating medium plays an effective electric field shielding role. This multi-layer insulation design effectively prevents leakage and short circuits from other regions and improves the anti-interference ability of the overall device under high-frequency or pulsed operating conditions. Brief Description of the Drawings

[0028] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0029] Figure 1 It is a schematic diagram of the cavity facet of the semiconductor laser chip provided by the present invention;

[0030] Figure 2 It is a schematic cross-sectional view of the ridge waveguide of the semiconductor laser chip provided by the present invention.

[0031] Explanation of the accompanying drawings: 1. substrate layer; 2. n-type confinement layer; 3. n-type waveguide layer; 4. quantum well active region; 5. p-type waveguide layer; 6. first p-type confinement layer; 7. second p-type confinement layer; 8. contact layer; 81. anti-reflection cavity surface; 82. functional region; 821. current injection sub-region; 822. current blocking sub-region; 823. groove; 83. high-reflection cavity surface. DETAILED DESCRIPTION

[0032] The following will be combined with the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0033] Unless otherwise defined, the technical terms or scientific terms used in the present invention shall have the usual meanings understood by persons with ordinary skills in the field to which the present invention belongs. The words "first", "second" and similar words used in the present invention do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "one" do not indicate quantity restrictions, but indicate the existence of at least one. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship also changes accordingly.

[0034] refer to Figure 1 The present invention provides a semiconductor laser chip with current modulation, characterized in that it includes a substrate layer 1, an n-type confinement layer 2, an n-type waveguide layer 3, a quantum well active region 4, a p-type waveguide layer 5, a first p-type confinement layer 6, a second p-type confinement layer 7 and a contact layer 8 stacked in sequence from bottom to top, wherein:

[0035] The substrate layer 1 includes an n-type substrate and an n-type buffer layer, and both the n-type substrate and the n-type buffer layer include any one of GaAs, InP, GaSb and GaN.

[0036] n-type semiconductor materials are prepared by adding appropriate impurities (such as silicon, antimony, germanium, etc.) so that their main carriers are free electrons. These materials have characteristics such as high electron concentration and high electron mobility, and are widely used in electronic devices and optoelectronic devices. GaAs, InP, GaSb, and GaN are all important III-V compound semiconductor materials, which can be doped to form n-type structures and used as substrate materials in various heterostructure devices. During the manufacturing process of heterostructure devices, the n-type buffer layer is usually located between the substrate and the device layer structure, playing a role in alleviating the lattice mismatch between the substrate and the epitaxial layer, reducing the dislocation density, providing good crystal quality for the growth of the subsequent device layer, providing a conductive channel, and reducing the parasitic resistance of the device.

[0037] As Figure 2 shown, the contact layer 8 includes an antireflection cavity surface 81, a functional region 82, and a high-reflection cavity surface 83. The antireflection cavity surface 81 and the high-reflection cavity surface 83 are disposed on opposite sides of the second p-type confinement layer 7, the functional region 82 is disposed between the antireflection cavity surface 81 and the high-reflection cavity surface 83, the functional region 82 includes a current injection sub-region 821 and a current blocking sub-region 822, the current injection sub-region 821 has a plurality of injection tips, the current blocking sub-region 822 has a plurality of blocking tips, the injection tips are disposed between any two adjacent blocking tips, and the injection tips and the blocking tips are alternately arranged. The projection of the current blocking sub-region 822 and the current injection sub-region 821 is on the same horizontal plane, and the current blocking sub-region 822 is higher than the current injection sub-region 821.

[0038] In this embodiment, the injection sub-region and the blocking sub-region are alternately arranged, and the injection tips are uniformly distributed between the blocking tips. The antireflection cavity surface 81 and the high-reflection cavity surface 83 are disposed on opposite sides of the second p-type confinement layer 7, which can form an effective cavity feedback structure, suppressing unnecessary lasing and ensuring the stable output of the beneficial mode, further improving the beam quality and efficiency of the device. The design of the functional region 82 integrates the current injection and current blocking functions in the same region. By finely controlling the geometric structures of the current-carrying region and the current-blocking region, the current flow direction in the device can be better controlled to achieve the purpose of precisely regulating the current distribution.

[0039] Both the injection tips and the blocking tips are isosceles triangles, and the apex angles of the injection tips and the blocking tips satisfy:

[0040] 0.1 ≤ tan(θ / 2) ≤ 0.2

[0041] where θ represents the apex angle of the injection tip or the blocking tip.

[0042] A first blocking groove extending in the width direction of the semiconductor laser chip is provided between the anti-reflection cavity surface 81 and the functional region 82, and a second blocking groove extending in the width direction of the semiconductor laser chip is provided between the high-reflection cavity surface 83 and the functional region 82.

[0043] In this embodiment, the blocking groove can effectively isolate the current transmission between different regions, prevent the current from spreading to unnecessary regions, so as to achieve more accurate current injection and blocking, and improve the working stability of the device. The blocking groove helps to define the transmission path of the optical mode, avoid unnecessary mode coupling and light scattering, and improve the quality and stability of the optical field in the cavity. The effective isolation of the current and the optical field helps to reduce the interference and coupling between adjacent regions, thereby reducing the energy loss inside the device and improving the overall efficiency.

[0044] Two grooves 823 opened in the first p-type confinement layer 6 penetrate through the second p-type confinement layer 7 and the contact layer 8, and the two grooves 823 are located on opposite sides of the current injection sub-region 821 and the current blocking sub-region 822, and the grooves 823 are filled with an insulating medium. The grooves 823 penetrate through the first p-type confinement layer 6, the second p-type confinement layer 7 and the contact layer 8, and the grooves 823 extend along the length direction of the semiconductor laser chip to the anti-reflection cavity surface 81 and the high-reflection cavity surface 83 respectively. The width of the grooves 823 is 0.5 μm to 1 μm, and the distance between the grooves 823 and the edge of the ridge waveguide structure is at least 5 μm.

[0045] In this embodiment, the grooves 823 clearly isolate the preset current injection sub-region 821 and the current blocking sub-region 822 in the first p-type confinement layer 6, which helps to confine the carriers in a predetermined region. For example, by extending along the chip length direction to the anti-reflection and high-reflection cavity surfaces 83, an accurate current path spanning multiple layers is achieved, enabling the injected current to be concentrated in the optimized lasing region, avoiding diffusion and aggregation towards the cavity surface, thereby reducing local overheating and the threshold current. The grooves 823 not only penetrate through the first and second p-type confinement layers 7 and the contact layer 8, but also directly act on the intersection interface with the cavity surface, and the filled insulating medium plays an effective electric field shielding role. This multi-layer insulation design effectively prevents leakage and short circuits from other regions, and improves the anti-interference ability of the overall device under high-frequency or pulsed operating conditions.

[0046] Furthermore, the groove 823 is designed to extend along the chip length direction to the antireflection and high-reflection cavity surface 83, which not only ensures that the current is strictly confined within the preset area but also affects the light field distribution inside the cavity to a certain extent. Through the matching design of the current and the light field distribution, the stability and output efficiency of the laser oscillation mode can be improved, and the lasing possibility of non-target modes can be reduced simultaneously. The width of the groove 823 is strictly controlled within the range of 0.5 μm to 1 μm, and it maintains a distance of at least 5 μm from the edge of the ridge waveguide structure. This size and spacing design not only meet the accuracy requirements of current semiconductor micro-nano processing but also provide sufficient process margins, reducing the negative impact of processing errors on the device performance and ensuring the consistency and reliability during mass production.

[0047] The sequentially stacked second p-type confinement layer 7 and contact layer 8 form a ridge waveguide structure, which is used to regulate the current to be gradually injected from the high-reflection cavity surface 83 towards the antireflection cavity surface 81 in the cavity length direction, thereby suppressing the thermal lens effect. The height of the ridge waveguide structure is 500 - 800 nm.

[0048] In this embodiment, by using the stacked second p-type confinement layer 7 and contact layer 8 to form a ridge waveguide structure, the current can be variably injected from the high-reflection cavity surface 83 towards the antireflection cavity surface 81 in the cavity length direction, effectively avoiding the phenomena of current concentration or uneven transition, and ensuring a uniform carrier distribution inside the laser. The progressive current injection makes the local heat distribution more uniform, thereby reducing the temperature gradient and significantly suppressing the thermal lens effect caused by local overheating. This is particularly crucial for maintaining the laser beam quality and frequency stability. The height of the ridge waveguide structure is controlled within the range of 500 - 800 nm, which not only helps to achieve a good optical waveguide effect but also plays an effective current confinement role, contributing to improving the matching between the light field and the electron state and enhancing the efficiency and stability of the laser operation.

[0049] The ratio of the ridge width of the ridge waveguide structure to the number of injection tips in the current injection sub-region 821 satisfies:

[0050] 8 ≤ L / n ≤ 12

[0051] Wherein, L represents the ridge width of the ridge waveguide structure, and n represents the number of injection tips in the current injection sub-region 821. By modulating the ratio of the ridge width of the ridge waveguide structure to the number of injection tips in the current injection sub-region 821, it is ensured that the ridge width occupied by each injection tip is within a suitable range, ensuring that each tip can obtain a similar injection current area. This makes the current distribution more uniform, effectively avoiding the current leakage imbalance phenomenon caused by local current concentration, and reducing the risk of hot spots and local overheating. Moreover, the balanced injection structure ensures the symmetry of the carrier distribution in the cavity, helps to stabilize the optical resonance mode, can better suppress the lasing of lateral high-order modes, so as to achieve a single-mode or multi-mode stable operation state, and improve the purity of the device beam and the signal quality.

[0052] In this embodiment, by arranging injection tips and blocking tips alternately in the contact layer 8, the injection position and distribution of current can be effectively controlled, reducing the problems of local current over-concentration or leakage, thereby reducing the risk of local overheating and the laser threshold. Moreover, the anti-reflection cavity surface 81, the functional region 82, and the high-reflection cavity surface 83 designed in the contact layer 8 provide a clear optical partition for the entire cavity. The reasonable configuration of the current injection and blocking functional region 82 makes the coupling between the injected carriers and the optical field more matched, which is beneficial to suppressing the lasing of non-target optical modes and improving the beam quality and spectral purity of the laser output. The two trenches 823 opened in the first p-type confinement layer 6 and passing through the second p-type confinement layer 7 and the contact layer 8 realize the gradual injection of current in the cavity length direction from the high-reflection cavity surface 83 towards the anti-reflection cavity surface 81, reducing the carrier density at the edge of the front cavity surface and the temperature gradient in the cavity length direction, thereby suppressing the thermal lens effect, reducing the gain of the high-order side modes accordingly, and increasing the output optical power. At the same time, by introducing a double-stripe structure laterally, the high-order modes can be effectively suppressed while enhancing the low-order modes. Furthermore, the broadening of the lateral divergence angle can be effectively suppressed, improving the beam quality.

[0053] This embodiment also provides a method for manufacturing a semiconductor laser chip with current modulation, used to manufacture a semiconductor laser chip with current modulation. The method includes:

[0054] Preparing an epitaxial wafer, which includes sequentially growing an n-type confinement layer 2, an n-type waveguide layer 3, a quantum well active region 4, a p-type waveguide layer 5, a first p-type confinement layer 6, a second p-type confinement layer 7, and a contact layer 8 on a substrate layer 1.

[0055] In this step, a suitable substrate material (such as GaAs or InP, etc.) is selected. After chemical cleaning and surface treatment, the substrate is loaded into the MOCVD reactor. First, an n-type confinement layer 2 is grown on the substrate. By precisely controlling the gas flow rate, temperature, and pressure, an appropriate amount of n-type dopant (such as silicon) is incorporated to form a uniform confinement layer. An n-type waveguide layer 3 is continuously grown on the n-type confinement layer 2, which is mainly used for current transmission and optical waveguide functions. A quantum well structure is formed on the n-type waveguide layer 3 through low-temperature growth technology. This layer is the light-emitting or lasing active region of the device, and usually, it is very crucial to control its layer thickness and interface quality. A p-type waveguide layer 5 is grown on the quantum well active region 4, which ensures both current transmission and symmetric optical waveguide. A first p-type confinement layer 6 is grown on the p-type waveguide layer 5 to limit the vertical diffusion of carriers and optimize the overall carrier distribution. Then, a second p-type confinement layer 7 is continuously grown to further ensure the confinement and isolation of the injected current. Finally, a contact layer 8 is grown on the outermost layer to provide excellent metal contact and low contact resistance.

[0056] The epitaxial wafer is taken out from the MOCVD reaction chamber. Etching is carried out starting from the contact layer 8 located on the uppermost layer of the epitaxial wafer, and part of the conductive medium in the second p-type confinement layer 7 and the contact layer 8 is etched away to expose the ridge waveguide structure formed by the second p-type confinement layer 7 and the contact layer 8.

[0057] In this step, after the epitaxial growth is completed, the temperature in the reaction chamber is reduced to a safe range, and then the epitaxial wafer is taken out from the MOCVD reactor. At this time, it is necessary to ensure that the epitaxial wafer is not contaminated by the environment. Usually, subsequent processing is carried out in a clean room environment. The surface of the epitaxial wafer is cleaned to remove possible residues or organic contaminants on the surface. A suitable photoresist is coated and soft-baked so that the photoresist can evenly cover the surface of the contact layer 8. The contact layer 8 region on the epitaxial wafer is exposed using a mask to form a predetermined ridge waveguide structure pattern. Selective etching process (which can be wet etching or dry etching such as reactive ion etching) is used to etch starting from the contact layer 8 on the uppermost layer of the epitaxial wafer. Control the etching depth so that part of the conductive medium in the second p-type confinement layer 7 and the contact layer 8 is etched away, exposing a well-behaved ridge waveguide structure composed of these two layers. After the etching is completed, the residual photoresist is removed, and then the epitaxial wafer is subjected to necessary cleaning and surface trimming to ensure that the exposed ridge waveguide structure after etching is flat and undamaged.

[0058] Double-stripe structure etching is carried out on the ridge waveguide structure to form a trench 823 that penetrates through the first p-type confinement layer 6, the second p-type confinement layer 7, and the contact layer 8, and SiO2 medium is filled in the trench 823; and

[0059] In this step, on the epitaxial wafer where the ridge waveguide structure has been formed, a layer of high-quality photoresist is uniformly coated. Using a high-resolution mask, a predefined double-stripe pattern is exposed in the ridge waveguide region. After exposure, development is carried out to form a photoresist pattern for etching. Dry etching processes such as reactive ion etching (RIE) or deep reactive ion etching (DRIE) are used, and the etching gas composition, power, pressure, and temperature are precisely adjusted to enable the etching process to proceed within the ridge waveguide structure and to penetrate through the first p-type confinement layer 6, the second p-type confinement layer 7, and the contact layer 8 simultaneously. After etching, two parallel trenches 823 (double-stripe structure) are formed in the ridge waveguide region, and the trenches 823 clearly expose the inner layer region. After the etching is completed, the residual photoresist and etching products are removed by an appropriate method (such as wet cleaning or plasma cleaning) to ensure that the edges of the trenches 823 are flat and free of harmful residues. By methods such as chemical vapor deposition (CVD) or plasma-enhanced chemical vapor deposition (PECVD), SiO2 is uniformly deposited onto the entire sample in a processing environment. After the SiO2 filling is completed, chemical mechanical planarization (CMP) or wet etching can be used to remove the excess SiO2 on the surface, leaving only the filling in the trenches 823, which not only ensures the insulating effect of the trenches 823 but also does not affect the subsequent submission design of the current injection region.

[0060] Current injection regions are etched in the contact layer 8, and a P-side electrode and an N-side electrode are sequentially fabricated on opposite sides of the epitaxial wafer to complete the fabrication of the semiconductor laser.

[0061] In this step, before etching, the surface of the epitaxial wafer is thoroughly cleaned to remove particles and residues. Subsequently, a layer of high-resolution photoresist is uniformly coated and pre-baked so that the photoresist can uniformly cover the surface of the contact layer 8. A mask with a current injection region pattern is fabricated, and this pattern determines the size and position of the current injection region. The mask is aligned with the photoresist on the epitaxial wafer, and through ultraviolet light exposure, the predefined pattern is transferred to the photoresist. After exposure, the sample is placed in a developer solution to remove the unexposed part of the photoresist, thereby forming a pattern mask for the current injection region. Using wet etching or dry etching (such as reactive ion etching RIE), part of the conductive medium in the contact layer 8 outside the region protected by the developed pattern is etched away to form the required current injection region. The etching depth should be strictly controlled during the etching process to ensure that only part of the material in the contact layer 8 is removed while not damaging the underlying structure (such as the second p-type confinement layer 7) to form an optimized injection region. After the etching is completed, a suitable stripping agent is used to remove the residual photoresist to obtain a clearly defined current injection region.

[0062] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims

1. A semiconductor laser chip with current modulation, characterized in that, It includes a substrate layer (1), an n-type confinement layer (2), an n-type waveguide layer (3), a quantum well active region (4), a p-type waveguide layer (5), a first p-type confinement layer (6), a second p-type confinement layer (7), and a contact layer (8) stacked in sequence from bottom to top. Among them, the contact layer (8) includes an anti-reflection cavity surface (81), a functional region (82), and a high-reflection cavity surface (83). The anti-reflection cavity surface (81) and the high-reflection cavity surface (83) are arranged on opposite sides of the second p-type confinement layer (7). The functional region (82) is arranged between the anti-reflection cavity surface (81) and the high-reflection cavity surface (83). The functional region (82) includes a current injection sub-region (821) and a current blocking sub-region (822). The current injection sub-region (821) has a plurality of injection tips, and the current blocking sub-region (822) has a plurality of blocking tips. The injection tips are arranged between any two adjacent blocking tips, and the injection tips and the blocking tips are arranged alternately. The projections of the current blocking sub-region (822) and the current injection sub-region (821) are on the same horizontal plane, and the current blocking sub-region (822) is higher than the current injection sub-region (821); two trenches (823) opened in the first p-type confinement layer (6) penetrate through the second p-type confinement layer (7) and the contact layer (8), and the two trenches (823) are located on opposite sides of the current injection sub-region (821) and the current blocking sub-region (822). The trenches (823) are filled with an insulating medium.

2. The semiconductor laser chip with current modulation as claimed in claim 1, wherein A first blocking groove is opened between the anti-reflection cavity surface (81) and the functional region (82) along the width direction of the semiconductor laser chip. A second blocking groove is opened between the high-reflection cavity surface (83) and the functional region (82) along the width direction of the semiconductor laser chip.

3. The semiconductor laser chip with current modulation according to claim 1, characterized in that The trenches (823) penetrate through the first p-type confinement layer (6), the second p-type confinement layer (7), and the contact layer (8), and the trenches (823) extend along the length direction of the semiconductor laser chip to the anti-reflection cavity surface (81) and the high-reflection cavity surface (83) respectively.

4. The semiconductor laser chip with current modulation according to claim 1, characterized in that, Both the injection tips and the blocking tips are isosceles triangles, and the apex angles of the injection tips and the blocking tips satisfy: 0.1≤tan(θ / 2)≤0.2 where θ represents the apex angle of the injection tip or the blocking tip.

5. The semiconductor laser chip with current modulation according to claim 1, characterized in that, The second p-type confinement layer (7) and the contact layer (8) stacked in sequence form a ridge waveguide structure. The ridge waveguide structure is used to regulate the gradual injection of current from the high-reflection cavity surface (83) towards the anti-reflection cavity surface (81) in the cavity length direction, thereby suppressing the thermal lens effect.

6. The semiconductor laser chip with current modulation according to claim 5, characterized in that, The ratio of the ridge width of the ridge waveguide structure to the number of injection tips in the current injection sub-region (821) satisfies: 8≤L / n≤12 where L represents the ridge width of the ridge waveguide structure, and n represents the number of injection tips in the current injection sub-region (821).

7. The semiconductor laser chip with current modulation according to claim 5, characterized in that, The height of the ridge waveguide structure is 500 - 800 nm.

8. The semiconductor laser chip with current modulation according to claim 5, characterized in that, The width of the groove (823) is 0.5 μm to 1 μm, and the distance between the groove (823) and the edge of the ridge waveguide structure is at least 5 μm.

9. The semiconductor laser chip with current modulation according to claim 1, characterized in that, The substrate layer (1) includes an n-type substrate and an n-type buffer layer, and both the n-type substrate and the n-type buffer layer include any one of GaAs, InP, GaSb, and GaN.

10. A method for preparing a semiconductor laser chip with current modulation, which is used to prepare the semiconductor laser chip with current modulation as described in any one of claims 1-9, characterized in that, Comprising: Preparing an epitaxial wafer, the epitaxial wafer includes an n-type confinement layer (2), an n-type waveguide layer (3), a quantum well active region (4), a p-type waveguide layer (5), a first p-type confinement layer (6), a second p-type confinement layer (7), and a contact layer (8) epitaxially grown in sequence on the substrate layer (1); Taking out the epitaxial wafer from the MOCVD reaction chamber, etching from the contact layer (8) located at the uppermost layer of the epitaxial wafer to etch away part of the conductive medium in the second p-type confinement layer (7) and the contact layer (8) to expose the ridge waveguide structure formed by the second p-type confinement layer (7) and the contact layer (8); Performing a double-stripe structure etching on the ridge waveguide structure to form a groove (823) penetrating through the first p-type confinement layer (6), the second p-type confinement layer (7), and the contact layer (8), and filling the groove (823) with SiO2 or SiN medium; and Etching a current injection region in the contact layer (8), and sequentially fabricating a P-side electrode and an N-side electrode on opposite sides of the epitaxial wafer to complete the fabrication of the semiconductor laser.

Images