Circuit board detection method and system based on machine vision

Through multi-angle image acquisition and visual information optimization processing combined with pre-trained models, the problem of missing defects in single-view data acquisition is solved, and the high accuracy and reliability of circuit board detection is achieved.

CN120451153AActive Publication Date: 2025-08-08GUIZHOU RADIO & TV UNIV +1

Patent Information

Application Number
CN202510944297.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-07-09
Publication Date
2025-08-08
Estimated Expiration
2045-07-09

AI Technical Summary

Technical Problem

Existing machine vision circuit board detection methods rely on single-view data acquisition, which easily misses defect information of complex structures, and manual design features are difficult to capture deep defect characteristics, resulting in insufficient detection accuracy and reliability.

Method used

Multi-angle image acquisition is used to obtain visual data with position marks, visual information optimization process is carried out to generate standardized images, and key feature recognition is performed in combination with the pre-trained defect discrimination model to generate defect type and position distribution feature information.

Benefits of technology

Through multi-view data covering the complex structure of the circuit board, eliminate lighting differences and equipment parameters, improve defect identification accuracy and positioning reliability, and generate structured detection result reports.

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Abstract

The invention provides a circuit board detection method and system based on machine vision, and the method comprises the steps: obtaining an original visual data set of a to-be-detected circuit board, carrying out the visual information optimization processing of the original visual data set, and obtaining a standardized image set with unified illumination intensity and contrast, calling a pre-trained defect discrimination model to perform key feature recognition processing on the standardized image set, generating a potential defect feature set of the circuit board in the image, and determining defect types existing in the to-be-detected circuit board and position distribution feature information of defects in the image according to the potential defect feature set, and generating a detection result report containing defect positioning coordinates based on the defect type and the position distribution feature information, and outputting the detection result report to a target display terminal to complete the detection process. According to the invention, the accuracy of defect identification is improved, and the reliability of defect positioning is ensured in combination with the position marking information, so that the overall quality of a circuit board detection result is effectively improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of machine vision and defect detection, and in particular to a circuit board detection method and system based on machine vision. Background Art

[0002] With the development of machine vision technology, machine vision-based circuit board inspection technology has emerged. This technology uses image acquisition and analysis to identify potential defects (such as opens, shorts, and cold solder joints) during the circuit board manufacturing process. Its core is to achieve automated defect detection through visual data processing and feature analysis, replacing traditional manual visual inspection or simple algorithm-based detection, thereby improving inspection efficiency and reliability. Currently, common machine vision circuit board inspection methods typically acquire visual data from a single view. After simple preprocessing of the captured image, defect identification is performed based on manually designed fixed features (such as edge detection and threshold segmentation), ultimately generating an inspection result that includes the defect location. However, this acquisition method, which relies solely on single-view data, easily misses defect information related to complex circuit board structures (such as the front and back surfaces and edge areas). Simple preprocessing cannot eliminate image lighting and contrast variations caused by different devices or angles. Manually designed feature methods struggle to capture deeper defect characteristics, such as abnormal pad textures and broken traces. Consequently, defect identification accuracy and location reliability are insufficient, making it difficult to meet the inspection requirements of high-precision circuit board manufacturing. Summary of the Invention

[0003] In view of this, an embodiment of the present invention provides a circuit board detection method and system based on machine vision. The technical solution of the present invention is implemented as follows: In one aspect, an embodiment of the present invention provides a circuit board detection method based on machine vision, the method comprising: Acquire an original visual data set of the circuit board to be inspected, wherein the original visual data set includes multiple sets of images with position marks acquired from multiple angles; Performing visual information optimization processing on the original visual data set to obtain a standardized image set with uniform illumination intensity and contrast; Calling a pre-trained defect discrimination model to perform key feature recognition processing on the standardized image set to generate a potential defect feature set of the circuit board in the image; Determining the defect type existing in the circuit board to be inspected and the position distribution feature information of the defect in the image according to the potential defect feature set; A detection result report including the defect location coordinates is generated based on the defect type and the location distribution characteristic information, and the detection result report is output to a target display terminal to complete the detection process.

[0004] On the other hand, the present invention provides a circuit board detection system, comprising a memory and a processor, wherein the memory stores a computer program that can be run on the processor, and the processor implements the steps in the above method when executing the program.

[0005] The circuit board detection method based on machine vision provided by the present invention can cover the complex structure of the circuit board by acquiring original visual data with position marks from multiple angles, avoiding defect areas that may be missed by single-view acquisition; optimizing visual information processing of the original data to generate standardized images, eliminating the image inconsistency problem caused by different illumination differences and different equipment parameters in multi-view acquisition, and providing a stable input basis for subsequent defect recognition; calling a pre-trained defect discrimination model to perform key feature recognition on the standardized image, and automatically extracting deep features related to the defect by using the self-learning ability of the model, avoiding the limitation of traditional methods relying on artificially designed features; determining the defect type and position distribution feature information based on the potential defect features obtained by recognition, combining the position mark information of the multi-view image, and ensuring the accuracy of defect positioning; generating a detection result report containing positioning coordinates based on the defect type and position distribution, and structuring and integrating the detection information to facilitate subsequent analysis and processing. Through the synergistic effect of the above steps, the method not only utilizes the comprehensiveness of multi-view data in the detection process, but also improves the accuracy of defect recognition through optimization processing and model recognition, and at the same time ensures the reliability of defect positioning by combining position mark information, thereby effectively improving the overall quality of the circuit board detection results.

[0006] It should be understood that the above general description and the following detailed description are merely exemplary and explanatory, and are not intended to limit the technical solutions of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The accompanying drawings herein are incorporated into and constitute a part of the specification. These drawings illustrate embodiments consistent with the present invention and, together with the specification, are used to explain the technical solutions of the present invention.

[0008] Figure 1 A schematic diagram of the implementation flow of a circuit board detection method based on machine vision provided in an embodiment of the present invention.

[0009] Figure 2 A schematic diagram of the hardware entity of a circuit board detection system provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0010] In order to make the purpose, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention are further elaborated in detail below with reference to the accompanying drawings and embodiments. The described embodiments should not be regarded as limiting the present invention. All other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0011] An embodiment of the present invention provides a machine vision-based circuit board inspection method that can be executed by a processor in a circuit board inspection system. The circuit board inspection system can be a computer system on a production line or a backend server in a smart factory, or other device with data processing capabilities.

[0012] Figure 1 A schematic diagram of the implementation flow of a circuit board detection method based on machine vision provided by an embodiment of the present invention is shown as follows: Figure 1 As shown, the method includes: Step S100: obtaining an original visual data set of a circuit board to be inspected, wherein the original visual data set includes a plurality of sets of images with position marks acquired from multiple angles.

[0013] Multi-angle acquisition means capturing images of the circuit board from different perspectives. This allows for comprehensive information on all parts of the board, avoiding occlusion or information loss that may occur from a single perspective. Position marking assigns position information to each set of captured images. This position information can be the camera's posture parameters when capturing the image, optical distortion parameters, etc. These parameters help to accurately determine the physical position of each part of the image on the actual circuit board during subsequent image analysis and processing. For example, in actual applications, multiple cameras can be distributed at different angles of the circuit board to simultaneously capture images of the circuit board. When capturing an image, each camera records its own position and posture information, such as the camera's coordinates and rotation angle. This information is saved as a position marker along with the captured image, forming multiple sets of images with position markers, which together constitute the original visual data set.

[0014] Step S200: performing visual information optimization processing on the original visual data set to obtain a standardized image set with uniform illumination intensity and contrast.

[0015] Visual information optimization processing aims to eliminate various interference factors in the original visual data set caused by varying acquisition conditions, ensuring that the images are consistent in terms of lighting intensity and contrast, facilitating subsequent feature recognition and defect detection. Uniform lighting intensity can mitigate the impact of uneven illumination caused by acquisition angles on image analysis, resulting in more uniform brightness across image regions. Uniform contrast can enhance the difference between the circuit board's outline and the background, highlighting the board's key features. A standardized image set is an optimized collection of images with uniform lighting intensity and contrast. These images are more stable and consistent in quality and feature representation, improving the accuracy and reliability of subsequent inspections.

[0016] As an embodiment, step S200 performs visual information optimization processing on the original visual data set to obtain a standardized image set with uniform illumination intensity and contrast, which can be specifically implemented as the following steps S210 to S250: Step S210: Perform illumination deviation correction processing on each set of images in the original visual data set, and eliminate the uneven illumination caused by different angles of acquisition by adjusting the brightness values of the image pixels to obtain an intermediate image set after illumination correction.

[0017] The purpose of illumination bias correction is to address uneven illumination in the original image due to multi-angle capture. Images captured at different angles may appear overly bright (overexposed) in some areas and underexposed (underexposed) in others due to varying light directions and intensities. This can affect the subsequent accurate recognition of circuit board features within the image. By adjusting the brightness of the image pixels, the overall illumination intensity of the image can be made more uniform. The set of intermediate images after illumination bias correction is the result of initial optimization of the illumination, but further processing such as contrast enhancement and noise suppression is still required. For example, in practice, a set of circuit board images captured from different angles may have the upper left corner of one image appear overly bright due to direct sunlight, while the lower right corner appears overly dark due to shadows. Illumination bias correction can appropriately reduce the brightness of the pixels in the overly bright areas and increase the brightness of the pixels in the underlying areas, achieving more uniform illumination across the image.

[0018] As an embodiment, step S210 performs illumination deviation correction processing on each set of images in the original visual data set, and adjusts the brightness values of the image pixels to eliminate the illumination unevenness caused by different angles of acquisition, thereby obtaining an intermediate image set after illumination correction. Specifically, the following steps S211 to S215 can be implemented: Step S211: Calculate the global average value of the pixel brightness values in the image as the reference illumination intensity of the current image.

[0019] The global average of pixel brightness values in an image is the sum of the brightness values of all pixels in the image, divided by the total number of pixels. This average serves as the image's baseline illumination intensity, allowing for subsequent determination of overexposure or underexposure in various areas. For example, consider a 100×100 pixel image of a circuit board, where each pixel has a brightness range of 0–255. Adding the brightness values of these 10,000 pixels and dividing by 10,000 yields the image's baseline illumination intensity.

[0020] Step S212: extracting overexposed areas with brightness values higher than a reference light intensity and underexposed areas with brightness values lower than the reference light intensity in the image.

[0021] Overexposed areas are regions in an image where the brightness is higher than the baseline illumination intensity. These areas often suffer from loss of image information and inability to clearly display details due to excessive light intensity. Underexposed areas are regions where the brightness is lower than the baseline illumination intensity. These areas may appear too dark due to insufficient light, which also affects the recognition of features in the image. Extracting overexposed and underexposed areas can provide a basis for subsequent brightness adjustments. For example, for a circuit board image with a calculated baseline illumination intensity of 120, each pixel in the image is traversed, and pixels with brightness values greater than 120 are marked as overexposed pixels, while pixels with brightness values less than 120 are marked as underexposed pixels. This process can be implemented using image processing algorithms (such as threshold segmentation algorithms), which segment the image into overexposed and underexposed regions by setting the baseline illumination intensity as the threshold.

[0022] Step S213: performing linear attenuation processing on the pixel brightness value of the overexposed area to adjust the brightness value to within a preset range of the reference light intensity.

[0023] Linear attenuation processing linearly reduces the brightness value of pixels in the overexposed area so that its brightness value gradually approaches the baseline light intensity. The preset range refers to a reasonable range set near the baseline light intensity, for example, it can be set to the baseline light intensity ±10. Adjusting the pixel brightness value of the overexposed area to this preset range can avoid the brightness of the overexposed area being too high while maintaining the overall brightness balance of the image. For example, for a pixel with a brightness value of 200 in the overexposed area, assuming the baseline light intensity is 120, the preset range is 110-130. The linear attenuation formula can be used: new brightness value = baseline light intensity + (original brightness value - baseline light intensity) × attenuation coefficient, where the attenuation coefficient can be adjusted according to actual conditions so that the brightness value of the pixel gradually decreases to within the preset range.

[0024] Step S214: performing linear enhancement processing on the pixel brightness values of the underexposed area to increase the brightness values to within a preset range of the reference light intensity.

[0025] Similar to linear attenuation, linear enhancement linearly increases the brightness of pixels in underexposed areas, gradually bringing them closer to the baseline illumination intensity. By increasing the brightness of pixels in underexposed areas to within a preset range, image information in these areas can be enhanced, making details more visible. For example, for a pixel in an underexposed area with a brightness of 50, assuming the baseline illumination intensity is 120, the preset range is 110-130. The linear enhancement formula can be used: New Brightness = Baseline Intensity - (Baseline Intensity - Original Brightness) × Enhancement Factor. The enhancement factor is adjusted based on the actual situation, gradually increasing the brightness of the pixel to within the preset range.

[0026] Step S215: performing brightness smoothing processing on the processed image to eliminate the brightness mutation boundary between the overexposed area and the underexposed area, and generating a set of intermediate images after illumination correction.

[0027] Brightness smoothing is used to avoid noticeable brightness changes between overexposed and underexposed areas during the brightness adjustment process. These changes can affect the overall visual quality of the image and subsequent feature recognition. Brightness smoothing can make the brightness transitions in the image more natural and continuous. For example, a Gaussian filter can be used to smooth the processed image. Gaussian filtering is a linear smoothing filter that smooths the image by taking a weighted average of each pixel and its neighboring pixels. In practical applications, an appropriate Gaussian kernel size and standard deviation are selected and filtered to eliminate brightness changes, generating a set of intermediate images after illumination correction.

[0028] Step S220: performing contrast enhancement processing on the intermediate image set after illumination correction, and improving the contrast difference between the circuit board outline and the background area in the image based on the dynamic range extension technology of the image grayscale histogram to obtain a contrast-enhanced transition image set.

[0029] Contrast enhancement is used to highlight the outlines and key features of a circuit board in an image, making them more distinct from the background. An image's grayscale histogram is a statistical graph used to represent the grayscale distribution of an image, showing the number of pixels at each grayscale level. Dynamic range expansion techniques adjust the image's grayscale histogram to expand the image's grayscale value range to a wider range, thereby enhancing image contrast. A set of contrast-enhanced transition images is a collection of images obtained after contrast enhancement, resulting in significantly improved contrast, providing a better foundation for subsequent noise suppression and feature recognition. For example, a set of illumination-corrected circuit board images may have a grayscale histogram that shows grayscale values concentrated within a narrow range, resulting in low image contrast. Dynamic range expansion techniques expand the grayscale value range from the original narrow range to a wider range, making the grayscale difference between the circuit board's outline and the background more apparent. Dynamic range expansion can be achieved using a histogram equalization algorithm, which redistributes the image's grayscale histogram to make the number of pixels at each grayscale level more uniform, thereby enhancing image contrast.

[0030] Step S230: performing noise suppression processing on the contrast-enhanced transition image set, using a non-local mean filtering algorithm to reduce random noise interference in the image, retaining edge detail information of key structures of the circuit board, and obtaining a noise-suppressed optimized image set.

[0031] Noise suppression is used to remove random noise from images. This noise can be caused by factors such as camera sensor noise and ambient light interference, which can affect the subsequent accurate recognition of circuit board features. The non-local means filtering algorithm is a block-based filtering algorithm that removes noise by searching for similar pixel blocks within the image and performing a weighted average of the pixel values of these similar blocks. This algorithm has the advantage of effectively preserving image edge details while removing noise, avoiding the edge blurring that can occur with traditional filtering algorithms. The optimized image set for noise suppression is a set of images obtained after noise suppression. These images have effectively reduced noise while preserving edge details of key circuit board structures, providing clearer image data for subsequent feature recognition and defect detection. For example, a contrast-enhanced circuit board image may contain some random salt-and-pepper noise. The non-local means filtering algorithm first selects an appropriate search window and matching window size. It then searches for similar pixel blocks within the search window, calculates their similarity, and performs a weighted average to obtain the new pixel value. By performing such processing on each pixel of the image, the noise in the image is removed and a noise-suppressed optimized image set is obtained.

[0032] Step S240: performing size normalization processing on the noise-suppressed optimized image set, adjusting images at different acquisition angles to the same pixel size, ensuring spatial dimension consistency for subsequent feature recognition, and obtaining a size-normalized standard image set.

[0033] Size normalization eliminates differences in pixel size between images acquired at different angles, ensuring that all images have the same spatial dimensions. Images acquired at different angles may have different resolutions and sizes, which can complicate subsequent feature recognition. Size normalization adjusts all images to the same pixel size, ensuring that features from different images have the same spatial dimensions during feature recognition, facilitating comparison and analysis. A size-normalized standard image set is a set of size-normalized images that have consistent pixel dimensions, providing uniform input data for subsequent feature recognition and defect detection. For example, consider a set of PCB images acquired from different angles, one with a resolution of 800×600 and the other with a resolution of 1000×800. A unified target size, such as 900×700, can be selected. An image scaling algorithm, such as bilinear interpolation, can then be used to resize both images to 900×700.

[0034] Step S250: Input the size-normalized standard image set into the color space conversion module for color correction processing to unify the color representation space of the image, eliminate the color deviation caused by device acquisition, and generate a standardized image set with uniform illumination intensity and contrast.

[0035] Color correction is designed to eliminate color deviations that may occur when images are captured by different devices, ensuring consistent color representation across all images. The color space conversion module is a tool for color correction. It converts images from one color space to another and performs color adjustments based on pre-set standards. Unifying the image color space ensures color comparability across images, preventing color deviations from affecting the identification of PCB color features. A standardized image set with uniform lighting intensity and contrast is the final image set obtained after color correction. These images exhibit consistent lighting intensity, contrast, and color representation, providing high-quality image data for subsequent defect identification and classification. For example, when different cameras capture PCB images, color deviations may occur in the captured images due to factors such as sensor differences and different white balance settings. The color space conversion module converts the size-normalized standard image set from its current color space (such as RGB) to a unified color space and performs color adjustments based on a pre-set standard color palette to eliminate color deviations.

[0036] As an embodiment, step S250 inputs the size-normalized standard image set into the color space conversion module for color correction processing, unifies the color representation space of the images, eliminates color deviation caused by device acquisition, and generates a standardized image set with uniform illumination intensity and contrast. Specifically, the following steps S251 to S256 can be implemented: Step S251: extracting color features of a preset reference area in a size-normalized standard image set, where the reference area is a fixed identification point of known color on a circuit board.

[0037] A preset reference area refers to a fixed, pre-set marker point with a known color on a circuit board. These marker points can be patterns, markings, or other items on the board. The purpose of extracting the color features of the preset reference area is to determine the actual color of that area in the image for comparison and correction with a standard color chart. Color features can include information such as the RGB value, chroma, and brightness. For example, a circular mark on the circuit board is selected as the preset reference area. The color of this mark is known by design (e.g., red, with an RGB value of 255,0,0). Using an image processing algorithm, this circular mark is located within a set of size-normalized standard images, and its color features are extracted. An image segmentation algorithm can be used to segment this reference area from the image. The average RGB value of all pixels within this area is then calculated as the color feature of the reference area.

[0038] Step S252: calling the reference color card matching unit of the color space conversion module to obtain a standard color card sample corresponding to the color feature of the reference area, wherein the standard color card sample includes a reference color value consistent with the color of the fixed identification point of the circuit board.

[0039] The reference color card matching unit is a key component of the color space conversion module, used to store and match standard color card samples. Standard color card samples are a series of samples with known colors, containing reference color values that correspond to the colors of fixed markings on the circuit board. The reference color card matching unit is called to compare the extracted reference area color features with the standard color card samples to find the standard color card sample that best matches them. For example, for an extracted reference area color feature (RGB values of 252, 3, 2), the reference color card matching unit searches its stored standard color card samples for the closest matching sample. For example, if a standard color card sample with reference color values of 255, 0, 0 is found, this sample is the standard color card sample corresponding to the reference area color feature. In practical implementation, a color distance calculation algorithm (such as the Euclidean distance algorithm) can be used to measure the similarity between the reference area color feature and the reference color values of the standard color card sample, selecting the sample with the smallest distance as the matching result.

[0040] Step S253: Calculate the color difference vector between the color feature of the reference area in the standard image set and the reference color value of the standard color card sample, where the color difference vector includes the brightness difference value and the chromaticity difference value of the RGB three channels.

[0041] The color difference vector describes the difference between the color characteristics of the reference area and the reference color value of the standard color sample. It contains the luminance difference and chromaticity difference values of the three RGB channels. The luminance difference value reflects the difference in brightness between the two colors, while the chromaticity difference value reflects the difference in hue and saturation. Calculating the color difference vector provides a basis for subsequent color adjustments. The chromaticity difference value can be obtained by converting the RGB values to another color space (such as the HSV color space) and then calculating the difference in hue and saturation. In actual calculations, the RGB values can be converted to HSV values using the color space conversion formula and then the corresponding difference value can be calculated.

[0042] Step S254: Based on the color difference vector, linear adjustment processing is performed on the full image color of the standard image set. The luminance difference value of the corresponding channel is subtracted from the RGB value of each pixel point and the chromaticity difference value is corrected to make the color characteristics of the reference area consistent with the reference color value of the standard color card sample.

[0043] Linear adjustment adjusts the RGB values of each pixel in the standard image set based on the calculated color difference vector to eliminate color deviation. Subtracting the luminance difference value of the corresponding channel from the RGB value of each pixel brings the overall brightness of the image closer to that of the standard color sample. Correcting chromaticity differences can make the image's colors more accurate in hue and saturation. For example, for a pixel in the standard image set, its RGB value is (200, 100, 50), and the luminance differences of the three RGB channels in the color difference vector are -3, 3, and 2, respectively. The adjusted RGB value is (200 - (-3), 100 - 3, 50 - 2) = (203, 97, 48). Furthermore, the pixel's color is further corrected based on the chromaticity difference value to bring it closer to that of the standard color sample. In practice, linear transformation formulas are used to calculate the RGB value of each pixel, combined with color space conversion and interpolation algorithms to correct chromaticity differences.

[0044] Step S255: Perform color consistency verification on the adjusted image set, extract the color features of the same reference area in multiple groups of images, calculate the average difference between them and the reference color values of the standard color card samples, and re-execute the color adjustment process if the average difference exceeds the preset tolerance until the color consistency requirements are met.

[0045] Color consistency verification is a crucial step in ensuring color consistency across a set of color-adjusted images. By extracting color features from common reference areas across multiple image sets, the actual color of these critical areas after color adjustment can be determined. Calculating the average difference between these features and the reference color values of a standard color card sample quantifies the degree of color deviation across the entire image set. A preset tolerance is a pre-set threshold used to determine whether color consistency has been achieved. If the average difference exceeds this threshold, the color adjustment process has not yet achieved the desired effect, and re-adjustment is necessary to further eliminate color deviation. For example, for a set of color-adjusted circuit board images, the color features of a common reference area (such as a marker on the circuit board) are extracted. These color features are compared with the reference color values of a standard color card sample. The difference between each reference area's color features and the reference color values is calculated, and all differences are averaged to obtain the average difference. If the average difference exceeds a preset tolerance (e.g., 5%), the image set is re-adjusted based on the color difference vector and color consistency verification is repeated until the average difference meets the preset tolerance. When actually calculating the average difference, a color distance calculation method (such as Euclidean distance) can be used to measure the difference between the color characteristics of each reference area and the reference color value of the standard color card sample, and then all difference values are added together and divided by the number of reference areas to obtain the average difference.

[0046] Step S256: Outputting the image set that has passed the color consistency verification as a standardized image set with uniform illumination intensity and contrast.

[0047] When the average difference of an image set meets the preset tolerance requirements after color consistency verification, it means that the image set has reached the color consistency standard. At the same time, because the illumination intensity and contrast have been optimized before, the image set now has a uniform illumination intensity, contrast, and color representation space. It is output as a standardized image set with uniform illumination intensity and contrast, providing high-quality, consistent image data for subsequent defect identification and classification. For example, after completing color consistency verification, it is confirmed that the average difference between the reference area color of each image in the image set and the reference color value of the standard color card sample is within the preset tolerance range. At this time, the image set is saved in a set file format (such as JPEG, PNG, etc.) and marked as a standardized image set for use in subsequent steps.

[0048] Step S300: calling a pre-trained defect discrimination model to perform key feature recognition processing on a standardized image set, and generating a potential defect feature set of the circuit board in the image.

[0049] A pre-trained defect detection model is trained using a large amount of training data and can identify potential defect features in PCB images. Key feature identification is the model's primary function. By analyzing and processing a standardized image set, it identifies key features associated with PCB defects. A potential defect feature set is a collection of features identified by the model as potentially indicative of defects. These features require further analysis and verification to determine if they are actual defects. For example, in practical applications, a convolutional neural network (CNN) can be used as a pre-trained defect detection model. During the training phase, this model utilizes a large number of PCB images containing various defect types, learning the characteristic patterns corresponding to different defect types. When the standardized image set is fed into the model, it performs operations such as convolution and pooling to extract image features. Then, through a fully connected layer, it performs classification and discrimination, identifying areas potentially containing defects and generating a potential defect feature set.

[0050] As an implementation method, step S300 calls a pre-trained defect discrimination model to perform key feature recognition processing on a standardized image set to generate a set of potential defect features of the circuit board in the image. Specifically, the following steps S310 to S350 can be implemented: Step S310: Input the standardized image set into the feature extraction layer of the defect discrimination model, perform hierarchical abstract processing on the pixel information of the image through the convolutional neural network, and generate a basic feature set including the texture features and structural features of the circuit board.

[0051] The feature extraction layer is a crucial component of the defect detection model. Its primary function is to extract useful feature information from the input image. A convolutional neural network (CNN) is a deep learning model specifically designed for processing image data. It performs hierarchical abstraction of image pixel information through operations such as convolution and pooling layers. This hierarchical abstraction process starts with the raw pixel information and gradually extracts higher-level, more abstract features. The basic feature set, generated after processing by the feature extraction layer, includes both the texture and structural features of the circuit board. Texture features reflect the surface texture of the circuit board, such as the thickness and spacing of traces; structural features reflect the overall structure and layout of the circuit board, such as the location of pads and the direction of traces. For example, in a CNN-based defect detection model, the feature extraction layer includes multiple convolutional and pooling layers. When a standardized image set is input to this layer, the first convolutional layer convolves the image with a set of convolution kernels to extract low-level features, such as edges and corners. These features are then downsampled by the pooling layer to reduce the number of features and the computational effort. Subsequent convolutional layers will further extract higher-level features based on the low-level features, and ultimately generate a basic feature set that includes circuit board texture features and structural features.

[0052] Step S320: Use the attention mechanism module of the defect discrimination model to perform importance evaluation on the basic feature set, focus on the feature information of key areas such as circuit board pads and traces, suppress redundant features in the background area, and obtain an attention-enhanced key feature set.

[0053] The attention mechanism module is designed to increase the model's focus on features in key areas. In PCB images, areas such as pads and traces are critical areas prone to defects, while features in background areas contribute little to defect detection and are considered redundant. Importance assessment involves the attention mechanism module evaluating each feature in the basic feature set to determine its importance for defect detection. Focusing on features in key areas allows the model to pay more attention to these areas where defects may be present, improving defect detection accuracy. Suppressing redundant features in background areas reduces unnecessary computation and interference, improving model efficiency. The attention-enhanced key feature set is the feature set processed by the attention mechanism module, where feature information in key areas is enhanced and redundant features in background areas are suppressed. For example, in a defect detection model, the attention mechanism module can employ an attention weight-based approach. First, an attention weight is calculated for each feature in the basic feature set, indicating its importance for defect detection. The attention weight is then multiplied element-wise by the basic feature set to enhance the response of important features and suppress the response of unimportant features. Finally, the attention-enhanced key feature set is obtained.

[0054] As an implementation method, step S320 uses the attention mechanism module of the defect discrimination model to perform importance evaluation processing on the basic feature set, focusing on the feature information of key areas such as PCB pads and traces, suppressing redundant features in the background area, and obtaining an attention-enhanced key feature set. Specifically, it can be implemented as follows: Steps S321 to S325: Step S321: Calculate feature activation values for the texture features and structural features in the basic feature set respectively. The feature activation value indicates the contribution of the feature to defect recognition.

[0055] The feature activation value is a metric used to measure the importance of each feature to defect identification. Calculating the feature activation values for texture features and structural features in the basic feature set can more accurately assess the contribution of each feature. For example, for texture features, the feature activation value can be determined by calculating their similarity with the texture features of known defects. The higher the similarity, the greater the contribution of the texture feature to defect identification, and the higher the feature activation value. For structural features, the feature activation value can be calculated based on their position and morphology in key areas of the circuit board (such as pads and traces). Structural features located in key areas and with abnormal morphology have higher feature activation values. In actual calculations, machine learning algorithms (such as support vector machines and logistic regression) can be used to classify and evaluate features to obtain the feature activation value of each feature.

[0056] Step S322: Generate a feature importance weight map based on the feature activation values, where high activation value areas in the weight map correspond to feature positions of key structures of the circuit board.

[0057] A feature importance weight map is a visualization tool that uses color or grayscale values to represent the importance of each feature. Regions with high activation values appear as darker colors or higher grayscale values in the weight map. These regions correspond to the characteristic locations of key circuit board structures, such as pads and traces. Generating a feature importance weight map based on feature activation values can intuitively demonstrate which regions' features are more important for defect detection. For example, the calculated feature activation values can be normalized to a range of 0-1, and then the normalized feature activation values can be used as the pixel values for the corresponding locations in the weight map. In this way, features with high activation values appear as brighter areas in the weight map, while features with low activation values appear as darker areas. By observing the weight map, the characteristic locations of key circuit board structures can be quickly located.

[0058] Step S323: perform element-by-element multiplication of the feature importance weight map and the basic feature set to enhance the feature response of the high activation value area and suppress the feature response of the low activation value area.

[0059] The purpose of element-by-element multiplication of the feature importance weight map with the base feature set is to adjust the base feature set based on feature importance. Features in high-activation regions, due to their corresponding larger weights in the weight map, are enhanced after multiplication. Features in low-activation regions, on the other hand, are associated with smaller weights, resulting in their response being suppressed. This emphasizes the feature information in key regions and reduces interference from redundant features in background regions. For example, for a feature matrix and a feature importance weight map in the base feature set, the corresponding elements are multiplied to produce an adjusted feature matrix. This process increases the eigenvalues in key regions and decreases those in background regions, thereby enhancing and suppressing features.

[0060] Step S324: normalize the processed feature set to ensure that the distribution range of the feature values is consistent with the model input requirements.

[0061] Normalization is done to ensure that the eigenvalues of the processed feature set are distributed within an appropriate range to meet the model input requirements. Different models have different requirements for the value range of input features. If the distribution range of eigenvalues is inconsistent, it may affect the performance and training effect of the model. Through normalization, the eigenvalues can be unified into a standard range, such as 0-1 or -1-1. For example, the minimum-maximum normalization method can be used to calculate the minimum and maximum values of each feature in the processed feature set, then subtract the minimum value from each eigenvalue, and then divide it by the difference between the maximum and minimum values to obtain the normalized eigenvalue. This ensures that the distribution range of the eigenvalues is consistent with the model input requirements, improving the stability and accuracy of the model.

[0062] Step S325: Output the normalized feature set as the key feature set for attention enhancement.

[0063] After the previous steps, the basic feature set undergoes feature activation value calculation, feature importance weight map generation, feature response adjustment, and normalization, resulting in a new feature set. This feature set enhances feature information in key areas, suppresses redundant features in background areas, and ensures that the distribution of feature values aligns with model input requirements. This is output as the key feature set for attention enhancement, providing more focused and effective feature data for subsequent defect detection and classification. For example, the normalized feature set can be saved in a specific data format (such as a NumPy array) and passed to subsequent modules in the model for further processing.

[0064] Step S330: Perform spatial position correlation analysis on the key feature set for attention enhancement through the feature correlation layer of the defect discrimination model, establish feature correspondences of the same circuit board area in different images, and generate a correlation feature set with spatial consistency.

[0065] The feature association layer is a module in the defect discrimination model that processes feature associations between different images. Spatial position association analysis involves analyzing the attention-enhanced key feature set to identify corresponding relationships between features of the same PCB region in different images. In actual inspections, PCB images may be captured from multiple angles, and features of the same PCB region in these images may vary. By establishing feature correspondences, these features from different angles can be associated and fused to generate a spatially consistent set of associated features. A spatially consistent set of associated features can more accurately reflect the actual PCB conditions and improve defect detection accuracy. For example, in a system that uses multiple cameras to capture PCB images from different angles, each camera's image undergoes the aforementioned processing to generate an attention-enhanced key feature set. The feature association layer analyzes these feature sets to identify corresponding relationships between features of the same PCB region (such as a pad) in different images. These features are then fused to generate a spatially consistent set of associated features.

[0066] As an implementation method, step S330 performs spatial position correlation analysis on the key feature set for attention enhancement through the feature correlation layer of the defect discrimination model, establishes feature correspondences of the same circuit board area in different images, and generates a set of correlated features with spatial consistency. Specifically, the following steps S331 to S336 can be implemented: Step S331: Extract the feature key points of each image in the attention-enhanced key feature set. The feature key points are feature positions with unique spatial identifiers such as pad edges and trace intersections on the circuit board.

[0067] Keypoints are points on a circuit board with unique spatial locations and characteristics, such as pad edges and trace intersections. These points can serve as reference points for feature association between different images. By extracting these keypoints, the location of the same circuit board area in different images can be determined. For example, for a circuit board image in an attention-enhanced key feature set, feature detection algorithms (such as SIFT and SURF) are used to extract keypoints from the image. These algorithms analyze local features of the image to identify points with unique characteristics, such as edges and corners. In circuit board images, pad edges and trace intersections are typically distinct and easy to detect. These detected keypoints are recorded as the keypoints of the image.

[0068] Step S332: coordinate matching processing is performed on the feature key points of different images, and a spatial transformation matrix of the multi-view image is established based on the position mark information of the image acquisition. The spatial transformation matrix is used to convert the coordinates of the feature key points of any image into a unified global coordinate system coordinate.

[0069] Coordinate matching is used to identify the correspondence between key features of the same circuit board area in different images. Based on the positional information captured during image acquisition (such as camera pose parameters and optical distortion parameters), a spatial transformation matrix for multi-view images can be established. This matrix converts the coordinates of key features in different images into a unified global coordinate system, allowing them to be compared and correlated within the same coordinate system. For example, for two circuit board images captured from different perspectives, a feature matching algorithm (such as a descriptor-based matching algorithm) is first used to identify the correspondence between key features in the two images. Then, based on the camera pose parameters and optical distortion parameters recorded during image acquisition, a computer vision algorithm (such as perspective transformation or affine transformation) is used to calculate the spatial transformation matrix. This matrix converts the coordinates of key features in one image into the corresponding global coordinate system of the other image.

[0070] Step S333: Mapping the coordinates of the feature key points of each image to the global coordinate system using the spatial transformation matrix to generate a global coordinate set containing multi-view feature key points.

[0071] By using a spatial transformation matrix to map the coordinates of each image's keypoints to a global coordinate system, keypoints from different viewpoints can be unified into a single coordinate system, facilitating subsequent feature association and analysis. A global coordinate set encompassing multi-view keypoints is the coordinate set obtained by mapping the keypoint coordinates of all images to the global coordinate system. This set includes keypoint information for circuit board images captured from multiple viewpoints. For example, the coordinates of each image's keypoints are transformed using the calculated spatial transformation matrix to convert them into coordinates in the global coordinate system. The transformed keypoint coordinates from all images are then merged to generate a global coordinate set encompassing multi-view keypoints.

[0072] Step S334: performing similarity measurement processing on the feature key points in the global coordinate set, and calculating the cosine similarity of the feature descriptors at the same global coordinate position in different images, where the feature descriptors contain texture gradient and structural direction information of the feature key points.

[0073] The similarity measurement process is used to evaluate the degree of similarity between feature key points at the same global coordinate position in different images. Cosine similarity is a commonly used similarity measurement method that measures the similarity between two vectors by calculating the cosine value of the angle between them. Feature descriptors contain texture gradient and structural direction information of feature key points, which can more comprehensively describe the characteristics of feature key points. By calculating the cosine similarity of feature descriptors at the same global coordinate position in different images, it can be determined whether these feature key points belong to the features of the same circuit board area. For example, for each global coordinate position in the global coordinate set, the feature descriptors of the feature key points at that position in different images are extracted, and then the cosine similarity between these feature descriptors is calculated. The higher the cosine similarity, the more similar the feature key points are and the more likely they are to belong to the features of the same circuit board area.

[0074] Step S335: Mark the feature key points whose cosine similarity exceeds the preset matching threshold as corresponding feature points of the same circuit board area, and establish a feature correspondence table between the multi-view images.

[0075] The preset matching threshold is a pre-set similarity threshold used to determine whether two feature key points belong to the same circuit board region. When the cosine similarity of two feature key points exceeds the preset matching threshold, they are considered to be corresponding feature points belonging to the same circuit board region. Establishing a feature correspondence table between multi-view images can record the correspondence between feature key points of the same circuit board region in different images, providing a basis for subsequent feature fusion. For example, for the calculated cosine similarity, feature key point pairs that exceed the preset matching threshold (such as 0.8) are marked as corresponding feature points of the same circuit board region, and these correspondences are recorded in a table. Each row of the table records the coordinates of the feature key points of the same circuit board region in the two images and the corresponding image number.

[0076] Step S336: performing weighted fusion processing on the key feature sets of each image based on the feature correspondence table, taking a weighted average of the similarity of multi-view features of the same circuit board area, and generating a set of associated features with spatial consistency.

[0077] Weighted fusion processing fuses multi-view features of the same circuit board area in different images based on a feature correspondence table. The multi-view features of the same circuit board area are weighted averaged by similarity. This means that the weight of each feature is determined based on the cosine similarity between the feature key points, with the higher the similarity, the greater the feature weight. In this way, features from different viewpoints can be effectively fused to generate a set of spatially consistent associated features. For example, for the multi-view features of the same circuit board area recorded in the feature correspondence table, the weight of each feature is calculated based on the cosine similarity between them. These features are then multiplied by their corresponding weights and added together to obtain the fused features for that circuit board area. This fusion process is performed on the features of all circuit board areas, ultimately generating a set of spatially consistent associated features.

[0078] Step S340: Call the anomaly detection sub-model of the defect discrimination model to perform defect possibility assessment processing on the associated feature set, identify areas with significant differences from the standard circuit board features, and obtain a preliminary defect candidate feature set.

[0079] The anomaly detection submodel is a module within the defect discrimination model specifically designed to detect abnormal features. Defect likelihood assessment is performed by analyzing the associated feature set to identify areas with significant differences from the standard PCB features. Standard PCB features refer to the characteristic patterns of normal PCBs. By comparing the associated feature set with the standard PCB features, areas likely to contain defects can be identified. The preliminary defect candidate feature set is a set of features likely to contain defects, obtained after testing by the anomaly detection submodel. These features require further filtering and verification to determine if they are true defects. For example, within the anomaly detection submodel, statistical methods (such as Gaussian distribution models and kernel density estimation) can be used to build a model of standard PCB features. Each feature in the associated feature set is then compared with the standard model to calculate its degree of difference. Areas with a difference exceeding a preset threshold are considered likely to contain defects, and their features are output as the preliminary defect candidate feature set.

[0080] Step S350: Perform false detection filtering on the preliminary defect candidate feature set, eliminate pseudo-defect features caused by image noise or normal structural variation based on a preset feature similarity threshold, and generate a potential defect feature set of the circuit board in the image.

[0081] False positive filtering is used to remove possible pseudo-defect features from the initial defect candidate feature set. Image noise or normal structural variation may cause some features to appear different from standard PCB features, but they are not actually defects. A preset feature similarity threshold is used to determine whether a feature is a pseudo-defect feature. When a feature's similarity to a normal PCB feature exceeds the preset feature similarity threshold, it is considered a pseudo-defect feature and excluded from the initial defect candidate feature set. The resulting set of potential defect features for the PCB in the image is the set of features obtained after false positive filtering. These features are more likely to be true defect features, providing more accurate feature data for subsequent defect type determination and location. For example, for each feature in the initial defect candidate feature set, its similarity to the normal PCB feature is calculated (e.g., cosine similarity, Euclidean distance, etc.). Features whose similarity exceeds the preset feature similarity threshold (e.g., 0.9) are excluded as pseudo-defect features, and the remaining features are output as the potential defect feature set.

[0082] Step S400: Determine the defect type existing in the circuit board to be inspected and the position distribution feature information of the defect in the image according to the potential defect feature set.

[0083] The potential defect feature set contains characteristic information about potential defects on the circuit board. Based on this characteristic information, the defect type and location distribution can be determined. Defect types can include open circuit defects, short circuit defects, cold solder joint defects, etc., and different defect types have different characteristic manifestations. The location distribution feature information of the defect in the image can help locate the position of the defect on the actual circuit board, providing a basis for subsequent repair and treatment. For example, by analyzing the degree of feature difference and feature identification information in the potential defect feature set, the type of defect can be determined. Based on the pixel coordinate position of the defect area in the image and the position mark information of the image acquisition, the physical location of the defect on the actual circuit board can be determined, and its location distribution characteristics, such as defect distribution density and cluster area boundaries, can be analyzed.

[0084] As an embodiment, step S400, determining the defect type and the position distribution feature information of the defect in the circuit board to be inspected in accordance with the potential defect feature set, can be specifically implemented as follows: S410 to S450: Step S410: analyzing the degree of feature difference in the potential defect feature set, and extracting feature identification information corresponding to different defect types, wherein the feature identification information includes an open circuit defect identification, a short circuit defect identification, and a cold solder joint defect identification.

[0085] The goal of analyzing the degree of feature difference within a potential defect feature set is to identify features that differ significantly from normal PCB features. These differing features may be associated with different defect types. Extracting feature identifiers corresponding to different defect types is to determine the defect type based on these differing features. Open, short, and cold solder joints are predefined feature identifiers used to identify different defect types and can be derived by analyzing and summarizing a large number of defect samples. For example, for each feature in the potential defect feature set, the degree of difference (e.g., cosine similarity, Euclidean distance, etc.) from normal PCB features is calculated. Features whose differences exceed a preset threshold are further analyzed to extract feature identifiers corresponding to different defect types. For open defects, possible feature identifiers include line interruption and abnormally increased resistance; for short defects, possible feature identifiers include abnormal connectivity between lines and abnormally increased current; and for cold solder joints, possible feature identifiers include abnormal solder joint shape and insufficient solder joint strength.

[0086] Step S420: coordinate positioning processing is performed on the defect area in the potential defect feature set, the pixel coordinate position of the defect in the image is recorded, and a mapping relationship between the defect position and the actual physical position of the circuit board is established in combination with the position mark information of the image acquisition.

[0087] Coordinate localization processing is used to determine the specific location of the defect area within the image. By recording the pixel coordinates of the defect within the image, the defect's position within the image can be accurately located. Mapping the defect location to the actual physical location of the PCB is established by combining the position marker information acquired during image capture. This allows the defect's position in the image to be converted to its physical location on the PCB. The position marker information acquired during image capture can include camera pose parameters and optical distortion parameters. These parameters help correct for coordinate deviations in the image and achieve accurate position mapping. For example, for each defect area in the potential defect feature set, image processing algorithms (such as edge detection and contour extraction) are used to determine its pixel coordinate location within the image. Then, based on the camera pose parameters and optical distortion parameters recorded during image capture, computer vision algorithms (such as perspective transformation and affine transformation) are used to map the defect location to the actual physical location of the PCB.

[0088] As an implementation method, in step S420, a mapping relationship between the defect location and the actual physical location of the circuit board is established in combination with the position mark information of the image acquisition, which can be specifically implemented as the following steps S421 to S426: Step S421: extracting the position mark information of the image where the pixel coordinate position of the defect area is located, where the position mark information includes the camera posture parameters and optical distortion parameters during image acquisition.

[0089] The location marker information in the image where the pixel coordinates of the defect area are located is an important basis for establishing a mapping relationship between the defect location and the actual physical location of the circuit board. Camera pose parameters, including the camera's coordinates and rotation angle, determine the camera's position and posture during image acquisition. Optical distortion parameters, including lens distortion coefficients, can be used to correct for distortion errors in the image. For example, in an image acquisition system, the corresponding camera pose parameters and optical distortion parameters are recorded for each image. Once the pixel coordinates of the defect area are determined, its location marker information is extracted from the corresponding image record.

[0090] Step S422: calling pre-stored circuit board three-dimensional model data to obtain theoretical projection coordinates of the circuit board area corresponding to the image in the three-dimensional model. The theoretical projection coordinates are calculated by inputting the three-dimensional model vertex coordinates into the camera projection model.

[0091] The pre-stored 3D model data of the circuit board is a pre-established 3D model of the circuit board, which contains all the structural and dimensional information of the circuit board. The theoretical projection coordinates of the circuit board area corresponding to the image in the 3D model are obtained by inputting the vertex coordinates of the 3D model into the camera projection model for calculation. The camera projection model is a mathematical model used to project points in 3D space onto a 2D image plane. The projection coordinates can be calculated based on the camera's pose parameters and optical distortion parameters. For example, for an image with known camera pose parameters and optical distortion parameters, the vertex coordinates of the pre-stored 3D model of the circuit board are input into the camera projection model to calculate the theoretical projection coordinates of the circuit board area corresponding to the image in the 3D model.

[0092] Step S423: Calculate the coordinate offset between the pixel coordinate position of the defect area and the theoretical projection coordinate, where the coordinate offset includes pixel offset values in the x-axis and y-axis directions.

[0093] Calculating the coordinate offset between the defect area's pixel coordinates and the theoretical projection coordinates can determine the difference between the defect area's actual and theoretical positions in the image. The coordinate offset includes pixel offset values in the x- and y-axis directions, which reflect the positional deviation of the defect area in the image. For example, for the defect area's pixel coordinates (x1, y1) and the theoretical projection coordinates (x2, y2), the coordinate offset is calculated (Δx = x1 - x2, Δy = y1 - y2). This coordinate offset can be used for subsequent distortion correction and position mapping.

[0094] Step S424: performing distortion correction processing on the coordinate offset based on the camera posture parameters and the optical distortion parameters to eliminate the coordinate offset error caused by the lens distortion and obtain the corrected coordinate offset.

[0095] Lens distortion is an error that can occur when a camera captures an image, causing coordinate positions in the image to shift. Correcting the coordinate offset based on the camera's pose parameters and optical distortion parameters can eliminate this error and produce a more accurate coordinate offset. For example, the camera's optical distortion model (such as the radial distortion model and the tangential distortion model) can be used to correct the coordinate offset. Based on the camera's optical distortion parameters, the coordinate offset is transformed accordingly to eliminate the coordinate offset error caused by lens distortion, resulting in a corrected coordinate offset.

[0096] Step S425: converting the corrected coordinate offset into the actual physical size, and converting the pixel offset value into a physical offset value in millimeters using a proportional coefficient between the pixel size and the actual physical size.

[0097] Converting the corrected coordinate offset to actual physical dimensions is done to convert the positional deviation of the defect area from pixel units to actual physical units (e.g., millimeters). This conversion is achieved by using the scaling factor between pixel size and actual physical size. For example, given the image pixel size and the corresponding actual physical size, the scaling factor can be calculated. Multiplying the corrected coordinate offset (Δx, Δy) by the scaling factor yields the millimeter-level physical offset value (ΔX, ΔY).

[0098] Step S426: Add the three-dimensional model position corresponding to the theoretical projection coordinates to the physical offset value to generate the positioning coordinates of the defect area in the actual physical space of the circuit board, and complete the establishment of the mapping relationship between the defect position and the actual physical position of the circuit board.

[0099] By adding the 3D model position corresponding to the theoretical projection coordinates to the physical offset value, the exact location of the defect area in the actual physical space of the PCB can be determined. This method establishes a mapping relationship between the defect location and the actual physical location of the PCB. For example, given the 3D model position (X0, Y0, Z0) corresponding to the theoretical projection coordinates and the physical offset value (ΔX, ΔY), the coordinates of the defect area in the actual physical space of the PCB are generated (X=X0+ΔX, Y=Y0+ΔY, Z=Z0).

[0100] Step S430: Analyze the geometric features of the defect area, including the area size, shape regularity and edge clarity of the defect area, and generate defect morphology description parameters.

[0101] Analyzing the geometric features of a defect area can help further understand the nature and severity of the defect. The area of the defect area can reflect the scale of the defect; a larger area may indicate a more severe defect. Shape regularity can determine whether the defect's shape is regular; an irregular shape may indicate a complex cause. Edge clarity can reflect whether the defect's boundary is clear; a clear edge may indicate a relatively stable defect formation process. Generating defect morphology description parameters involves quantifying and integrating these geometric features to form a set of parameters used to describe the defect's morphology. For example, for a defect area, image processing algorithms (such as area calculation algorithms, shape analysis algorithms, and edge detection algorithms) are used to calculate its area, shape regularity, and edge clarity. These calculation results are combined into a vector to serve as the defect morphology description parameters.

[0102] As an embodiment, step S430 analyzes the geometric features of the defect area, including the area size, shape regularity, and edge clarity of the defect area, and generates defect morphology description parameters, which can be specifically implemented as the following steps S431 to S435: Step S431: performing connected component analysis on the pixel coordinates of the defect area to determine a set of boundary pixels of the defect area.

[0103] Connected component analysis is an algorithm used to partition interconnected pixels in an image into distinct regions. Connected component analysis can be performed on the pixel coordinates of a defect region to identify the boundary pixel set of the defect region. This boundary pixel set is the demarcation between the defect region and the background region and contains information about the defect region's shape. For example, a connected component analysis algorithm (such as one based on depth-first search or breadth-first search) can be used to partition the pixel coordinates of a defect region into distinct connected regions. The boundary pixel points of each connected region are then identified to form the boundary pixel set of the defect region.

[0104] Step S432: Calculate the area of the defect region based on the boundary pixel set. The area is obtained by counting the total number of pixels in the area surrounded by the boundary pixel points.

[0105] Calculating the size of a defect region based on a set of boundary pixels is accomplished by counting the total number of pixels within the area enclosed by these boundary pixels, accurately calculating the area of the defect region. For example, for a set of boundary pixels in a defect region, a scanline fill algorithm is used to fill the area enclosed by the boundary pixels. The total number of pixels within the filled area is then counted to determine the area of the defect region.

[0106] Step S433: extracting the coordinate sequence of the boundary pixel point set, and calculating the angle change rate between adjacent boundary pixel points as the shape regularity index of the defect area.

[0107] Extracting the coordinate sequence of a set of boundary pixels can reveal the boundary shape of the defect area. Calculating the rate of change of angles between adjacent boundary pixels can measure the regularity of the defect area's shape. A smaller rate of change indicates a more regular shape; a larger rate of change indicates a more irregular shape. For example, for the coordinate sequence of a set of boundary pixels, the vectors between two adjacent boundary pixels are calculated, followed by the angle between these vectors. The rate of change of the angle is used as an indicator of the regularity of the defect area's shape.

[0108] Step S434: performing edge sharpness detection on the boundary pixel set, and calculating the average grayscale difference between the boundary pixel points and the non-boundary pixel points as the edge clarity index of the defect area.

[0109] Edge sharpness testing of a set of boundary pixels can assess the clarity of the defect area's boundaries. Calculating the mean grayscale difference between boundary and non-boundary pixels quantifies edge sharpness. A larger mean grayscale difference indicates a sharper boundary; a smaller mean grayscale difference indicates a more blurred boundary. For example, for a set of boundary pixels, find its adjacent non-boundary pixels and calculate the grayscale difference between them. Then, calculate the mean of these grayscale differences to serve as an indicator of the defect area's edge sharpness.

[0110] Step S435: combining the area size, shape regularity index and edge clarity index to generate defect morphology description parameters.

[0111] Combining area size, shape regularity, and edge clarity to generate a defect morphology description parameter integrates and quantifies the geometric features of the defect area, forming a comprehensive description parameter. This parameter can be used for subsequent defect classification and assessment. For example, the area size, shape regularity, and edge clarity indicators can be arranged in a specific order to form a vector, which can be used as the defect morphology description parameter.

[0112] Step S440: Determine the specific defect type corresponding to the defect area based on matching the preset defect type classification rules based on the feature identification information and the defect morphology description parameters.

[0113] The purpose of matching preset defect type classification rules based on feature identification information and defect morphology description parameters is to determine the specific defect type based on the defect's characteristics and morphology. The preset defect type classification rules are a set of pre-established rules that classify different defect types based on their feature identification information and morphological characteristics. For example, if a defect area's feature identification information indicates a possible open defect, and its defect morphology description parameters indicate a small area, regular shape, and clear edges, then the preset defect type classification rules will determine that the specific defect type corresponding to this defect area is an open defect.

[0114] Step S450: performing spatial statistical analysis on the pixel coordinate positions of the defect area to generate position distribution feature information including defect distribution density and cluster area boundaries.

[0115] Spatial statistical analysis of the pixel coordinates of defect areas can reveal the distribution of defects within the image. Generating location distribution features, including defect density and cluster boundaries, can intuitively demonstrate the distribution patterns of defects. Defect density reflects the density of defects within the image, while cluster boundaries identify areas where defects are concentrated. For example, spatial statistical analysis methods (such as kernel density estimation and cluster analysis) are used to calculate the defect density based on the pixel coordinates of defect areas. Clustering algorithms (such as DBSCAN) are then used to identify areas of defect clustering and determine their boundaries. The defect density and cluster boundary information are combined to form location distribution features.

[0116] Step S500: Generate a detection result report including defect location coordinates based on the defect type and location distribution feature information, and output the detection result report to the target display terminal to complete the detection process.

[0117] Generating an inspection result report containing defect location coordinates based on defect type and location distribution characteristics organizes and summarizes the detected defect information into a detailed report. This report includes information such as defect type, location distribution characteristics, and defect location coordinates, helping users quickly understand the defect status of the circuit board. Outputting the inspection result report to a target display terminal to complete the inspection process involves presenting the report to the user, allowing them to intuitively review the inspection results. For example, a pre-set report template is populated with defect type, location distribution characteristics, and defect location coordinates to generate an inspection result report. The report is then sent to a target display terminal (such as a computer monitor or mobile phone screen) in an appropriate format (e.g., PDF, HTML) for display.

[0118] As an embodiment, step S500 generates a detection result report including defect location coordinates based on defect type and location distribution characteristic information, which can be specifically implemented as the following steps S510 to S550: Step S510: extracting a preset report template corresponding to the defect type, wherein the report template includes a defect type description field, a location mark field, and a morphology description field.

[0119] Extracting preset report templates corresponding to defect types allows you to generate reports tailored to each defect type. These pre-designed report templates contain essential information, including fields for defect type description, location annotation, and morphology description. These fields can be used to fill in specific defect information, making the report more standardized and detailed. For example, for an open defect, extract the corresponding preset report template, which includes fields for the open defect description, defect location annotation, and defect morphology description.

[0120] Step S520: Fill the specific name of the defect type into the defect type description field to complete the structured record of the defect type information.

[0121] Filling the Defect Type Description field with the specific name of the defect type clarifies the defect type described in the report. Structuring defect type information makes reports clearer and easier to understand. For example, for a detected open defect, fill the Defect Type Description field with the specific name "Open Defect." You can also add some detailed information about the open defect, such as possible causes and impacts.

[0122] Step S530: based on the defect distribution density and the clustered area boundary in the position distribution feature information, draw an outline of the defect area in the position annotation field, and annotate the actual physical position coordinates of the defect.

[0123] Based on the defect density and cluster boundaries in the location distribution feature information, a graphical outline of the defect area can be drawn in the location annotation field to visually demonstrate the defect distribution. Marking the actual physical location coordinates of the defect accurately locates the defect on the circuit board. For example, using a drawing tool (such as Python's Matplotlib library) to draw an outline of the defect area in the location annotation field based on the defect density and cluster boundaries recorded in the location distribution feature information, the actual physical location coordinates of the defect are marked on the graphic, allowing report users to quickly locate the defect.

[0124] Step S540: Fill the area size, shape regularity and edge clarity in the defect morphology description parameters into the morphology description field to complete the quantitative recording of the defect morphology information.

[0125] Filling the morphological description parameters of the defect, such as area, shape regularity, and edge clarity, into the morphological description field allows for a detailed description of the defect's morphological characteristics. Quantifying defect morphological information makes the report more objective and accurate. For example, for a defect's morphological description parameters, fill the morphological description field with the area, shape regularity, and edge clarity values. You can also add explanations and analysis of these parameters within this field to help report users better understand the defect's morphological condition.

[0126] Step S550: Perform a logical check on the information in each field of the report template to ensure the consistency between the defect type and the morphological description and the correspondence between the position coordinates and the actual physical location, and generate a test result report including the defect location coordinates.

[0127] Logical verification of each field in the report template is a crucial step in ensuring the accuracy and reliability of the report content. Consistency between defect type and morphological description means that the defect type described in the report should match the defect's morphological characteristics. For example, an open defect may have specific morphological characteristics, such as a line interruption. If the defect type described in the report is an open defect, but the morphological description matches the characteristics of a short defect, there is a logical inconsistency. Correspondence between location coordinates and actual physical location means that the defect location coordinates noted in the report should accurately correspond to the physical location on the PCB, without any coordinate deviations or errors. Logical verification can promptly identify and correct report errors, generating accurate and reliable inspection result reports containing defect location coordinates. For example, within the defect type description and morphological description fields in the report template, check whether the typical morphological characteristics corresponding to the defect type match those in the morphological description field. For the coordinate information in the location annotation field, combine the location marker information from the image capture with the previously established mapping relationship to verify that the coordinates accurately correspond to the actual physical location. If logical inconsistencies or correspondence errors are detected, make appropriate corrections and adjustments until the information in each field meets the logical requirements.

[0128] As an embodiment, step S550 performs a logical check on each field information in the report template to ensure the consistency between the defect type and the morphological description and the correspondence between the location coordinates and the actual physical location, and generates a test result report including the defect location coordinates. Specifically, the following steps S551 to S555 are implemented: Step S551: Verify the matching between the defect type in the defect type description field and the feature identification information to ensure that the defect type name is consistent with the defect identification in the feature identification information.

[0129] Verifying that the defect type in the defect type description field matches the feature identification information is an important step in logical verification. The feature identification information is the identifier corresponding to different defect types extracted from the potential defect feature set in the previous step, reflecting the essential characteristics of the defect. The defect type name should accurately correspond to the defect identifier in the feature identification information to ensure that the description of the defect type in the report is accurate. For example, if the feature identification information extracts an open circuit defect identifier, such as a line interruption or abnormal increase in resistance, then the defect type name in the defect type description field should be "open circuit defect" and not other unrelated defect types. Ensure consistency between the defect type name and the defect identifier in the feature identification information one by one. If a mismatch is found, it is necessary to review the defect type determination process, accurately determine the defect type based on the feature identification information, and correct the defect type description field in the report.

[0130] Step S552: Verify the degree of overlap between the defect outline graphic in the location annotation field and the clustering area boundary in the location distribution feature information to ensure that the outline graphic accurately reflects the spatial distribution of the defect.

[0131] The purpose of checking the degree of overlap between the defect contour graphic in the location annotation field and the clustering area boundary in the location distribution feature information is to ensure that the spatial distribution of the defect in the report is accurate. The clustering area boundary in the location distribution feature information is obtained by performing spatial statistical analysis on the pixel coordinate position of the defect area, and represents the actual distribution range of the defect. The defect contour graphic should be highly overlapped with this clustering area boundary in order to accurately display the spatial distribution of the defect to the report user. For example, the overlap ratio between the defect contour graphic and the clustering area boundary is calculated using image processing and geometric calculation methods. If the overlap ratio is lower than the preset threshold (such as 90%), it means that the contour graphic may be inaccurately drawn or the location is incorrectly marked. At this time, it is necessary to readjust the drawing of the defect contour graphic based on the clustering area boundary in the location distribution feature information to ensure that it accurately reflects the spatial distribution of the defect.

[0132] Step S553: Verify the consistency between the area size in the morphological description field and the actual total number of pixels in the defect area to ensure that the morphological description parameters match the geometric features of the defect area.

[0133] Verifying the consistency between the area size in the morphological description field and the actual total number of pixels in the defect area is an important check on the accuracy of the defect morphological description. In the previous step, the actual area size of the defect area was obtained by counting the total number of pixels in the area surrounded by the boundary pixels, and the area size in the morphological description field should be consistent with it. If the two are inconsistent, it means that there may be an error in the area calculation or morphological description filling process. For example, use the same area calculation method again (such as the scan line filling algorithm to count the total number of pixels) to calculate the area of the defect area and compare it with the area size in the morphological description field. If it is found that the difference exceeds a certain error range (such as 5%), it is necessary to recheck the area calculation process and the filling of the morphological description, and make corrections to ensure that the morphological description parameters match the geometric characteristics of the defect area.

[0134] Step S554: Retroactively correct the field information that fails the verification, and re-extract or recalculate the information of the corresponding field until the verification passes.

[0135] When it is found during the logical verification process that certain field information does not meet the requirements, it is necessary to retroactively correct the field information that failed the verification. Retroactive correction means returning to the previous related steps and re-extracting or calculating the information of the corresponding field. For example, if a mismatch is found when verifying the matching of the defect type and the feature identification information, it is necessary to return to step S410, re-analyze the degree of feature difference in the potential defect feature set, accurately extract the feature identification information corresponding to different defect types, and then determine the defect type based on the correct feature identification information and correct the defect type description field. If a problem is found when checking the overlap between the defect contour graphic in the position marking field and the boundary of the aggregation area, it is necessary to return to step S450, re-perform spatial statistical analysis on the pixel coordinate position of the defect area, determine the accurate boundary of the aggregation area, and then redraw the defect contour graphic. Continuously retroactively correct until all field information passes the logical verification.

[0136] Step S555: Format the information of each field that has passed the verification and generate a test result report including the defect location coordinates.

[0137] Formatting the verified fields involves organizing and formatting the logically verified and corrected fields according to a pre-set report template to generate the final inspection report, including the defect location coordinates. This formatting includes adjusting the font, size, color, and alignment of each field to achieve a more standardized and aesthetically pleasing report appearance. The report's overall structure should also be optimized, adding necessary elements such as titles, page numbers, and figure captions to enhance readability. For example, fields such as the defect type description, location annotation, and morphology description should be arranged according to the report template layout, with clear captions next to each field. Defect outline graphics and related statistical charts should be appropriately scaled and adjusted for clarity within the report. Finally, all information should be saved in a suitable file format (such as PDF, DOCX, etc.) to generate a complete inspection report, including the defect location coordinates.

[0138] As an embodiment, in step S500, the detection result report is output to the target display terminal to complete the detection process, which can be specifically implemented as the following steps S560 to S5100: Step S560: converting the detection result report into an image format supported by the target display terminal, where the image format includes a bitmap format and a vector graphics format.

[0139] Converting the test result report into an image format supported by the target display terminal is to ensure that the report can be displayed normally on the target display terminal. Different target display terminals may support different image formats. Common bitmap formats include JPEG, PNG, etc., and vector graphic formats include SVG, etc. Bitmap formats are suitable for displaying image content with rich colors and details, while vector graphic formats have the advantage of being infinitely scalable without distortion, making them suitable for displaying graphics and charts that require precise drawing. For example, if the target display terminal is an ordinary computer monitor, it may support a variety of common image formats. The test result report can be converted to JPEG format, which has a high compression ratio and wide compatibility. If the target display terminal requires precise scaling and editing of the graphics in the report, such as professional design software, the report can be converted to SVG format. Use image processing software or related file conversion tools to convert the test result report into a suitable image format according to the requirements of the target display terminal.

[0140] Step S570: The original image of the circuit board is superimposed on the image of the inspection result report as a background layer, and the outline graphic of the defect location coordinates is superimposed and displayed as a semi-transparent foreground layer.

[0141] Overlaying the original PCB image as the background layer and the defect location coordinates outline graphic as the foreground layer in a semi-transparent overlay in the inspection result report provides a more intuitive representation of the defect location for the report user. The original PCB image allows the user to understand the overall structure and layout of the PCB, while the defect location coordinates outline graphic highlights the defect location. The semi-transparent overlay allows both the PCB information in the background layer and the defect outline graphic in the foreground layer to be clearly visible, making it easier to compare the defect location with the normal PCB structure. For example, using image processing software (such as Adobe Photoshop or GIMP), overlay the original PCB image with an image containing the defect location coordinates outline graphic. Set the defect location coordinates outline graphic to a semi-transparent setting (e.g., 50%) and then position it over the original PCB image, overlaying the two. By adjusting the degree of translucency and the position of the foreground layer, ensure that the overlaid image is clear, aesthetically pleasing, and accurately conveys the defect location information.

[0142] Step S580: Add a dynamic annotation label to the contour graphic of the defect location coordinates, where the annotation label includes a brief description of the defect type name and morphological description parameters.

[0143] Adding dynamic annotation labels to the defect location coordinate outline graphic can further enhance the report's informational capabilities. These labels contain the defect type name and a brief description of the morphological parameters, allowing report users to quickly understand the basic characteristics of each defect without having to read the report text. Dynamic annotation labels can be displayed or hidden during report presentation based on user actions (such as mouse hovers and clicks), increasing report interactivity. For example, using interactive image processing or document editing software (such as Adobe Acrobat Pro or HTML5 + JavaScript) to add dynamic annotation labels to the defect location coordinate outline graphic. When the user hovers the mouse over a defect outline graphic, a pop-up label displays the defect type name (such as "Open") and a brief description of the morphological parameters (such as "Small Area, Irregular Shape, Clear Edges"). By setting appropriate fonts, colors, and styles, the annotation labels can be clear and easy to read, and blend in with the overall report style.

[0144] Step S590: Set the display interaction function of the test result report to support viewing the detailed morphological description information of the defect by hovering the mouse and viewing the original image of the corresponding defect area by clicking to jump.

[0145] Configuring interactive display features in inspection result reports can improve report efficiency and user experience. Hovering the mouse to view detailed defect morphological descriptions allows users to obtain detailed information about each defect without taking up too much report space. Clicking to view the original image of the corresponding defect area allows users to gain a deeper understanding of the defect's specific details and compare the original image with the defect outline in the report. For example, using web development technologies (such as HTML, CSS, and JavaScript) or professional document editing software (such as Adobe InDesign) to add interactive features to inspection result reports. Bind mouseover and click events to the outline of each defect's location coordinates. When the mouse hovers over the outline, JavaScript code dynamically displays detailed morphological descriptions, including specific values and analysis, such as defect size, shape regularity, and edge clarity. Clicking the outline will redirect users to the original image of the corresponding defect area via a link or script, allowing users to view the high-resolution original image. To ensure the smoothness and stability of interactive features, thorough testing and optimization are carried out to ensure proper operation across different devices and browsers.

[0146] Step S5100: Send the configured test result report to the target display terminal for visual display, completing the test process.

[0147] Sending the configured test result report to the target display terminal for visual display is the final step in the entire PCB inspection process. By sending the report to the target display terminal, such as a computer monitor, mobile screen, or large display screen, relevant personnel can intuitively view the test results and make appropriate decisions. Different delivery methods can be used depending on the target display terminal. If the target display terminal is a local computer or device, the report file can be directly copied to the corresponding storage location and opened for display. If the target display terminal is a remote device, the report can be sent via network transmission methods such as email, FTP, or cloud storage. For example, the configured test result report can be saved in PDF format and emailed to the relevant quality inspectors or engineers. After receiving the email, they can open the attached report file and visualize it on their computer or mobile device, viewing detailed information such as defect type, location, and morphology. Based on the report results, they can make subsequent repairs and improvements, thus completing the entire PCB inspection process.

[0148] It is understandable that the various algorithms involved in the above-mentioned introductions of the embodiments of the present invention, such as the cosine distance algorithm, clustering algorithm, interpolation algorithm, etc., can all be learned from the relevant content in the prior art. In order to save space, they will not be expanded too much in the embodiments of the present invention. In addition, when implementing the scheme of the present invention, those skilled in the art can supplement the details according to the common knowledge in this field. For example, according to the common knowledge in this field, normalization can be used to eliminate dimensional conflicts before feature fusion, interpolation can be used to eliminate dimensional differences, and thresholds can be reasonably set based on historical data, experience or business scenario requirements. The model can be trained based on a general model training method, and the number of layers in the model structure can be set based on actual needs, the activation function can be selected, etc. The present invention will no longer provide redundant introductions to the overly detailed implementation process.

[0149] Figure 2 A schematic diagram of the hardware entity of a circuit board detection system provided by an embodiment of the present invention is shown as follows: Figure 2 As shown, the hardware entity of the circuit board detection system 1000 includes: a processor 1001 and a memory 1002, wherein the memory 1002 stores a computer program that can be run on the processor 1001, and the processor 1001 implements the steps in the method of any of the above embodiments when executing the program.

[0150] The memory 1002 stores computer programs that can be run on the processor. The memory 1002 is configured to store instructions and applications executable by the processor 1001. It can also cache data to be processed or processed by the processor 1001 and each module in the circuit board detection system 1000 (for example, image data, audio data, voice communication data and video communication data). It can be implemented through flash memory (FLASH) or random access memory (RAM).

[0151] When the processor 1001 executes the program, the steps of any of the above-mentioned circuit board inspection methods based on machine vision are implemented. The processor 1001 generally controls the overall operation of the circuit board inspection system 1000.

[0152] The above description is only an embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with this technical field can easily think of changes or replacements within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A circuit board detection method based on machine vision, characterized in that: The method comprises: Acquire an original visual data set of the circuit board to be inspected, wherein the original visual data set includes multiple sets of images with position marks acquired from multiple angles; Performing visual information optimization processing on the original visual data set to obtain a standardized image set with uniform illumination intensity and contrast; Calling a pre-trained defect discrimination model to perform key feature recognition processing on the standardized image set to generate a potential defect feature set of the circuit board in the image; Determining the defect type existing in the circuit board to be inspected and the position distribution feature information of the defect in the image according to the potential defect feature set; A detection result report including the defect location coordinates is generated based on the defect type and the location distribution characteristic information, and the detection result report is output to a target display terminal to complete the detection process.

2. The circuit board detection method based on machine vision according to claim 1, characterized in that: The performing visual information optimization processing on the original visual data set to obtain a standardized image set with uniform illumination intensity and contrast includes: Performing illumination deviation correction processing on each set of images in the original visual data set, eliminating the uneven illumination caused by different angles of acquisition by adjusting the brightness values of image pixels, and obtaining an intermediate image set after illumination correction; Performing contrast enhancement processing on the intermediate image set after illumination correction, and improving the contrast difference between the circuit board outline and the background area in the image based on the dynamic range extension technology of the image grayscale histogram, to obtain a contrast-enhanced transition image set; Performing noise suppression on the contrast-enhanced transition image set, using a non-local mean filtering algorithm to reduce random noise interference in the image, retaining edge detail information of key structures of the circuit board, and obtaining a noise-suppressed optimized image set; Performing size normalization processing on the noise-suppressed optimized image set, adjusting images from different acquisition angles to the same pixel size to ensure spatial dimension consistency for subsequent feature recognition, and obtaining a size-normalized standard image set; The size-normalized standard image set is input into the color space conversion module for color correction processing, thereby unifying the color representation space of the image, eliminating the color deviation caused by device acquisition, and generating a standardized image set with uniform illumination intensity and contrast.

3. The circuit board detection method based on machine vision according to claim 2, characterized in that: The calling of the pre-trained defect discrimination model to perform key feature recognition processing on the standardized image set to generate a set of potential defect features of the circuit board in the image includes: Inputting the standardized image set into the feature extraction layer of the defect discrimination model, performing hierarchical abstract processing on the pixel information of the image through a convolutional neural network to generate a basic feature set including the texture features and structural features of the circuit board; The attention mechanism module of the defect discrimination model is used to perform importance evaluation on the basic feature set, focusing on feature information of key areas such as PCB pads and traces, suppressing redundant features in background areas, and obtaining an attention-enhanced key feature set; Performing spatial position correlation analysis on the attention-enhanced key feature set through the feature correlation layer of the defect discrimination model, establishing feature correspondences of the same circuit board area in different images, and generating a correlation feature set with spatial consistency; Calling the anomaly detection submodel of the defect discrimination model to perform defect possibility assessment processing on the associated feature set, identifying areas with significant differences from standard circuit board features, and obtaining a preliminary defect candidate feature set; The preliminary defect candidate feature set is subjected to false detection filtering processing, and pseudo-defect features caused by image noise or normal structural variation are eliminated based on a preset feature similarity threshold to generate a potential defect feature set of the circuit board in the image.

4. The circuit board detection method based on machine vision according to claim 1, characterized in that: The determining, based on the potential defect feature set, the defect type present in the circuit board to be inspected and the position distribution feature information of the defect in the image frame includes: Analyzing the degree of feature difference in the potential defect feature set and extracting feature identification information corresponding to different defect types, wherein the feature identification information includes an open circuit defect identification, a short circuit defect identification, and a cold solder joint defect identification; Performing coordinate positioning processing on the defect area in the potential defect feature set, recording the pixel coordinate position of the defect in the image, and establishing a mapping relationship between the defect position and the actual physical position of the circuit board in combination with the position mark information acquired by the image; Analyzing the geometric features of the defect area, including the area size, shape regularity and edge clarity of the defect area, to generate defect morphology description parameters; Determine the specific defect type corresponding to the defect area based on matching the preset defect type classification rules with the feature identification information and the defect morphology description parameters; A spatial statistical analysis is performed on the pixel coordinate positions of the defect area to generate position distribution feature information including defect distribution density and cluster area boundaries.

5. The circuit board detection method based on machine vision according to claim 1, characterized in that: The generating of a detection result report including defect location coordinates based on the defect type and the location distribution characteristic information includes: Extracting a preset report template corresponding to the defect type, the report template comprising a defect type description field, a location mark field, and a morphology description field; Fill the specific name of the defect type into the defect type description field to complete the structured record of the defect type information; According to the defect distribution density and the clustered area boundary in the position distribution feature information, a contour graphic of the defect area is drawn in the position annotation field, and the actual physical position coordinates of the defect are annotated; Filling the area size, shape regularity and edge clarity in the defect morphology description parameters into the morphology description field to complete the quantitative recording of the defect morphology information; A logical check is performed on the information of each field in the report template to ensure the consistency of the defect type and morphological description and the correspondence of the position coordinates with the actual physical location, and a detection result report containing the defect location coordinates is generated.

6. The circuit board detection method based on machine vision according to claim 3, characterized in that: The illumination deviation correction processing is performed on each set of images in the original visual data set, and the illumination unevenness caused by different angles of acquisition is eliminated by adjusting the brightness values of the image pixels to obtain an intermediate image set after illumination correction, including: Calculating the global average of the pixel brightness values in the image as the reference light intensity of the current image; Extracting overexposed areas whose brightness values are higher than a reference light intensity and underexposed areas whose brightness values are lower than the reference light intensity in the image; Performing linear attenuation processing on the pixel brightness value of the overexposed area to adjust the brightness value to a preset range of the reference light intensity; Performing linear enhancement processing on the pixel brightness value of the underexposed area to increase the brightness value to a preset range of the reference light intensity; Perform brightness smoothing on the processed image to eliminate the brightness abrupt boundary between overexposed and underexposed areas, and generate a set of intermediate images after illumination correction. The attention mechanism module of the defect discrimination model is used to perform importance evaluation processing on the basic feature set, focusing on the feature information of key areas such as circuit board pads and traces, suppressing redundant features in background areas, and obtaining an attention-enhanced key feature set, including: Calculating feature activation values for the texture features and structural features in the basic feature set, respectively, wherein the feature activation values represent the contribution of the feature to defect recognition; Generating a feature importance weight map based on the feature activation values, wherein high activation value areas in the weight map correspond to feature positions of key structures of the circuit board; Performing element-by-element multiplication of the feature importance weight map and the basic feature set to enhance feature responses in high activation value areas and suppress feature responses in low activation value areas; Normalize the processed feature set to ensure that the distribution range of the feature values is consistent with the model input requirements; The normalized feature set is output as the key feature set for attention enhancement.

7. The circuit board detection method based on machine vision according to claim 4, characterized in that: The analysis of the geometric features of the defect area, including the area size, shape regularity and edge clarity of the defect area, generates defect morphology description parameters, including: Performing a connected domain analysis on the pixel coordinates of the defect area to determine a set of boundary pixels of the defect area; Calculating the area of the defect region based on the boundary pixel set, wherein the area is obtained by counting the total number of pixels in the region surrounded by the boundary pixel points; Extracting the coordinate sequence of the boundary pixel point set, and calculating the angle change rate between adjacent boundary pixel points as a shape regularity index of the defect area; Performing edge sharpness detection on the boundary pixel set, calculating the average grayscale difference between the boundary pixel points and the non-boundary pixel points as an edge clarity index of the defect area; The area size, shape regularity index and edge clarity index are combined to generate defect morphology description parameters.

8. The circuit board detection method based on machine vision according to claim 5, characterized in that: The logic check of each field information in the report template is performed to ensure the consistency of the defect type and morphological description and the correspondence of the location coordinates with the actual physical location, and to generate a test result report containing the defect location coordinates, including: Verify that the defect type in the defect type description field matches the feature identification information to ensure that the defect type name is consistent with the defect identification in the feature identification information; Verify the degree of overlap between the defect outline graphic in the location annotation field and the clustering area boundary in the location distribution feature information to ensure that the outline graphic accurately reflects the spatial distribution of the defect; Verifying the consistency between the area size in the morphological description field and the actual total number of pixels in the defect area to ensure that the morphological description parameters match the geometric features of the defect area; Retroactively correct the field information that fails the verification, and re-extract or recalculate the corresponding field information until the verification passes; The information of each field that has passed the verification is formatted and integrated to generate a test result report including the defect location coordinates.

9. The circuit board detection method based on machine vision according to claim 1, characterized in that: Outputting the test result report to the target display terminal to complete the test process includes: Converting the detection result report into an image format supported by a target display terminal, wherein the image format includes a bitmap format and a vector graphics format; The original image of the circuit board is superimposed on the image of the inspection result report as a background layer, and the outline graphic of the defect location coordinates is superimposed and displayed as a semi-transparent foreground layer; Adding a dynamic annotation label to the contour graphic of the defect location coordinates, wherein the annotation label includes a brief description of the defect type name and morphological description parameters; The display interactive function of the test result report is set to support viewing detailed morphological description information of the defect by hovering the mouse and viewing the original image of the corresponding defect area by clicking; The configured test result report is sent to the target display terminal for visual display to complete the test process.

10. A circuit board detection system, comprising a memory and a processor, wherein the memory stores a computer program that can be run on the processor, characterized in that: When the processor executes the program, the steps of the method according to any one of claims 1 to 9 are implemented.

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