Closed-loop test equipment for primary frequency modulation test of energy storage power station

Abstract

The closed-loop test equipment for the primary frequency modulation test of the energy storage power station is provided with a frequency output module, a data acquisition module and a data analysis module. The equipment has the following beneficial effects: firstly, the frequency output module, the data acquisition module and the data analysis module are integrated and highly integrated, so that the portability and mobility of the equipment can be remarkably improved, and the equipment is more beneficial to field test development; secondly, only one test engineer and one guardian are needed when the test is carried out, and due to the fact that the field guardian is limited, the simplification of human resources is more beneficial to improving the test efficiency; and thirdly, automation of a test operation process and intelligent judgment of a test result can be realized through a preset automation program, so that the accuracy of test data is improved, and the test efficiency and the reliability of the test result are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of grid-related testing of energy storage power stations, and in particular to closed-loop testing equipment for a primary frequency modulation test of an energy storage power station. Background Art

[0002] When conducting a primary frequency regulation test of an energy storage power station, the traditional test method usually includes the following steps:

[0003] The first step is power plant data collection: A data acquisition device collects the PT and CT values on the secondary side of the grid connection point in real time. Using the transformer's turns ratio, the PT and CT values on the primary side of the grid connection point are calculated, thereby obtaining the active power at the grid connection point. The data acquisition device then plots the energy storage power plant's power envelope, with time as the horizontal axis and the obtained active power at the grid connection point as the vertical axis. This diagram shows the changes in active power at different time points, providing a foundation for subsequent power plant data analysis.

[0004] The second step is to simulate the change of grid frequency: connect the frequency generator voltage output circuit and the primary frequency modulation device test channel, and simulate the grid frequency change received by the primary frequency modulation device by modifying the output frequency of the frequency generator.

[0005] The third step is frequency data acquisition: connect the voltage output circuit of the frequency generator to the data acquisition device so that the data acquisition device can simultaneously acquire the output frequency of the frequency generator while acquiring the power station grid connection point information.

[0006] Step 4: Test process and data recording: The test requires two test engineers, one engineer to operate the frequency generator and the other engineer to operate the data acquisition device.

[0007] The test process is as follows:

[0008] 1. The test engineer sets the frequency generator output frequency to 50 Hz to simulate the rated frequency of the power grid.

[0009] 2. The test engineer responsible for operating the data acquisition device starts the data acquisition function and begins recording the active power and frequency waveforms.

[0010] 3. The test engineer responsible for operating the frequency generator applies different frequencies according to the test plan, performs frequency step changes, and finally restores the frequency to 50 Hz.

[0011] 4. After the frequency stabilizes at 50Hz, the data acquisition device should stop collecting data first, and then the test engineer responsible for operating the frequency generator should stop the frequency generator output to ensure the integrity of the test process.

[0012] Based on the above analysis of the test process, the following shortcomings exist: First, the accuracy of the test results cannot be effectively guaranteed. To simulate grid frequency signal changes, the test engineer must manually adjust the frequency generator's output. This process is inevitably subject to human error, which can affect the accuracy of the test results. If the frequency generator stops outputting frequency after the frequency signal step is completed but the data acquisition device has not yet stopped recording values, the primary frequency modulation device may malfunction, affecting not only the active power status of the energy storage power station but also the accuracy of the recorded data in the data acquisition device. Second, the test process is cumbersome. The existing test process consists of four steps: power station data acquisition, simulating grid frequency changes, frequency data acquisition, and the test process and data recording. These steps must be performed sequentially, increasing the complexity of the test process. Frequency step tests of varying amplitudes require the test engineer to manually modify the frequency generator's output frequency and the data acquisition device's configuration files, significantly increasing the time and difficulty of the test process. Third, the test relies on human resources. This test requires the test engineer to not only be proficient in operating the equipment but also to be familiar with the standard requirements and test methods. The test process requires two types of operating equipment, which in turn increases training costs and professional development. Existing test methods require at least two test engineers to participate in the test, and on-site management regulations also require at least two supervisors to monitor the entire process to ensure the safety of on-site testing.

[0013] Therefore, in view of the shortcomings of the existing technology, it is necessary to provide a closed-loop test equipment for the primary frequency regulation test of an energy storage power station to solve the shortcomings of the existing technology. Summary of the Invention

[0014] The present invention aims to overcome the shortcomings of the prior art and provide a closed-loop test device for primary frequency regulation testing of an energy storage power station. The closed-loop test device for primary frequency regulation testing of an energy storage power station has the advantages of being highly integrated, and can also simplify the testing process and reduce reliance on human resources.

[0015] The above-mentioned purpose of the present invention is achieved through the following technical measures:

[0016] Provided is a closed-loop test equipment for primary frequency regulation test of energy storage power station, equipped with:

[0017] Frequency output module - generates AC voltage frequency analog signal, provides simulated grid frequency for primary frequency modulation device, and provides raw data for data acquisition module;

[0018] Data acquisition module - collects the current signal of the secondary side current of the power station grid connection point, the voltage signal of the grid connection point and the AC voltage frequency analog signal of the frequency output module; pre-processes the collected current signal and voltage signal;

[0019] Data analysis module - sends instructions to the frequency output module and the data acquisition module, and is responsible for processing and analyzing digital signals, and finally generates and outputs a detailed test report.

[0020] Preferably, the frequency output module is provided with:

[0021] The first controller controls the digital-to-analog conversion circuit DAC according to the instruction of the data analysis module; the digital-to-analog conversion circuit DAC generates an AC voltage frequency analog signal;

[0022] Filter power amplifier circuit - filters and amplifies the AC voltage frequency analog signal.

[0023] Preferably, the data acquisition module is provided with:

[0024] A second controller—controls the analog-to-digital conversion circuit ADC according to the instructions of the data analysis module and records the digital signal of the analog-to-digital conversion circuit ADC;

[0025] Signal conditioning circuit - pre-processes the collected current signal and voltage signal to obtain pre-processed analog signal;

[0026] Analog-to-digital conversion circuit ADC—converts the pre-processed analog signal into a digital signal, and transmits the digital signal to the second controller and the data analysis module respectively.

[0027] Preferably, the data analysis module is provided with:

[0028] Configuration management unit - performs configuration management and issues instructions to the first controller and the second controller, and transmits configuration information to the calculation and analysis unit;

[0029] Calculation and analysis unit - processes and analyzes the digital signal according to the configuration information and generates a test report;

[0030] The closed-loop test equipment for the primary frequency modulation test of the energy storage power station of the present invention is tested according to the following steps:

[0031] S1. The configuration management unit performs configuration management and issues instructions to the first controller and the second controller;

[0032] S2. After receiving the configuration instruction, the first controller controls the digital-to-analog conversion circuit DAC to generate an AC voltage-frequency analog signal, wherein the AC voltage-frequency analog signal simulates a disturbance of the grid frequency, thereby triggering a primary frequency modulation response of the primary frequency modulation device;

[0033] S3, the data acquisition module starts working to collect the current signal and voltage signal of the power station grid connection point in real time; at the same time, the signal conditioning circuit preprocesses the current signal and voltage signal to obtain corresponding preprocessed analog signals;

[0034] S4, converting the pre-processed analog signal into a digital signal through the analog-to-digital conversion circuit ADC and transmitting the digital signal to the second controller for recording, and the second controller recording the digital signal data file according to a preset storage interval;

[0035] S5. The computer analysis unit receives the collected digital signal, starts processing and analyzing it, obtains analysis results and generates a test report.

[0036] In S5, the content analyzed by the computer analysis unit includes the response delay time, the active power before the step, or the active power after the step.

[0037] Preferably, the report content includes at least one of response time, adjustment time or control deviation.

[0038] The closed-loop test equipment for primary frequency modulation test of energy storage power station of the present invention performs the following test items: dynamic performance test, dead zone test and amplitude limiting test.

[0039] Preferably, the above-mentioned digital-to-analog conversion circuit DAC is provided with a chip U16, and pins 1, 2, 3, 4, 5, and 6 of the chip U16 are respectively connected to the IO port of the first controller, so that the IO port of the first controller operates the chip U16 in a serial manner, and pins 18, 19, 22, and 23 of the chip U16 serve as analog output terminals, pin 32 of the chip U16 is connected to the reference ground, and pin 5 of the chip U16 is connected to pin 10.

[0040] Preferably, three of the above-mentioned filtering power amplifier circuits are provided.

[0041] Each filtering power amplifier circuit is provided with a filter U13B, and one analog output end of the digital-to-analog conversion circuit DAC is connected to the 5th pin of the filter U13B through two resistors in sequence.

[0042] Each filter power amplifier circuit is further provided with an operational amplifier U11, a field effect transistor Q5, a field effect transistor Q6, a transistor Q7, a resistor R37, a resistor R38, a resistor R42, a resistor R51, a resistor R52, a resistor R53, a resistor R56, a resistor R59, a resistor R62, a resistor R63, a resistor R64, a resistor R66, a resistor R67, a resistor R68, a resistor R35, a resistor R36, a resistor R39, a resistor R41, a resistor R43, a resistor R44, a capacitor C33, a capacitor C35, a capacitor C40, a capacitor C46, a capacitor C47, a diode D4, a diode D5 and a diode D6. One of the analog output terminals of the digital-to-analog conversion circuit DAC is connected to the 5th pin of the filter U13B through resistors R37 and R38 in sequence. The 5th pin of the filter U13B is also connected in series with a capacitor C33 to be grounded. The connection point between the resistors R37 and R38 is connected in parallel with the capacitor C33 to the 7th pin of the filter U13B. The 6th pin of the filter U13B is connected in series with a resistor R42 and the 7th pin. The 7th pin of the filter U13B is connected in series with a resistor R59 as a filter output port to the 2nd pin of the operational amplifier U11. The 3rd pin of the operational amplifier U11 is connected in series with a resistor R52 to be grounded. The 2nd pin of the operational amplifier U11 is connected in series with resistors R67 and Capacitor C47 is connected to pin 6, and pin 2 of the operational amplifier U11 is connected in series with resistors R66 and R68 and connected to the feedback voltage terminal U_FB. Resistor R68 is connected in parallel with capacitor C46. Pin 6 of the operational amplifier U11 is connected in series with resistor R56 and the base of transistor Q7. The base of transistor Q7 is connected in series with resistor R63 and grounded. The emitter of transistor Q7 is connected in series with resistor R64 and grounded. The collector of transistor Q7 is connected in series with resistor R51 and HV-. The collector of transistor Q7 is connected in series with resistor R53 and pin 1 of field effect transistor Q6. Pin 1 of field effect transistor Q6 is connected in series with capacitor C40 and the cathode and the cathode of diode D4 and D5, respectively. The anode of diode D5 is connected to the cathode of diode D6, and pin 3 of field effect transistor Q6 is connected in series with resistor R62 to the HV- terminal. The anode of diode D4 and the cathode of diode D5 are respectively connected to pin 1 of field effect transistor Q5. Pin 1 of field effect transistor Q5 is connected in series with resistors R39 and R41 to pin 3. The anode of diode D6 is connected to the connection point between resistors R39 and R41. The anode of diode D6 serves as the U_OUT terminal. Pin 1 of field effect transistor Q5 is also connected in series with resistor R36 to pin 3. The anode of diode D6 is connected in series with resistors R43 and R44 to the feedback voltage terminal U_FB.

[0043] The U_OUT terminals in the three filter power amplifier circuits serve as output terminals Ua, Ub, and Uc, respectively.

[0044] Preferably, the above-mentioned signal conditioning circuit is provided with a voltage transformer TV1, an operational amplifier U1, a resistor R17, a resistor R18, a resistor R19 and a capacitor C73, the secondary negative pole of the voltage transformer TV1 is grounded, the secondary positive pole of the voltage transformer TV1 is connected in series with resistors R18 and R19 in sequence and connected to pin 2 of the operational amplifier U1, the connection point between the resistor R18 and the resistor R19 is connected in series with resistor R17 to ground, the connection point between the resistor R19 and the pin 2 of the operational amplifier U1 is connected in series with capacitor C73 to ground, pin 2 of the operational amplifier U1 is connected to pin 6, pin 6 of the operational amplifier U1 serves as the output end Ux1 of the regulated voltage, the output end Ux1 is connected to the analog-to-digital conversion circuit ADC, pin 4 of the operational amplifier U1 is connected to -V12V, and pin 7 of the operational amplifier U1 is connected to +V12V.

[0045] Preferably, the analog-to-digital conversion circuit ADC is provided with a chip U25, the output terminal Ux1 of the operational amplifier U1 is connected to pin 49 of the chip U25, and the second controller reads the conversion data from pins 24 and 25 of the chip U25 in a serial manner.

[0046] Preferably, the models of the first controller and the second controller are both FPGA EP4CE15F12C8N / MCUAM3352.

[0047] The model of chip U16 is AD5764BSUZ, the model of filter U13B is OP2177, the model of operational amplifier U11 is OP2177, the model of voltage transformer TV1 is TR11156-1C, the model of operational amplifier U1 is OP97, and the model of chip U25 is AD7606BSTZ.

[0048] The present invention provides closed-loop testing equipment for primary frequency regulation testing of energy storage power stations. The equipment comprises: a frequency output module that generates an AC voltage-frequency analog signal, provides a simulated grid frequency for the primary frequency regulation device, and provides raw data for a data acquisition module; a data acquisition module that collects the secondary current signal of the power station's grid connection point, the voltage signal at the grid connection point, and the AC voltage-frequency analog signal from the frequency output module, and pre-processes the collected current and voltage signals; and a data analysis module that sends instructions to the frequency output module and the data acquisition module, processes and analyzes the digital signals, and ultimately generates and outputs a detailed test report. The advantages of this closed-loop testing equipment for primary frequency regulation testing of energy storage power stations are as follows: First, the highly integrated frequency output module, data acquisition module, and data analysis module significantly improve the equipment's portability and mobility, further facilitating on-site testing. Second, existing testing methods require at least two test engineers and two supervisors for on-site testing. The present invention only requires one test engineer and one supervisor. Given the limited number of on-site supervisors, streamlining human resources further improves testing efficiency. Third, the existing testing method requires the test engineer to follow each test step in sequence, modify many parameters and configuration files during the operation, and manually analyze the test results to see if they meet the scheduling and standard requirements. This inevitably leads to the possibility of human error. The present invention, through a preset automated program, can automate the test operation process and intelligently determine the test results, not only improving the accuracy of the test data, but also improving the test efficiency and reliability of the test results. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] The present invention is further described with reference to the accompanying drawings, but the contents in the accompanying drawings do not constitute any limitation to the present invention.

[0050] Figure 1 This is a connection diagram of a closed-loop test device for a primary frequency regulation test in an energy storage power station.

[0051] Figure 2 This is the circuit diagram of the digital-to-analog conversion circuit DAC.

[0052] Figure 3 This is the circuit diagram of the filter power amplifier circuit.

[0053] Figure 4 This is the circuit diagram of the signal conditioning circuit.

[0054] Figure 5 This is the circuit diagram of the analog-to-digital conversion circuit ADC.

[0055] Figure 6 Example 3: Test interface diagram during a dynamic performance test of a frequency modulation system.

[0056] Figure 7 Example 4: Test interface diagram during a dead zone test of a primary frequency modulation system.

[0057] Figure 8 Example 5: Test interface diagram during a frequency modulation system limiting test.

[0058] Figure 9 Example 5: Test interface diagram during a frequency modulation system limiting test. DETAILED DESCRIPTION

[0059] The technical solution of the present invention is further described with reference to the following examples.

[0060] Example 1

[0061] A closed-loop test equipment for primary frequency regulation test of energy storage power station, such as Figure 1 , the settings are:

[0062] Frequency output module - generates AC voltage frequency analog signal, provides simulated grid frequency for primary frequency modulation device, and provides raw data for data acquisition module;

[0063] Data acquisition module - collects the current signal of the secondary side current at the power station's grid connection point, the voltage signal at the grid connection point, and the AC voltage and frequency analog signal from the frequency output module; pre-processes the collected current and voltage signals; the data acquisition module is connected to the test points of the voltage transformer PT and the current transformer CT;

[0064] Data analysis module - sends instructions to the frequency output module and data acquisition module, and is responsible for processing and analyzing digital signals, and finally generates and outputs a detailed test report.

[0065] Among them, the frequency output module is set up with:

[0066] The first controller controls the digital-to-analog conversion circuit DAC according to the instructions of the data analysis module;

[0067] Digital-to-analog conversion circuit DAC - generates AC voltage frequency analog signal;

[0068] Filter power amplifier circuit - filters and amplifies the AC voltage frequency analog signal.

[0069] Among them, the data acquisition module is equipped with:

[0070] The second controller controls the analog-to-digital conversion circuit ADC according to the instruction of the data analysis module and records the digital signal of the analog-to-digital conversion circuit ADC;

[0071] Signal conditioning circuit - pre-processes the collected current signal and voltage signal to obtain pre-processed analog signal;

[0072] Analog-to-digital conversion circuit ADC - converts the pre-processed analog signal into a digital signal, and transmits the digital signal to the second controller and the data analysis module respectively.

[0073] Among them, the data analysis module is set up with:

[0074] Configuration management unit - performs configuration management and issues instructions to the first controller and the second controller, and transmits configuration information to the calculation and analysis unit; the configuration information includes power station capacity, regulation rate, etc.;

[0075] Calculation and analysis unit - processes and analyzes digital signals according to configuration information and generates test reports.

[0076] The closed-loop test equipment for the primary frequency modulation test of the energy storage power station of the present invention is tested according to the following steps:

[0077] S1. The configuration management unit performs configuration management and issues instructions to the first controller and the second controller;

[0078] S2. After receiving the configuration instruction, the first controller controls the digital-to-analog conversion circuit DAC to generate an AC voltage-frequency analog signal. The AC voltage-frequency analog signal simulates the disturbance of the grid frequency, thereby triggering a primary frequency modulation response of the primary frequency modulation device.

[0079] S3: The data acquisition module starts working and collects the current signal and voltage signal of the power station grid connection point in real time; at the same time, the signal conditioning circuit pre-processes the current signal and voltage signal to obtain the corresponding pre-processed analog signal;

[0080] S4, converting the pre-processed analog signal into a digital signal through an analog-to-digital conversion circuit ADC and transmitting the digital signal to the second controller for recording. The second controller records the digital signal data file according to a preset storage interval;

[0081] S5. The computer analysis unit receives the collected digital signal, starts processing and analyzing it, obtains the analysis results and generates a test report, wherein the analysis content includes the response lag time, the active power before the step or the active power after the step; the report content includes at least one of the response time, the adjustment time or the control deviation.

[0082] The closed-loop test equipment for primary frequency modulation test of energy storage power station of the present invention performs the following test items: dynamic performance test, dead zone test and amplitude limiting test.

[0083] The benefits of this closed-loop test equipment for primary frequency regulation testing in energy storage power stations are as follows: First, it integrates the frequency output module, data acquisition module, and data analysis module into a highly integrated system. In actual production, its dimensions do not exceed 360 × 200 × 420 mm, and its weight does not exceed 15 kg. This significantly improves the device's portability and mobility, making it more convenient for on-site testing. Second, existing testing methods require at least two test engineers and two supervisors to conduct on-site testing. This present invention only requires one test engineer and one supervisor. Due to limited on-site supervisors, this streamlined approach improves testing efficiency. Third, existing testing methods require test engineers to perform each test step sequentially, modify numerous parameters and configuration files during the process, and manually analyze test results to ensure they meet scheduling and standard requirements. This inevitably leads to the possibility of human error. This present invention, through pre-set automated procedures, automates the test operation process and intelligently determines test results, improving not only the accuracy of test data but also test efficiency and the reliability of test results.

[0084] Example 2

[0085] A closed-loop test device for primary frequency regulation testing of an energy storage power station, having the same other features as those of Example 1, and further having the following features:

[0086] like Figure 2 The digital-to-analog conversion circuit DAC is provided with a chip U16. Pins 1, 2, 3, 4, 5, and 6 of the chip U16 are respectively connected to the IO port of the first controller, so that the IO port of the first controller operates the chip U16 in a serial manner. Pins 18, 19, 22, and 23 of the chip U16 are used as analog output terminals. Pin 32 of the chip U16 is connected to the reference ground, and pin 5 of the chip U16 is connected to pin 10.

[0087] Pins 18, 19, 22 and 23 of the chip U16 of the present invention are four analog output terminals.

[0088] The digital-to-analog conversion circuit DAC is also provided with capacitors C68, C69, C70, C71, C72, C73, coupling capacitors E10, E11, E12, E14, E15, E19, resistors R83, R84 and R85. Pin 32 of the chip U16 is connected to the reference ground, pins 5 and 10 of the chip U16 are connected, and pin 11 of the chip U16 is connected to the negative electrode of the coupling capacitor E15. The Pin 11 is grounded, the positive electrode of the coupling capacitor E15 is connected to pin 12 of the chip U16, and the pin 11 of the chip U16 is also connected in series with the capacitor C71 and pin 12. The pin 12 of the chip U16 is connected in series with the resistor R85 and +V5V. The pins 13 and 31 of the chip U16 are connected to +V12V respectively, and the pins 15 and 30 of the chip U16 are connected to -V12V respectively. The pin 13 of the chip U16 is connected in series with the capacitor C72 and grounded. The pin 13 of the chip U16 is connected to the positive electrode of the coupling capacitor E19, and the negative electrode of the coupling capacitor E19. Ground, the 15th pin of chip U16 is connected in series with capacitor C73 to ground, the 15th pin of chip U16 is connected in series with the positive electrode of coupling capacitor E14, the negative electrode of coupling capacitor E14 is grounded, the 14th pin of chip U16 is grounded, the 16th pin of chip U16 is connected in series with resistor R84 to ground, the 17th, 20th, 21st and 24th pins of chip U16 are grounded, the 31st pin of chip U16 is connected in series with capacitor C70 to ground, the 31st pin of chip U16 is connected to the positive electrode of coupling capacitor E10, the negative electrode of coupling capacitor E10 is grounded, the 3 The capacitor C68 connected in series with pin 0 is connected to pin 28, the pin 30 of chip U16 is connected to the negative electrode of coupling capacitor E12, the positive electrode of coupling capacitor E12 is connected to pin 28, pin 28 of chip U16 is grounded, the resistor R83 connected in series with pin 27 of chip U16 is connected to +VDACref, the pins 26 and 25 of chip U16 are connected to +VDACref, the capacitor C69 connected in series with pin 25 of chip U16 is grounded, the positive electrode of coupling capacitor E11 is connected to +VDACref, and the negative electrode of coupling capacitor E11 is grounded.

[0089] It should be noted that the models of the first controller and the second controller are both FPGA EP4CE15F12C8N / MCUAM3352; the model of the chip U16 of the present invention is AD5764BSUZ, the models of the coupling capacitor E10, coupling capacitor E11, coupling capacitor E12, coupling capacitor E14, coupling capacitor E15 and coupling capacitor E19 are all 10u / 25V, the models of capacitors C68, C69, C70, C71, C72 and C73 are all 104, the resistance values of resistors R83 and R85 are 5.1 ohms, and the resistance value of resistor R84 is 10 kilo-ohms.

[0090] The present invention has three filter power amplifier circuits. Each filter power amplifier circuit is provided with a filter U13B, and one analog output end of the digital-to-analog conversion circuit DAC is connected to pin 5 of the filter U13B through two resistors in sequence.

[0091] That is to say, pin 23 of chip U16 is connected to pin 5 of a filter U13B through two resistors, pin 22 of chip U16 is connected to pin 5 of a filter U13B through two resistors, and pin 19 of chip U16 is connected to pin 5 of the last filter U13B through two resistors.

[0092] like Figure 3Each filter power amplifier circuit is also provided with an operational amplifier U11, a field effect transistor Q5, a field effect transistor Q6, a transistor Q7, a resistor R37, a resistor R38, a resistor R42, a resistor R51, a resistor R52, a resistor R53, a resistor R56, a resistor R59, a resistor R62, a resistor R63, a resistor R64, a resistor R66, a resistor R67, a resistor R68, a resistor R35, a resistor R36, a resistor R39, a resistor R41, a resistor R43, a resistor R44, a capacitor C33, a capacitor C35, a capacitor C40, a capacitor C46, a capacitor C47, a diode D4, a diode D5 and a diode D6 One of the analog output terminals of the digital-to-analog conversion circuit DAC is connected to the 5th pin of the filter U13B through resistors R37 and R38 in sequence. The 5th pin of the filter U13B is also connected in series with a capacitor C33 to ground. The connection point between the resistors R37 and R38 is connected in parallel with the 7th pin of the filter U13B, and the 6th pin of the filter U13B is connected in series with a resistor R42 and the 7th pin. The 7th pin of the filter U13B is connected as a filter output port in series with a resistor R59 and the 2nd pin of the operational amplifier U11. The 3rd pin of the operational amplifier U11 is connected in series with a resistor R52 to ground. The 2nd pin of the operational amplifier U11 is connected in series with a resistor R67 and a capacitor C33 in sequence. Capacitor C47 is connected to pin 6, resistors R66 and R68 are connected in series with the feedback voltage terminal U_FB of pin 2 of the operational amplifier U11, resistor R68 is connected in parallel with capacitor C46, resistor R56 is connected in series with the base of transistor Q7 of pin 6 of the operational amplifier U11, resistor R63 is connected in series with the base of transistor Q7, resistor R64 is connected in series with the emitter of transistor Q7, resistor R51 is connected in series with the collector of transistor Q7 and HV- terminal, resistor R53 is connected in series with pin 1 of field effect transistor Q6, capacitor C40 is connected in series with the cathode and cathode of diode D4 and D61 respectively of transistor Q7. The anode of diode D5 is connected to the cathode of diode D6, which serves as the U_OUT terminal. Pin 3 of FET Q6 is connected in series with resistor R62, which is connected to the HV-terminal. The anode of diode D4 and the cathode of diode D5 are each connected to pin 1 of FET Q5. Pin 1 of FET Q5 is connected in series with resistors R39 and R41, which are then connected to pin 3. The anode of diode D6 is connected to the junction between resistors R39 and R41. Pin 1 of FET Q5 is also connected in series with resistor R36, which is connected to pin 3. The anode of diode D6 is connected in series with resistors R43 and R44, which are then connected to the feedback voltage terminal U_FB. The U_OUT terminals of the three filter power amplifier circuits serve as output terminals Ua, Ub, and Uc, respectively.

[0093] It should be noted that the filter power amplifier circuit of the present invention is specifically divided into a filter unit, a signal amplification circuit, and a dual-power complementary symmetrical power amplifier unit. The filter unit is composed of filter U13B, resistors R37, R38, R42, capacitors C33, and C35.

[0094] The signal amplification unit is composed of an operational amplifier U11, a resistor R52, a resistor R59, a resistor R66, a resistor R67, a resistor R68, a capacitor C46 and a capacitor C47; the filtering power amplification unit is composed of components other than the signal amplification unit, the filtering power amplification unit, the resistor R43 and the resistor R44, which constitute a dual-power complementary symmetrical power amplification unit.

[0095] One of the analog signals output from the digital-to-analog conversion circuit DAC is input to a filter unit, and the analog signal is connected in series to the positive input terminal of the filter unit through resistors R37 and R38; a capacitor C33 is connected in parallel between the connection point between resistor R38 and the positive input terminal of the filter unit and the reference ground for filtering; the negative input terminal of the filter unit is connected to the output terminal pin 7 through resistor R42; a capacitor C35 is connected in parallel between the connection point between resistors R37 and R38 and the output terminal pin 7 of the filter unit; pin 7 of the filter unit serves as the output of the filter unit.

[0096] The signal amplification circuit consists of an operational amplifier (OPA) U11, which connects the output of the filter unit to the input of the signal amplification circuit. The input of the signal amplification circuit is connected to pin 2 of OPA U11 via resistor R59. Pin 3 of OPA U11 is connected to the reference ground via resistor R52. Resistors R67 and C47 are connected in series between pins 2 and 6 of OPA U11. Pin 2 of OPA U11 is connected to the feedback voltage of the output voltage of the dual-power complementary symmetrical power amplifier circuit unit via resistors R66 and R68. Resistor R68 is connected in parallel with capacitor C46 for filtering. Pin 6 of OPA U11 is the output of the signal amplification unit.

[0097] The input of the dual-power complementary symmetrical power amplifier unit is connected to the output of the signal amplifier unit; the transistor Q7 is a switching power transistor, the output of the signal amplifier unit is connected to the base of the transistor Q7 through the resistor R56, and the emitter of the transistor Q7 is connected to the reference ground through the resistor R64; the resistor R63 is connected in parallel between the base of the transistor Q7 and the reference ground; the collector of the transistor Q7 is connected to the negative bus voltage through the resistor R51; the collector of the transistor Q7 is connected to the gate of the field effect transistor Q6 through the resistor R53, and the source of Q6 is connected to the negative bus through the resistor R62; the drain of Q6 is connected in series to the source of the MOS tube Q5 through the diode D6 and R41; the field effect The drain of transistor Q5 is connected to the positive bus; the gate of field-effect transistor Q5 is connected to +12V through resistor R35; a resistor R36 is connected in parallel between the gate and drain of field-effect transistor Q5; the gate of field-effect transistor Q5 and the positive electrode of diode D6 are connected through resistor R39; the gate and drain of field-effect transistor Q6 are connected through capacitor C40; the drain of field-effect transistor Q6 and the gate of field-effect transistor Q5 are connected through diodes D4 and D5; the positive electrode of diode D6 is connected to the output of the dual-power complementary symmetrical power amplifier unit; the output of the dual-power complementary symmetrical power amplifier unit obtains feedback voltage through resistors R43 and R44 connected in series and is connected to the signal amplification unit.

[0098] The principle of a dual-supply complementary symmetrical power amplifier unit: The fixed voltage drop generated by the diodes in forward conduction provides an appropriate voltage bias for FETs Q5 and Q6, placing them in a weak conduction state. The conduction time of each FET is slightly longer than half the input signal cycle. This dual-supply complementary symmetrical power amplifier unit is between Class A and Class B, representing a typical Class AB amplifier circuit.

[0099] The model of filter U13B is OP2177, the model of operational amplifier U11 is OP2177, the model of field effect transistor Q5 and field effect transistor Q6 is STW3N15, the model of transistor Q7 is STN9260, the resistance value of resistor R37 and resistor R38 is 8.2 kilo-ohms, the resistance value of resistor R42 is 5.1 kilo-ohms, the resistance value of resistor R63, resistor R56, and resistor R51 is 10 kilo-ohms, the resistance value of resistor R39, resistor R64, and resistor R52 is 1 kilo-ohm, the resistance value of resistor R53 is 470 ohms, the resistance value of resistor R59 is 5.6 kilo-ohms, and the resistance R 41. The resistance value of resistor R62 is 0.88 ohm, the resistance value of resistor R66 is 2 kilo-ohm, the resistance value of resistor R67 is 4.3 ohm, the resistance value of resistor R68 is 200 ohm, the resistance value of resistor R35 is 910 ohm, the resistance value of resistor R36 is 100 kilo-ohm, the resistance value of resistor R43 and resistor R44 is 4.7 ohm, the capacitance value of capacitor C35 and capacitor C33 is 510 pF, the model of capacitor C46 and capacitor C40 is 22 pF / 2kV, the model of capacitor C47 is 103 / 50V, and the model of diode D4, diode D5 and diode D6 is US1M.

[0100] like Figure 4 The signal conditioning circuit is provided with a voltage transformer TV1, an operational amplifier U1, a resistor R17, a resistor R18, a resistor R19 and a capacitor C73. The secondary negative pole of the voltage transformer TV1 is grounded, and the secondary positive pole of the voltage transformer TV1 is connected in series with resistors R18 and R19 in sequence and connected to pin 2 of the operational amplifier U1. The connection point between the resistor R18 and the resistor R19 is connected in series with resistor R17 and grounded. The connection point between the resistor R19 and the pin 2 of the operational amplifier U1 is connected in series with capacitor C73 and grounded. Pin 2 and pin 6 of the operational amplifier U1 are connected. Pin 6 of the operational amplifier U1 serves as the output terminal Ux1 of the regulated voltage. The output terminal Ux1 is connected to the analog-to-digital conversion circuit ADC. Pin 4 of the operational amplifier U1 is connected to -V12V, and pin 7 of the operational amplifier U1 is connected to +V12V.

[0101] It should be noted that the signal conditioning circuit is composed of a voltage transformer, a first filtering unit and an emitter follower unit.

[0102] The voltage transformer TV1 is model TR11156-1C. The negative terminal of the voltage transformer's secondary is connected to the negative input of the first filter unit, while the positive terminal of the voltage transformer's secondary is connected to the positive input of the first filter unit. The first filter unit consists of resistors R17, R18, and R19, and capacitor C73. The emitter follower is an operational amplifier U1.

[0103] The negative input of the first filter unit is connected to the reference ground. The output of the first filter unit is connected to the input of the emitter follower unit. The input of the first filter unit is connected in series with resistor R18. The other end of R18 is divided into two branches. One branch is connected to the reference ground through resistor R17. The second branch is connected in series with resistor R19 as the output of the first filter unit. Capacitor C73 is connected in parallel between the output of the first filter unit and ground for filtering.

[0104] The output end of the emitter follower unit outputs the conditioned voltage Ux1, and the input of the emitter follower unit is connected to its positive input end; its pin 2 and pin 6 are connected as the output of the emitter follower unit.

[0105] The model of the voltage transformer TV1 is TR11156-1C, the model of the operational amplifier U1 is OP97, the resistance values of the resistors R18 and R17 are 5 kilo-ohms, the resistance value of the resistor R19 is 100 ohms, and the capacitance value of the capacitor C73 is 10 pF.

[0106] like Figure 5 The analog-to-digital conversion circuit ADC is provided with a chip U25, the output terminal Ux1 of the operational amplifier U1 is connected to the 49th pin of the chip U25, and the second controller reads the conversion data from the 24th pin and the 25th pin of the chip U25 in a serial manner.

[0107] The analog-to-digital conversion circuit ADC is also provided with capacitors C67, C68, C69, C70, C71, C75, C77, C78, C79, resistors R41, R42, R43, R44 and R45. Pins 1, 37, 38 and 48 of the chip U25 are connected. Pin 1 of the chip U25 is also connected in series with capacitors C67, C68 and C69. Ground, pin 1 of chip U25 is connected to +A5V, pin 23 of chip U25 is connected to ground in series with capacitors C70 and C71, pin 23 of chip U25 is connected to +A5V, pin 8 of chip U25 is connected to +A5V in series with resistor R41, pin 6 of chip U25 is connected to +A5V in series with resistor R42, pin 34 of chip U25 is connected to +A5V in series with resistor R43, pin 7 of chip U25 is connected to +A5V in series with resistor R44. V is connected, the capacitor C75 in series with +A5V on the 11th pin of chip U25, the resistor R45 in series with ground on the 11th pin of chip U25, the capacitor C76 in series with ground on the 42nd pin of chip U25, the 42nd pin of chip U25 is also connected with +2.5VrefA, the capacitor C77 in series with ground on the 36th pin of chip U25, the capacitor C78 in series with ground on the 39th pin of chip U25, the 44th pin and the 45th pin of chip U25 are connected, the 4 The 4-pin series capacitor C79 is grounded, and pins 16, 17, 18, 19, 20, 21, 22, 27, 28, 29, 30, 31, 32, 33, 13, 3, 4, 5, 2, 26, 35, 40, 41, 47, 43, 46, 50, 52, 54, 56, 58, 60, 62, and 64 of chip U25 are grounded.

[0108] It should be noted that the analog-to-digital conversion circuit ADC is powered by +5V and the reference power supply uses an internal 2.5V reference.

[0109] The model of chip U25 is AD7606BSTZ. The capacitance values of capacitors C77, C70, C67, and C68 are 10 microfarads, the capacitance values of capacitors C69 and C71 are 100 nanofarads, the capacitance value of capacitor C75 is 10 picofarads, the capacitance values of capacitors C79 and C78 are 1 microfarad, the resistance values of resistors R44, R41, R42, and R43 are 4.7 kiloohms, and the resistance value of resistor R45 is 51 kiloohms.

[0110] The frequency output module of this invention can output three-phase voltages ranging from 0V to 125V, with a voltage accuracy of ±0.05%. The frequency can be adjusted from 45Hz to 55Hz, maintaining a high accuracy of ±0.001Hz. The output voltage and frequency values can also be flexibly adjusted to meet specific on-site testing requirements. For example, the output frequency can be adjusted to different levels during the frequency signal output process, resulting in step changes. This module also features a high degree of automation and integration. The voltage and frequency signals generated internally are transmitted to the data acquisition module without complex external wiring, further simplifying the test process and improving test efficiency. The data acquisition module can simultaneously collect six voltage and six current signals. The voltage acquisition range covers 0V to 250V, and the current acquisition range covers 0A to 10A, with acquisition accuracy of ≤±0.1% for both signals and phase acquisition accuracy of ≤0.05°. Furthermore, the design of six voltage and six current signals addresses the current difficulties of conducting single-frequency modulation tests in energy storage power stations with two energy storage lines. The data analysis module is key to improving test efficiency. This module not only intuitively displays collected voltage, current, active power, and frequency data, but also automatically determines whether the collected data meets standards and scheduling requirements. During the test process, after setting up the test environment, the test engineer simply enters the PT and CT ratios and basic parameters of the primary frequency modulation device on the equipment to collect the secondary voltage and current data of the grid connection point, and then calculates the primary voltage and current values of the line. Based on the phase relationship between voltage and current, the active power at the grid connection point is determined and an active power curve is plotted. The data analysis module then combines the collected frequency and active power curves for display, deriving the correlation between the two and analyzing whether the primary frequency modulation operation is correct.

[0111] The benefits of this closed-loop test equipment for primary frequency modulation testing of energy storage power stations are as follows: First, the highly integrated frequency output module, data acquisition module, and data analysis module significantly improve the device's portability and mobility, making it more convenient for on-site testing. Second, existing testing methods require at least nine voltage acquisition loops and six current acquisition loops for testing energy storage power stations with two energy storage lines. This invention, through internal design optimization, can achieve this with only six voltage and six current signals, achieving efficient resource utilization and reducing equipment production costs. Third, existing testing methods require at least two test engineers and two supervisors for on-site testing. The present invention only requires one test engineer and one supervisor. Due to limited on-site supervisors, this streamlined human resource management further improves testing efficiency. Fourth, existing testing methods require test engineers to perform each test step sequentially, modify numerous parameters and configuration files during the process, and manually analyze test results to see if they meet scheduling and standard requirements, inevitably leading to the possibility of human error. The present invention can automate the test operation process and intelligently determine the test results through a preset automation program, which not only improves the accuracy of the test data, but also improves the test efficiency and the reliability of the test results.

[0112] Example 3

[0113] An application of a closed-loop test device for a primary frequency modulation test of an energy storage power station in embodiment 1 or 2, such as Figure 6 . A dynamic performance test of a frequency modulation system was carried out in a certain energy storage power station. According to the requirements of relevant national standards, the data acquisition module of the present invention is connected to the voltage transformer (PT) and current transformer (CT) at the test point, and the frequency signal output module of the present invention is connected to the primary frequency modulation system of the energy storage power station. The test method is implemented in accordance with the provisions of relevant national standards. The dynamic performance test standard for the primary frequency regulation system requires that the test be conducted under two operating conditions: the energy storage system charge / discharge power conditions are 0.2Pn≤P<0.5Pn and 0.65Pn≤P<Pn. The frequency signal output module of the present invention is used to output the disturbance frequency to the primary frequency regulation system of the energy storage power station. The frequency up-disturbance test is performed by stepping from 50.00Hz to 50.05Hz, 50.15Hz, and 50.20Hz, respectively. Each frequency control point is continuously operated for 30s before returning to 50.00Hz. The frequency down-disturbance test is performed by stepping from 50.00Hz to 49.95Hz, 49.85Hz, and 49.80Hz, respectively. Each frequency control point is continuously operated for 30s before returning to 50.00Hz.

[0114] The data acquisition module of the present invention is used to record the voltage, current, frequency and active power values during the frequency disturbance process, and calculate the primary frequency modulation control response time, adjustment time and control deviation.

[0115] Taking the energy storage system discharge power condition of 0.2Pn≤P<0.5Pn and a disturbance frequency of 50.20Hz as an example, we simulated frequency disturbances in the power grid. To ensure the accuracy of the test results, we conducted three consecutive tests. The test is divided into three test processes: frequency output process, data acquisition process, and test data analysis process. The equipment of the present invention can realize automated testing throughout the entire process. The following is a detailed implementation process.

[0116] Frequency output process: When the inspection engineer conducts the test on site, he first selects the primary frequency modulation dynamic performance test module, selects the 50.20Hz test item, and sets seven key parameters: output frequency (F), frequency difference (△f), duration before disturbance (t1), duration of disturbance (t2), duration after disturbance (t3), number of tests, and allowable error band (e). Among them, F is the output frequency set by the frequency generator. △f is the frequency difference between the output frequency and the rated frequency. t1 is the time the frequency is the rated frequency, the purpose of which is to simulate the stable operation condition of the power grid. t2 is the time the frequency generator outputs the set disturbance frequency, the purpose of which is to simulate the actual operating condition of the power grid with frequency disturbance. t3 is the time the frequency returns to the rated frequency and maintains it after the frequency generator outputs the set disturbance frequency, the purpose of which is to determine whether the primary frequency modulation device can return to the initial working condition and maintain it. The number of tests is the number of times the equipment of the present invention automatically executes the selected test item. e is the active power adjustment deviation range set according to the standard requirements, the purpose of which is to determine whether the test results are qualified.

[0117] Data acquisition process: After the settings are completed, click the "Start" button to start the test. The frequency output module of the present invention automatically outputs the frequency according to the set output frequency and disturbance duration. At the same time, the data acquisition module collects the data of the grid frequency and active power, and performs data analysis.

[0118] Data analysis process: After the test is completed, the present invention automatically analyzes and calculates the test results and makes a judgment. The response lag time of the energy storage power station is 0.254s, the response time is 0.532s, the adjustment time is 0.532s, the active power before the step is 35.197MW, the active power after the step is 28.980MW, and the control deviation is 0.362%, which meets the requirements of "GB / T 40595-2021 Technical Provisions and Test Guidelines for Primary Frequency Regulation of Grid-Connected Power Supply".

[0119] Example 4

[0120] An application of a closed-loop test device for a primary frequency modulation test of an energy storage power station in embodiment 1 or 2, such as Figure 7A dead-band test of a primary frequency modulation system was conducted at a certain energy storage power station. According to relevant national standards, the data acquisition module of the present invention was connected to the voltage transformer (PT) and current transformer (CT) at the test point, and the frequency signal output module of the present invention was connected to the primary frequency modulation system of the energy storage power station. The test method was implemented in accordance with relevant national standards. The standard requirement for the dead zone test of the primary frequency regulation system is to output the disturbance frequency to the primary frequency regulation system of the energy storage power station through the frequency signal output module of this device under the two power limiting modes of the energy storage system charging / discharging power conditions of 0.2Pn≤P<0.5Pn and 0.65Pn≤P<Pn. The frequency disturbance dead zone test is to increase the frequency value step by step from 50.00Hz in steps of 0.01Hz until the active power begins to change regularly; the frequency disturbance dead zone test is to decrease the frequency value step by step from 50.00Hz in steps of 0.01Hz until the active power begins to change regularly; each frequency control point runs continuously for 30s and then returns to 50.00Hz. The data acquisition module of this device is used to record the frequency value at the moment when the active power changes regularly during the frequency disturbance.

[0121] The energy storage power station's primary frequency regulation dead zone was set at 50.05Hz. Under discharge power conditions of 0.2Pn≤P<0.5Pn and an initial grid connection frequency of 50.00Hz, the test simulated a situation where the grid's frequency fluctuations exceeded the primary frequency regulation dead zone setting. To ensure the accuracy of the test results, three consecutive tests were conducted. The test was divided into three test processes: frequency output, data acquisition, and test data analysis. The equipment of the present invention enables automated testing throughout the entire process. The following describes the specific implementation process.

[0122] Frequency Output Process: When conducting on-site testing, the test engineer first selects the primary frequency modulation deadband and amplitude limiting test module, chooses the 50.05Hz test item, and sets four key parameters: frequency change rate (dF1), frequency deviation (Δf), duration before disturbance (t1), and number of tests. dF1 is the rate of change of the output frequency; Δf is the frequency deviation from the rated frequency; t1 is the time the frequency remains at the rated frequency, simulating stable grid operation; and the number of tests is the number of times the device automatically executes the selected test item.

[0123] Data collection process: After the settings are completed, click the "Start" button to start the test. The device of the present invention automatically outputs the frequency according to the set output frequency and duration, and at the same time collects the data of the grid connection point frequency and active power, and performs data analysis.

[0124] Data analysis process: After the test is completed, the equipment of the present invention automatically analyzes and calculates the test results and determines that the actual measured dead zone value of the primary frequency regulation system of the energy storage power station is 50.05Hz, which meets the requirements of "GB / T 40595-2021 Technical Provisions and Test Guidelines for Primary Frequency Regulation of Grid-Connected Power Sources".

[0125] Example 5

[0126] An application of a closed-loop test device for a primary frequency modulation test of an energy storage power station in embodiment 1 or 2, such as Figure 8 and Figure 9 , a frequency modulation system amplitude limiting test was carried out at a certain energy storage power station. According to the requirements of relevant national standards, the data acquisition module of the present invention is connected to the voltage transformer (PT) and current transformer (CT) at the test point, and the frequency signal output module of the present invention is connected to the primary frequency modulation system of the energy storage power station. The test method is implemented in accordance with the provisions of relevant national standards. The standard requirement for the amplitude limiting test of the primary frequency modulation system is to output the disturbance frequency to the primary frequency modulation system of the energy storage power station through the frequency output module of this device under the two power limiting modes of the energy storage system charging / discharging power conditions of 0.2Pn≤P<0.5Pn and 0.65Pn≤P<Pn. The frequency upper disturbance limiting test is to increase the frequency value step by step from 50.00Hz in steps of 0.01Hz until the active power begins to stabilize and does not change; the frequency lower disturbance limiting test is to decrease the frequency value step by step from 50.00Hz in steps of 0.01Hz until the active power begins to stabilize and does not change; each frequency control point runs continuously for 30s and then returns to 50.00Hz. The data acquisition module of this equipment is used to record the frequency value at the moment when the active power stabilizes and does not change during the frequency disturbance.

[0127] The energy storage power station's primary frequency regulation system was set to a limiter value of 20% Pn. Under the energy storage system's discharge power condition of 0.2 Pn ≤ P < 0.5 Pn and an initial grid connection frequency of 50.00 Hz, the test simulated a frequency disturbance in the grid that reached the energy storage power station's primary frequency regulation system limiter value. To ensure the accuracy of the test results, three consecutive tests were conducted. The test was divided into three test processes: frequency output, data acquisition, and test data analysis. The entire process is fully automated. The detailed implementation is described below.

[0128] Frequency output process: When the inspection engineer conducts the test on site, he first enters the power configuration module and sets the limit setting value to 20% in the primary frequency modulation option. Then return to the primary frequency modulation dead zone and limit test function module, select the limit test item, and set six key parameters: frequency change rate (dF1), frequency difference (△f), frequency change rate (dF2), cutoff frequency (F), duration before disturbance (t1), duration after disturbance (t3), and number of tests. Among them, dF1 is the rate at which the frequency changes to the dead zone setting value. △f is the frequency difference from the rated frequency. dF2 is the rate at which the frequency changes to the limit setting value. F is the final frequency output by the frequency generator. t1 is the time when the frequency is the rated frequency, the purpose of which is to simulate the working conditions of stable operation of the power grid. t3 is the time after the frequency generator stops outputting, the purpose of which is to determine whether the active power of the grid connection point can be kept stable and unchanged after the primary frequency modulation system reaches the limit setting value. The number of tests is the number of times the device of the present invention automatically executes the selected test items.

[0129] Data collection process: After the settings are completed, click the "Start" button to start the test. The device of the present invention automatically outputs the frequency according to the set output frequency and duration, and at the same time collects the data of the grid connection point frequency and active power, and performs data analysis.

[0130] Data analysis process: After the test is completed, the equipment of the present invention automatically analyzes and calculates the test results and determines that the actual measured value of the limiting value of the primary frequency regulation system of the energy storage power station is 20.204%, which meets the requirements of "GB / T 40595-2021 Technical Provisions and Test Guidelines for Primary Frequency Regulation of Grid-Connected Power Sources".

[0131] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the scope of protection of the present invention. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the essence and scope of the technical solutions of the present invention.

Claims

1. A closed-loop test equipment for primary frequency modulation test of energy storage power station, characterized in that: The settings are: Frequency output module - generates AC voltage frequency analog signal, provides simulated grid frequency for primary frequency modulation device, and provides raw data for data acquisition module; Data acquisition module - collects the current signal of the secondary side current of the power station grid connection point, the voltage signal of the grid connection point and the AC voltage frequency analog signal of the frequency output module; pre-processes the collected current signal and voltage signal; Data analysis module - sends instructions to the frequency output module and the data acquisition module, and is responsible for processing and analyzing digital signals, and finally generates and outputs a detailed test report.

2. The closed-loop test equipment for primary frequency modulation test of energy storage power station according to claim 1, characterized in that: The frequency output module is provided with: A first controller - controls a digital-to-analog conversion circuit DAC according to instructions from the data analysis module; Digital-to-analog conversion circuit DAC - generates AC voltage frequency analog signal; Filter power amplifier circuit - filters and amplifies the AC voltage frequency analog signal; The data acquisition module is provided with: A second controller - controls the analog-to-digital conversion circuit ADC according to the instructions of the data analysis module, and records the digital signal of the analog-to-digital conversion circuit ADC; Signal conditioning circuit - pre-processes the collected current signal and voltage signal to obtain pre-processed analog signal; Analog-to-digital conversion circuit ADC—converts the pre-processed analog signal into a digital signal, and transmits the digital signal to the second controller and the data analysis module respectively; The data analysis module is provided with: Configuration management unit - performs configuration management and issues instructions to the first controller and the second controller, and transmits configuration information to the calculation and analysis unit; Calculation and analysis unit - processes and analyzes the digital signal according to the configuration information and generates a test report.

3. The closed-loop test equipment for primary frequency modulation test of energy storage power station according to claim 2, characterized in that: Follow the steps below to test: S1. The configuration management unit performs configuration management and issues instructions to the first controller and the second controller; S2. After receiving the configuration instruction, the first controller controls the digital-to-analog conversion circuit DAC to generate an AC voltage-frequency analog signal, wherein the AC voltage-frequency analog signal simulates a disturbance of the grid frequency, thereby triggering a primary frequency modulation response of the primary frequency modulation device; S3, the data acquisition module starts working to collect the current signal and voltage signal of the power station grid connection point in real time; at the same time, the signal conditioning circuit preprocesses the current signal and voltage signal to obtain corresponding preprocessed analog signals; S4, converting the pre-processed analog signal into a digital signal through the analog-to-digital conversion circuit ADC and transmitting the digital signal to the second controller for recording, and the second controller recording the digital signal data file according to a preset storage interval; S5. The computer analysis unit receives the collected digital signal, starts processing and analyzing it, obtains analysis results and generates a test report.

4. The closed-loop test equipment for primary frequency modulation test of energy storage power station according to claim 3, characterized in that: In said S5, the content analyzed by said computer analysis unit includes response lag time, active power before step or active power after step; The report content includes at least one of response time, adjustment time or control deviation; The test items tested by the closed-loop test equipment for the primary frequency regulation test of the energy storage power station are dynamic performance test, dead zone test and amplitude limiting test.

5. The closed-loop test equipment for primary frequency modulation test of energy storage power station according to claim 4, characterized in that: The digital-to-analog conversion circuit DAC is provided with a chip U16, and pins 1, 2, 3, 4, 5, and 6 of the chip U16 are respectively connected to the IO port of the first controller, so that the IO port of the first controller operates the chip U16 in a serial manner, and pins 18, 19, 22, and 23 of the chip U16 serve as analog output terminals, pin 32 of the chip U16 is connected to the reference ground, and pin 5 of the chip U16 is connected to pin 10.

6. The closed-loop test equipment for primary frequency modulation test of energy storage power station according to claim 5, characterized in that: The filter power amplifier circuit is provided with three; Each filtering power amplifier circuit is provided with a filter U13B, and one analog output end of the digital-to-analog conversion circuit DAC is connected to the 5th pin of the filter U13B through two resistors in sequence.

7. The closed-loop test equipment for primary frequency modulation test of energy storage power station according to claim 6, characterized in that: Each filter power amplifier circuit is further provided with an operational amplifier U11, a field effect transistor Q5, a field effect transistor Q6, a transistor Q7, a resistor R37, a resistor R38, a resistor R42, a resistor R51, a resistor R52, a resistor R53, a resistor R56, a resistor R59, a resistor R62, a resistor R63, a resistor R64, a resistor R66, a resistor R67, a resistor R68, a resistor R35, a resistor R36, a resistor R39, a resistor R41, a resistor R43, a resistor R44, a capacitor C33, a capacitor C35, a capacitor C40, a capacitor C46, a capacitor C47, a diode D4, a diode D5 and a diode D6. One of the analog output terminals of the digital-to-analog conversion circuit DAC is connected to the 5th pin of the filter U13B through resistors R37 and R38 in sequence. The 5th pin of the filter U13B is also connected in series with a capacitor C33 to be grounded. The connection point between the resistors R37 and R38 is connected in parallel with the capacitor C33 to the 7th pin of the filter U13B. The 6th pin of the filter U13B is connected in series with a resistor R42 and the 7th pin. The 7th pin of the filter U13B is connected in series with a resistor R59 as a filter output port to the 2nd pin of the operational amplifier U11. The 3rd pin of the operational amplifier U11 is connected in series with a resistor R52 to be grounded. The 2nd pin of the operational amplifier U11 is connected in series with resistors R67 and Capacitor C47 is connected to pin 6, and pin 2 of the operational amplifier U11 is connected in series with resistors R66 and R68 and connected to the feedback voltage terminal U_FB. Resistor R68 is connected in parallel with capacitor C46. Pin 6 of the operational amplifier U11 is connected in series with resistor R56 and the base of transistor Q7. The base of transistor Q7 is connected in series with resistor R63 and grounded. The emitter of transistor Q7 is connected in series with resistor R64 and grounded. The collector of transistor Q7 is connected in series with resistor R51 and HV-. The collector of transistor Q7 is connected in series with resistor R53 and pin 1 of field effect transistor Q6. Pin 1 of field effect transistor Q6 is connected in series with capacitor C40 and the cathode and the cathode of diode D4 and D5, respectively. The anode of diode D5 is connected to the cathode of diode D6, and pin 3 of field effect transistor Q6 is connected in series with resistor R62 to the HV- terminal. The anode of diode D4 and the cathode of diode D5 are respectively connected to pin 1 of field effect transistor Q5. Pin 1 of field effect transistor Q5 is connected in series with resistors R39 and R41 to pin 3. The anode of diode D6 is connected to the connection point between resistors R39 and R41. The anode of diode D6 serves as the U_OUT terminal. Pin 1 of field effect transistor Q5 is also connected in series with resistor R36 to pin 3. The anode of diode D6 is connected in series with resistors R43 and R44 to the feedback voltage terminal U_FB. The U_OUT terminals in the three filter power amplifier circuits serve as output terminals Ua, Ub, and Uc, respectively.

8. The closed-loop test equipment for primary frequency modulation test of energy storage power station according to claim 7, characterized in that: The signal conditioning circuit is provided with a voltage transformer TV1, an operational amplifier U1, a resistor R17, a resistor R18, a resistor R19 and a capacitor C73. The secondary negative pole of the voltage transformer TV1 is grounded, and the secondary positive pole of the voltage transformer TV1 is connected in series with resistors R18 and R19 in sequence and connected to pin 2 of the operational amplifier U1. The connection point between the resistors R18 and R19 is connected in series with resistor R17 and grounded, and the connection point between the resistor R19 and pin 2 of the operational amplifier U1 is connected in series with capacitor C73 and grounded. Pin 2 of the operational amplifier U1 is connected to pin 6, and pin 6 of the operational amplifier U1 serves as the output end Ux1 of the regulated voltage. The output end Ux1 is connected to the analog-to-digital conversion circuit ADC, pin 4 of the operational amplifier U1 is connected to -V12V, and pin 7 of the operational amplifier U1 is connected to +V12V.

9. The closed-loop test equipment for primary frequency modulation test of energy storage power station according to claim 8, characterized in that: The analog-to-digital conversion circuit ADC is provided with a chip U25, the output terminal Ux1 of the operational amplifier U1 is connected to the 49th pin of the chip U25, and the second controller reads the conversion data from the 24th and 25th pins of the chip U25 in a serial manner.

10. The closed-loop test equipment for primary frequency modulation test of energy storage power station according to claim 9, characterized in that: The models of the first controller and the second controller are both FPGA EP4CE15F12C8N / MCU AM3352; The model of chip U16 is AD5764BSUZ, the model of filter U13B is OP2177, the model of operational amplifier U11 is OP2177, the model of voltage transformer TV1 is TR11156-1C, the model of operational amplifier U1 is OP97, and the model of chip U25 is AD7606BSTZ.

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