Back contact battery, manufacturing method thereof and photovoltaic module

Abstract

The invention discloses a back contact battery, a manufacturing method thereof and a photovoltaic module, relates to the technical field of photovoltaics, and aims to reduce the hot spot risk of the back contact battery. A back contact cell includes a semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a transparent conductive layer. The thickness of the first doped semiconductor layer is greater than that of the second doped semiconductor layer. The transparent conductive layer is internally provided with an insulating groove, so that the part, electrically connected with the first doped semiconductor layer, of the transparent conductive layer is physically insulated from the part, corresponding to the second area, of the transparent conductive layer. A reverse electric leakage part included in the second doped semiconductor layer is electrically connected with the first doped semiconductor layer, and the reverse electric leakage part is covered with a transparent conductive layer extending from the second area. The first doped semiconductor layer includes a corner region. The corner region is from a sidewall root of the first doped semiconductor layer to an edge of the first doped semiconductor layer near the sidewall. The reverse electric leakage part is located in the corresponding range of the corner area of the first doped semiconductor layer.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic technology, and in particular to a back-contact cell and a manufacturing method thereof, and a photovoltaic module. Background Art

[0002] A back-contact cell refers to a solar cell in which the light-facing side of the cell has no electrode, and both the positive and negative electrodes are arranged on the backlight side of the cell. This can reduce the shading of the electrode on the cell, increase the short-circuit current of the cell, and improve the energy conversion efficiency of the cell.

[0003] During actual use, back-contact solar cells may be subject to obstructions such as bird droppings, leaves, and sand. This can cause the cell to heat up and create a hot spot effect. If the temperature of the hot spot exceeds a certain threshold, it can cause problems such as delamination of the photovoltaic module, burning of the backsheet, and cracking of the glass, rendering the entire solar cell useless. In severe cases, it may even pose a fire risk. Summary of the Invention

[0004] The object of the present invention is to provide a back-contact cell and a manufacturing method thereof, and a photovoltaic module, which are used to reduce the hot spot risk of the back-contact cell and improve the burn resistance of the back-contact cell.

[0005] To achieve the above objectives, in a first aspect, the present invention provides a back-contact battery comprising: a semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a transparent conductive layer. The first doped semiconductor layer and the second doped semiconductor layer have opposite conductivity types. The semiconductor substrate comprises a first surface and a second surface facing each other. The first surface comprises alternating first and second regions. The first doped semiconductor layer is disposed in the first region. The thickness of the first doped semiconductor layer is greater than that of the second doped semiconductor layer. The second doped semiconductor layer is disposed in the second region and extends over a portion of the first doped semiconductor layer. A transparent conductive layer overlies the first and second doped semiconductor layers. An insulating trench is provided through the transparent conductive layer to physically insulate the portion of the transparent conductive layer electrically connected to the first doped semiconductor layer from the portion of the transparent conductive layer corresponding to the second region. The second doped semiconductor layer comprises a reverse leakage portion electrically connected to the first doped semiconductor layer and covered by the transparent conductive layer extending from the second region. The first doped semiconductor layer comprises a corner region. The corner region extends from the base of the sidewall of the first doped semiconductor layer to the edge of the first doped semiconductor layer near the sidewall. The reverse leakage portion is located in a range corresponding to a corner region of the first doped semiconductor layer.

[0006] When the above technical solution is adopted, when the back-contact battery is in operation, the first doped semiconductor layer and the second doped semiconductor layer of opposite conductivity types can effectively shunt carriers, facilitating the formation of photocurrent. The transparent conductive layer covering the first and second doped semiconductor layers has high conductivity and can promptly conduct carriers collected by the first and second doped semiconductor layers, reducing the carrier recombination rate and facilitating the conversion efficiency of the back-contact battery. In addition, an insulating groove is provided through the transparent conductive layer, which can physically insulate the portion electrically connected to the transparent conductive layer and the first doped semiconductor layer from the portion of the transparent conductive layer corresponding to the second region. This physical insulation refers to the lack of contact, thereby preventing short circuit problems in the back-contact battery and improving the electrical reliability of the back-contact battery.

[0007] Secondly, the above-mentioned second doped semiconductor layer is not only arranged on the second region, but also extends to cover part of the first doped semiconductor layer. In addition, the second doped semiconductor layer includes a reverse leakage portion electrically connected to the first doped semiconductor layer, and the reverse leakage portion is covered with a transparent conductive layer extending from the second region. At this time, the reverse leakage portion of the second doped semiconductor layer can form a built-in diode with a lower reverse breakdown voltage with the portion of the first doped semiconductor layer located in the corner region. When the back contact battery is blocked, the leakage current can pass through the portion of the first doped semiconductor layer located in the corner region and the reverse leakage portion of the second doped semiconductor layer, and then through the transparent conductive layer extending from the second region to cover the portion on the reverse leakage portion, and be conducted out through the electrode in contact with the portion of the transparent conductive layer corresponding to the second region, thereby reducing the hot spot risk of the back contact battery and improving the burn-out resistance of the back contact battery. It should be noted that the reverse leakage portion is electrically connected to the first doped semiconductor layer, and this electrical connection method does not include an electrical connection achieved through a semiconductor substrate. It can be understood that the reverse leakage portion of the second doped semiconductor layer and the corner region of the first doped semiconductor layer can be electrically connected via a tunneling mechanism or a thin dielectric layer.

[0008] In addition, in the back-contact battery provided by the present invention, the corner area of the first doped semiconductor layer extends from the root of the sidewall of the first doped semiconductor layer to the edge of the first doped semiconductor layer close to the sidewall. Moreover, the reverse leakage portion of the second doped semiconductor layer is located within the corresponding range of the corner area of the first doped semiconductor layer. At this time, in the above-mentioned built-in diode, the size of the leakage contact area between the first doped semiconductor layer and the second doped semiconductor layer can be regulated by adjusting the thickness of the first doped semiconductor layer. The size of the above-mentioned leakage contact area will affect the size of the forward leakage loss and reverse breakdown voltage of the back-contact battery. Therefore, in actual application, the forward leakage loss and reverse breakdown voltage of the back-contact battery can be balanced by simply adjusting the thickness of the first doped semiconductor layer, thereby reducing the risk of hot spots and the difficulty of regulation of the back-contact battery while making the back-contact battery have higher conversion efficiency and yield in the forward voltage region.

[0009] Furthermore, in the actual manufacturing process of the back-contact battery provided by the embodiment of the present invention, the film thickness of the second doped semiconductor layer located in the corner region is relatively thinner than the film thickness of the second doped semiconductor layer located in other regions. At this time, it is easier to achieve reverse breakdown in the corner region, which is beneficial to the transmission of reverse leakage current. At the same time, the reverse leakage portion is located within the corresponding range of the corner region. Since the distance between the corner region and the transparent conductive layer located in the second region is smaller than that of the rest of the first doped semiconductor layer, the transmission path of the reverse leakage current can be shortened, the transmission resistance is reduced, and it is more conducive to the transmission of the reverse leakage current, thereby reducing the risk of hot spots in the back-contact battery.

[0010] As a possible implementation solution, the reverse leakage portion is only located on the sidewall of the corner region; or, the reverse leakage portion covers the entire corner region.

[0011] In the case of adopting the above technical solution, when the reverse leakage part is only located on the side wall of the corner area, in addition to the effective contact length between the first doped semiconductor layer and the second doped semiconductor layer along the length extension direction of the side wall, the size of the leakage contact area between the first doped semiconductor layer and the second doped semiconductor layer is only related to the thickness of the first doped semiconductor layer. At this time, the forward leakage loss and reverse breakdown voltage of the back contact battery can be precisely controlled by simply adjusting the thickness of the first doped semiconductor layer, and it is beneficial to further reduce the difficulty of control, ensuring that the back contact battery has a lower reverse breakdown voltage and higher conversion efficiency. In addition, the reverse leakage part can also cover the entire corner area. At this time, not only is there a leakage channel between the reverse leakage part of the second doped semiconductor layer and the side wall of the corner area, but there is also a leakage channel between the reverse leakage part of the second doped semiconductor layer and the top of the corner area, which is beneficial to increase the leakage contact area, ensuring that the back contact battery has a lower risk of hot spots in an installation environment with more obstructions such as sand and dust, and there is no need to strictly control the manufacturing precision in order to make the reverse leakage part only located on the side wall of the corner area, thereby reducing the difficulty of the manufacturing process.

[0012] As a possible implementation, the reverse leakage portion is continuously distributed along a direction perpendicular to the alternating direction of the first and second regions. This increases the leakage contact area between the reverse leakage portion and the corner region, further reducing the risk of hot spots in back-contact cells. This also eliminates the need for patterning operations to selectively etch the reverse leakage portion along the length of the corner region's sidewalls, improving back-contact cell manufacturing efficiency.

[0013] As a possible implementation solution, along the direction from the edge to the center of the first region, the width of the corner region is less than 100 nm.

[0014] When the above technical solution is adopted, since the reverse leakage portion of the second doped semiconductor layer is located within the corresponding range of the corner region of the first doped semiconductor layer, the width of the corner region along the edge to the center direction of the first region may affect the size of the leakage contact area between the first doped semiconductor layer and the second doped semiconductor layer. Based on this, when the width of the corner region is less than 100nm, the size of the leakage contact area can be controlled to prevent the forward leakage loss between the first doped semiconductor layer and the second doped semiconductor layer from being large under normal working conditions of the back contact battery due to the large leakage contact area, thereby ensuring that the back contact battery has a high conversion efficiency. In addition, in the actual manufacturing process, the mask layer located in the first doped semiconductor layer can be side-etched by an etchant, so that the corner region of the first doped semiconductor layer protrudes relative to the sidewall of the remaining portion of the mask layer, thereby contacting the second doped semiconductor layer. Based on this, when the width of the corner region is within the above range, the difficulty of the above side etching caused by the excessive width of the corner region can be prevented, which is conducive to reducing the difficulty of process manufacturing. Secondly, there is no need to use expensive photolithography processes or a combination of multiple masks to obtain a wider corner area, which reduces the manufacturing cost of the back contact battery and improves manufacturing efficiency.

[0015] As a possible implementation, the second doped semiconductor layer extends from above the corner region to cover the remaining portion of the first doped semiconductor layer along the direction from the edge to the center of the first region. The back-contact cell also includes a first insulating layer. The first insulating layer is disposed between the remaining portion of the first doped semiconductor layer and the second doped semiconductor layer.

[0016] When the above technical solution is adopted, while ensuring that the reverse leakage portion is located within the corresponding range of the corner area of the first doped semiconductor layer, so that when the back contact battery is blocked, there is a certain amount of leakage current between the reverse leakage portion and the corner area, ensuring that the back contact battery has a lower risk of hot spots, there is no need to strictly require high manufacturing precision in order to extend the second doped semiconductor layer only to the edge of the corner area away from the second area, thereby reducing the manufacturing difficulty. In addition, the first insulating layer arranged between the remaining part of the first doped semiconductor layer and the second doped semiconductor layer can also effectively control the effective leakage contact area between the overlapping parts of the first doped semiconductor layer and the second doped semiconductor layer along the thickness direction of the semiconductor substrate, reducing forward leakage loss and further improving the conversion efficiency of the back contact battery. In addition, the first insulating layer is arranged between the remaining part of the first doped semiconductor layer and the second doped semiconductor layer. At this time, the side wall of the first insulating layer close to the second area is indented inward relative to the side wall of the corner area. Based on this, when the height difference between the surface of the second region and the surface of the side of the first insulating layer facing away from the semiconductor substrate is fixed, compared with the sidewalls of the first insulating layer and the corner region being flush, the sidewall of the first insulating layer near the second region is indented inward relative to the sidewall of the corner region, so that a step morphology with gradually increasing height is formed between the surface of the second region and the side of the first insulating layer facing away from the semiconductor substrate, reducing the height variation between the two, which is conducive to better coating the second doped semiconductor layer at the junction of the second region and the first region, improving the film quality of the second doped semiconductor layer at the junction of the second region and the first region, facilitating the control of production yield, and also reducing the transmission resistance between the corner region at the junction and the reverse leakage portion with better film quality, further reducing the risk of hot spots. Furthermore, in the actual manufacturing process, the presence of the first insulating layer can also be used as at least a partial mask layer for selectively etching the first doped semiconductor layer, which is conducive to simplifying the process flow; at the same time, after selectively etching the first doped semiconductor layer, it is not necessary to completely remove the first insulating layer, thereby reducing the etching damage of the etchant to the second region of the semiconductor substrate and improving the yield. Furthermore, if laser etching is used to form the insulating grooves in the transparent conductive layer, the presence of the first insulating layer can also reduce the impact of the high-temperature laser on the underlying first doped semiconductor layer and the semiconductor substrate.

[0017] As a possible implementation scheme, in the portion where the first doped semiconductor layer and the second doped semiconductor layer overlap along the thickness direction of the semiconductor substrate, the ratio of the width of the first insulating layer to the width of the corner region along the direction from the edge to the center of the first region is greater than or equal to 10 and less than or equal to 1000.

[0018] When the above technical solution is adopted, as mentioned above, the width of the corner region may affect the size of the leakage contact area between the reverse leakage part and the corner region. Based on this, when the width of the second doped semiconductor layer extending to the first region is fixed, the ratio of the width of the first insulating layer to the width of the corner region may affect the size of the above leakage contact area. Therefore, when the ratio of the width of the first insulating layer to the width of the corner region is within the above range, it is beneficial to prevent the leakage contact area from being larger due to the smaller width of the corner region due to the smaller ratio, thereby ensuring that the back contact battery has higher forward leakage loss and conversion efficiency. In addition, this can prevent the leakage contact area from being smaller due to the smaller width of the corner region due to the larger ratio, thereby ensuring that the back contact battery has higher anti-burning ability.

[0019] As a possible implementation, along the direction from the edge to the center of the first region, the transparent conductive layer further extends from above the corner region to above the remaining region of the first doped semiconductor layer. In the transparent conductive layer, the portion extending from the second region to above the remaining region of the first doped semiconductor layer is separated from the first doped semiconductor layer by a first insulating layer. The application principle of the beneficial effect in this case can be referred to the application principle of the beneficial effect of the second doped semiconductor layer extending from above the corner region to cover the remaining region of the first doped semiconductor layer, as described above, and will not be repeated here.

[0020] As a possible implementation solution, the width of the portion of the transparent conductive layer extending from the second region to the first region is greater than or equal to 5 μm and less than or equal to 80 μm.

[0021] When using the above technical solution, the width of the portion of the transparent conductive layer extending from the second region to the first region is within the above range, which helps prevent the large amount of etching required to form the insulating trench due to a smaller width, thereby improving etching throughput. Furthermore, this also prevents the smaller width of the insulating trench due to a larger width, ensuring a low risk of leakage between the portion of the transparent conductive layer electrically connected to the first doped semiconductor layer and the portion of the transparent conductive layer corresponding to the second region, further improving the electrical reliability of the back-contact cell.

[0022] As a possible implementation solution, a groove is formed in the second region and is recessed into the semiconductor substrate. The bottom surface of the groove is a velvet surface, and the surface of the first region is a polished surface.

[0023] When the above technical solution is adopted, the surface of the first region is a flat surface. At this time, the surface roughness of the first region is relatively small, which is conducive to making the first doped semiconductor layer deposited on the surface of the first region have a larger film thickness, ensuring that there is a larger side interface area between the corner region of the first doped semiconductor layer and the reverse leakage portion of the second doped semiconductor layer, which is conducive to further reducing the risk of hot spots in the back contact battery. In addition, a groove is formed in the second region that is concave into the semiconductor substrate, and the bottom surface of the groove is a velvet surface. At this time, the part of the second doped semiconductor layer arranged on the bottom surface of the groove has a side that is substantially the same as the velvet surface on the side facing away from the semiconductor substrate, which is conducive to increasing the contact area between the second doped semiconductor layer and the transparent conductive layer, reducing transmission loss, and improving the conversion efficiency of the back contact battery. Furthermore, the side wall of the corner region is close to the second region, and the reverse leakage portion is located within the range corresponding to the corner region. Based on this, when the back contact battery is blocked, the reverse leakage current will be transmitted through the corner region and the reverse leakage portion, and the heat there is relatively high. In this case, a groove is provided in the second area adjacent to the side wall of the corner area, so that other structures such as the second doped semiconductor layer provided on the second area can be staggered with the corner area along the thickness direction of the semiconductor substrate, thereby preventing heat from accumulating inside the battery and facilitating heat dissipation.

[0024] As a possible implementation solution, the distance between the edge of the first region and the edge of the groove is less than or equal to 500 nm.

[0025] When the above technical solution is adopted, the distance between the first doped semiconductor layer arranged in the first region and the edge of the groove is small, ensuring that the first doped semiconductor layer has a larger area ratio on the side of the first surface, thereby improving the carrier collection efficiency of the corresponding conductive type. In addition, compared with the edge of the first doped semiconductor being flush with the edge of the groove, when the distance between the edge of the first region and the edge of the groove is less than or equal to 500nm, the edge of the first doped semiconductor layer can also have a certain distance from the edge of the groove, which is beneficial to reducing the height variation from the bottom of the groove to the side of the first doped semiconductor layer away from the semiconductor substrate, thereby facilitating the second doped semiconductor layer to be better coated on the boundary area between the bottom of the groove and the edge of the first doped semiconductor layer, thereby improving the yield of the back contact battery. At the same time, it is also ensured that there is sufficient effective leakage contact area between the reverse leakage part of the second doped semiconductor layer and the side wall of the corner area arranged at the edge of the first doped semiconductor layer, thereby ensuring that the back contact battery has a lower risk of hot spots. Furthermore, the certain distance between the edge of the first region and the edge of the recess can be formed by undercutting the portion of the first doped semiconductor layer located below the mask layer during the process of removing the portion of the first doped semiconductor layer located above the second region with an etchant. Therefore, when the distance between the edge of the first region and the edge of the recess is within the aforementioned range, the difficulty of undercutting caused by an excessively large distance can be avoided, thereby reducing the difficulty of manufacturing the process.

[0026] As a possible implementation solution, the above-mentioned back-contact battery further includes a first interface passivation layer. The first interface passivation layer is disposed between the first doped semiconductor layer and the semiconductor substrate.

[0027] When the above-mentioned technical solution is adopted, the passivation contact structure composed of the first interface passivation layer and the first doped semiconductor layer has an excellent interface passivation effect, and can realize the selective collection of carriers, reduce the carrier recombination rate in the first area of the first surface of the semiconductor substrate, and further improve the photoelectric conversion efficiency of the back contact battery.

[0028] As a possible implementation solution, the back contact cell further includes a second interface passivation layer disposed between the second region of the first surface and the second doped semiconductor layer, and extending between the second doped semiconductor layer and the first doped semiconductor layer.

[0029] When the above technical solution is adopted, the passivation contact structure composed of the second interface passivation layer and the portion of the second doped semiconductor layer located on the second region can achieve selective collection of carriers and reduce the carrier recombination rate in the second region of the first surface of the semiconductor substrate.

[0030] As a possible implementation solution, the thickness of the second interface passivation layer is greater than or equal to 2 nm and less than or equal to 30 nm.

[0031] When the above technical solution is adopted, within a certain range, the thickness of the second interface passivation layer is proportional to its own transmission resistance. Based on this, when the thickness of the second interface passivation layer is within the above range, it is helpful to prevent the reverse leakage loss between the second doped semiconductor layer and the corner area due to the small thickness of the second interface passivation layer, thereby ensuring that the back contact battery has a high conversion efficiency. In addition, it can also prevent the transmission resistance of the portion of the second interface passivation layer corresponding to the second area from being large due to the large thickness of the second interface passivation layer, thereby ensuring that the portion of the second doped semiconductor layer corresponding to the second area has a high carrier collection efficiency.

[0032] As a possible implementation solution, the thickness of the second interface passivation layer covering the sidewall of the first doped semiconductor layer is smaller than the thickness of the second interface passivation layer located on the second region.

[0033] When the above technical solution is adopted, the portion of the second interface passivation layer covering the sidewall of the first doped semiconductor layer has a relatively large thickness, so that the portion of the second interface passivation layer covering the sidewall of the first doped semiconductor layer has a relatively large transmission resistance, which is beneficial to reducing the magnitude of the reverse leakage current transmitted through the second interface passivation layer between the corner area of the first doped semiconductor layer and the reverse leakage portion of the second doped semiconductor layer, which is beneficial to reducing forward leakage loss and ensuring that the back-contact battery has a high conversion efficiency. Secondly, the portion of the second interface passivation layer located in the second region has a relatively small thickness, so that the portion of the second interface passivation layer located in the second region has a small transmission resistance, ensuring that the portion of the second doped semiconductor layer corresponding to the second region has a high carrier collection efficiency.

[0034] As a possible implementation solution, the thickness of the first doped semiconductor layer is greater than 50 nm and less than or equal to 200 nm.

[0035] When the above technical solution is adopted, the thickness of the first doped semiconductor layer is within the above range, which is beneficial to prevent the field passivation effect of the first doped semiconductor layer from being low due to the small thickness of the first doped semiconductor layer; it can also prevent the use of large amounts of consumables in manufacturing the first doped semiconductor layer due to the large thickness of the first doped semiconductor layer, which is beneficial to controlling the manufacturing cost of the back contact battery. In addition, the thickness of the first doped semiconductor layer will affect the junction area of the built-in diode between the sidewall of the corner area and the reverse leakage part of the second doped semiconductor layer, and thus affect the leakage contact area between the first doped semiconductor layer and the second doped semiconductor layer. Based on this, when the thickness of the first doped semiconductor layer is within the above range, it can also prevent the leakage current between the first doped semiconductor layer and the second doped semiconductor layer from being too large or too small due to the large or small thickness of the first doped semiconductor layer, effectively regulating the forward leakage loss and reverse breakdown voltage of the back contact battery, so that the back contact battery has higher working performance and lower hot spot risk.

[0036] As a possible implementation solution, the doping concentration of the dopant in the first doped semiconductor layer and / or the second doped semiconductor layer is greater than or equal to 1E19 cm -3 , and less than or equal to 5E20cm -3 .

[0037] When the above technical solution is adopted, the doping concentration of the dopant in at least one of the first doped semiconductor layer and the second doped semiconductor layer is within the above range, which can prevent the low field passivation effect on the semiconductor substrate caused by the low doping concentration of the dopant in the first doped semiconductor layer and / or the second doped semiconductor layer, and ensure that the first side of the back contact battery has a relatively low carrier recombination rate under normal working conditions; at the same time, it is also beneficial to make the first doped semiconductor layer and / or the second doped semiconductor layer have good conductivity, ensuring that the corner area of the first doped semiconductor layer and / or the reverse leakage part of the second doped semiconductor layer have a relatively low transmission resistance when the back contact battery is blocked, which is beneficial to further reduce the reverse breakdown voltage of the back contact battery. In addition, it can also prevent the difficulty of doping the intrinsic semiconductor layer used to manufacture the first doped semiconductor layer and / or the second doped semiconductor layer due to the high doping concentration of the dopant in the first doped semiconductor layer and / or the second doped semiconductor layer, which is beneficial to improve the yield of the back contact battery.

[0038] As a possible implementation solution, the first doped semiconductor layer includes a doped crystalline silicon layer.

[0039] When the above technical solution is adopted, the doped crystalline silicon layer has higher lateral conductivity than the doped amorphous silicon layer. Based on this, when the first doped semiconductor layer includes a doped crystalline silicon layer, it is beneficial to reduce its own carrier lateral transmission loss and reduce the carrier recombination rate. At the same time, it is also beneficial to reduce the transmission loss of the leakage current between the sidewall of the corner area of the first doped semiconductor layer and the reverse leakage part of the second doped semiconductor layer along the arrangement direction of the first region and the second region, which is beneficial to further reduce the leakage loss of the back contact battery. Secondly, compared with the doped amorphous silicon layer, the doped crystalline silicon layer also has relatively high thermal stability, which can reduce or even eliminate the thermal effect of the high-temperature laser on the first doped semiconductor layer during the selective etching of the entire second doped semiconductor layer by the laser etching process, thereby improving the yield of the back contact battery. In addition, compared with the doped amorphous silicon layer, the doped crystalline silicon layer has a relatively regular crystal structure. After selective etching, it can maintain a good sidewall morphology (that is, the corner area has a good sidewall morphology), which is beneficial to achieve the control of the hot spot risk of the back contact battery. The doped amorphous silicon layer requires strict control of etching process conditions during selective etching to achieve good sidewall morphology. Therefore, when the first doped semiconductor layer includes a doped crystalline silicon layer, the etching difficulty can be reduced and the manufacturing yield can be improved.

[0040] As a possible implementation solution, the thickness of the second doped semiconductor layer is greater than or equal to 5 nm and less than or equal to 50 nm. The application principle of the beneficial effect in this case is the same as the application principle of the beneficial effect of the first doped semiconductor layer having a thickness greater than or equal to 50 nm and less than or equal to 200 nm described above, and will not be repeated here.

[0041] As a possible implementation solution, the crystallization rate of the second doped semiconductor layer is less than or equal to 60%.

[0042] In the case of adopting the above technical solution, it can be understood that the degree of crystallization of the second doped semiconductor layer will affect its own conductivity, thereby affecting the leakage loss of the back contact battery under normal working conditions and the reverse breakdown voltage of the back contact battery when it is blocked. Based on this, when the degree of crystallization of the second doped semiconductor layer is within the above range, the degree of crystallization of the second doped semiconductor layer has a larger optional range. At this time, when the back contact battery provided by the present invention is set in an installation environment with fewer obstructions such as bird droppings, leaves or sand, the degree of crystallization of the second doped semiconductor layer can be set within a smaller range to reduce the recombination rate of carriers of opposite conductivity types between the first doped semiconductor layer and the second doped semiconductor layer, thereby helping to reduce the leakage loss of the back contact battery in the forward voltage region and ensure that the back contact battery has a higher conversion efficiency. When the back contact battery provided by the invention is set in an installation environment with more obstructions such as bird droppings, leaves or sand, the degree of crystallization of the second doped semiconductor layer can be set within a larger range to improve the conductivity of the second doped semiconductor layer, thereby helping to reduce the reverse breakdown voltage of the back contact battery and ensure that the back contact battery has a lower risk of hot spots. It can be seen from this that the degree of crystallization of the second doped semiconductor layer can be set according to different environmental requirements, thereby improving the applicability of the back contact battery provided by the present invention in different practical application scenarios.

[0043] As a possible implementation solution, the electrical conductivity of the second doped semiconductor layer is greater than or equal to 10E-5 S / cm and less than or equal to 1 S / cm.

[0044] When the above technical solution is adopted, it can be understood that the conductivity of the second doped semiconductor layer directly affects its own conductivity. The conductivity of the second doped semiconductor layer will affect the leakage loss of the back contact battery under normal working conditions, as well as the reverse breakdown voltage of the back contact battery when it is blocked. Based on this, when the conductivity of the second doped semiconductor layer is within the above range, it can prevent the forward leakage loss of the back contact battery from being large due to the high conductivity of the second doped semiconductor layer. In addition, it can also prevent the reverse breakdown voltage of the back contact battery from being high due to the low conductivity of the second doped semiconductor layer, which is further conducive to achieving a balance between the reverse breakdown voltage and conversion efficiency of the back contact battery.

[0045] As a possible implementation solution, the crystallization rate of the second interface passivation layer is less than or equal to 60%. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the crystallization rate of the second doped semiconductor layer being less than or equal to 60% described above, which will not be repeated here.

[0046] As a possible implementation solution, the thickness of the transparent conductive layer is greater than or equal to 10 nm and less than or equal to 150 nm.

[0047] When using the above technical solution, within a certain range, the thickness of the transparent conductive layer is proportional to its conductivity. Therefore, when the thickness of the transparent conductive layer is within the above range, it can prevent the high carrier recombination rate on the first side of the back contact battery under normal operation due to the poor conductivity of the transparent conductive layer due to its small thickness, and the high transmission resistance of the transparent conductive layer to leakage current when the back contact battery is blocked, thereby ensuring that the back contact battery has high conversion efficiency and low hot spot risk. In addition, it also helps to prevent the large amount of transparent conductive layer consumables used due to the large thickness of the transparent conductive layer, which helps to control the manufacturing cost of the back contact battery.

[0048] As a possible implementation, the material of the first doped semiconductor layer includes polycrystalline silicon and / or single crystal silicon, and the material of the second doped semiconductor layer includes at least one of amorphous silicon, microcrystalline silicon, and nanocrystalline silicon. The degree of crystallization of at least a portion of the second doped semiconductor layer located in the second region is greater than the degree of crystallization of a reverse leakage portion of the second doped semiconductor layer.

[0049] When the above technical solution is adopted, it can be understood that when the back contact battery is in normal working condition, the portion of the second doped semiconductor layer located in the second region needs to collect and guide out the carriers of the corresponding conductive type generated in the semiconductor substrate to facilitate the formation of photocurrent. The reverse leakage portion of the second doped semiconductor layer is electrically connected to the first doped semiconductor layer of the opposite conductive type. When the back contact battery is in normal working condition, there will be leakage current between the reverse leakage portion of the second doped semiconductor layer and the corner region of the first doped semiconductor layer. Secondly, under the same conditions of other factors, when the degree of crystallization of the doped semiconductor layer is smaller, the grains in the doped semiconductor layer are smaller, and it may even show the disorder of amorphous semiconductor material. The smaller the grains in the doped semiconductor layer and / or the fewer the number of grains, the more interfaces between the grains in the doped semiconductor layer, so the resistance of the grain interface will be greater. In the above case, when the degree of crystallization of at least the portion of the second doped semiconductor layer located in the second region is set to be greater than the degree of crystallization of the reverse leakage portion of the second doped semiconductor layer, the conductivity of at least the portion of the second doped semiconductor layer located in the second region is increased, which helps reduce transmission loss in at least the portion of the second doped semiconductor layer located in the second region and reduces the contact resistance between at least the portion of the second doped semiconductor layer located in the second region and the transparent conductive layer. However, since the degree of crystallization of the reverse leakage portion of the second doped semiconductor layer is relatively low, the conductivity of the reverse leakage portion of the second doped semiconductor layer is relatively low, which helps reduce the magnitude of forward leakage loss between the reverse leakage portion of the second doped semiconductor layer and the corner region of the first doped semiconductor layer, further improving the conversion efficiency of the back-contact cell.

[0050] As a possible implementation, the material of the first doped semiconductor layer includes polycrystalline silicon and / or single crystal silicon, and the material of the second doped semiconductor layer includes at least one of amorphous silicon, microcrystalline silicon, and nanocrystalline silicon. The degree of crystallization of at least a portion of the second doped semiconductor layer located in the second region is greater than the degree of crystallization of a portion of the second doped semiconductor layer located in the first region.

[0051] When using the above technical solution, it can be understood that the reverse leakage portion of the second doped semiconductor layer is electrically connected to the corner region of the first doped semiconductor layer, and the entire first doped semiconductor layer is located in the first region. Based on this, when the battery is operating normally, reducing the degree of crystallization of the second doped semiconductor layer in the first region can effectively reduce forward leakage loss and further improve the conversion efficiency of the back-contact battery.

[0052] As a possible implementation scheme, the material of the above-mentioned first doped semiconductor layer includes polycrystalline silicon and / or single crystal silicon, and the material of the second doped semiconductor layer includes at least one of amorphous silicon, microcrystalline silicon and nanocrystalline silicon. The second doped semiconductor layer is divided into a high crystallization region and a low crystallization region. The degree of crystallization of the portion of the second doped semiconductor layer located in the low crystallization region is less than the degree of crystallization of the portion of the second doped semiconductor layer located in the high crystallization region. In the second doped semiconductor layer, at least the reverse leakage portion is located in the low crystallization region, and at least part of the corresponding second region is located in the high crystallization region. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the degree of crystallization of at least part of the second doped semiconductor layer located in the second region being greater than the degree of crystallization of the reverse leakage portion of the second doped semiconductor layer as described above, and will not be repeated here.

[0053] As a possible implementation scheme, the above-mentioned low crystallization region is located in the first region; or, along the arrangement direction of the first region and the second region, one side edge of the low crystallization region is located in the first region and the other side edge extends to the second region.

[0054] When the above technical solution is adopted, since the corner region of the first doped semiconductor layer is located within the first region, and the reverse leakage portion of the second doped semiconductor layer is located within the corresponding range of the corner region, when the low-crystalline region is located within the first region, it can ensure that the conductivity of each region of the reverse leakage portion is relatively low, effectively controlling the magnitude of the forward leakage loss between the reverse leakage portion and the corner region, thereby facilitating the improvement of the conversion efficiency of the back-contact battery. In addition, when, along the arrangement direction of the first and second regions, one edge of the low-crystalline region is located within the first region and the other edge extends into the second region, it is beneficial to prevent the above operation from affecting the reverse leakage portion of the second doped semiconductor layer while making at least a portion of the second region corresponding to the second region located within the high-crystalline region through laser processing or the like, thereby ensuring that the reverse leakage portion of the second doped semiconductor layer has relatively low conductivity while reducing the requirements for the processing accuracy.

[0055] In a second aspect, the present invention provides a method for manufacturing a back-contact battery. The method comprises: first, providing a semiconductor substrate. The semiconductor substrate has a first surface and a second surface facing each other. The first surface includes alternating first and second regions. Next, forming a first doped semiconductor layer disposed in the first region. Next, forming a second doped semiconductor layer disposed in the second region and extending over and covering a portion of the first region. The first doped semiconductor layer and the second doped semiconductor layer have opposite conductivity types. The thickness of the first doped semiconductor layer is greater than that of the second doped semiconductor layer. Next, forming a transparent conductive layer overlying the first and second doped semiconductor layers. An insulating trench is provided through the transparent conductive layer to physically insulate the portion of the transparent conductive layer electrically connected to the first doped semiconductor layer from the portion of the transparent conductive layer corresponding to the second region. The second doped semiconductor layer includes a reverse leakage portion electrically connected to the first doped semiconductor layer and covered by the transparent conductive layer extending from the second region. The first doped semiconductor layer includes a corner region. The corner region extends from the base of the sidewall of the first doped semiconductor layer to the edge of the first doped semiconductor layer near the sidewall. The reverse leakage portion is located in a range corresponding to a corner region of the first doped semiconductor layer.

[0056] As one possible implementation, forming the first doped semiconductor layer disposed in the first region includes: forming the first doped semiconductor layer entirely disposed on the first surface; then, forming a first insulating layer on the portion of the first doped semiconductor layer corresponding to the first region; then, under the protection of the first insulating layer, removing the portion of the first doped semiconductor layer corresponding to the second region; and finally, removing the portion of the first insulating layer covering the corner region.

[0057] When adopting the above technical solution, after removing the portion of the first doped semiconductor layer corresponding to the second area, the portion of the first insulating layer covering the corner area is also removed, which is conducive to making the reverse leakage part of the second doped semiconductor layer and the side of the corner area away from the semiconductor substrate also have a leakage channel, thereby increasing the leakage contact area between the first doped semiconductor layer and the second doped semiconductor layer, and further reducing the hot spot risk of the back-contact battery.

[0058] As a possible implementation scheme, the above-mentioned formation of the first doped semiconductor layer arranged in the first region includes: forming an entire layer of the first doped semiconductor layer arranged on the first surface. Next, a first insulating layer and a second insulating layer are formed on the first doped semiconductor layer in a direction away from the semiconductor substrate. The first insulating layer is made of the same material, and the refractive index of the second insulating layer is smaller than the refractive index of the first insulating layer. The stacked first insulating layer and the second insulating layer are arranged in the first region and extend to the edge of the second region. Next, under the protection of the second insulating layer, the portion of the first doped semiconductor layer corresponding to the second region is removed; and the portion of the first insulating layer corresponding to the second region and the corner region is removed. Next, the second insulating layer is removed.

[0059] When the above technical solution is adopted, the first insulating layer and the second insulating layer, which are made of the same material but have different refractive indices, have different etching selectivities. Based on this, by taking advantage of the different etching rates of the first insulating layer and the second insulating layer in different etchants, selective etching of the first doped semiconductor layer and the first insulating layer is first achieved under the protection of the second insulating layer, ensuring that the corresponding etchant can only remove the portion of the first insulating layer covered by the second insulating layer corresponding to the corner area along the arrangement direction of the first and second regions, preventing the first insulating layer from being completely removed by the etchant, resulting in an excessively large leakage contact area between the first doped semiconductor layer and the second doped semiconductor layer, reducing forward leakage loss, and ensuring high conversion efficiency of the back-contact battery.

[0060] As a possible implementation, laser etching is used to create insulating grooves in the transparent conductive layer. In this case, the laser etching process has high etching precision and fast etching rate, which is conducive to improving the precision and manufacturing efficiency of the manufactured back-contact solar cell.

[0061] The beneficial effects of the second aspect of the present invention and its various implementations can be analyzed with reference to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0062] In a third aspect, the present invention provides a photovoltaic module, which includes the back-contact cell provided by the first aspect and various implementations thereof.

[0063] The beneficial effects of the third aspect of the present invention and its various implementations can be analyzed with reference to the beneficial effects of the first aspect and its various implementations, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0065] Figure 1 A longitudinal cross-sectional view of the back contact battery structure provided by an embodiment of the present invention Figure 1 ;

[0066] Figure 2 A longitudinal cross-sectional view of the back contact battery provided in an embodiment of the present invention Figure 2 ;

[0067] Figure 3 A longitudinal cross-sectional view of the back contact battery provided in an embodiment of the present invention Figure 3 ;

[0068] Figure 4 A longitudinal cross-sectional view of the back contact battery structure provided by an embodiment of the present invention Figure 4 ;

[0069] Figure 5 A longitudinal cross-sectional view of the back contact battery provided in an embodiment of the present invention Figure 5 ;

[0070] Figure 6 A longitudinal cross-sectional view of the back contact battery structure provided by an embodiment of the present invention Figure 6 ;

[0071] Figure 7 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 1 ;

[0072] Figure 8 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 2 ;

[0073] Figure 9 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 3 ;

[0074] Figure 10 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 4 ;

[0075] Figure 11 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 5 ;

[0076] Figure 12 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 6 ;

[0077] Figure 13A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 7 ;

[0078] Figure 14 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 8 ;

[0079] Figure 15 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 9 ;

[0080] Figure 16 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 10 ;

[0081] Figure 17 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 10 one;

[0082] Figure 18 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 10 two.

[0083] Figure numerals: 11 is a semiconductor substrate, 12 is a first doped semiconductor layer, 13 is a second doped semiconductor layer, 14 is a transparent conductive layer, 15 is a first region, 16 is a second region, 17 is an insulating groove, 18 is a reverse leakage portion, 19 is a corner region, 20 is a first insulating layer, 21 is a first interface passivation layer, 22 is a second interface passivation layer, 23 is a second insulating layer, 24 is a first electrode, and 25 is a second electrode. DETAILED DESCRIPTION

[0084] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are merely exemplary and are not intended to limit the scope of the present invention. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessary confusion of the concepts of the present invention.

[0085] The accompanying drawings illustrate various structural schematics according to embodiments of the present invention. These figures are not drawn to scale; certain details are exaggerated and may be omitted for clarity. The shapes of the various regions and layers shown in the figures, as well as their relative sizes and positions, are merely exemplary and may deviate in practice due to manufacturing tolerances or technical limitations. Those skilled in the art may design regions / layers with different shapes, sizes, and relative positions as needed.

[0086] In the context of the present invention, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or an intervening layer / element may exist between them. Furthermore, if a layer / element is "on" another layer / element in one orientation, it may be "below" the other layer / element when the orientation is reversed. To further clarify the technical problems, technical solutions, and beneficial effects of the present invention, the present invention is further described below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are intended solely to illustrate the present invention and are not intended to limit the present invention.

[0087] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Thus, a feature specified as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined. "Several" means one or more, unless otherwise specifically defined.

[0088] In the description of the present invention, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they may refer to fixed, detachable, or integral connections; mechanical or electrical connections; direct or indirect connections through an intermediate medium; and may encompass internal communication between two components or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0089] In a first aspect, an embodiment of the present invention provides a back contact battery. Figure 1As shown, the back-contact cell includes: a semiconductor substrate 11, a first doped semiconductor layer 12, a second doped semiconductor layer 13 and a transparent conductive layer 14. The first doped semiconductor layer 12 and the second doped semiconductor layer 13 have opposite conductivity types. The semiconductor substrate 11 includes a first surface and a second surface opposite to each other. The first surface includes first regions 15 and second regions 16 that are alternately distributed. The first doped semiconductor layer 12 is arranged in the first region 15. The thickness of the first doped semiconductor layer 12 is greater than that of the second doped semiconductor layer 13. The second doped semiconductor layer 13 is arranged in the second region 16 and extends to cover a portion of the first doped semiconductor layer 12. The transparent conductive layer 14 covers the first doped semiconductor layer 12 and the second doped semiconductor layer 13. An insulating groove 17 is provided through the transparent conductive layer 14 to physically insulate the portion of the transparent conductive layer 14 that is electrically connected to the first doped semiconductor layer 12 from the portion of the transparent conductive layer 14 corresponding to the second region 16. The second doped semiconductor layer 13 includes a reverse leakage portion 18, which is electrically connected to the first doped semiconductor layer 12. The reverse leakage portion 18 is covered by the transparent conductive layer 14 extending from the second region 16. The first doped semiconductor layer 12 includes a corner region 19. The corner region 19 extends from the root of the sidewall of the first doped semiconductor layer 12 to the edge of the first doped semiconductor layer 12 near the sidewall. The reverse leakage portion 18 is located within the area corresponding to the corner region 19 of the first doped semiconductor layer 12.

[0090] When the above technical solution is adopted, when the back contact battery is in the working state, the first doped semiconductor layer and the second doped semiconductor layer of opposite conductivity types can effectively shunt carriers, which is conducive to the formation of photocurrent. The transparent conductive layer covering the first doped semiconductor layer and the second doped semiconductor layer has a high conductivity property and can promptly conduct the carriers collected by the first doped semiconductor layer and the second doped semiconductor layer, reducing the carrier recombination rate and facilitating the improvement of the conversion efficiency of the back contact battery. In addition, if Figure 1 As shown, an insulating groove 17 is provided through the transparent conductive layer 14, which can physically insulate the portion where the transparent conductive layer 14 and the first doped semiconductor layer 12 are electrically connected from the portion of the transparent conductive layer 14 corresponding to the second region 16. The physical insulation means no contact, so as to prevent the back contact battery from having a short circuit problem and improve the electrical reliability of the back contact battery.

[0091] Secondly, if Figure 1As shown, the second doped semiconductor layer 13 is not only disposed on the second region 16, but also extends to cover a portion of the first doped semiconductor layer 12. Furthermore, the second doped semiconductor layer 13 includes a reverse leakage portion 18 electrically connected to the first doped semiconductor layer 12. The reverse leakage portion 18 is covered with a transparent conductive layer 14 extending from the second region 16. At this time, the reverse leakage portion 18 of the second doped semiconductor layer 13 can form a built-in diode with a low reverse breakdown voltage with the portion of the first doped semiconductor layer 12 located in the corner region 19. When the back-contact battery is blocked, the leakage current (it should be emphasized that for the sake of convenience and clarity of description, when the leakage current transmission mode mentioned in the embodiments of the present invention includes not only its own transmission path but also its own transmission direction, but does not mean that the transmission direction of the leakage current can only be a single direction as described. When the conductivity type of the first doped semiconductor layer and the second doped semiconductor layer changes, the transmission direction of the leakage current can also be opposite to the direction described, that is, the embodiment of the present invention only defines the transmission path of the leakage current, not the transmission direction of the leakage current) can pass through the portion of the first doped semiconductor layer 12 located in the corner region 19 and the reverse leakage portion 18 of the second doped semiconductor layer 13, and then through the portion of the transparent conductive layer 14 extending from the second region 16 to cover the reverse leakage portion 18, and then be conducted through the electrode in contact with the portion of the transparent conductive layer 14 corresponding to the second region 16, thereby reducing the risk of hot spots in the back-contact battery and improving the burn-out resistance of the back-contact battery. Among them, it should be noted that the reverse leakage portion 18 is electrically connected to the first doped semiconductor layer 12, and this electrical connection method does not include electrical connection achieved through the semiconductor substrate 11. It can be understood that the reverse leakage portion 18 of the second doped semiconductor layer 13 and the corner region 19 included in the first doped semiconductor layer 12 can be electrically connected through a tunneling mechanism or a thin dielectric layer. In addition, in the back contact battery provided by the embodiment of the present invention, the corner region 19 of the first doped semiconductor layer 12 extends from the root of the side wall of the first doped semiconductor layer 12 to the edge of the first doped semiconductor layer 12 close to the side wall. Moreover, the reverse leakage portion 18 of the second doped semiconductor layer 13 is located within the corresponding range of the corner region 19 of the first doped semiconductor layer 12. At this time, in the above-mentioned built-in diode, the size of the leakage contact area between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 can be regulated by adjusting the thickness of the first doped semiconductor layer 12. The size of the above-mentioned leakage contact area will affect the forward leakage loss and reverse breakdown voltage of the back contact battery. Therefore, in actual application, the forward leakage loss and reverse breakdown voltage of the back contact battery can be balanced and regulated by simply adjusting the thickness of the first doped semiconductor layer 12. This can reduce the hot spot risk and regulation difficulty of the back contact battery while enabling the back contact battery to have higher conversion efficiency and yield in the forward voltage region.Furthermore, in the actual manufacturing process of the back-contact battery provided by the embodiment of the present invention, the thickness of the second doped semiconductor layer 13 located in the corner region 19 is relatively thinner than the thickness of the second doped semiconductor layer 13 located in other regions. At this time, it is easier to achieve reverse breakdown in the corner region 19, which is beneficial to the transmission of the reverse leakage current. At the same time, the reverse leakage portion 18 is located within the corresponding range of the corner region 19. Because the distance between the corner region 19 and the transparent conductive layer 14 located in the second region 16 is smaller than that of the rest of the first doped semiconductor layer 12, the transmission path of the reverse leakage current can be shortened, the transmission resistance is reduced, and it is more conducive to the transmission of the reverse leakage current, reducing the risk of hot spots in the back-contact battery.

[0092] In actual applications, the embodiments of the present invention do not specifically limit the material and conductivity type of the semiconductor substrate. For example, the semiconductor substrate may be a silicon substrate. Alternatively, the semiconductor substrate may be a substrate made of any other semiconductor material, such as a silicon germanium substrate, a germanium substrate, or a gallium arsenide substrate. Furthermore, the semiconductor substrate may be either an N-type semiconductor substrate or a P-type semiconductor substrate.

[0093] Secondly, the above-mentioned semiconductor substrate includes a first surface and a second surface relative to each other, the first surface of the semiconductor substrate corresponds to the backlight surface of the back contact battery, and the second surface of the semiconductor substrate corresponds to the light-facing surface of the back contact battery. The distribution of the first region and the second region on the first surface can be determined based on the distribution of the first doped semiconductor layer and the second doped semiconductor layer formed on one side of the first surface. Specifically, since the first doped semiconductor layer included in the back contact battery is arranged in the first region, the distribution range of the first region on the first surface can be determined based on the distribution requirements of the first doped semiconductor layer in the actual application scenario. Since part of the second doped semiconductor layer included in the back contact battery is arranged on the second region of the first surface, the distribution range of the second region on the first surface can be determined based on the distribution requirements of the second doped semiconductor layer on the semiconductor substrate in the actual application scenario.

[0094] It can be understood that the first region corresponds to the first emitter region, and the second region corresponds to the second emitter region. One of the first region and the second region is a P region, and the other is an N region.

[0095] The morphology of the first region and the second region can be configured according to actual needs, as long as they can be applied to the back-contact battery provided by the embodiment of the present invention. For example, the first region and the second region can be alternately distributed in strips or interdigitated shapes.

[0096] The arrangement direction of the first and second regions can be determined based on their distribution on the first surface and is not specifically limited here. For example, when the first and second regions are arranged in an alternating strip pattern, the arrangement direction of the first and second regions is parallel to the arrangement direction of the two adjacent strip-shaped regions. For another example, when the first and second regions are arranged in an alternating interdigitated pattern, the arrangement direction of the first and second regions is parallel to the arrangement direction of the two adjacent "F"-shaped regions.

[0097] In terms of surface morphology, Figure 1 As shown, the first and second surfaces of the semiconductor substrate 11 may be polished surfaces. Alternatively, as shown Figure 2 As shown, the second surface of the semiconductor substrate 11 may also be a velvet surface to improve the light trapping effect of the second surface and increase the utilization rate of light by the semiconductor substrate 11.

[0098] Secondly, the surfaces of the first area and the second area of the first surface can be flush. Figure 3 As shown, a groove recessed into the semiconductor substrate 11 may also be formed in the second region 16; at this time, the surface height of the groove portion along the direction from the second surface to the first surface is smaller than the surface height of the first region 15, so as to ensure that, in the actual manufacturing process, after the entire deposited first doped semiconductor layer 12 is selectively etched, no first doped semiconductor layer 12 remains on the surface of the second region 16 of the semiconductor substrate 11, thereby preventing short circuit.

[0099] Among them, Figure 1 As shown, the surfaces of the first region 15 and the second region 16 can both be polished surfaces. Figure 3As shown, the surface of the first region 15 can also be a polished surface, and the bottom surface of the groove can be a velvet surface. In this case, the surface of the first region 15 is a flat surface with a low surface roughness, which helps the first doped semiconductor layer 12 deposited on the surface of the first region 15 to have a larger film thickness, ensuring a larger side contact area between the corner region 19 of the first doped semiconductor layer 12 and the reverse leakage portion 18 of the second doped semiconductor layer 13, which helps further reduce the risk of hot spots in back-contact cells. In addition, a groove is formed in the second region 16, which is recessed into the semiconductor substrate 11, and the bottom surface of the groove is a velvet surface. In this case, the portion of the second doped semiconductor layer 13 disposed at the bottom surface of the groove, its side facing away from the semiconductor substrate 11, also has an undulating morphology substantially similar to the velvet surface, which helps increase the contact area between the second doped semiconductor layer 13 and the transparent conductive layer 14, reduces transmission loss, and improves the conversion efficiency of the back-contact cell. Furthermore, the sidewalls of the corner region 19 are close to the second region 16, and the reverse leakage portion 18 is located within the range corresponding to the corner region 19. Based on this, when the back-contact cell is shielded, reverse leakage current is transmitted through the corner region 19 and the reverse leakage portion 18, where heat is relatively high. In this case, the second region 16 adjacent to the sidewall of the corner region 19 is provided with a groove, so that other structures such as the second doped semiconductor layer 13 provided on the second region 16 can be staggered with respect to the corner region 19 along the thickness direction of the semiconductor substrate 11, preventing heat accumulation within the cell and facilitating heat dissipation.

[0100] In addition, if Figure 3 As shown, the edge of the first region 15 can be aligned with the edge of the groove, and the surface height of each part of the second region 16 is less than the surface height of the first region 15. Figure 4 As shown, the edge of the first region 15 may also be spaced a certain distance from the edge of the groove opening. In this case, compared to when the edge of the first doped semiconductor is flush with the edge of the groove opening, when the edge of the first region 15 is spaced a certain distance from the edge of the groove opening, it is beneficial to reduce the height variation from the bottom of the groove to the side of the first doped semiconductor layer 12 facing away from the semiconductor substrate 11, thereby facilitating better coverage of the second doped semiconductor layer 13 on the interface between the bottom of the groove and the edge of the first doped semiconductor layer 12, thereby improving the yield of the back-contact cell. At the same time, it also ensures that there is sufficient effective leakage contact area between the reverse leakage portion 18 of the second doped semiconductor layer 13 and the sidewall of the corner region 19 provided at the edge of the first doped semiconductor layer 12, ensuring that the back-contact cell has a lower risk of hot spots.

[0101] Specifically, the spacing between the edge of the first region and the edge of the groove can be determined based on the area ratio of the first doped semiconductor layer on one side of the first surface in the actual application scenario, and the formation quality requirements of the second doped semiconductor layer at the junction of the first region and the second region. No specific limitation is made here.

[0102] Exemplarily, the distance between the edge of the first region and the edge of the notch of the groove can be less than or equal to 500nm. For example, the distance between the edge of the first region and the edge of the notch of the groove can be 5nm, 10nm, 50nm, 100nm, 200nm, 300nm, 400nm or 500nm. In this case, the distance between the first doped semiconductor layer provided in the first region and the edge of the notch of the groove is small, ensuring that the first doped semiconductor layer has a larger area ratio on the side of the first surface, thereby improving the carrier collection efficiency of the corresponding conductivity type. At the same time, it is also beneficial to reduce the height variation from the bottom surface of the groove to the side of the first doped semiconductor layer away from the semiconductor substrate, improve the formation quality of the second doped semiconductor layer at the junction of the first region and the second region (corner region), and further reduce the risk of hot spots in back contact batteries. Furthermore, the certain distance between the edge of the first region and the edge of the notch of the groove can be formed by the etchant in the process of removing the portion of the first doped semiconductor layer located on the second region, and side etching the portion of the first doped semiconductor layer located below the mask layer. Based on this, when the distance between the edge of the first region and the edge of the groove is within the above range, it can prevent the difficulty of side etching caused by excessive distance, which is conducive to reducing the difficulty of process manufacturing.

[0103] Regarding the first doped semiconductor layer, the present invention does not impose any specific restrictions on the conductivity type of the first doped semiconductor layer, as long as the conductivity types of the first doped semiconductor layer and the second doped semiconductor layer are opposite. Specifically, the conductivity type of the first doped semiconductor layer can be N-type, in which case the conductivity type of the second doped semiconductor layer is P-type; alternatively, the conductivity type of the first doped semiconductor layer can be P-type, in which case the conductivity type of the second doped semiconductor layer is N-type.

[0104] In terms of materials, the first doped semiconductor layer may include any semiconductor material such as silicon, silicon germanium, germanium, or gallium arsenide. In terms of the arrangement of the materials, the crystalline phase of the first doped semiconductor layer may be amorphous, microcrystalline, nanocrystalline, single crystal, or polycrystalline.

[0105] Optionally, the above-mentioned first doped semiconductor layer includes a doped crystalline silicon layer. The doped crystalline silicon layer may include a doped polycrystalline silicon layer and / or a doped single crystal silicon layer. In this case, the doped crystalline silicon layer has higher lateral conductivity than the doped amorphous silicon layer. Based on this, when the first doped semiconductor layer includes a doped crystalline silicon layer, it is beneficial to reduce its own carrier lateral transmission loss and reduce the carrier recombination rate. At the same time, it is also beneficial to reduce the transmission loss of the leakage current between the side wall of the corner area of the first doped semiconductor layer and the reverse leakage part of the second doped semiconductor layer along the arrangement direction of the first region and the second region, which is beneficial to further reduce the leakage loss of the back contact battery. Secondly, compared with the doped amorphous silicon layer, the doped crystalline silicon layer also has relatively high thermal stability, which can reduce or even eliminate the thermal effect of the high-temperature laser on the first doped semiconductor layer during the selective etching of the entire layer of the second doped semiconductor layer by the laser etching process, thereby improving the yield of the back contact battery. In addition, compared to the doped amorphous silicon layer, the doped crystalline silicon layer has a relatively regular crystal structure. After selective etching, it can maintain a good sidewall appearance (even in the corner area), which is beneficial for controlling the risk of hot spots in back-contact cells. During the selective etching process of the doped amorphous silicon layer, the etching process conditions must be strictly controlled to achieve a good sidewall appearance. Therefore, when the first doped semiconductor layer includes a doped crystalline silicon layer, the etching difficulty can be reduced and the manufacturing yield can be improved.

[0106] In terms of the formation position, Figure 1 As shown, the first doped semiconductor layer 12 can be directly disposed on the first region 15. Alternatively, as shown in FIG. Figure 3 As shown, the above-mentioned back contact cell may also include a first interface passivation layer 21 located between the first doped semiconductor layer 12 and the semiconductor substrate 11. In this case, the passivation contact structure composed of the first interface passivation layer 21 and the first doped semiconductor layer 12 has an excellent interface passivation effect, and can achieve selective collection of carriers, reduce the carrier recombination rate in the first region 15 of the first surface of the semiconductor substrate 11, and further improve the photoelectric conversion efficiency of the back contact cell. The material and thickness of the first interface passivation layer 21 can be set according to the material of the first doped semiconductor layer 12 and actual needs, and are not specifically limited here. For example: when the material of the first doped semiconductor layer is doped polycrystalline silicon, the first interface passivation layer is a tunneling passivation layer. For another example: when the material of the first doped semiconductor layer includes at least one of doped amorphous silicon, doped microcrystalline silicon and doped nanocrystalline silicon, the first interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon layer or a mixed layer of the above three.

[0107] Exemplarily, the thickness of the above-mentioned first doped semiconductor layer can be greater than 50nm and less than or equal to 200nm. For example, the thickness of the first doped semiconductor layer can be 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, 120nm, 150nm, 180nm or 200nm, etc. In this case, the thickness of the first doped semiconductor layer is within the above-mentioned range, which helps to prevent the field passivation effect of the first doped semiconductor layer from being low due to the small thickness of the first doped semiconductor layer; it can also prevent the use of large amounts of consumables in manufacturing the first doped semiconductor layer due to the large thickness of the first doped semiconductor layer, which helps to control the manufacturing cost of the back contact battery. In addition, the thickness of the first doped semiconductor layer will affect the junction area of the built-in diode between the sidewall of the corner area and the reverse leakage part of the second doped semiconductor layer, and thus affect the leakage contact area between the first doped semiconductor layer and the second doped semiconductor layer. Based on this, when the thickness of the first doped semiconductor layer is within the above range, it can also prevent the leakage current between the first doped semiconductor layer and the second doped semiconductor layer from being too large or too small due to the thickness of the first doped semiconductor layer being larger or smaller, and effectively regulate the forward leakage loss and reverse breakdown voltage of the back contact battery, so that the back contact battery has higher working performance and lower hot spot risk.

[0108] Exemplarily, the doping concentration of the dopant in the first doped semiconductor layer is greater than or equal to 1E19 cm -3 , and less than or equal to 5E20cm -3 For example, the doping concentration of the dopant in the first doped semiconductor layer can be 1E19 cm -3 、2E19cm -3 、4E19cm -3 、6E19cm -3 、8E19cm -3 、1E20cm -3 、3E20cm -3 or 5E20cm -3 In this case, the doping concentration of the dopant in the first doped semiconductor layer is within the above range, which can prevent the low field passivation effect on the semiconductor substrate caused by the low doping concentration of the dopant in the first doped semiconductor layer, and ensure that the first side of the back contact battery has a relatively low carrier recombination rate under normal operation; at the same time, it is also beneficial to make the first doped semiconductor layer have good conductivity, ensuring that the corner area of the first doped semiconductor layer has a relatively low transmission resistance when the back contact battery is blocked, which is beneficial to further reduce the reverse breakdown voltage of the back contact battery. In addition, it can also prevent the difficulty of doping the intrinsic semiconductor layer used to manufacture the first doped semiconductor layer due to the high doping concentration of the dopant in the first doped semiconductor layer, which is beneficial to improving the yield of the back contact battery.

[0109] In addition, it is understandable that because the reverse leakage portion of the second doped semiconductor layer is located within the corresponding range of the corner region of the first doped semiconductor layer, the width of the corner region along the direction from the edge to the center of the first region may affect the size of the leakage contact area between the first doped semiconductor layer and the second doped semiconductor layer, thereby affecting the forward leakage loss and reverse breakdown voltage of the back-contact battery. Based on this, the width of the corner region along the direction from the edge to the center of the first region can be determined based on the conversion efficiency and hot spot risk requirements of the back-contact battery in actual application scenarios, and is not specifically limited here.

[0110] Exemplarily, the width of the corner region along the direction from the edge to the center of the first region can be less than 100nm. For example, the width of the corner region can be 5nm, 10nm, 20nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm or 95nm, etc. In this case, it is possible to prevent the forward leakage loss between the first doped semiconductor layer and the second doped semiconductor layer of the back contact battery under normal working conditions from being large due to the large leakage contact area, thereby ensuring that the back contact battery has a high conversion efficiency. In addition, in the actual manufacturing process, the mask layer located on the first doped semiconductor layer can be side-etched by an etchant, so that the corner region of the first doped semiconductor layer protrudes relative to the sidewall of the remaining portion of the mask layer, thereby contacting the second doped semiconductor layer. Based on this, when the width of the corner region is within the above range, it is possible to prevent the difficulty of the above-mentioned side etching due to the excessive width of the corner region, which is conducive to reducing the difficulty of process manufacturing. Secondly, there is no need to use expensive photolithography processes or a combination of multiple masks to obtain a wider corner area, which reduces the manufacturing cost of the back contact battery and improves manufacturing efficiency.

[0111] Regarding the second doped semiconductor layer, the material of the second doped semiconductor layer can include any semiconductor material such as silicon, silicon germanium, germanium, or gallium arsenide. Regarding the arrangement of the materials, the crystal phase of the second doped semiconductor layer can be amorphous, microcrystalline, nanocrystalline, single crystal, or polycrystalline. The specific value of the crystallinity of the second doped semiconductor layer can be determined based on the actual application scenario and is not specifically limited here.

[0112] Exemplarily, the crystallinity of the second doped semiconductor layer can be less than or equal to 60%. For example, the crystallinity of the second doped semiconductor layer can be 0, 5%, 10%, 20%, 30%, 40%, 50%, or 60%. In this case, it can be understood that the degree of crystallization of the second doped semiconductor layer will affect its own conductivity, thereby affecting the leakage loss of the back contact cell under normal operating conditions and the reverse breakdown voltage of the back contact cell when it is blocked. Based on this, when the degree of crystallization of the second doped semiconductor layer is within the above range, the degree of crystallization of the second doped semiconductor layer has a larger optional range. In this case, when the back contact cell provided by the embodiment of the present invention is installed in an environment with few obstructions such as bird droppings, leaves, or sand and dust, the degree of crystallization of the second doped semiconductor layer can be set within a smaller range to reduce the recombination rate of carriers of opposite conductivity types between the first doped semiconductor layer and the second doped semiconductor layer, thereby facilitating the reduction of leakage loss of the back contact cell in the forward voltage region and ensuring that the back contact cell has a high conversion efficiency. When the back-contact battery provided by the embodiment of the invention is installed in an environment with many obstructions such as bird droppings, leaves, or sand and dust, the degree of crystallization of the second doped semiconductor layer can be set within a larger range to improve the conductivity of the second doped semiconductor layer, thereby helping to reduce the reverse breakdown voltage of the back-contact battery and ensuring that the back-contact battery has a low risk of hot spots. Thus, it can be seen that the degree of crystallization of the second doped semiconductor layer can be set according to different environmental requirements, improving the applicability of the back-contact battery provided by the embodiment of the invention in different practical application scenarios.

[0113] In terms of electrical conductivity, the conductivity of the second doped semiconductor layer directly affects its own electrical conductivity. The conductivity of the second doped semiconductor layer affects the forward leakage loss of the back contact cell between the reverse leakage portion and the corner region, as well as the reverse breakdown voltage of the back contact cell when shielded. Based on this, the conductivity of the second doped semiconductor layer can be determined based on the leakage loss and reverse breakdown voltage requirements in the actual application scenario.

[0114] Exemplarily, the electrical conductivity of the second doped semiconductor layer may be greater than or equal to 10E-5S / cm and less than or equal to 1S / cm. For example, the electrical conductivity of the second doped semiconductor layer may be 10E-5S / cm, 2E-4S / cm, 5E-4S / cm, 10E-4S / cm, 2E-3S / cm, 5E-3S / cm, 10E-3S / cm, 10E-2S / cm, 5E-1S / cm, or 1S / cm. In this case, it is possible to prevent the back contact battery from having a large forward leakage loss due to the high electrical conductivity of the second doped semiconductor layer. In addition, it is possible to prevent the back contact battery from having a high reverse breakdown voltage due to the low electrical conductivity of the second doped semiconductor layer. This further helps to achieve a balance between the reverse breakdown voltage and conversion efficiency of the back contact battery.

[0115] In actual application, the conductive properties of different parts of the second doped semiconductor layer may be the same or different.

[0116] It is understood that when the back-contact cell is operating normally, the portion of the second doped semiconductor layer located in the second region needs to collect and conduct carriers of the corresponding conductivity type generated within the semiconductor substrate to facilitate the formation of photocurrent. The reverse leakage portion of the second doped semiconductor layer is electrically connected to the first doped semiconductor layer of opposite conductivity type. When the back-contact cell is operating normally, leakage current will flow between the reverse leakage portion of the second doped semiconductor layer and the corner region of the first doped semiconductor layer. Secondly, all other factors being equal, the lower the degree of crystallization of the doped semiconductor layer, the smaller the grains in the doped semiconductor layer, and the layer may even exhibit the disordered nature of an amorphous semiconductor material. The smaller the grains and / or the fewer the number of grains in the doped semiconductor layer, the more interfaces there are between the grains, resulting in a higher resistance at the grain interface. Therefore, the degree of crystallization of the portions of the second doped semiconductor layer located in different regions affects its own conductive properties. Therefore, the conductive properties and degree of crystallization of different portions of the second doped semiconductor layer can be determined based on the role of the portions of the second doped semiconductor layer located in different regions in the actual application scenario, as well as the requirements for the conversion efficiency and hot spot risk of the back-contact cell.

[0117] Illustratively, the material of the first doped semiconductor layer includes polycrystalline silicon and / or single crystal silicon, and the material of the second doped semiconductor layer includes at least one of amorphous silicon, microcrystalline silicon, and nanocrystalline silicon. The degree of crystallization of at least a portion of the second doped semiconductor layer located in the second region may be greater than the degree of crystallization of a reverse leakage portion of the second doped semiconductor layer.

[0118] It should be noted that, as used in the embodiments of the present invention, a greater degree of crystallization may refer to a greater crystallization rate, a larger grain size, and / or a greater number of grains. For example, when the second doped semiconductor layer is a nanocrystalline silicon layer (this nanocrystalline silicon layer may still contain a portion of amorphous silicon, which is unavoidable and has a relatively low content of amorphous silicon, as is known in the art), at least the portion of the second doped semiconductor layer located in the second region has a greater degree of crystallization, and this portion has a greater crystallization rate and grain size than the reverse leakage portion of the second doped semiconductor layer. For another example, when the second doped semiconductor layer is an amorphous silicon layer (this amorphous silicon layer may contain a small amount of nanocrystalline silicon, but the content of this nanocrystalline silicon is very small, for example, less than 5%, as is known in the art), at least the portion of the second doped semiconductor layer located in the second region will generate lattice-ordered grains, thereby increasing its degree of crystallization. The reverse leakage portion of the second doped semiconductor layer, however, has a lower degree of crystallization. In this case, this portion with a lower degree of crystallization remains amorphous silicon material and has not been subjected to laser or other treatment to generate grains. In this case, when the degree of crystallization of at least the portion of the second doped semiconductor layer located in the second region is set to be greater than the degree of crystallization of the reverse leakage portion of the second doped semiconductor layer, the conductivity of at least the portion of the second doped semiconductor layer located in the second region is increased, which helps reduce transmission loss in at least the portion of the second doped semiconductor layer located in the second region and reduces the contact resistance between at least the portion of the second doped semiconductor layer located in the second region and the transparent conductive layer. Since the degree of crystallization of the reverse leakage portion of the second doped semiconductor layer is less, the conductivity of the reverse leakage portion of the second doped semiconductor layer is relatively low. This helps reduce the magnitude of forward leakage loss between the reverse leakage portion of the second doped semiconductor layer and the corner region of the first doped semiconductor layer, further improving the conversion efficiency of the back-contact cell.

[0119] In terms of scope, the degree of crystallization may be relatively high only in a portion of the second doped semiconductor layer located in a localized area of the second region, or the degree of crystallization may be relatively high throughout the entire second region. The scope of the portion of the second doped semiconductor layer with a relatively high degree of crystallization may be determined based on the method used in the actual manufacturing process to achieve different degrees of crystallization in different regions of the second doped semiconductor layer, as well as the actual manufacturing accuracy, and is not specifically limited here.

[0120] Secondly, when the material of the first doped semiconductor layer includes polycrystalline silicon and / or single crystal silicon, and the material of the second doped semiconductor layer includes at least one of amorphous silicon, microcrystalline silicon and nanocrystalline silicon, the degree of crystallization of at least a portion of the second doped semiconductor layer located in the second region may be only greater than the degree of crystallization of the reverse leakage portion of the second doped semiconductor layer. Alternatively, the degree of crystallization of at least a portion of the second doped semiconductor layer located in the second region may be greater than the degree of crystallization of the portion of the second doped semiconductor layer located in the first region. In this case, it can be understood that the reverse leakage portion of the second doped semiconductor layer is electrically connected to the corner region of the first doped semiconductor layer, and the entire first doped semiconductor layer is arranged in the first region. Based on this, when the battery is operating normally, reducing the degree of crystallization of the second doped semiconductor layer located in the first region can effectively and better reduce the forward leakage loss and further improve the conversion efficiency of the back-contact battery.

[0121] In addition, it is understood that the greater the degree of crystallization of at least the portion of the second doped semiconductor layer located in the second region, the greater the conductivity of that portion. The less crystallization of the reverse leakage portion of the second doped semiconductor layer, the lower the conductivity of that portion, and in this case, the conversion efficiency of the back-contact battery is higher. At the same time, the degree of reduction in the risk of hot spots will also be affected. Therefore, the difference between the degree of crystallization of at least the portion of the second doped semiconductor layer located in the second region and the degree of crystallization of the reverse leakage portion of the second doped semiconductor layer can be determined based on the requirements for the conversion efficiency and hot spot risk of the back-contact battery in actual application scenarios, and is not specifically limited here.

[0122] Exemplarily, the difference between the crystallization rate of at least the portion of the second doped semiconductor layer located in the second region and the crystallization rate of the reverse leakage portion of the second doped semiconductor layer can be greater than or equal to 40% and less than or equal to 80%. For example, the difference between the crystallization rate of at least the portion of the second doped semiconductor layer located in the second region and the crystallization rate of the reverse leakage portion of the second doped semiconductor layer can be 40%, 42%, 45%, 50%, 55%, 60%, 65%, 70%, 75% or 80%, etc. In this case, if the difference is within the above range, it is beneficial to prevent the small difference from causing the crystallization degree of at least the portion of the second doped semiconductor layer located in the second region to be small, resulting in poor carrier collection efficiency of the portion, and / or causing the reverse leakage portion of the second doped semiconductor layer to have a high crystallization degree, resulting in a large forward leakage current corresponding to the portion, thereby ensuring that the back-contact battery has a high conversion efficiency. In addition, it can also prevent the high risk of hot spots in the back contact battery due to the small degree of crystallization of the reverse leakage part of the second doped semiconductor layer caused by the large difference, thereby ensuring that the back contact battery has a high ability to resist burning.

[0123] In actual application, when the material of the first doped semiconductor layer includes polycrystalline silicon and / or single crystal silicon, and the material of the second doped semiconductor layer includes at least one of amorphous silicon, microcrystalline silicon and nanocrystalline silicon, the second doped semiconductor layer can also be divided into a high crystallization region and a low crystallization region. The degree of crystallization of the portion of the second doped semiconductor layer located in the low crystallization region is less than the degree of crystallization of the portion of the second doped semiconductor layer located in the high crystallization region. Based on this, in the second doped semiconductor layer, at least the reverse leakage portion is located in the low crystallization region, and at least part of the corresponding second region is located in the high crystallization region. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the degree of crystallization of at least part of the second doped semiconductor layer located in the second region being greater than the degree of crystallization of the reverse leakage portion of the second doped semiconductor layer as described above, and will not be repeated here.

[0124] Among them, in terms of scope, the scope of the high crystallization region and the low crystallization region in the second doped semiconductor layer can be determined according to the method used in the actual manufacturing process to make the degree of crystallization of different regions of the second doped semiconductor layer different, as well as the actual manufacturing accuracy, and is not specifically limited here.

[0125] Specifically, the low-crystalline region can be located within the first region. In this case, the low-crystalline region of the second doped semiconductor layer can correspond only to the portion of the second doped semiconductor layer that covers the sidewalls of the corner region. Alternatively, the low-crystalline region can correspond not only to the portion of the second doped semiconductor layer that covers the sidewalls of the corner region, but also to at least a portion of the second doped semiconductor layer that extends over the first doped semiconductor layer. The high-crystalline region of the second doped semiconductor layer can correspond only to the portion of the second doped semiconductor layer located within a localized area of the second region. Alternatively, the high-crystalline region can correspond to the entire second region.

[0126] Alternatively, along the arrangement direction of the first and second regions, one edge of the low-crystallization region is located within the first region, and the other edge extends to the second region. In this case, the portion of the second doped semiconductor layer located in the high-crystallization region only corresponds to the portion of the second doped semiconductor layer located within a partial range of the second region.

[0127] When the above technical solution is adopted, since the corner region of the first doped semiconductor layer is located within the first region and the reverse leakage portion of the second doped semiconductor layer is located within the corresponding range of the corner region, when the low-crystalline region is located within the first region, the conductivity of each region of the reverse leakage portion can be ensured to be small, effectively controlling the magnitude of the forward leakage loss between the reverse leakage portion and the corner region, thereby improving the conversion efficiency of the back contact battery. In addition, when one edge of the low-crystalline region is located within the first region and the other edge extends to the second region along the arrangement direction of the first region and the second region, it is beneficial to prevent the above operation from affecting the reverse leakage portion of the second doped semiconductor layer while making at least a portion of the second region corresponding to the second region located within the high-crystalline region by laser processing or the like, thereby ensuring that the reverse leakage portion of the second doped semiconductor layer has a small conductivity while reducing the requirements for the processing process accuracy. In addition, there are multiple examples of the division range of the low-crystalline region and the high-crystalline region in the second doped semiconductor layer, which is beneficial to reducing the process difficulty while also improving the applicability of the back contact battery provided by the embodiment of the present invention in different application scenarios.

[0128] The difference in the degree of crystallization between the low-crystallized region and the high-crystallized region of the second doped semiconductor layer can be determined based on the conversion efficiency and hot spot risk requirements of the back-contact cell in the actual application scenario. Specifically, reference can be made to the difference in the degree of crystallization of at least the portion of the second doped semiconductor layer located in the second region and the degree of crystallization of the reverse leakage portion of the second doped semiconductor layer, as described above, which will not be further elaborated here.

[0129] From the doping aspect, the embodiment of the present invention does not impose any specific limitation on the doping concentration of the dopant in the second doped semiconductor layer, as long as it can be applied to the back contact battery provided by the embodiment of the present invention.

[0130] Exemplarily, the doping concentration of the dopant in the second doped semiconductor layer is greater than or equal to 1E19 cm -3 , and less than or equal to 5E20cm -3 For example, the doping concentration of the dopant in the second doped semiconductor layer can be 1E19 cm -3 、2E19cm -3 、4E19cm -3 、6E19cm -3 、8E19cm -3 、1E20cm -3 、3E20cm -3 or 5E20cm -3In this case, the doping concentration of the dopant in the second doped semiconductor layer is within the above range, which can prevent the low field passivation effect on the semiconductor substrate caused by the low doping concentration of the dopant in the second doped semiconductor layer, and ensure that the first side of the back contact battery has a relatively low carrier recombination rate under normal operation; at the same time, it is also beneficial to make the second doped semiconductor layer have good conductivity, ensuring that the reverse leakage part of the second doped semiconductor layer has a relatively low transmission resistance when the back contact battery is blocked, which is beneficial to further reduce the reverse breakdown voltage of the back contact battery. In addition, it can also prevent the difficulty of doping the intrinsic semiconductor layer used to manufacture the second doped semiconductor layer due to the high doping concentration of the dopant in the second doped semiconductor layer, which is beneficial to improving the yield of the back contact battery.

[0131] In terms of thickness, the embodiment of the present invention does not specifically limit the thickness of the second doped semiconductor layer. For example, the thickness of the second doped semiconductor layer can be greater than or equal to 5 nm and less than or equal to 50 nm. For example, the thickness of the second doped semiconductor layer can be 5 nm, 10 nm, 15 nm, 20 nm, 30 nm, 40 nm, or 50 nm. The application principle of the beneficial effect in this case is the same as the application principle of the beneficial effect of the first doped semiconductor layer having a thickness greater than or equal to 50 nm and less than or equal to 200 nm described above, and will not be repeated here.

[0132] In terms of the formation position, Figure 1 As shown, the second doped semiconductor layer 13 can be directly disposed in the second region 16 and extend to cover a portion of the first doped semiconductor layer 12. Alternatively, as shown in FIG. Figure 3 As shown, the above-mentioned back-contact cell may further include a second interface passivation layer 22, which is located between the second region 16 of the first surface and the second doped semiconductor layer 13, and extends between the second doped semiconductor layer 13 and the first doped semiconductor layer 12. In this case, the passivation contact structure composed of the second interface passivation layer 22 and the portion of the second doped semiconductor layer 13 located on the second region 16 can achieve selective collection of carriers and reduce the carrier recombination rate in the second region 16 of the first surface of the semiconductor substrate 11. The material and thickness of the second interface passivation layer 22 can be set according to the material of the second doped semiconductor layer 13 and actual needs, and are not specifically limited here. For example, when the material of the second doped semiconductor layer is doped polycrystalline silicon, the second interface passivation layer is a tunneling passivation layer. For another example, when the material of the second doped semiconductor layer includes doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon, the second interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon, or a mixture of the above three.

[0133] Exemplarily, the crystallization rate of the above-mentioned second interface passivation layer can be less than or equal to 60%. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the crystallization rate of the second doped semiconductor layer being less than or equal to 60% as described above, and will not be repeated here. Among them, the degree of crystallization of each part of the second interface passivation layer can be the same or different. When there are differences in the degree of crystallization of different parts of the second interface passivation layer, the distribution between the parts with different degrees of crystallization in the second interface passivation layer, and the difference in the degree of crystallization between different parts can refer to the distribution between the parts with different degrees of crystallization in the second doped semiconductor layer, and the difference in the degree of crystallization between different parts as described above, and will not be repeated here.

[0134] As for the thickness of the second interface passivation layer, since the thickness of the second interface passivation layer will affect its own transmission resistance and passivation effect, and thus affect the forward leakage loss and reverse breakdown voltage of the back contact battery, the thickness of the second interface passivation layer can be determined according to the requirements for the forward leakage loss and reverse breakdown voltage of the back contact battery in the actual application scenario, and no specific limitation is made here.

[0135] Exemplarily, the thickness of the second interface passivation layer can be greater than or equal to 2nm and less than or equal to 30nm. For example, the thickness of the second interface passivation layer can be 2nm, 5nm, 8nm, 10nm, 12nm, 15nm, 18nm, 20nm, 24nm, 26nm or 30nm, etc. In this case, when the thickness of the second interface passivation layer is within the above range, it is beneficial to prevent the forward leakage loss between the reverse leakage part of the second doped semiconductor layer and the corner area from being large due to the small thickness of the second interface passivation layer, thereby ensuring that the back contact battery has a higher conversion efficiency. In addition, it can also prevent the transmission resistance of the portion of the second interface passivation layer corresponding to the second area from being large due to the large thickness of the second interface passivation layer, thereby ensuring that the portion of the second doped semiconductor layer corresponding to the second area has a higher carrier collection efficiency.

[0136] Wherein, the thickness of each part of the second interface passivation layer can be the same or different. Exemplarily, the thickness of the second interface passivation layer covering the side wall of the first doped semiconductor layer can be less than the thickness of the second interface passivation layer located on the second region. In this case, the portion of the second interface passivation layer covering the side wall of the first doped semiconductor layer has a relatively large thickness, so that the portion of the second interface passivation layer covering the side wall of the first doped semiconductor layer has a relatively large transmission resistance, which is beneficial to reducing the magnitude of the reverse leakage current transmitted by the corner area of the first doped semiconductor layer and the reverse leakage part of the second doped semiconductor layer through the second interface passivation layer, which is beneficial to reducing the forward leakage loss and ensuring that the back contact battery has a higher conversion efficiency. Secondly, the portion of the second interface passivation layer located in the second region has a relatively small thickness, so that the portion of the second interface passivation layer located in the second region has a smaller transmission resistance, ensuring that the portion of the second doped semiconductor layer corresponding to the second region has a higher carrier collection efficiency.

[0137] It should be noted that when the back contact battery includes a first interface passivation layer and a second interface passivation layer, the first interface passivation layer and the first doped semiconductor layer constitute a first passivation contact structure, and the second interface passivation layer and the second doped semiconductor layer constitute a second passivation contact structure.

[0138] Among them, the passivation contact types of the first passivation contact structure and the second passivation contact structure can be the same. For example: the first passivation contact structure and the second passivation contact structure are both tunneling passivation contact structures or heterogeneous contact structures. Alternatively, the passivation contact types of the first passivation contact structure and the second passivation contact structure can also be different. For example: one of the first passivation contact structure and the second passivation contact structure is a tunneling passivation contact structure, and the other is a heterogeneous contact structure. In this case, when the passivation contact types of the first passivation contact structure and the second passivation contact structure are different, the passivation contact types of the first passivation contact structure and the second passivation contact structure can be adjusted separately according to different actual application scenario requirements to improve the applicability of the back contact battery provided by the embodiment of the present invention in different application scenarios.

[0139] In addition, in actual application, the reverse leakage portion of the second doped semiconductor layer can be located only on the side wall of the corner region. In this case, when the reverse leakage portion is located only on the side wall of the corner region, in addition to the effective contact length between the first doped semiconductor layer and the second doped semiconductor layer along the length extension direction of the side wall, the size of the leakage contact area between the first doped semiconductor layer and the second doped semiconductor layer is only related to the thickness of the first doped semiconductor layer. At this time, the forward leakage loss and reverse breakdown voltage of the back contact battery can be precisely controlled by simply adjusting the thickness of the first doped semiconductor layer, and it is beneficial to further reduce the difficulty of control and ensure that the back contact battery has a lower reverse breakdown voltage and a higher conversion efficiency. Specifically, in this case, the reverse leakage portion can contact all parts of the side wall of the corner region along the thickness direction of the semiconductor substrate, or it can only contact part of the side wall of the corner region along the thickness direction of the semiconductor substrate.

[0140] Or, as Figure 4 As shown, the reverse leakage portion 18 can also cover the entire corner region 19. In this case, not only is there a leakage channel between the reverse leakage portion 18 of the second doped semiconductor layer 13 and the side wall of the corner region 19, but there is also a leakage channel between the reverse leakage portion 18 of the second doped semiconductor layer 13 and the top of the corner region 19, which is beneficial to increase the leakage contact area and ensure that the back contact battery has a lower risk of hot spots in an installation environment with many obstructions such as sand and dust. At the same time, there is no need to strictly control the manufacturing accuracy in order to ensure that the reverse leakage portion 18 is only located on the side wall of the corner region 19, thereby reducing the difficulty of the manufacturing process. Specifically, in this case, the reverse leakage portion 18 can contact with each part of the side wall of the corner region 19 along the thickness direction of the semiconductor substrate 11, or it can only contact with a part of the side wall of the corner region 19 along the thickness direction of the semiconductor substrate 11. Secondly, the reverse leakage portion 18 can contact with each part of the corner region 19 on the side away from the semiconductor substrate 11, or it can only contact with a part of the corner region 19 on the side away from the semiconductor substrate 11.

[0141] In terms of the formation range, the reverse leakage portion can be continuously distributed along the direction perpendicular to the alternation of the first region and the second region. (See Figure 4 , the first area 15 and the second area 16 are along Figure 4 The left and right directions of the left and right directions are alternately distributed, and the direction perpendicular to the alternation of the first area 15 and the second area 16 is perpendicular to Figure 4 This increases the contact area between the reverse leakage portion and the corner region, further reducing the risk of hot spots in back-contact cells. Furthermore, it eliminates the need for patterning operations that selectively etch the reverse leakage portion along the length of the corner region's sidewalls, thereby improving back-contact cell manufacturing efficiency.

[0142] Alternatively, the reverse leakage portion may be distributed discontinuously along a direction perpendicular to the alternating direction of the first and second regions. In this case, the length ratio of the continuous and discontinuous regions in the reverse leakage portion can be determined based on the requirements for hot spot risk and conversion efficiency of the back-contact battery in actual application scenarios, and is not specifically limited here.

[0143] Along the distribution direction of the first area and the second area, such as Figure 4 As shown, the portion of the second doped semiconductor layer 13 extending from the second region 16 to the first doped semiconductor layer 12 may be aligned only with the edge of the corner region 19 away from the second region 16. Alternatively, as shown in FIG. Figure 5As shown, in the direction from the edge to the center of the first region 15, the second doped semiconductor layer 13 also extends from above the corner region 19 to cover the remaining area of the first doped semiconductor layer 12; and the back contact battery also includes a first insulating layer 20. The first insulating layer 20 is arranged between the remaining area of the first doped semiconductor layer 12 and the second doped semiconductor layer 13. In this case, while ensuring that the reverse leakage portion 18 is located within the corresponding range of the corner region 19 of the first doped semiconductor layer 12, so that there is a certain amount of leakage current between the reverse leakage portion 18 and the corner region 19 when the back contact battery is blocked, ensuring that the back contact battery has a lower risk of hot spots, there is no need to strictly require high manufacturing precision in order to extend the second doped semiconductor layer 13 only to the edge of the corner region 19 away from the second region 16, thereby reducing the manufacturing difficulty. Furthermore, the first insulating layer 20 disposed between the remaining portion of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 can effectively control the effective leakage contact area between the overlapping portions of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 along the thickness direction of the semiconductor substrate 11, thereby reducing forward leakage losses and further improving the conversion efficiency of the back-contact cell. Furthermore, the first insulating layer 20 is disposed between the remaining portion of the first doped semiconductor layer 12 and the second doped semiconductor layer 13, and the sidewalls of the first insulating layer 20 proximate the second region 16 are indented inward relative to the sidewalls of the corner region 19. Based on this, when the height difference between the surface of the second region 16 and the surface of the first insulating layer 20 on the side facing away from the semiconductor substrate 11 is fixed, compared with the side walls of the first insulating layer 20 and the corner region 19 being flush, the side walls of the first insulating layer 20 close to the second region 16 are retracted inward relative to the side walls of the corner region 19, so that a step morphology with gradually increasing height is formed between the surface of the second region 16 and the side of the first insulating layer 20 facing away from the semiconductor substrate 11, reducing the height variation between the two, which is conducive to better covering the second doped semiconductor layer 13 at the junction of the second region 16 and the first region 15, improving the film formation quality of the second doped semiconductor layer 13 at the junction of the second region 16 and the first region 15, facilitating the control of production yield, and also reducing the transmission resistance between the corner region 19 at the junction and the reverse leakage part 18 with better film formation quality, further reducing the risk of hot spots. Furthermore, during the actual manufacturing process, the presence of the first insulating layer 20 can also serve as at least a partial mask layer for selectively etching the first doped semiconductor layer 12, thereby simplifying the process flow. Furthermore, after selectively etching the first doped semiconductor layer 12, the first insulating layer 20 does not need to be completely removed, thereby reducing etchant damage to the second region 16 of the semiconductor substrate 11 and improving the yield rate. Furthermore, if laser etching is used to form the insulating trench 17 within the transparent conductive layer 14, the presence of the first insulating layer 20 can also reduce the impact of the high-temperature laser on the underlying first doped semiconductor layer 12 and semiconductor substrate 11.

[0144] Among them, the width of the second doped semiconductor layer extending from the top of the corner area to cover the remaining area of the first doped semiconductor layer (that is, the width of the first insulating layer) will affect the area of the first doped semiconductor layer exposed outside the second doped semiconductor layer, and thus affect the formation range of the first electrode electrically connected to the first doped semiconductor layer. Therefore, the width of the first insulating layer can be determined based on the requirements for the carrier collection ability of the first electrode in the actual application scenario, and no specific limitation is made here.

[0145] For example, in the portion where the first doped semiconductor layer and the second doped semiconductor layer overlap along the thickness direction of the semiconductor substrate, the ratio of the width of the first insulating layer to the width of the corner region along the direction from the edge to the center of the first region can be greater than or equal to 10 and less than or equal to 1000. In this case, as mentioned above, the width of the corner region may affect the size of the leakage contact area between the reverse leakage portion and the corner region. Based on this, when the width of the second doped semiconductor layer extending to the first region is fixed, the ratio of the width of the first insulating layer to the width of the corner region may affect the size of the above-mentioned leakage contact area. Therefore, when the ratio of the width of the first insulating layer to the width of the corner region is within the above range, it is beneficial to prevent the leakage contact area from being larger due to the smaller width of the corner region due to the smaller ratio, thereby ensuring that the back contact battery has higher forward leakage loss and conversion efficiency. In addition, this can prevent the leakage contact area from being smaller due to the smaller width of the corner region due to the larger ratio, thereby ensuring that the back contact battery has higher anti-burning ability.

[0146] The material and thickness of the first insulating layer can be determined according to the actual application scenario, as long as it can be applied to the back-contact battery provided by the embodiment of the present invention. An exemplary first insulating layer may include a silicon nitride layer.

[0147] Alternatively, only a localized region of the second doped semiconductor layer along the lengthwise extension direction of the corner region may extend from the second region to a portion of the first doped semiconductor layer; alternatively, the entire region of the second doped semiconductor layer along the lengthwise extension direction of the corner region may extend from the second region to a portion of the first doped semiconductor layer. Specifically, the proportion of the portion of the second doped semiconductor layer extending from the second region to a portion of the first doped semiconductor layer in each region along the lengthwise extension direction of the corner region may be determined based on the requirements for forward leakage loss and reverse breakdown voltage of the back-contact battery in actual application scenarios, and is not specifically limited herein.

[0148] The embodiment of the present invention does not specifically limit the material and thickness of the transparent conductive layer. For example, the material of the transparent conductive layer may include at least one of fluorine-doped tin oxide, aluminum-doped zinc oxide, tin-doped indium oxide, tungsten-doped indium oxide, molybdenum-doped indium oxide, cerium-doped indium oxide, and indium hydroxide.

[0149] Exemplarily, the thickness of the transparent conductive layer is greater than or equal to 10 nm and less than or equal to 150 nm. For example, the thickness of the transparent conductive layer can be 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 70 nm, 90 nm, 120 nm or 150 nm, etc. In this case, within a certain range, the thickness of the transparent conductive layer is proportional to its own conductivity. Based on this, when the thickness of the transparent conductive layer is within the above range, it can prevent the transparent conductive layer from having a high carrier recombination rate on the first side under normal operation of the back contact battery due to its poor conductivity due to its small thickness, and prevent the transparent conductive layer from having a high transmission resistance to leakage current when the back contact battery is blocked, thereby ensuring that the back contact battery has a higher conversion efficiency and a lower risk of hot spots. In addition, it is also beneficial to prevent the use of a large amount of consumables of the transparent conductive layer due to the large thickness of the transparent conductive layer, which is beneficial to controlling the manufacturing cost of the back contact battery.

[0150] As for the insulating groove provided in the transparent conductive layer, the insulating groove is used to physically insulate the portion of the transparent conductive layer electrically connected to the first doped semiconductor layer from the portion of the transparent conductive layer corresponding to the second region. Specifically, because the portion of the transparent conductive layer electrically connected to the first doped semiconductor layer is ohmically connected to the first electrode, and the portion of the transparent conductive layer corresponding to the second region is ohmically connected to the second electrode, the two portions of the transparent conductive layer cannot be directly electrically connected, that is, the two portions of the transparent conductive layer must be physically insulated, that is, not in contact. Based on this, it can be understood that in order to prevent short circuits, the positions of both ends of the insulating groove can be located above the first insulating layer, or the position of one end along the arrangement direction of the first region and the second region can be located outside the corresponding range of the first insulating layer (of course, it can be understood that the reverse leakage portion is excluded, because the transparent conductive layer must extend from the second region to cover the reverse leakage portion).

[0151] In addition, if Figure 5 As shown, the insulating groove 17 may only penetrate the transparent conductive layer 14. Alternatively, as shown in FIG. Figure 6As shown, when the second doped semiconductor layer 13 has a relatively low resistivity (e.g., the resistivity of the second doped semiconductor layer 13 is less than or equal to 0.01 Ω·cm, specifically, when the second doped semiconductor layer 13 is a doped polycrystalline silicon layer and / or a doped single crystal silicon layer), the above-mentioned insulating trench 17 needs to penetrate not only the transparent conductive layer 14, but also at least the second doped semiconductor layer 13 to prevent a short circuit caused by the electrical connection between the portion of the transparent conductive layer 14 corresponding to the first region 15 and the second region 16 through the second doped semiconductor layer 13 continuously disposed above the first insulating layer 20. If the above-mentioned second interface passivation layer 22 is present, generally, the second interface passivation layer 22 does not need to be disconnected at the insulating trench 17; of course, in some processes, the second doped semiconductor layer and the second interface passivation layer can also be disconnected together in the same process step).

[0152] As for the width of the insulating groove along the first region and the second region, it can be determined based on the effect of electrical insulation between two regions of opposite conductivity types for transporting carriers in the transparent conductive layer in actual application scenarios, and is not specifically limited here.

[0153] In addition, when the second doped semiconductor layer also extends from above the corner region to cover the rest of the first doped semiconductor layer, the portion of the transparent conductive layer extending from the second region to above the first doped semiconductor layer may also be aligned only with the edge of the corner region away from the second region. Figure 6 As shown, along the direction from the edge to the center of the first region 15, the transparent conductive layer 14 can also extend from above the corner region 19 to above the remaining area of the first doped semiconductor layer 12. In the transparent conductive layer 14, the portion extending from the second region 16 to above the remaining area of the first doped semiconductor layer 12 is separated from the first doped semiconductor layer 12 by the first insulating layer 20. The application principle of the beneficial effect in this case can be referred to the application principle of the beneficial effect of the second doped semiconductor layer 13 extending from above the corner region 19 to cover the remaining area of the first doped semiconductor layer 12 described above, and will not be repeated here.

[0154] The specific width of the portion of the transparent conductive layer extending from the second region to the first region can be determined according to the actual manufacturing process and is not specifically limited here.

[0155] Exemplarily, the width of the portion of the transparent conductive layer extending from the second region to the first region may be greater than or equal to 5 μm and less than or equal to 80 μm. For example, the width of the portion of the transparent conductive layer extending from the second region to the first region may be 5 μm, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm or 80 μm, etc. In this case, the width of the portion of the transparent conductive layer extending from the second region to the first region is within the above range, which helps to prevent the etching amount of the insulating groove from being large due to the small width, and helps to improve the etching capacity. In addition, it can also prevent the width of the insulating groove from being small due to the large width, ensure that the portion of the transparent conductive layer electrically connected to the first doped semiconductor layer has a lower leakage risk with the portion of the transparent conductive layer corresponding to the second region, and further improve the electrical reliability of the back contact battery.

[0156] In the second aspect, the present invention provides a method for manufacturing a back contact battery. Figures 7 to 18 The manufacturing process is described in detail with reference to the cross-sectional view of the operation shown. Specifically, the manufacturing method of the back contact battery includes:

[0157] First, if Figure 7 As shown, a semiconductor substrate 11 is provided. The semiconductor substrate 11 has a first surface and a second surface opposite to each other. The first surface includes first regions 15 and second regions 16 that are alternately distributed.

[0158] Specifically, the material of the semiconductor substrate, and the distribution of the first region and the second region on one side of the first surface and other information can be found in the above text and will not be described in detail here.

[0159] Next, if Figure 14 As shown, a first doped semiconductor layer 12 is formed in the first region 15 .

[0160] For example, Figure 8 As shown, a first doped semiconductor layer 12 may be formed as a whole layer on the first surface. Figure 8 As shown, a first insulating layer 20 is formed on a portion of the first doped semiconductor layer 12 corresponding to the first region 15. Figure 9 As shown, under the protection of the first insulating layer 20, the portion of the first doped semiconductor layer 12 corresponding to the second region 16 is removed. Figure 10 As shown, the portion of the first insulating layer 20 covering the corner region 19 is removed.

[0161] In actual manufacturing, a first doped semiconductor layer can be formed entirely on the first surface through processes such as diffusion or dopant source coating. A first insulating layer is then formed on the portion of the first doped semiconductor layer corresponding to the first region. The present embodiment does not specifically limit the material of the first insulating layer. For example, the first insulating layer can comprise at least one of a doped silica glass layer, a silicon nitride layer, and an aluminum oxide layer. When a diffusion process is used and the material of the first doped semiconductor layer comprises silicon, after the first doped semiconductor layer is formed, a doped silica glass layer is also formed on the side of the first doped semiconductor layer facing away from the semiconductor substrate. In this case, if the first insulating layer is a doped silica glass layer, the doped silica glass layer can be subsequently patterned so that the portion of the doped silica glass layer remaining on the first region forms the first insulating layer. Alternatively, after removing the doped silica glass layer, the first insulating layer can be formed on the portion of the first doped semiconductor layer corresponding to the first region through deposition and etching processes such as laser etching. If the doped silica glass layer is not formed after the entire first doped semiconductor layer is formed, the first insulating layer can be formed directly on the portion of the first doped semiconductor layer corresponding to the first region through deposition and etching processes such as laser etching. Next, under the protection of the first insulating layer, wet etching and other processes can be used to remove the portion of the first doped semiconductor layer corresponding to the second area. Then, a photolithography process combined with an etching process can be used to remove the portion of the first insulating layer covering the corner area; alternatively, ultrasonic cleaning and other processes can be used to remove the edge portion of the first insulating layer covering the corner area by oscillation. In this case, after removing the portion of the first doped semiconductor layer corresponding to the second area, the portion of the first insulating layer covering the corner area is also removed, which is beneficial for the reverse leakage portion of the second doped semiconductor layer and the side of the corner area away from the semiconductor substrate to also have a leakage channel, thereby increasing the leakage contact area between the first doped semiconductor layer and the second doped semiconductor layer, and further reducing the risk of hot spots in the back-contact battery.

[0162] Alternatively, the above-mentioned forming of the first doped semiconductor layer disposed in the first region may also include the steps of: Figure 11 As shown, first, a first doped semiconductor layer 12 is formed on the first surface. Figure 11 As shown, a first insulating layer 20 and a second insulating layer 23 are sequentially stacked on the first doped semiconductor layer 12 in a direction away from the semiconductor substrate 11. The first insulating layer 20 is made of the same material, and the refractive index of the second insulating layer 23 is smaller than that of the first insulating layer 20. The stacked first insulating layer 20 and the second insulating layer 23 are disposed in the first region 15 and extend to the edge of the second region 16. Next, as shown in FIG. Figure 12 and Figure 13As shown, under the protection of the second insulating layer 23, the portion of the first doped semiconductor layer 12 corresponding to the second region 16 is removed; and the portion of the first insulating layer 20 corresponding to the second region 16 and the corner region 19 is removed. Figure 14 As shown, the second insulating layer is removed.

[0163] In the actual manufacturing process, the formation method of the first doped semiconductor layer arranged as a whole layer can refer to the above. After the first doped semiconductor layer is formed, a deposition process can be used to form a first insulating layer and a second insulating layer stacked in sequence on the first doped semiconductor layer. Among them, the manufacture of the first insulating layer and the second insulating layer with the same material and different refractive index can be achieved by using methods such as the ratio of different elements in the first insulating layer and the second insulating layer (for example, when the materials of the first insulating layer and the second insulating layer include silicon nitride, the ratio of silicon and nitrogen can be adjusted). Based on this, the first insulating layer and the second insulating layer with the same material and different refractive index have different etching selectivities. Based on this, taking advantage of the different etching rates of the first insulating layer and the second insulating layer in different etchants, first, under the protection of the second insulating layer, a wet etching process is used to achieve selective etching of the first doped semiconductor layer and the first insulating layer, ensuring that the corresponding etchant can only remove the portion of the first insulating layer covered by the second insulating layer corresponding to the corner area along the arrangement direction of the first area and the second area, preventing the first insulating layer from being completely removed by the etchant, resulting in an excessively large leakage contact area between the first doped semiconductor layer and the second doped semiconductor layer, reducing forward leakage loss, and ensuring that the back contact battery has a high conversion efficiency. Then, a wet etching process is used to remove the second insulating layer. Specifically, the materials of the first insulating layer and the second insulating layer, as well as the refractive index of the two, can be determined according to the actual application scenario and are not specifically limited here. For example, the first insulating layer and the second insulating layer can both be silicon nitride layers. Because the silicon nitride layer with a higher refractive index has a stronger ability to resist etching by acidic corrosive solutions, while the silicon nitride layer with a lower refractive index has a lower ability to resist etching by acidic corrosive solutions; and silicon nitride layers with different refractive indices have different etching rates in alkaline solutions, and the portion of the first doped semiconductor layer corresponding to the second region can be removed using an alkaline solution. Based on this, when the first and second insulating layers are silicon nitride layers, the portion of the first doped semiconductor layer corresponding to the second region can be removed using an alkaline etching solution such as sodium hydroxide and / or potassium hydroxide under the protection of the second insulating layer; and the portion of the first insulating layer corresponding to the second region and the corner region can also be removed. Next, an acidic etching solution containing hydrofluoric acid can be used to remove the second insulating layer, while retaining the first insulating layer.

[0164] It should be noted that when the first doped semiconductor layer is disposed on the first region and the back-contact cell further includes a first interface passivation layer, a process such as thermal oxidation or chemical vapor deposition can be used to first form a first interface passivation material as a whole layer on one side of the first surface. Then, before forming the first doped semiconductor layer as a whole layer, the first interface passivation material can be selectively etched to remove the portion of the first interface passivation material corresponding to the second region, thereby obtaining the first interface passivation layer. Alternatively, after forming the first doped semiconductor layer as a whole layer, the first doped semiconductor layer and the first interface passivation material can be selectively etched at least under the protection of the same first insulating layer.

[0165] For example, in the manufactured back contact battery, when the second surface of the semiconductor substrate and the surface of the second region of the first surface are velvet, Figure 10 and Figure 14 As shown, before removing the portion of the first insulating layer 20 covering the corner area 19 , the second area 16 and the second surface can be textured at least under the protection of the first insulating layer 20 , so that the second area 16 and the second surface form a velvet surface.

[0166] Next, if Figure 16 As shown, a second doped semiconductor layer 13 is formed on the first doped semiconductor layer 12 in the second region 16 and extends to cover a portion of the first region 15. The first doped semiconductor layer 12 and the second doped semiconductor layer 13 have opposite conductivity types. The thickness of the first doped semiconductor layer 12 is greater than that of the second doped semiconductor layer 13.

[0167] For example, Figure 15 As shown, a deposition process can be used to form a second doped semiconductor layer 13 on the second region 16 and the first doped semiconductor layer 12. Then, as shown in FIG. Figure 16 As shown, a mask layer is formed on the portion of the second doped semiconductor layer 13 corresponding to the second region 16 and the overlapping region 17 by using deposition and laser etching processes. Figure 16 As shown, under the masking effect of the mask layer, a process such as wet etching is used to remove the portion of the second doped semiconductor layer 13 corresponding to the first region 15. Next, as shown in FIG. Figure 17 As shown, the mask layer is removed.

[0168] Alternatively, the above-mentioned formation of the second doped semiconductor layer disposed on the second region and extending to cover the portion of the first doped semiconductor layer on the side facing away from the semiconductor substrate corresponding to the overlapping region may also include the steps of: forming a second doped semiconductor layer disposed as a whole layer on the first doped semiconductor layer and the second region; and selectively removing the portion of the second doped semiconductor layer corresponding to the first region using a laser etching process. The formation method of the second doped semiconductor layer disposed as a whole layer may refer to the above description. After the second doped semiconductor layer is formed, the portion of the second doped semiconductor layer corresponding to the first region may be directly selectively removed using a laser etching process under the action of a mask of a corresponding mask plate, thereby saving the deposition and removal steps of the mask layer, reducing the manufacturing cost of the back-contact battery, and improving the manufacturing efficiency of the back-contact battery.

[0169] It should be noted that when the manufactured back-contact battery also includes a second interface passivation layer, a second interface passivation material disposed on the second region and extending over the first doped semiconductor layer can be formed using a process such as chemical vapor deposition before forming the second doped semiconductor layer. Then, before forming the entire second doped semiconductor layer, the second interface passivation material can be selectively etched to remove the portion of the second interface passivation material corresponding to the first region, thereby obtaining the second interface passivation layer. Alternatively, after forming the entire second doped semiconductor layer, the second doped semiconductor layer and the second interface passivation material can be selectively etched using the same mask layer.

[0170] Next, if Figure 17 As shown, a transparent conductive layer 14 is formed covering the first doped semiconductor layer 12 and the second doped semiconductor layer 13. An insulating groove 17 is provided through the transparent conductive layer 14 to physically insulate the portion of the transparent conductive layer 14 electrically connected to the first doped semiconductor layer 12 from the portion of the transparent conductive layer 14 corresponding to the second region 16. The second doped semiconductor layer 13 includes a reverse leakage portion 18, which is electrically connected to the first doped semiconductor layer 12 and is covered with the transparent conductive layer 14 extending from the second region 16. The first doped semiconductor layer 12 includes a corner region 19. The corner region 19 extends from the root of the sidewall of the first doped semiconductor layer 12 to the edge of the first doped semiconductor layer 12 near the sidewall. The reverse leakage portion 18 is located within the range corresponding to the corner region 19 of the first doped semiconductor layer 12.

[0171] For example, a process such as physical vapor deposition can be used to form a layer of transparent conductive material disposed entirely on the first and second doped semiconductor layers. Subsequently, an insulating trench can be formed within the transparent conductive layer using a chemical etching slurry or laser etching, under the protection of a corresponding mask. The width of the insulating trench can be determined as described above and will not be further elaborated here.

[0172] Under the protection of the first insulating layer, a laser etching process can be directly used to create an insulating groove in the transparent conductive layer. In this case, the laser etching process has high etching precision and a fast etching rate, which helps improve the precision and manufacturing efficiency of the manufactured back-contact battery. At the same time, the presence of the first insulating layer can ensure that the portion of the transparent conductive layer corresponding to the insulating groove is completely removed while preventing the etching laser from affecting the first doped semiconductor layer below the insulating groove, thereby improving the yield of the back-contact battery.

[0173] like Figure 18 As shown, a screen printing process or the like can then be used to form a first electrode 24 on a portion of the transparent conductive layer 14 corresponding to the first region 15 , and a second electrode 25 on a portion of the transparent conductive layer 14 corresponding to the second region 16 .

[0174] The beneficial effects of the second aspect and its various implementations in the embodiments of the present invention can be analyzed with reference to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0175] In a third aspect, an embodiment of the present invention provides a photovoltaic module, which includes the back-contact cell provided by the first aspect and various implementations thereof.

[0176] The beneficial effects of the third aspect and its various implementations in the embodiments of the present invention can be analyzed with reference to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0177] While the above description does not provide detailed technical details regarding patterning and etching of each layer, those skilled in the art will appreciate that various technical means can be employed to form layers, regions, and the like in desired shapes. Furthermore, those skilled in the art may devise methods that differ from those described above to form the same structure. Furthermore, while each embodiment has been described separately, this does not mean that the measures in each embodiment cannot be advantageously combined.

[0178] The above describes the embodiments of the present invention. However, these embodiments are merely for illustrative purposes and are not intended to limit the scope of the present invention. The scope of the present invention is defined by the appended claims and their equivalents. Various substitutions and modifications may be made by those skilled in the art without departing from the scope of the present invention, and such substitutions and modifications are intended to fall within the scope of the present invention.

Claims

1. A back contact battery, characterized in that: include: A semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer and a transparent conductive layer; The first doped semiconductor layer and the second doped semiconductor layer have opposite conductivity types; The semiconductor substrate comprises a first surface and a second surface opposite to each other; the first surface comprises first regions and second regions alternately distributed; The first doped semiconductor layer is disposed in the first region; the thickness of the first doped semiconductor layer is greater than the thickness of the second doped semiconductor layer; The second doped semiconductor layer is disposed in the second region and extends to cover a portion of the first doped semiconductor layer; The transparent conductive layer covers the first doped semiconductor layer and the second doped semiconductor layer; An insulating groove is provided through the transparent conductive layer to physically insulate a portion of the transparent conductive layer electrically connected to the first doped semiconductor layer from a portion of the transparent conductive layer corresponding to the second region; The second doped semiconductor layer includes a reverse leakage portion, the reverse leakage portion is electrically connected to the first doped semiconductor layer, and the reverse leakage portion is covered with the transparent conductive layer extending from the second region; The first doped semiconductor layer includes a corner region; The corner region extends from the root of the sidewall of the first doped semiconductor layer to the edge of the first doped semiconductor layer close to the sidewall; The reverse leakage portion is located within a corresponding range of a corner region of the first doped semiconductor layer.

2. The back contact battery according to claim 1, characterized in that The reverse leakage portion is only located on the sidewall of the corner area; Alternatively, the reverse leakage portion covers the entire corner area.

3. The back contact battery according to claim 1, characterized in that The reverse leakage portions are continuously distributed along a direction perpendicular to the alternation of the first and second regions.

4. The back contact battery according to claim 1, characterized in that Along the direction from the edge to the center of the first region, the width of the corner region is less than 100 nm.

5. The back contact battery according to claim 1, characterized in that Along the direction from the edge to the center of the first region, the second doped semiconductor layer further extends from above the corner region to cover the remaining region of the first doped semiconductor layer; The back contact cell further includes a first insulating layer; the first insulating layer is disposed between the remaining region of the first doped semiconductor layer and the second doped semiconductor layer.

6. The back contact battery according to claim 5, characterized in that In the portion where the first doped semiconductor layer and the second doped semiconductor layer overlap along the thickness direction of the semiconductor substrate, a ratio of a width of the first insulating layer to a width of the corner region along a direction from an edge to a center of the first region is greater than or equal to 10 and less than or equal to 1000.

7. The back contact battery according to claim 5, characterized in that Along the direction from the edge to the center of the first region, the transparent conductive layer further extends from above the corner region to above the remaining region of the first doped semiconductor layer; In the transparent conductive layer, a portion extending from the second region to above the remaining region of the first doped semiconductor layer is spaced apart from the first doped semiconductor layer by the first insulating layer.

8. The back contact battery according to claim 7, characterized in that A width of a portion of the transparent conductive layer extending from the second region to the first region is greater than or equal to 5 μm and less than or equal to 80 μm.

9. The back contact battery according to claim 1, characterized in that A groove is formed in the second region and is recessed into the semiconductor substrate. The bottom surface of the groove is a velvet surface, and the surface of the first region is a polished surface.

10. The back contact battery according to claim 9, characterized in that The distance between the edge of the first region and the edge of the groove is less than or equal to 500 nm.

11. The back contact battery according to claim 1, characterized in that The back contact cell further comprises a first interface passivation layer; the first interface passivation layer is disposed between the first doped semiconductor layer and the semiconductor substrate; And / or, the back contact battery further includes a second interface passivation layer; the second interface passivation layer is arranged between the second region of the first surface and the second doped semiconductor layer, and extends between the second doped semiconductor layer and the first doped semiconductor layer.

12. The back contact battery according to claim 11, characterized in that The thickness of the second interface passivation layer is greater than or equal to 2 nm and less than or equal to 30 nm; and / or, the thickness of the second interface passivation layer covering the sidewall of the first doped semiconductor layer is less than the thickness of the second interface passivation layer located on the second region; And / or, the crystallization rate of the second interface passivation layer is less than or equal to 60%.

13. The back contact battery according to claim 1, characterized in that The thickness of the first doped semiconductor layer is greater than 50 nm and less than or equal to 200 nm; And or, the doping concentration of the dopant in the first doped semiconductor layer and / or the second doped semiconductor layer is greater than or equal to 1E19 cm -3 , and less than or equal to 5E20cm -3 ; And / or, the first doped semiconductor layer includes a doped crystalline silicon layer; And or, the thickness of the second doped semiconductor layer is greater than or equal to 5 nm and less than or equal to 50 nm; and / or, the crystallinity of the second doped semiconductor layer is less than or equal to 60%; And / or, the electrical conductivity of the second doped semiconductor layer is greater than or equal to 10E-5S / cm and less than or equal to 1S / cm; And or, the thickness of the transparent conductive layer is greater than or equal to 10 nm and less than or equal to 150 nm.

14. The back contact battery according to claim 1, characterized in that The material of the first doped semiconductor layer includes polycrystalline silicon and / or single crystal silicon, and the material of the second doped semiconductor layer includes at least one of amorphous silicon, microcrystalline silicon and nanocrystalline silicon; The degree of crystallization of at least a portion of the second doped semiconductor layer located in the second region is greater than the degree of crystallization of the reverse leakage portion of the second doped semiconductor layer.

15. The back contact battery according to claim 1, characterized in that The material of the first doped semiconductor layer includes polycrystalline silicon and / or single crystal silicon, and the material of the second doped semiconductor layer includes at least one of amorphous silicon, microcrystalline silicon and nanocrystalline silicon; The degree of crystallization of at least a portion of the second doped semiconductor layer located in the second region is greater than the degree of crystallization of a portion of the second doped semiconductor layer located in the first region.

16. The back contact battery according to claim 1, characterized in that The material of the first doped semiconductor layer includes polycrystalline silicon and / or single crystal silicon, and the material of the second doped semiconductor layer includes at least one of amorphous silicon, microcrystalline silicon and nanocrystalline silicon; The second doped semiconductor layer is divided into a high crystallization region and a low crystallization region; the crystallization degree of the portion of the second doped semiconductor layer located in the low crystallization region is lower than the crystallization degree of the portion of the second doped semiconductor layer located in the high crystallization region; In the second doped semiconductor layer, at least the reverse leakage portion is located in the low crystallization region, and at least a portion corresponding to the second region is located in the high crystallization region.

17. The back contact battery according to claim 16, characterized in that The low crystallization region is located within the first region; Alternatively, along the arrangement direction of the first region and the second region, one side edge of the low-crystalline region is located in the first region, and the other side edge extends to the second region.

18. A method for manufacturing a back contact battery, characterized in that: include: providing a semiconductor substrate; The semiconductor substrate has a first surface and a second surface opposite to each other; the first surface includes first regions and second regions that are alternately distributed; forming a first doped semiconductor layer disposed in the first region; forming a second doped semiconductor layer disposed in the second region and extending onto the first doped semiconductor layer to cover a portion of the first region; The first doped semiconductor layer and the second doped semiconductor layer have opposite conductivity types; The thickness of the first doped semiconductor layer is greater than the thickness of the second doped semiconductor layer; forming a transparent conductive layer covering the first doped semiconductor layer and the second doped semiconductor layer; An insulating groove is provided through the transparent conductive layer to physically insulate the portion of the transparent conductive layer electrically connected to the first doped semiconductor layer from the portion of the transparent conductive layer corresponding to the second region; wherein the second doped semiconductor layer includes a reverse leakage portion, the reverse leakage portion is electrically connected to the first doped semiconductor layer, and the reverse leakage portion is covered with the transparent conductive layer extending from the second region; the first doped semiconductor layer includes a corner region; the corner region extends from the root of the sidewall of the first doped semiconductor layer to the edge of the first doped semiconductor layer close to the sidewall; the reverse leakage portion is located within the range corresponding to the corner region of the first doped semiconductor layer.

19. The method for manufacturing a back contact battery according to claim 18, wherein: The forming of the first doped semiconductor layer disposed in the first region includes: forming a first doped semiconductor layer entirely disposed on the first surface; forming a first insulating layer on a portion of the first doped semiconductor layer corresponding to the first region; Under the protection of the first insulating layer, removing a portion of the first doped semiconductor layer corresponding to the second region; The portion of the first insulating layer covering the corner area is removed.

20. The method for manufacturing a back contact battery according to claim 18, wherein: The forming of the first doped semiconductor layer disposed in the first region includes: forming a first doped semiconductor layer entirely disposed on the first surface; forming a first insulating layer and a second insulating layer stacked in sequence on the first doped semiconductor layer in a direction away from the semiconductor substrate; the first insulating layer is made of the same material, and the refractive index of the second insulating layer is smaller than the refractive index of the first insulating layer; the stacked first insulating layer and the second insulating layer are disposed in the first region and extend to an edge of the second region; Under the protection of the second insulating layer, removing the portion of the first doped semiconductor layer corresponding to the second region; and removing the portion of the first insulating layer corresponding to the second region and the corner region; The second insulating layer is removed.

21. The method for manufacturing a back contact battery according to claim 19 or 20, characterized in that: The insulating groove is opened in the transparent conductive layer by adopting a laser etching process.

22. A photovoltaic module, characterized in that: Comprising a back contact battery as claimed in any one of claims 1 to 17.

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