Micro-nano vacuum triode and saturation output method and preparation method thereof

Abstract

The invention discloses a micro-nano vacuum triode and a saturation output method and a preparation method thereof, and relates to the technical field of vacuum micro-nano triodes, and the saturation output method comprises the steps: arranging a crater-shaped micropore grid electrode, enabling the top end of the grid electrode to be higher than the top end of a cathode, weakening the influence of an anode electric field on a cathode surface barrier, and improving the stability of the cathode surface barrier; the saturation output characteristic that the cathode emission current does not change along with the anode voltage is obtained; the emitter with the nanoscale tip curvature radius serves as a cathode, the central axis of the tip of the cathode and the central axis of the crater-shaped micropore grid electrode and the central axis of the micropore anode are located on the same straight line, and the tip curvature radius of the cathode is set to be 0.2-15 nm; and the divergence angle of the emergent electrons at the emitting end of the cathode is within the range that the emergent electrons can pass through the grid micropores and are collected by the anode, so that the current ratio of the anode to the cathode is improved. The problem that the saturation output characteristic of an existing micro-nano vacuum triode is difficult to be compatible with the high anode and cathode current ratio due to the fact that the distance between the cathode and the anode is small is effectively solved.

Description

Technical Field

[0001] The present invention relates to the technical field of vacuum micro-nano triodes, and more specifically, to a micro-nano vacuum triode and a saturation output method and a preparation method thereof. Background Art

[0002] Vacuum electron tubes are electronic devices that use a vacuum channel as a carrier transport medium. They offer theoretical advantages such as high load capacity, excellent linearity, and high-frequency operation, making them valuable applications in fields such as radio communications and radar systems. Micro-nano vacuum triodes achieve low power consumption, high integration, and miniaturization by combining field emission cathodes with micromachining technology. However, existing devices with cathode-anode spacings less than 5μm commonly exhibit an exponential increase in output current with anode voltage, lacking saturation output characteristics. This loss of saturation reduces the linearity of the amplifier circuit or can lead to logic level errors, increase circuit power consumption, and reduce the signal-to-noise ratio.

[0003] Currently, there are two main technical solutions for achieving saturated output. The first is to increase the cathode-anode spacing. For example, W.P. Kang of Vanderbilt University in the United States developed a planar side-gate device with a cathode-gate spacing of 2 μm and a cathode-anode spacing of 500 μm. A larger cathode-anode spacing can mitigate the effects of the anode electric field on the cathode surface barrier, thereby preventing the field emission current from exponentially increasing with the anode voltage, ultimately achieving gate-controllable saturated output. However, the lateral electrode layout and large spacing design of the planar side-gate structure limit high-density device integration. The second solution is to reduce the gate-cathode spacing or increase the gate bias. A strong gate electric field weakens the effects of the anode electric field on the cathode surface barrier. However, as the gate electric field increases, the gate tends to capture cathode tunneling electrons, resulting in a large gate leakage current, which reduces the device's anode output current, increases device power consumption, and degrades performance.

[0004] Therefore, achieving saturated output with a high anode to cathode current ratio of micro-nano vacuum triodes while maintaining high-density device integration remains a key challenge that needs to be broken through in the field of vacuum micro-nano electronic devices. Summary of the Invention

[0005] The purpose of the present invention is to solve the problem in the prior art that the saturated output characteristics of micro-nano vacuum triodes are difficult to be compatible with a high anode-to-cathode current ratio due to the small cathode-anode distance.

[0006] To achieve the above-mentioned object, the first aspect of the present invention provides a micro-nano vacuum triode saturation output method, comprising: S1: Set up a crater-shaped microporous gate and make the top of the gate higher than the top of the cathode to strengthen the effect of the gate electric field on the cathode surface barrier. Set up a microporous anode structure and make the anode far away from the top of the cathode to weaken the effect of the anode electric field on the cathode surface barrier, and obtain a saturated output characteristic in which the cathode emission current does not change with the anode voltage. S2: An emitter with a nanoscale tip curvature radius is set as a cathode, wherein the tip is the emitting end, and the central axis of the emitting end of the cathode is in the same straight line as the central axis of the crater-shaped microporous gate and the microporous anode. The tip curvature radius of the cathode is set to 0.2~15 nm, so that the divergence angle of the emitted electrons from the emitting end of the cathode is within the range that the emitted electrons can pass through the gate micropores and be collected by the anode, so as to improve the anode and cathode current ratio of the micro-nano vacuum triode.

[0007] Preferably, the overall structure of the emitter with a nanometer-scale tip curvature radius includes a pointed cone structure, a needle structure, a rod structure, a linear structure and a pyramid structure.

[0008] To achieve the objectives of the present invention, a second aspect provides a micro-nano vacuum triode for applying a micro-nano vacuum triode saturation output method described in the above technical solution. The micro-nano vacuum triode includes a substrate, a cathode, a lower insulating layer, a gate, an upper insulating layer and an anode. The substrate, lower insulating layer, gate, upper insulating layer and anode are stacked in sequence from bottom to top. The cathode is an emitter with a nanometer-scale tip curvature radius and its bottom is vertically arranged on the substrate surface. The tip curvature radius of the cathode is 0.2~15 nm. The gate is a crater-shaped microporous electrode with a top of the gate higher than the top of the cathode. The anode is a microporous electrode with a micropore larger than the gate micropore. The central axis of the cathode's emitting end is in the same straight line as the central axes of the gate and the anode.

[0009] Preferably, the cathode vertical height is 300-5000 nm; The gate is a crater-shaped microporous electrode with a pore size of 500-3000 nm, and the angle between the oblique side of the gate crater and the substrate plane is 75°-90°; The anode is a planar or crater-shaped microporous electrode with a pore size of 600 to 10,000 nm; The height difference between the top of the gate and the top of the cathode is 0-1000 nm; The height difference between the top of the anode and the top of the cathode is 250-4500 nm.

[0010] Preferably, the substrate, cathode and anode are metal or semiconductor materials, including at least any one of gold, aluminum, chromium, silver, molybdenum, copper, silicon, germanium, nickel, diamond, silicon carbide, zinc oxide, aluminum oxide, copper oxide, tungsten oxide, lanthanum hexaboride, gallium nitride or doped amorphous silicon.

[0011] To achieve the purpose of the present invention, a third aspect provides a method for preparing a micro-nano vacuum triode, which is used to prepare a micro-nano vacuum triode according to the above technical solution, and the preparation method comprises the following steps: S11: preparing an emitter with a nanoscale tip curvature radius on a substrate as a cathode; S12: depositing a lower insulating layer on the substrate and the cathode; S13: depositing a gate on the lower insulating layer described in S12; S14: spin-coating positive photoresist and defining the photoresist pattern; S15: etching to reduce the thickness of the photoresist until the raised gate is exposed, and removing the gate not covered by the photoresist; S16: depositing an insulating layer and an anode in sequence on the structure described in S15; S17: Repeat S14 to etch and reduce the thickness of the photoresist until the raised anode is exposed, and remove the anode not covered by the photoresist; S18: Etching the lower insulating layer and the upper insulating layer until the top of the cathode is exposed.

[0012] Preferably, the method for preparing an emitter having a nanoscale tip curvature radius in step S11 comprises the following steps: S111: forming a vertical structure on the substrate by a photolithography-etching process or directly growing the vertical structure; S112: Using thermal oxidation, etching process or deposition process, the top of the vertical structure is formed into a tip with a nanometer-scale curvature radius.

[0013] Preferably, the conformal growth characteristics of the deposited upper and lower insulating layers, the gate and anode metal layers and the cathode are utilized to make the central axis of the cathode emission end and the central axis of the gate and anode in the same straight line.

[0014] Preferably, in step S12, the lower insulating layer has a cone-like morphology at the top of the cathode, and the cone-like morphology is prepared by the "over-deposition-back etching" technology, and the specific preparation steps are as follows: S211: depositing a lower insulating layer having a thickness exceeding a target of 300 to 1000 nm on the substrate and the cathode; S212: Etching the lower insulating layer to a thickness exceeding the target thickness of 300-1000 nm using plasma.

[0015] Preferably, the control of the shapes of the gate and anode electrodes includes the following methods: S101: etching the photoresist by plasma while monitoring the thickness of the photoresist with a step profiler, precisely controlling the height of the metal layer exposed on the photoresist surface, and controlling the height of the bevel edges of the gate and anode electrodes, wherein the metal layer has a cone-like morphology; S201: By controlling the proportional relationship between the bottom diameter of the cone-like body and the vertical height of the cathode, the angle between the oblique sides of the gate and anode electrodes and the base plane is precisely controlled.

[0016] Compared with the prior art, the present invention has the following beneficial effects: The present invention provides a crater-shaped microporous gate with a top higher than the top of the cathode, thereby effectively weakening the influence of the anode electric field on the cathode surface potential barrier and obtaining a saturated output characteristic in which the cathode emission current does not change with the anode voltage. An emitter with a nanometer-scale tip curvature radius is provided as the cathode, and the central axis of the cathode emission end is aligned with the central axis of the crater-shaped microporous gate and the microporous anode. The curvature radius of the cathode tip is controlled to be 0.2-15 nm, so that the electrons emitted from the cathode tip have a small divergence angle, can pass through the gate micropores and be collected by the anode, thereby improving the anode-to-cathode current ratio of the micro-nano vacuum triode, thereby achieving a saturated output with a high anode-to-cathode current ratio, effectively solving the problem in existing micro-nano vacuum triodes that the saturated output characteristic is difficult to be compatible with the high anode-to-cathode current ratio due to the small cathode-anode spacing. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a schematic cross-sectional view of the micro-nano vacuum triode structure of the present invention.

[0018] Figure caption: 1 represents the substrate, 2 represents the cathode, 3 represents the lower insulating layer, 4 represents the gate, 5 represents the upper insulating layer, and 6 represents the anode.

[0019] Figure 2 This is the output characteristic curve of the micro-nano vacuum triode test in Example 2 of the present invention.

[0020] Figure 3 This is the transfer characteristic curve of the micro-nano vacuum triode tested in Example 2 of the present invention.

[0021] Figure 4 This is a schematic cross-sectional view of the micro-nano vacuum triode structure of Comparative Example 1 of the present invention.

[0022] Figure caption: 1 represents the substrate, 2 represents the cathode, 3 represents the lower insulating layer, 4 represents the gate; 5 represents the upper insulating layer, and 6 represents the anode.

[0023] Figure 5 This is the output characteristic curve of the micro-nano vacuum triode tested in comparative example 1 of the present invention.

[0024] Figure 6 This is the transfer characteristic curve of the micro-nano vacuum triode tested in comparative example 1 of the present invention.

[0025] Figure 7 This is a schematic cross-sectional view of the micro-nano vacuum triode structure of Comparative Example 2 of the present invention.

[0026] Figure caption: 1 represents the substrate, 2 represents the cathode, 3 represents the lower insulating layer, 4 represents the gate; 5 represents the upper insulating layer, and 6 represents the anode.

[0027] Figure 8 This is the output characteristic curve of the micro-nano vacuum triode tested in comparative example 2 of the present invention.

[0028] Figure 9 This is the transfer characteristic curve of the micro-nano vacuum triode tested in comparative example 2 of the present invention.

[0029] Figure 10 This is a schematic cross-sectional view of the micro-nano vacuum triode structure with a crater-shaped microporous anode according to Example 2 of the present invention.

[0030] Figure caption: 1 represents the substrate, 2 represents the cathode, 3 represents the lower insulating layer, 4 represents the gate, 5 represents the upper insulating layer, and 6 represents the anode. DETAILED DESCRIPTION

[0031] The following embodiments of the present invention are described in further detail with reference to the accompanying drawings and examples. The following examples are used to illustrate the present invention but are not intended to limit the scope of the present invention.

[0032] In the description of the present invention, it should be noted that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention.

[0033] Example 1 This embodiment provides a method for saturation output of a micro-nano vacuum triode, comprising the following steps: S1: Set up a crater-shaped microporous gate and make the top of the gate higher than the top of the cathode to strengthen the effect of the gate electric field on the cathode surface barrier. Set up a microporous anode structure and make the anode far away from the top of the cathode to weaken the effect of the anode electric field on the cathode surface barrier, and obtain a saturated output characteristic in which the cathode emission current does not change with the anode voltage. S2: An emitter with a nanometer-scale tip curvature radius is set as the cathode, where the tip is the emitting end, and the tip of the cathode, i.e., the central axis of the emitting end, is aligned with the central axis of the crater-shaped microporous gate and the microporous anode. The tip curvature radius of the cathode is set to 0.2-15 nm, so that the divergence angle of the emitted electrons from the emitting end of the cathode is within the range that allows the emitted electrons to pass through the gate micropores and be collected by the anode, thereby improving the anode and cathode current ratio of the micro-nano vacuum triode, thereby achieving saturated output under the condition of the highest possible anode and cathode current ratio. It should be noted that the theoretical maximum value of the ratio of the anode and cathode current is 1, that is, the anode current is equal to the cathode current. However, due to the existence of the gate current, this is impossible to achieve in practice and can only be as close to 1 as possible.

[0034] Example 2 Based on Example 1, this Example 2 provides a micro-nano vacuum triode for implementing the micro-nano vacuum triode saturation output method described in Example 1, specifically as follows: like Figure 1 As shown, a micro-nano vacuum triode comprises a substrate 1, a cathode 2, a lower insulating layer 3, a gate 4, an upper insulating layer 5 and an anode 6; the substrate 1, the lower insulating layer 3, the gate 4, the upper insulating layer 5 and the anode 6 are stacked in sequence from bottom to top; the cathode 2 is an emitter with a nanometer-scale tip curvature radius and its bottom is perpendicular to the surface of the substrate 1, the cathode 2 has an upright height of 300-5000 nm (for example, 300 nm, 500 nm, 1000 nm, 1500 nm, 2000 nm, 3000 nm, 4000 nm, 5000 nm, and 940 nm in this embodiment) and a tip curvature radius of 0.2-15 nm (for example, 2 nm, 5 nm, 7 nm, 9 nm, 11 nm, 13 nm, and 15 nm, and 5±2 nm in this embodiment); the gate 4 is a crater-shaped microporous electrode with a pore size of 500-3000 nm (for example, 500 nm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, in this embodiment, 1.3 μm); the angle between the oblique side of the crater of the gate 4 and the base plane is 75°~90° (for example, 75°, 80°, 85°, 90°, in this embodiment, 78.7°); the height difference between the top of the gate 4 and the top of the cathode 2 is 0~1000 nm (for example, 0 nm, 250 nm, 500 nm, 750 nm, 1000 nm, in this embodiment, 250 nm); the anode 6 is an electrode with planar micropores or crater-shaped micropores (in this embodiment, Figure 1The anode is a planar microporous electrode with a pore size of 600 to 10,000 nm (e.g., 1 μm, 3 μm, 6 μm, 9 μm, and 2.8 μm in this embodiment); the height difference between the top of the anode 6 and the top of the cathode 2 is 250 to 4,500 nm (e.g., 500 nm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.5 μm, 4 μm, and 1.1 μm in this embodiment); the central axis of the emission end of the cathode 2 is in the same straight line as the central axis of the gate 4 and the anode 6.

[0035] The overall structure of the cathode 2 is a pointed cone structure. It should be noted that the cathode 2 can also have other structures, such as a needle-shaped structure, a rod-shaped structure, a linear structure, or a pyramid structure, as long as the curvature radius of the cathode tip emitter is 0.2 to 15 nm. The material of the substrate 1 is silicon. The lower insulating layer 3 and the upper insulating layer 5 are silicon dioxide layers; the gate 4 and the anode 6 are chromium metal layers. When the micro-nano vacuum triode is in operation, the cathode 2 is grounded, and the gate 4 and the anode 6 are respectively connected to a high potential. It should be noted that the substrate, cathode, and anode are metal or semiconductor materials, including at least any one of gold, aluminum, chromium, silver, molybdenum, copper, silicon, germanium, nickel, diamond, silicon carbide, zinc oxide, aluminum oxide, copper oxide, tungsten oxide, lanthanum hexaboride, gallium nitride, or doped amorphous silicon.

[0036] The device testing method of this embodiment is as follows: the cathode is set to zero potential for emitting electrons; the anode is set to positive potential for collecting electrons; and the gate is set to positive potential for extracting electrons. a ), the gate voltage (V g ) is swept from 0 V to 100 V or 120 V. The anode current (I a ) and gate voltage (V g ) is the transfer characteristic curve. When the gate voltage (V g ), the anode voltage (V a ) is swept from 0 V to 80 V or 120 V. The anode current (I a ) and anode voltage (V a ) is the output characteristic curve.

[0037] According to the above test method, the output characteristic curve and transfer characteristic curve of the device of this embodiment are as follows: Figure 2 、 3 The device's output characteristic curve exhibits clear cutoff, linear, and saturation regions. At a gate voltage of 100 V and an anode voltage of 80 V, the measured anode current is 1240 nA, the gate current is 242 nA, and the cathode current is 1482 nA. The calculated anode-to-cathode current ratio is 0.84.

[0038] These results demonstrate that when the top of the gate 4 is 250 nm above the top of the cathode 2, the crater-shaped microporous gate 4 structure effectively weakens the effect of the anode electric field on the cathode surface potential barrier. Furthermore, using an emitter with a nanometer-scale tip curvature radius as the cathode, and setting the tip curvature radius to 0.2-15 nm, effectively improves the anode-to-cathode current ratio. Consequently, the micro-nano vacuum triode in Example 2 achieves a saturated output with a high anode-to-cathode current ratio.

[0039] Example 3 This embodiment 3, based on embodiment 1 and embodiment 2, provides a method for preparing the above-mentioned micro-nano vacuum triode, including: S11: preparing an emitter with a nanoscale tip curvature radius on a substrate as a cathode; The cathode can be prepared using metal or semiconductor materials, including at least any one of gold, aluminum, chromium, silver, molybdenum, copper, silicon, germanium, nickel, diamond, silicon carbide, zinc oxide, aluminum oxide, copper oxide, tungsten oxide, silicon dioxide, lanthanum hexaboride, gallium nitride or doped amorphous silicon.

[0040] Preparation of an emitter with a nanometer-scale tip curvature radius, comprising the following steps: S111: formation of upright structures on the substrate; This includes forming a vertical structure from top to bottom by using a photolithography process combined with dry / wet etching (such as deep reactive ion etching DRIE, KOH wet etching) or directly growing the vertical structure using chemical vapor deposition CVD, metal organic chemical vapor deposition MOCVD, hydrothermal method, etc.; S112: Utilize thermal oxidation, etching process (such as wet etching, plasma etching, ion beam etching, etc.) or deposition process (such as chemical vapor deposition) to form a tip with a nanometer-scale curvature radius on the top of the upright structure.

[0041] Metal materials (such as Au, Mo, etc.) can be formed into upright structures using deposition processes (such as electron beam evaporation / sputtering) or etching processes (such as ion beam etching). Electrochemical etching and focused ion beam etching (FIB) can be used to form a nanometer-scale curvature radius at the top of the upright structure. Semiconductor materials (such as Si, GaN, etc.) can be formed into upright structures by direct epitaxial growth (CVD / MOCVD) or etching methods; cyclic thermal oxidation-etching and plasma isotropic etching methods can be used to form a tip with a nanometer-scale curvature radius at the top of the upright structure.

[0042] The method for preparing an emitter with a nanometer-scale tip curvature radius using silicon-based materials as the preparation material includes the following specific steps: Depositing a silicon dioxide layer on a silicon substrate 1, the silicon dioxide layer having a thickness of 200 to 700 nm; spin-coating an electron beam photoresist and defining a photoresist mask diameter, the photoresist mask diameter being 300 to 5000 nm; etching the silicon dioxide not covered by the photoresist until the silicon substrate is exposed; and further etching the silicon substrate until an upright silicon-based structure is formed; The vertical silicon-based structure is treated with thermal oxidation to control the specific shape of the vertical silicon-based structure and sharpen the tip of the silicon base. The silicon dioxide layer on the surface of the vertical silicon-based structure is removed by wet etching to obtain a pointed cone vertical structure emitter with a curvature radius of 0.2~15 nm as cathode 2.

[0043] S12: On the substrate 1 and the cathode 2, a silicon dioxide layer with a thickness of 250 to 1500 nm is deposited using a chemical vapor deposition system as a lower insulating layer 3; The lower insulating layer 3 in the above step S12 has a cone-like morphology at the top of the cathode. The cone-like morphology is prepared by the "over-deposition-etch-back" technology. The specific preparation steps are as follows: S211: depositing a lower insulating layer having a thickness exceeding a target of 300 to 1000 nm on the substrate and the cathode; S212: Etching the lower insulating layer to a thickness exceeding the target thickness of 300-1000 nm using plasma.

[0044] S13: On the structure described in S12, a chromium metal layer with a thickness of 200-300 nm is deposited by magnetron sputtering to serve as the gate 4; S14: Spin-coat positive photoresist and define the photoresist pattern with a line width of 50-200 μm. S15: using oxygen plasma etching to thin the photoresist until the raised gate 4 is exposed, and the remaining photoresist thickness is 200-1200 nm; wet etching the gate 4 not covered by the photoresist; and removing the residual photoresist with acetone and ethanol in sequence; S16: On the structure described in S5, a silicon dioxide layer with a thickness of 250 to 4500 nm is deposited by a chemical vapor deposition system as an upper insulating layer 5; a chromium metal layer with a thickness of 200 to 300 nm is deposited by magnetron sputtering as an anode 6; S17: Repeat S4, using oxygen plasma etching to thin the photoresist until the raised anode 6 is exposed. At this time, the remaining photoresist thickness is 100-200 nm; wet-etch the anode 6 not covered by the photoresist; and remove the residual photoresist using acetone and ethanol in sequence. S18: using a dry method to etch the lower insulating layer 3 and the upper insulating layer 5 until the remaining thickness of the insulating layer is 200-400 nm; then using a wet method to etch the remaining insulating layer until the top of the cathode 2 is exposed.

[0045] Among them, the control of the gate and anode electrode shapes includes the following methods: S101: etching the photoresist by plasma while monitoring the thickness of the photoresist with a step profiler, precisely controlling the height of the metal layer exposed on the photoresist surface, and controlling the height of the bevel edges of the gate and anode electrodes, wherein the metal layer has a cone-like morphology; S201: By controlling the proportional relationship between the bottom diameter of the cone-like body and the vertical height of the cathode, the angle between the oblique sides of the gate and anode electrodes and the base plane is precisely controlled.

[0046] Preferably, the etching in the above preparation method includes plasma dry etching and solution wet etching.

[0047] Comparative Example 1 The experimental method is the same as that of Example 2, the only difference being that in this comparative example the top of the gate 4 is flush with the top of the cathode 2 . Figure 5 The output characteristic curve of the comparative device is shown in Figure 1. The output characteristic curve shows that under a fixed gate voltage, the anode current increases exponentially with the increase of the anode voltage, and the device does not appear in the saturation region. When the anode voltage is fixed at 80 V, the transfer characteristic curve is as follows: Figure 6 As shown in Figure 2, at a gate voltage of 120 V, the measured anode current was 2.55 nA, the gate current was 0.38 nA, and the cathode current was 2.93 nA. The calculated ratio of the anode to cathode current was 0.87.

[0048] This result shows that when the top of the gate 4 is at the same height as the top of the cathode 2, the crater-shaped microporous gate 4 structure cannot effectively weaken the effect of the anode electric field on the cathode surface potential barrier. The micro-nano vacuum triode in this comparative example 1 exhibits output characteristics without a saturation region and a high anode-to-cathode current ratio.

[0049] Comparative Example 2 The experimental method is the same as that of Example 2, the only difference being that the curvature radius of the cathode 2 in this comparative example is 13±2 nm. Figure 8 As shown in Figure 2, when the gate voltage is 125 V and the anode voltage is 90 V, the device enters the saturation region. When the anode voltage is fixed at 80 V, the transfer characteristic curve is as follows: Figure 9 As shown in Figure 2, at a gate voltage of 120 V, the measured anode current was 445 nA, the gate current was 174 nA, and the cathode current was 619 nA. The calculated ratio of the anode to cathode current was 0.72.

[0050] This result shows that the curvature radius of the cathode 2 cone affects the device's anode-to-cathode current ratio. As the curvature radius of the cathode 2 cone increases, the device's anode-to-cathode current ratio decreases. The micro-nano vacuum triode in Comparative Example 2 achieves a saturated output with a relatively high anode-to-cathode current ratio.

[0051] In summary, the present invention utilizes a crater-shaped microporous gate with its top higher than the cathode tip, effectively weakening the effect of the anode electric field on the cathode surface potential barrier and achieving a saturated output characteristic in which the cathode emission current does not vary with the anode voltage. Furthermore, an emitter with a nanometer-tip curvature radius is used as the cathode, with the central axis of the cathode tip aligned with the central axes of the crater-shaped microporous gate and the microporous anode. The cathode tip curvature radius is set between 0.2 and 15 nm, resulting in a small divergence angle for electrons emitted from the emitter, allowing them to pass through the gate micropores and be collected by the anode. This improves the anode-to-cathode current ratio of the micro-nano vacuum triode, thereby achieving a saturated output with a high anode-to-cathode current ratio. This invention effectively addresses the incompatibility between the saturated output characteristic and the high anode-to-cathode current ratio in existing micro-nano vacuum triodes, which is caused by the small cathode-anode spacing. The invention has practical and broad application value in the field of micro-nano vacuum information electronics.

[0052] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A micro-nano vacuum triode saturation output method, characterized in that: The following steps are involved: S1: Set up a crater-shaped microporous gate and make the top of the gate higher than the top of the cathode to strengthen the effect of the gate electric field on the cathode surface barrier. Set up a microporous anode structure and make the anode far away from the top of the cathode to weaken the effect of the anode electric field on the cathode surface barrier, and obtain a saturated output characteristic in which the cathode emission current does not change with the anode voltage. S2: An emitter with a nanoscale tip curvature radius is set as the cathode, the tip being the emission end, and the central axis of the cathode tip being in the same straight line as the central axis of the crater-shaped microporous gate and the microporous anode. The tip curvature radius of the cathode is set to 0.2~15nm, so that the divergence angle of the emitted electrons from the emission end of the cathode is within the condition that the emitted electrons can pass through the gate micropores and be collected by the anode, so as to improve the anode and cathode current ratio of the micro-nano vacuum triode.

2. The micro-nano vacuum triode saturation output method according to claim 1, characterized in that: The overall structure of the emitter with a nanometer-scale tip curvature radius includes a pointed cone structure, a needle structure, a rod structure, a linear structure and a pyramid structure.

3. A micro-nano vacuum triode, using the micro-nano vacuum triode saturation output method according to any one of claims 1-2, characterized in that: The micro-nano vacuum triode comprises a substrate (1), a cathode (2), a lower insulating layer (3), a gate (4), an upper insulating layer (5) and an anode (6), wherein the substrate (1), the lower insulating layer (3), the gate (4), the upper insulating layer (5) and the anode (6) are stacked in sequence from bottom to top, the cathode (2) is an emitter with a nanometer-scale tip curvature radius and the bottom is vertically arranged on the surface of the substrate (1), the curvature radius of the tip of the cathode (2) is 0.2-15 nm, the gate (4) is a crater-shaped microporous electrode, the top of the gate (4) is higher than the top of the cathode (2), the anode (6) is a microporous electrode, the micropore of the anode (6) is larger than the micropore of the gate (4), and the central axis of the emission end of the cathode (2) is in the same straight line as the central axes of the gate (4) and the anode (6).

4. The micro-nano vacuum triode according to claim 3, characterized in that: The cathode (2) has a vertical height of 300-5000 nm; The aperture of the gate (4) is 500-3000 nm, and the angle between the oblique edge of the gate (4) crater and the plane of the substrate (1) is 75°-90°; The anode (6) is a planar or crater-shaped microporous electrode with a pore size of 600-10000 nm; The height difference between the top of the gate (4) and the top of the cathode (2) is 0-1000 nm; The height difference between the top of the anode (6) and the top of the cathode (2) is 250-4500 nm.

5. The micro-nano vacuum triode according to claim 3, characterized in that: The substrate, cathode and anode are made of metal or semiconductor materials, including at least any one of gold, aluminum, chromium, silver, molybdenum, copper, silicon, germanium, nickel, diamond, silicon carbide, zinc oxide, aluminum oxide, copper oxide, tungsten oxide, silicon dioxide, lanthanum hexaboride, gallium nitride or doped amorphous silicon.

6. A method for preparing a micro-nano vacuum triode, for preparing a micro-nano vacuum triode according to any one of claims 3 to 5, characterized in that: The preparation method comprises the following steps: S11: preparing an emitter with a nanoscale tip curvature radius on a substrate as a cathode; S12: depositing a lower insulating layer on the substrate and the cathode; S13: depositing a gate on the lower insulating layer described in S12; S14: spin-coating positive photoresist and defining the photoresist pattern; S15: etching to reduce the thickness of the photoresist until the raised gate is exposed, and removing the gate not covered by the photoresist; S16: depositing an insulating layer and an anode in sequence on the structure described in S15; S17: Repeat S14 to etch and reduce the thickness of the photoresist until the raised anode is exposed, and remove the anode not covered by the photoresist; S18: Etching the lower insulating layer and the upper insulating layer until the top of the cathode is exposed.

7. The preparation method according to claim 6, characterized in that The method for preparing the emitter having a nanometer-scale tip curvature radius in step S11 comprises the following steps: S111: forming a vertical structure on the substrate by a photolithography-etching process or directly growing the vertical structure; S112: Using thermal oxidation, etching process or deposition process, the top of the vertical structure is formed into a tip with a nanometer-scale curvature radius.

8. The preparation method according to claim 6, characterized in that By utilizing the conformal growth characteristics of the deposited upper and lower insulating layers, the gate and anode metal layers and the cathode, the central axis of the cathode emission end is aligned with the central axis of the gate and anode.

9. The preparation method according to claim 6, characterized in that In step S12, the lower insulating layer has a cone-like morphology at the top of the cathode. The cone-like morphology is prepared by over-deposition-etch-back technology. The specific preparation steps are as follows: S211: depositing a lower insulating layer with a target thickness of 300-1000 nm on the substrate and the cathode; S212: using plasma to etch the lower insulating layer to a target thickness of 300-1000 nm.

10. The preparation method according to claim 6, characterized in that Control of the gate and anode electrode shapes, including the following methods: S101: etching the photoresist by plasma while monitoring the thickness of the photoresist with a step profiler, precisely controlling the height of the metal layer exposed on the photoresist surface, and controlling the height of the bevel edges of the gate and anode electrodes, wherein the metal layer has a cone-like morphology; S201: By controlling the proportional relationship between the bottom diameter of the cone-like body and the vertical height of the cathode, the angle between the oblique sides of the gate and anode electrodes and the base plane is precisely controlled.

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