Nerve stimulation current generating circuit and nerve stimulator
The neural stimulation current generation circuit and nerve stimulator designed through pure simulation technology solve the problems of large stimulation current range, complex pattern and high cost in existing equipment, and achieves a dedicated, low-cost and low-risk neural stimulation effect for the cerebral cortex.
Patent Information
- Application Number
- CN202510447318.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-10
- Publication Date
- 2025-09-05
AI Technical Summary
Existing neural stimulation devices have large stimulation current range, complex patterns and high cost, making them difficult to be dedicated to the cerebral cortex, and there is a risk of equipment corrosion and surgical infection.
The neural stimulation current generation circuit designed using pure simulation technology generates two-speed stimulation current through the pulse generation gate unit and the bipolar constant current stimulation unit. The polarity is variable, the stimulation mode is simple, and it is powered by dry batteries, and the equipment is miniaturized and used once.
It realizes special stimulation for the cerebral cortex, reduces the complexity and cost of equipment, reduces the risk of surgical infection, simplifies operations, and reduces side effects on the human body and electrode corrosion.
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Figure CN120601865A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of medical equipment and neuroelectrophysiology, and more particularly to a nerve stimulation current generating circuit and a nerve stimulator. Background Art
[0002] Intraoperative neuroelectrophysiological monitoring is a technology that uses neuroelectrophysiological means to dynamically monitor the functional integrity of specific somatic nerves in a dangerous state in real time.
[0003] Intraoperative neuroelectrophysiological monitoring mainly includes monitoring of the motor system, monitoring of the sensory system, and functional localization of the cerebral cortex during surgery. Among them, the functional localization of the cerebral cortex is to locate the motor, sensory, and language cortices by electrically stimulating the cerebral cortex to induce muscle action potentials, abnormal sensations, and language disorders. Currently, most neurostimulation devices used for intraoperative functional localization of the cerebral cortex use constant voltage stimulation, with a voltage of up to tens of volts. The stimulation current generated by the device is large, the stimulation range is large, and the stimulation pattern is complex. Considering safety and reliability, the cerebral cortex is different from other parts of the body and does not require a large stimulation current range. Therefore, strictly speaking, current neurostimulation devices cannot be dedicated to the cerebral cortex. Moreover, most devices use unipolar stimulation, which causes severe corrosion to the device's own electrodes, affecting its service life.
[0004] In addition, current neurostimulation equipment mostly uses high-value devices such as microcontrollers and digital-to-analog converters as core components. They are bulky and require programming operations, and have high application costs, which means they are difficult to use as disposable instruments, increasing the risk of infection from repeated use during surgery. Summary of the Invention
[0005] In order to solve the problems of current neurostimulators having a large stimulation current range, complex stimulation patterns and high application costs, the present invention proposes a neurostimulation current generating circuit. The circuit is implemented using pure analog technology, does not require programming devices, and has low cost. A neurostimulator based on the neurostimulation current generating circuit is also proposed. The stimulation current has a small stimulation range, a simple stimulation pattern, can be used exclusively for cerebral cortical nerve stimulation, can be used once, and reduces the risk of surgical infection.
[0006] In order to achieve the above technical effects, the technical solutions of the present invention are as follows:
[0007] A nerve stimulation current generating circuit, wherein the generating circuit is a purely analog circuit, comprising:
[0008] a pulse generation and gating unit, configured to generate a first pulse voltage wave and a second pulse voltage wave, wherein the first pulse voltage wave and the second pulse voltage wave have the same pulse width and frequency but different delays;
[0009] The two-speed bipolar constant current stimulation unit is used to receive the first pulse voltage wave and the second pulse voltage wave with different delays, generate two-speed stimulation currents, and change the polarity of the two-speed stimulation currents.
[0010] According to the above technical means, the first pulse voltage wave and the second pulse voltage wave generated by the pulse generation gating unit are connected to the two-speed bipolar constant current stimulation unit in turn due to different delays. On the one hand, the two-speed bipolar constant current stimulation unit only generates two-speed stimulation currents. The stimulation current of the slightly larger gear has a large stimulation range and can be used for coarse positioning of the cerebral cortex. The stimulation current of the slightly smaller gear has a small stimulation range and can be used for fine stimulation of the cerebral cortex, making the generating circuit more specialized for cerebral cortex stimulation. On the other hand, under the action of the first pulse voltage wave and the second pulse voltage wave with different delays, the two-speed bipolar constant current stimulation unit changes the polarity of the two-speed stimulation current to generate a bipolar nerve stimulation current. When stimulating the cerebral cortex, the polarity conversion can mitigate the pulse intensity of the two adjacent stimulation currents, reduce side effects on the human body, and reduce corrosion to the electrodes of the circuit itself.
[0011] Preferably, the pulse generation and gating unit includes a pulse wave generating circuit, a trigger circuit and a PWM gating circuit; wherein, the pulse wave generating circuit is used to generate a basic pulse voltage wave; the trigger circuit is used to receive the basic pulse voltage wave, and output a high and low level selection wave when a rising edge appears in the waveform of the basic pulse voltage wave; the PWM gating circuit is used to receive the high and low level selection waves, and utilize the high level and low level that appear with delay in the high and low level selection waves to adjust the basic pulse voltage wave into a first pulse voltage wave and a second pulse voltage wave with different delays.
[0012] Preferably, the pulse wave generating circuit includes a comparator U4, a capacitor C5, a capacitor C6, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a diode D1, a diode D2, an adjustable resistor RP1 and an adjustable resistor RP2; wherein, one end of the resistor R18 is grounded, and the other end is connected to the positive input terminal of the comparator U4, one end of the capacitor C5 is grounded, and the other end is connected to the negative input terminal of the comparator U4, one end of the resistor R17 is connected to the positive input terminal of the comparator U4, and the other end is respectively connected to one end of the resistor R16, one end of the resistor R14 and the adjustable point of the adjustable resistor RP2, and the other end of the resistor R16 is connected The output end of the comparator, the other end of the resistor R14 is connected to the power supply VCC, one end of the adjustable resistor RP2 is connected to the anode of the diode D1, and the other end is connected to the cathode of the diode D2, the cathode of the diode D1 is connected to one end of the resistor R19, the other end of the resistor R19 is respectively connected to one end of the adjustable resistor RP1 and the adjustable point of the adjustable resistor RP1, the anode of the diode D2 is connected to one end of the resistor R15, the other end of the resistor R15 is connected to one end of the adjustable resistor RP1 and the adjustable point of the adjustable resistor RP1, and the other end of the adjustable resistor RP1 is connected to the inverting input end of the comparator U4; one end of the capacitor C6 is connected to the power supply VCC, and the other end is grounded.
[0013] According to the above technical means, the adjustable resistor RP1 can be used to adjust the frequency of the pulse voltage wave, and the adjustable resistor RP2 can adjust the pulse width without affecting the frequency of the pulse voltage wave.
[0014] Preferably, the trigger circuit includes a D trigger U1, a resistor R2, a resistor R3 and a capacitor C3, the output end of the pulse wave generating circuit is respectively connected to the second pin of the D trigger U1 and one end of the resistor R3, the basic pulse voltage wave generated by the pulse wave generating circuit is connected to the D trigger U1, and the other end of the resistor R3 is grounded; the eighth pin of the D trigger U1 is connected to the first pin of the D trigger U1, so that the D trigger U1 becomes a T trigger triggered by a rising edge, and when the waveform of the basic pulse voltage wave connected to the second pin of the D trigger U1 has a rising edge, the eighth pin of the D trigger U1 outputs a high and low level selection wave; the eighth pin of the D trigger U1 is also respectively connected to one end of the resistor R2 and one end of the capacitor C3, and the other end of the resistor R2 and the other end of the capacitor C3 are both grounded.
[0015] Preferably, the PWM selection circuit includes an analog selection switch U2, a capacitor C1 and a capacitor C2, the output end of the pulse wave generating circuit is connected to the input end IN of the analog selection switch U2, the input end IN of the analog selection switch U2 receives the basic pulse voltage wave generated by the pulse wave generating circuit, the high and low level selection waves generated by the trigger circuit are connected to the pin SEL of the analog selection switch U2, the first output end OUTA of the analog selection switch U2 is connected to one end of the capacitor C1, and the other end of the capacitor C1 is grounded, the first output end OUTA of the analog selection switch U2 outputs a first pulse voltage wave, the second output end OUTB of the analog selection switch U2 is connected to one end of the capacitor C2, and the other end of the capacitor C2 is grounded, and the second output end OUTB of the analog selection switch U2 outputs a second pulse voltage wave.
[0016] Preferably, the two-speed bipolar constant current stimulation unit includes a two-speed constant current source circuit and a bipolar stimulation circuit; wherein, the two-speed constant current source circuit is used to receive a first pulse voltage wave and a second pulse voltage wave with different delays to generate a two-speed stimulation current; the bipolar stimulation circuit is used to change the polarity of the two-speed stimulation current.
[0017] Preferably, the two-speed constant current source circuit includes: an operational amplifier U3, a capacitor C4, an NMOS tube Q7, a diode D3, a diode D4, a slide switch SW1, a resistor R1, a resistor R12, a resistor R13, a resistor R20, a resistor R21, a resistor R22 and a resistor R23;
[0018] The first pulse voltage wave is input to one end of the resistor R20, the other end of the resistor R20 is connected to the anode of the diode D3 and one end of the resistor R21 respectively, and the other end of the resistor R21 is grounded; the second pulse voltage wave is input to one end of the resistor R22, the other end of the resistor R22 is connected to the anode of the diode D4 and one end of the resistor R23 respectively, and the other end of the resistor R23 is grounded; the cathode of the diode D3 and the cathode of the diode D4 are both connected to the positive input end of the operational amplifier U3, the output end of the operational amplifier U3 is connected to one end of the resistor R13, and the other end of the resistor R13 is connected to the gate of the NMOS tube Q7. The operational amplifier U3 is powered by a power supply VCC, which is also connected to a capacitor C4, the other end of which is grounded. The reverse input terminal of the operational amplifier U3 is respectively connected to the drain of the NMOS tube Q7 and the fixed pin of the slide switch SW1, the source of the NMOS tube Q7 is connected to the bipolar stimulation circuit, the first sliding pin of the slide switch SW1 is connected to one end of the resistor R12, the second sliding pin of the slide switch SW1 is connected to one end of the resistor R1, the other end of the resistor R1 and the other end of the resistor R12 are both grounded; the resistance value of the resistor R12 is different from that of the resistor R1.
[0019] According to the above technical means, by selecting resistors of different resistance values through the sliding pin of the sliding switch SW1 and connecting them to the two-speed constant current source circuit, two-speed stimulation current output can be achieved. The stimulation mode is simple to operate, and the stimulation current has only two gears. The stimulation current of the larger gear has a larger stimulation range and can be used for coarse positioning of the cerebral cortex. The stimulation current of the smaller gear has a smaller stimulation range and can be used for fine stimulation of the cerebral cortex, which is more specialized for cerebral cortex stimulation.
[0020] Preferably, the bipolar stimulation circuit includes: a first polarity stimulation circuit and a second polarity stimulation circuit, the first polarity stimulation circuit includes transistor Q4, transistor Q5, transistor Q6, resistor R8, resistor R9, resistor R10, and resistor R11, and the second polarity stimulation circuit includes: transistor Q1, transistor Q2, transistor Q3, resistor R4, resistor R5, resistor R6, and resistor R7;
[0021] The first pulse voltage wave is input to one end of the resistor R11, the other end of the resistor R11 is connected to the base of the transistor Q6, the emitter of the transistor Q6 is connected to the base of the transistor Q3, the collector of the transistor Q6 is connected to one end of the resistor R10, the other end of the resistor R10 is respectively connected to one end of the resistor R8 and one end of the resistor R9, the other end of the resistor R8 is connected to the power supply VCC, the other end of the resistor R9 is connected to the base of the transistor Q5, the collector of the transistor Q5 and the collector of the transistor Q4 are both connected to one end of the nerve to be stimulated, and the emitter of the transistor Q5 is connected to the power supply VCC;
[0022] The second pulse voltage wave is input to one end of resistor R4, the other end of resistor R4 is connected to the base of transistor Q1, the emitter of transistor Q1 is connected to the base of transistor Q4, the collector of transistor Q1 is connected to one end of resistor R5, the other end of resistor R5 is respectively connected to one end of resistor R6 and one end of resistor R7, the other end of resistor R7 is connected to the power supply VCC, the other end of resistor R6 is connected to the base of transistor Q2, the collector of transistor Q2 and the collector of transistor Q3 are both connected to the other end of the nerve to be stimulated, the emitter of transistor Q2 is connected to the power supply VCC, and the emitter of transistor Q3 and the emitter of transistor Q4 are both connected to the output end of the two-speed constant current source circuit.
[0023] The present application also proposes a neurostimulator, which includes the neurostimulation current generating circuit and a power supply for supplying power to the neurostimulation current generating circuit.
[0024] Preferably, the power supply is a dry cell battery. The neurostimulator is a handheld and / or disposable consumable.
[0025] Based on the aforementioned technical means, the neurostimulator's circuit for generating neural stimulation currents eliminates the need for high-value components such as single-chip microcontrollers and digital-to-analog converters, relying instead on pure analog technology. This reduces the complexity of the device itself, makes it compact, and allows for handheld use, resulting in low application costs. For cerebral cortex stimulation, it generates only two levels of stimulation current, resulting in a simple stimulation pattern and minimal operator requirements. This reduces the risk of irreversible damage to the patient's nerves due to operator error, making it suitable for use as a dedicated neurostimulator for the cerebral cortex. Furthermore, the use of dry-cell batteries replaces a complex and bulky power supply, reducing the device's size and cost, making it disposable and minimizing the risk of surgical infection.
[0026] Compared with the prior art, the beneficial effects of the technical solution of the present invention are:
[0027] The present invention proposes a nerve stimulation current generating circuit and a nerve stimulator, wherein the nerve stimulation current generating circuit only generates two levels of stimulation current. The stimulation current of the larger level has a large stimulation range and can be used for coarse positioning of the cerebral cortex, and the stimulation current of the smaller level has a small stimulation range and can be used for fine stimulation of the cerebral cortex. The stimulation mode is simple and more specialized for cerebral cortex stimulation. The two-level bipolar constant current stimulation unit changes the polarity of the two-level stimulation current to generate a bipolar nerve stimulation current. When stimulating the cerebral cortex, the polarity conversion can mitigate the pulse intensity of two adjacent stimulation currents, reduce side effects on the human body, and reduce corrosion to the electrodes of the circuit itself. The nerve stimulator proposed by the present invention does not require high-value components such as single-chip microcomputers and digital-to-analog converters, and can be implemented by relying on pure analog technology, which reduces the complexity of the device itself, has low application cost, can be used once, and reduces the risk of surgical infection. The simple stimulation mode has low operator requirements and reduces irreversible damage to the patient's nerves caused by operator misoperation. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 A schematic diagram showing the overall composition of a nerve stimulation current generating circuit proposed in an embodiment of the present invention;
[0029] Figure 2 A diagram showing a specific circuit structure connection of a pulse generation gating unit in a nerve stimulation current generating circuit according to an embodiment of the present invention;
[0030] Figure 3 A specific circuit structure connection diagram showing a two-speed bipolar constant current stimulation unit in a nerve stimulation current generating circuit proposed in an embodiment of the present invention;
[0031] Figure 4 A waveform diagram showing the processing of a pulse wave by the nerve stimulation current generating circuit proposed in an embodiment of the present invention.
[0032] Figure 5A schematic structural diagram of a neurostimulator proposed in an embodiment of the present invention is shown. DETAILED DESCRIPTION
[0033] The accompanying drawings are for illustrative purposes only and are not to be construed as limiting this patent;
[0034] In order to better illustrate this embodiment, some parts of the drawings may be omitted, enlarged, or reduced, and do not represent the actual size;
[0035] It is understandable to those skilled in the art that descriptions of certain well-known contents may be omitted in the drawings.
[0036] The technical solution of the present invention is further described below with reference to the accompanying drawings and embodiments.
[0037] The positional relationships described in the drawings are for illustrative purposes only and should not be construed as limiting this patent;
[0038] Example 1
[0039] This embodiment proposes a nerve stimulation current generating circuit. The generating circuit is a pure analog circuit. The overall composition diagram is as follows: Figure 1 As shown, see Figure 1 , comprising: a pulse generation and gating unit 1 and a two-speed bipolar constant current stimulation unit 2. The pulse generation and gating unit 1 is used to generate a first pulse voltage wave and a second pulse voltage wave. In this embodiment, the first pulse voltage wave is represented by PWM1, and the second pulse voltage wave is represented by PWM2. The first pulse voltage wave PWM1 and the second pulse voltage wave PWM2 have the same pulse width and frequency, but different delays; the two-speed bipolar constant current stimulation unit 2 is used to receive the first pulse voltage wave PWM1 and the second pulse voltage wave PWM2 with different delays, generate two-speed stimulation currents, and change the polarity of the two-speed stimulation currents.
[0040] The neural stimulation current generating circuit proposed in this embodiment only generates two levels of stimulation current. The stimulation current of the slightly larger level has a large stimulation range and can be used for coarse positioning of the cerebral cortex. The stimulation current of the slightly smaller level has a small stimulation range and can be used for fine stimulation of the cerebral cortex. The stimulation mode is simple and more dedicated to cerebral cortex stimulation. The two-level bipolar constant current stimulation unit changes the polarity of the two-level stimulation current to generate a bipolar neural stimulation current. When stimulating the cerebral cortex, the polarity change can mitigate the pulse intensity of two adjacent stimulation currents, reduce side effects on the human body, and reduce corrosion to the electrodes of the circuit itself.
[0041] See also Figure 1In this embodiment, the pulse generation and gating unit 1 includes a pulse wave generating circuit 11, a trigger circuit 12 and a PWM gating circuit 13; wherein the pulse wave generating circuit 11 is used to generate a basic pulse voltage wave, the trigger circuit 12 is used to receive the basic pulse voltage wave, and output a high and low level selection wave when a rising edge appears in the waveform of the basic pulse voltage wave; the PWM gating circuit 13 is used to receive the high and low level selection waves, and use the high level and low level that appear with delay in the high and low level selection waves to adjust the basic pulse voltage wave into a first pulse voltage wave PWM1 and a second pulse voltage wave PWM2 with different delays.
[0042] Example 2
[0043] This embodiment further explains the pulse wave generating circuit 11, trigger circuit 12 and PWM gating circuit 13 mentioned in embodiment 1. Figure 2 The pulse wave generating circuit 11 includes a comparator U4, a capacitor C5, a capacitor C6, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a diode D1, a diode D2, an adjustable resistor RP1 and an adjustable resistor RP2; wherein, one end of the resistor R18 is grounded, and the other end is connected to the positive input terminal of the comparator U4, one end of the capacitor C5 is grounded, and the other end is connected to the negative input terminal of the comparator U4, one end of the resistor R17 is connected to the positive input terminal of the comparator U4, and the other end is respectively connected to one end of the resistor R16, one end of the resistor R14 and the adjustable point of the adjustable resistor RP2, and the other end of the resistor R16 is connected to the comparator The output end of the comparator U4 is connected to the other end of the resistor R14, the other end of the resistor R14 is connected to the power supply VCC, one end of the adjustable resistor RP2 is connected to the anode of the diode D1, and the other end is connected to the cathode of the diode D2, the cathode of the diode D1 is connected to one end of the resistor R19, the other end of the resistor R19 is respectively connected to one end of the adjustable resistor RP1 and the adjustable point of the adjustable resistor RP1, the anode of the diode D2 is connected to one end of the resistor R15, the other end of the resistor R15 is connected to one end of the adjustable resistor RP1 and the adjustable point of the adjustable resistor RP1, and the other end of the adjustable resistor RP1 is connected to the inverting input end of the comparator U4; one end of the capacitor C6 is connected to the power supply VCC, and the other end is grounded.
[0044] In this embodiment, resistors R17 and R18 at the positive input terminal of the comparator U4 form a voltage divider circuit. The negative input terminal of the comparator U4, VCC, resistor R14, the upper end of the adjustable resistor RP2, diode D1, resistor R19, the adjustable resistor RP1, capacitor C5, resistor R15, diode D2, the lower end of the adjustable resistor RP2, and resistor R16 form a charging and discharging circuit. When the output terminal of the comparator U4 outputs a high level, capacitor C5 is charged, and the charging circuit is VCC, resistor R14, the upper end of the adjustable resistor RP2, diode D1, resistor R19, the adjustable resistor RP1, and capacitor C5. When the voltage at the negative input terminal of the comparator U4 is greater than the voltage at the positive input terminal, the comparator U4 outputs a low level. At this time, capacitor C5 is discharged, and the discharging circuit is capacitor C5, adjustable resistor RP1, resistor R15, diode D2, the lower end of the adjustable resistor RP2, resistor R16, and the internal ground circuit of the comparator U4. When the voltage at the inverting input of comparator U4 is less than the voltage at the forward input, comparator U4 outputs a high level. Adjustable resistor RP1 exists in both the charge and discharge circuits. The basic pulse voltage wave generated by pulse wave generating circuit 11 is denoted as DS in this embodiment. Adjustable resistor RP1 can be used to adjust the frequency of pulse voltage wave DS. The upper and lower ends of adjustable resistor RP2 are located in the discharge circuit and the charge circuit, respectively. Adjusting adjustable resistor RP2 can adjust the pulse width without affecting the frequency of pulse voltage wave DS. In one specific embodiment, pulse wave generating circuit 11 utilizes a 555 timer as its core.
[0045] The trigger circuit 12 includes a D trigger U1, a resistor R2, a resistor R3 and a capacitor C3. The output end of the pulse wave generating circuit is respectively connected to the second pin of the D trigger U1 and one end of the resistor R3. The basic pulse voltage wave DS generated by the pulse wave generating circuit is connected to the D trigger U1, and the other end of the resistor R3 is grounded; the eighth pin of the D trigger U1 is connected to the first pin of the D trigger U1, so that the D trigger U1 becomes a T trigger triggered by a rising edge. When the waveform of the pulse voltage wave DS connected to the second pin of the D trigger U1 has a rising edge, the eighth pin of the D trigger U1 outputs a high and low level selection wave; the eighth pin of the D trigger U1 is also respectively connected to one end of the resistor R2 and one end of the capacitor C3, and the other end of the resistor R2 and the other end of the capacitor C3 are both grounded.
[0046] In this embodiment, when the first and eighth pins of the D flip-flop U1 are connected, the D flip-flop U1 becomes a rising-edge-triggered T flip-flop. In one specific embodiment, the flip-flop circuit 12 can be a JK flip-flop forming a T flip-flop. Whenever a rising edge occurs at the second pin of the D flip-flop U1, the eighth pin of the T flip-flop outputs a toggle level, i.e., a high-low level selection wave, denoted as SEL in this embodiment. The high-low level selection wave SEL is input into the PWM communication circuit 13.
[0047] The PWM selection circuit 13 includes an analog selection switch U2, a capacitor C1 and a capacitor C2. The output end of the pulse wave generating circuit is connected to the input end IN of the analog selection switch U2. The input end IN of the analog selection switch U2 receives the basic pulse voltage wave generated by the pulse wave generating circuit. The high and low level selection waves generated by the trigger circuit are connected to the pin SEL of the analog selection switch U2. The first output end OUTA of the analog selection switch U2 is connected to one end of the capacitor C1, and the other end of the capacitor C1 is grounded. The first output end OUTA of the analog selection switch U2 outputs the first pulse voltage wave PWM1. The second output end OUTB of the analog selection switch U2 is connected to one end of the capacitor C2, and the other end of the capacitor C2 is grounded. The second output end OUTB of the analog selection switch U2 outputs the second pulse voltage wave PWM2.
[0048] In this embodiment, the regulated pulse voltage wave DS output by the pulse wave generating circuit 11 serves as the input signal of the PWM selection circuit 13, and outputs the first pulse voltage wave PWM1 and the second pulse voltage wave PWM2 respectively according to the high level and low level of the high and low level selection wave SEL.
[0049] This embodiment further illustrates the specific composition of the two-speed bipolar constant current stimulation unit 2. In this embodiment, Figure 1 As shown, the two-speed bipolar constant current stimulation unit 2 includes a two-speed constant current source circuit 21 and a bipolar stimulation circuit 22; wherein, the two-speed constant current source circuit 21 is used to receive the first pulse voltage wave PWM1 and the second pulse voltage wave PWM2 with different delays to generate two-speed stimulation currents; the bipolar stimulation circuit 22 is used to change the polarity of the two-speed stimulation currents.
[0050] See also Figure 3 The two-speed constant current source circuit 21 includes: an operational amplifier U3, a capacitor C4, an NMOS transistor Q7, a diode D3, a diode D4, a slide switch SW1, a resistor R1, a resistor R12, a resistor R13, a resistor R20, a resistor R21, a resistor R22 and a resistor R23;
[0051] The first pulse voltage wave PWM1 is input to one end of the resistor R20, the other end of the resistor R20 is connected to the anode of the diode D3 and one end of the resistor R21 respectively, and the other end of the resistor R21 is grounded; the second pulse voltage wave is input to one end of the resistor R22, the other end of the resistor R22 is connected to the anode of the diode D4 and one end of the resistor R23 respectively, and the other end of the resistor R23 is grounded; the cathode of the diode D3 and the cathode of the diode D4 are both connected to the positive input terminal of the operational amplifier U3, the output terminal of the operational amplifier U3 is connected to one end of the resistor R13, and the other end of the resistor R13 is connected to the gate of the NMOS tube Q7. The operational amplifier U3 is powered by a power supply VCC, which is also connected to a capacitor C4, the other end of which is grounded. The inverting input terminal of the operational amplifier U3 is respectively connected to the drain of the NMOS tube Q7 and the fixed pin of the slide switch SW1, the source of the NMOS tube Q7 is connected to the bipolar stimulation circuit, the first sliding pin of the slide switch SW1 is connected to one end of the resistor R12, the second sliding pin of the slide switch SW1 is connected to one end of the resistor R1, the other end of the resistor R1 and the other end of the resistor R12 are both grounded; the resistance value of the resistor R12 is different from that of the resistor R1.
[0052] After passing through resistor divider and diodes, the first pulse voltage wave PWM1 and the second pulse voltage wave PWM2 reach the positive input terminal of the operational amplifier U3. The virtual short circuit of the operational amplifier U3 ensures that the voltage at the negative input terminal is equal to the positive input terminal. Therefore, after the first pulse voltage wave PWM1 and the second pulse voltage wave PWM2 are divided by resistors, the forward voltage drop of the diode is subtracted to obtain the input voltage of the operational amplifier. Resistors R1 and R12 are sampling resistors that determine the magnitude of the current. In actual implementation, resistors R1 and R12 have different resistance values, one large and one small. The small resistor corresponds to coarse positioning of a larger current, while the large resistor corresponds to fine stimulation of a smaller current. By selecting resistors of different resistance values through the sliding pin of the sliding switch SW1 and connecting them to the two-speed constant current source circuit, different currents can be generated, achieving a two-speed stimulation current output. The stimulation mode is simple to operate, and the stimulation current has only two speeds. The stimulation current of the larger speed has a larger stimulation range and can be used for coarse positioning of the cerebral cortex. The stimulation current of the smaller speed has a smaller stimulation range and can be used for fine stimulation of the cerebral cortex, making it more specialized for cerebral cortical stimulation.
[0053] The bipolar stimulation circuit 22 includes: a first polarity stimulation circuit 221 and a second polarity stimulation circuit 222. The first polarity stimulation circuit 221 includes transistors Q4, Q5, Q6, resistors R8, R9, R10, and R11. The second polarity stimulation circuit 222 includes transistors Q1, Q2, Q3, resistors R4, R5, R6, and R7.
[0054] The first pulse voltage wave PWM1 is input to one end of the resistor R11, the other end of the resistor R11 is connected to the base of the transistor Q6, the emitter of the transistor Q6 is connected to the base of the transistor Q3, the collector of the transistor Q6 is connected to one end of the resistor R10, the other end of the resistor R10 is respectively connected to one end of the resistor R8 and one end of the resistor R9, the other end of the resistor R8 is connected to the power supply VCC, the other end of the resistor R9 is connected to the base of the transistor Q5, the collector of the transistor Q5 and the collector of the transistor Q4 are both connected to one end of the nerve to be stimulated. In this embodiment, the nerve to be stimulated is a cerebral cortical nerve, and the emitter of the transistor Q5 is connected to the power supply VCC;
[0055] The second pulse voltage wave is input to one end of resistor R4, the other end of resistor R4 is connected to the base of transistor Q1, the emitter of transistor Q1 is connected to the base of transistor Q4, the collector of transistor Q1 is connected to one end of resistor R5, the other end of resistor R5 is respectively connected to one end of resistor R6 and one end of resistor R7, the other end of resistor R7 is connected to power supply VCC, the other end of resistor R6 is connected to the base of transistor Q2, the collector of transistor Q2 and the collector of transistor Q3 are both connected to one end of the nerve to be stimulated. In this embodiment, the nerve to be stimulated is a cerebral cortex nerve, the emitter of transistor Q2 is connected to the power supply VCC, and the emitter of transistor Q3 and the emitter of transistor Q4 are both connected to the output end of the two-speed constant current source circuit.
[0056] The following is a combination of the specific structures of the pulse wave generating circuit 11, the trigger circuit 12 and the PWM gating circuit 13, the two-speed constant current source circuit 21 and the bipolar stimulation circuit 22, and the Figure 4 , further explains the pulse wave processing process. Figure 4 First, in the pulse wave generating circuit 11, when the voltage at the reverse input terminal of the comparator U4 is less than the voltage at the forward input terminal, the comparator U4 outputs a high level. The adjustable resistor RP1 exists in both the charge and discharge circuits. The basic pulse voltage wave DS generated by the pulse wave generating circuit 11 is a square wave with a certain frequency. The adjustable resistor RP1 can be used to adjust the frequency of the pulse voltage wave DS. The trigger circuit 12 receives the pulse voltage wave DS. Whenever the waveform of the pulse voltage wave DS connected to the second pin of the D trigger U1 shows a rising edge, it outputs a high-low level selection wave SEL. See Figure 4 , the waveform of the high and low level selection wave SEL outputs high level and low level in turn when the pulse voltage wave DS appears rising edge in turn, and at the same time, the pulse wave generating circuit 11 outputs the regulating pulse voltage wave DS and the high and low level selection wave SEL as the input signal of the PWM gating circuit 13, and outputs the first pulse voltage wave PWM1 and the second pulse voltage wave PWM2 respectively according to the high level and low level of the high and low level selection wave SEL, and combines Figure 4 It can be seen that when the high and low level selection wave SEL appears at a high level, the first pulse voltage wave PWM1 appears at a high level; when the high and low level selection wave SEL appears at a low level, the second pulse voltage wave PWM2 appears at a high level.
[0057] In the bipolar stimulation circuit 2, the first pulse voltage wave PWM1 and the second pulse voltage wave PWM2 output a high level in turn. When the first pulse voltage wave PWM1 outputs a high level, transistors Q6, Q3 and Q5 are turned on, and the current flow direction in the bipolar stimulation circuit 2 is: power supply VCC → transistor Q5 → cerebral cortex → transistor Q3; when the second pulse voltage wave PWM2 outputs a high level, transistors Q1, Q4 and Q2 are turned on, and the current flow direction in the bipolar stimulation circuit 2 is: power supply VCC → transistor Q2 → cerebral cortex → transistor Q4. The two current flows form stimulation currents of different polarity directions to stimulate the cerebral cortex, which can be seen in FIG. Figure 4 The waveform of the output current OUT is shown.
[0058] Example 3
[0059] This application also proposes a neurostimulator, such as Figure 5 As shown, the neurostimulator includes the neurostimulating current generating circuit proposed in Examples 1 and 2 and a power supply for supplying power to the neurostimulating current generating circuit.
[0060] The neural stimulation current generating circuit included in the neural stimulator proposed in this embodiment does not require high-value devices such as single-chip microcomputers and digital-to-analog converters, and can be implemented by relying on pure analog technology, which reduces the complexity of the device itself and has low application costs. It only generates two levels of stimulation current for cerebral cortex stimulation, has a simple stimulation mode, and has low requirements for the operator, thereby reducing irreversible damage to the patient's nerves caused by operator misoperation.
[0061] In this embodiment, the power supply is a dry cell battery. Dry cells are chosen to replace the complex and bulky power supply mode. The device can also be made handheld, thereby reducing the size and cost of the device, making it disposable and reducing the risk of surgical infection.
[0062] The embodiments are provided merely to illustrate the present invention and are not intended to limit the embodiments of the present invention. Those skilled in the art will appreciate that other variations or modifications may be made based on the above description. It is not necessary and impossible to enumerate all embodiments here. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the claims.
Claims
1. A nerve stimulation current generating circuit, characterized in that: The generating circuit is a purely analog circuit, comprising: a pulse generation and gating unit, configured to generate a first pulse voltage wave and a second pulse voltage wave, wherein the first pulse voltage wave and the second pulse voltage wave have the same pulse width and frequency but different delays; The two-speed bipolar constant current stimulation unit is used to receive the first pulse voltage wave and the second pulse voltage wave with different delays, generate two-speed stimulation currents, and change the polarity of the two-speed stimulation currents.
2. The nerve stimulation current generating circuit according to claim 1, characterized in that: The pulse generation and gating unit includes a pulse wave generating circuit, a trigger circuit and a PWM gating circuit; wherein, the pulse wave generating circuit is used to generate a basic pulse voltage wave; the trigger circuit is used to receive the basic pulse voltage wave, and output a high and low level selection wave when a rising edge appears in the waveform of the basic pulse voltage wave; the PWM gating circuit is used to receive the high and low level selection waves, and use the high level and low level that appear with delay in the high and low level selection waves to adjust the basic pulse voltage wave into a first pulse voltage wave and a second pulse voltage wave with different delays.
3. The nerve stimulation current generating circuit according to claim 2, characterized in that: The pulse wave generating circuit includes a comparator U4, a capacitor C5, a capacitor C6, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a diode D1, a diode D2, an adjustable resistor RP1 and an adjustable resistor RP2; wherein, one end of the resistor R18 is grounded, and the other end is connected to the positive input end of the comparator U4, one end of the capacitor C5 is grounded, and the other end is connected to the negative input end of the comparator U4, one end of the resistor R17 is connected to the positive input end of the comparator U4, and the other end is respectively connected to one end of the resistor R16, one end of the resistor R14 and the adjustable point of the adjustable resistor RP2, and the other end of the resistor R16 is connected to the comparator The output end of the comparator U4 is connected to the other end of the resistor R14, one end of the adjustable resistor RP2 is connected to the anode of the diode D1, and the other end is connected to the cathode of the diode D2, the cathode of the diode D1 is connected to one end of the resistor R19, the other end of the resistor R19 is respectively connected to one end of the adjustable resistor RP1 and the adjustable point of the adjustable resistor RP1, the anode of the diode D2 is connected to one end of the resistor R15, the other end of the resistor R15 is connected to one end of the adjustable resistor RP1 and the adjustable point of the adjustable resistor RP1, and the other end of the adjustable resistor RP1 is connected to the inverting input end of the comparator U4; one end of the capacitor C6 is connected to the power supply VCC, and the other end is grounded.
4. The nerve stimulation current generating circuit according to claim 2, characterized in that: The trigger circuit includes a D trigger U1, a resistor R2, a resistor R3 and a capacitor C3. The output end of the pulse wave generating circuit is respectively connected to the second pin of the D trigger U1 and one end of the resistor R3. The basic pulse voltage wave generated by the pulse wave generating circuit is connected to the D trigger U1, and the other end of the resistor R3 is grounded; the eighth pin of the D trigger U1 is connected to the first pin of the D trigger U1, so that the D trigger U1 becomes a T trigger triggered by a rising edge. When the waveform of the basic pulse voltage wave connected to the second pin of the D trigger U1 has a rising edge, the eighth pin of the D trigger U1 outputs a high and low level selection wave; the eighth pin of the D trigger U1 is also respectively connected to one end of the resistor R2 and one end of the capacitor C3, and the other end of the resistor R2 and the other end of the capacitor C3 are both grounded.
5. The nerve stimulation current generating circuit according to claim 2, characterized in that: The PWM selection circuit includes an analog selection switch U2, a capacitor C1 and a capacitor C2. The output end of the pulse wave generating circuit is connected to the input end IN of the analog selection switch U2. The input end IN of the analog selection switch U2 receives the basic pulse voltage wave generated by the pulse wave generating circuit. The high and low level selection waves generated by the trigger circuit are connected to the pin SEL of the analog selection switch U2. The first output end OUTA of the analog selection switch U2 is connected to one end of the capacitor C1, and the other end of the capacitor C1 is grounded. The first output end OUTA of the analog selection switch U2 outputs a first pulse voltage wave. The second output end OUTB of the analog selection switch U2 is connected to one end of the capacitor C2, and the other end of the capacitor C2 is grounded. The second output end OUTB of the analog selection switch U2 outputs a second pulse voltage wave.
6. The nerve stimulation current generating circuit according to claim 1, characterized in that: The two-speed bipolar constant current stimulation unit includes a two-speed constant current source circuit and a bipolar stimulation circuit; wherein, the two-speed constant current source circuit is used to receive a first pulse voltage wave and a second pulse voltage wave with different delays to generate a two-speed stimulation current; the bipolar stimulation circuit is used to change the polarity of the two-speed stimulation current.
7. The nerve stimulation current generating circuit according to claim 6, characterized in that: The two-speed constant current source circuit includes: an operational amplifier U3, a capacitor C4, an NMOS tube Q7, a diode D3, a diode D4, a slide switch SW1, a resistor R1, a resistor R12, a resistor R13, a resistor R20, a resistor R21, a resistor R22 and a resistor R23; The first pulse voltage wave is input to one end of the resistor R20, the other end of the resistor R20 is connected to the anode of the diode D3 and one end of the resistor R21 respectively, and the other end of the resistor R21 is grounded; the second pulse voltage wave is input to one end of the resistor R22, the other end of the resistor R22 is connected to the anode of the diode D4 and one end of the resistor R23 respectively, and the other end of the resistor R23 is grounded; the cathode of the diode D3 and the cathode of the diode D4 are both connected to the positive input end of the operational amplifier U3, the output end of the operational amplifier U3 is connected to one end of the resistor R13, and the other end of the resistor R13 is connected to the gate of the NMOS tube Q7. The operational amplifier U3 is powered by a power supply VCC, which is also connected to a capacitor C4, the other end of which is grounded. The reverse input terminal of the operational amplifier U3 is respectively connected to the drain of the NMOS tube Q7 and the fixed pin of the slide switch SW1, the source of the NMOS tube Q7 is connected to the bipolar stimulation circuit, the first sliding pin of the slide switch SW1 is connected to one end of the resistor R12, the second sliding pin of the slide switch SW1 is connected to one end of the resistor R1, the other end of the resistor R1 and the other end of the resistor R12 are both grounded; the resistance value of the resistor R12 is different from that of the resistor R1.
8. The nerve stimulation current generating circuit according to claim 6, characterized in that: The bipolar stimulation circuit includes: a first polarity stimulation circuit and a second polarity stimulation circuit, the first polarity stimulation circuit includes transistor Q4, transistor Q5, transistor Q6, resistor R8, resistor R9, resistor R10, and resistor R11, and the second polarity stimulation circuit includes: transistor Q1, transistor Q2, transistor Q3, resistor R4, resistor R5, resistor R6, and resistor R7; The first pulse voltage wave is input to one end of the resistor R11, the other end of the resistor R11 is connected to the base of the transistor Q6, the emitter of the transistor Q6 is connected to the base of the transistor Q3, the collector of the transistor Q6 is connected to one end of the resistor R10, the other end of the resistor R10 is respectively connected to one end of the resistor R8 and one end of the resistor R9, the other end of the resistor R8 is connected to the power supply VCC, the other end of the resistor R9 is connected to the base of the transistor Q5, the collector of the transistor Q5 and the collector of the transistor Q4 are both connected to one end of the nerve to be stimulated, and the emitter of the transistor Q5 is connected to the power supply VCC; The second pulse voltage wave is input to one end of resistor R4, the other end of resistor R4 is connected to the base of transistor Q1, the emitter of transistor Q1 is connected to the base of transistor Q4, the collector of transistor Q1 is connected to one end of resistor R5, the other end of resistor R5 is respectively connected to one end of resistor R6 and one end of resistor R7, the other end of resistor R7 is connected to the power supply VCC, the other end of resistor R6 is connected to the base of transistor Q2, the collector of transistor Q2 and the collector of transistor Q3 are both connected to the other end of the nerve to be stimulated, the emitter of transistor Q2 is connected to the power supply VCC, and the emitter of transistor Q3 and the emitter of transistor Q4 are both connected to the output end of the two-speed constant current source circuit.
9. A neurostimulator, characterized in that: The nerve stimulator comprises the nerve stimulation current generating circuit according to any one of claims 1 to 8 and a power supply for supplying power to the nerve stimulation current generating circuit.
10. The neurostimulator according to claim 9, characterized in that The power supply is a dry cell battery; the neurostimulator is a handheld and / or disposable consumable.