Solar cell and photovoltaic module

Abstract

The invention relates to the technical field of photovoltaic power generation, in particular to a solar cell and a photovoltaic module. The solar cell comprises a substrate, a patterned doped silicon layer, a passivation layer and an electrode, wherein the doped silicon layer is located between the substrate and the passivation layer; the doped silicon layer comprises a first sub-layer with a first thickness and a second sub-layer with a second thickness, the first sub-layer and the second sub-layer are connected along the first direction, the first thickness is greater than the second thickness, and the second thickness is greater than or equal to 0 [mu] m; the orthographic projection of the junction of the first sub-layer and the second sub-layer on the substrate is a boundary, the boundary comprises a plurality of connected units, and the units comprise convex units and / or concave units; the protruding direction of the protruding units is in the second direction, and the protruding shape of the protruding units is in a non-sharp-corner shape. The concave direction of the concave unit is in the second direction, and the concave shape of the concave unit is a non-sharp-corner shape; the second direction intersects with the length direction of the electrode; an electrode is in contact with the first sub-layer through the passivation layer.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic power generation technology, and in particular to a solar cell and a photovoltaic module. Background Art

[0002] In solar cells, although making the doped silicon layer into a patterned structure helps reduce the parasitic absorption problem caused by the doped silicon layer, it is easy to cause new problems due to the subsequent sintering electrode operation, including: it is easy to cause micro cracks in the structure (such as the edges of the above-mentioned patterned structure or other film layers produced subsequently), and it is also easy to cause the electrode slurry to splash and burn through the film layer. These problems will aggravate the formation of recombination centers, affect the passivation performance of the solar cell, and make it difficult to stably improve the efficiency of the solar cell. Summary of the Invention

[0003] In order to solve the above technical problems, the present application discloses a solar cell and a photovoltaic module, which can not only alleviate the micro-crack problem of the solar cell structure while reducing parasitic absorption, but also reduce the undesirable splashing of the electrode slurry, thereby achieving the purpose of stably improving the photoelectric conversion efficiency and other performance of the solar cell.

[0004] In a first aspect, the present application provides a solar cell, comprising: substrate; a patterned doped silicon layer disposed on a surface of the substrate; wherein the doped silicon layer comprises a first sublayer having a first thickness and a second sublayer having a second thickness, the first thickness being greater than the second thickness, and the second thickness being greater than or equal to 0 μm; and the first direction being a plane direction of the substrate; A passivation layer is provided on the surface of the substrate, and the doped silicon layer is located between the substrate and the passivation layer; an electrode, wherein the electrode passes through the passivation layer and contacts the first sub-layer; In which, the orthographic projection of the boundary between the first sublayer and the second sublayer on the substrate is a dividing line, and the dividing line includes a plurality of connected units, and the units include convex units and / or concave units; when the dividing line includes the convex unit, the protruding direction of the convex unit is along the second direction, and the convex shape of the convex unit is a non-pointed shape; when the dividing line includes the concave unit, the concave direction of the concave unit is along the second direction, and the concave shape of the concave unit is a non-pointed shape; the second direction is a direction intersecting with the length direction of the electrode.

[0005] Optionally, at least one of an arc, a trapezoid, a rectangle or a special shape, wherein the special shape includes connected curve segments and oblique line segments.

[0006] Preferably, the shape of the unit includes the special-shaped shape, in which the angle between the oblique line segment and the length direction of the electrode is α, and 0°≤α≤45°.

[0007] Furthermore, for any unit of the boundary line, the maximum distance between the unit and the electrode is L1, the minimum distance between the unit and the electrode is L2, and 1 μm≤L1-L2≤250 μm.

[0008] Furthermore, 10 μm≤L1≤500 μm.

[0009] Furthermore, corresponding to any of the electrodes, the dividing lines include a first dividing line and a second dividing line located on both sides of the electrode, and the first dividing line and the second dividing line are symmetrically or asymmetrically arranged.

[0010] Furthermore, the dividing line includes a plurality of the units distributed in a periodic and regular manner or includes a plurality of the units distributed irregularly.

[0011] Furthermore, corresponding to any of the electrodes, the dividing line includes a first dividing line and a second dividing line located on both sides of the electrode, and the first dividing line and the second dividing line are asymmetrically arranged; the unit includes a first unit located on the first dividing line and a second unit located on the second dividing line; Along the length direction of the electrode, the span between the two farthest points of the first unit is L3, 50 μm≤L3≤700 μm; along the length direction of the electrode, the span between the two farthest points of the second unit is L4, 20 μm≤L4≤700 μm.

[0012] Preferably, 100 μm≤L4≤500 μm.

[0013] Furthermore, L3≥L4.

[0014] Furthermore, the second thickness is 0 μm.

[0015] Furthermore, the unit is a convex unit or a concave unit.

[0016] Furthermore, the second direction is perpendicular to the length direction of the electrode.

[0017] Furthermore, in the area corresponding to the first sub-layer, the surface of the substrate has a first surface textured structure, and the first surface textured structure includes at least one of a pyramid structure, a pyramid base structure, and a prism structure; in the area corresponding to the second sub-layer, the surface of the substrate has a second surface textured structure, and the second surface textured structure includes at least one of a pyramid structure, a pyramid base structure, and a prism structure.

[0018] Furthermore, the doped silicon layer is arranged on the backlight side of the substrate, and the doped silicon layer is a doped polysilicon layer; the solar cell further comprises: a dielectric layer arranged between the substrate and the doped silicon layer.

[0019] Furthermore, the doped silicon layer includes an N-type doped silicon layer and a P-type doped silicon layer arranged on the backlight surface of the substrate, and the N-type doped silicon layer and the P-type doped silicon layer are separated by an isolation region; the electrode includes a first electrode and a second electrode, the first electrode passes through the passivation layer and contacts the N-type doped silicon layer, and the second electrode passes through the passivation layer and contacts the P-type doped silicon layer.

[0020] In a second aspect, an embodiment of the present application provides a photovoltaic module, which includes the solar cell as described in the first aspect.

[0021] Compared with the prior art, this application has at least the following beneficial effects: The solar cell of the embodiment of the present application can reduce parasitic absorption while alleviating the micro-crack problem in the structure of the solar cell and reducing the undesirable splashing of the electrode slurry, thereby achieving the purpose of stably improving the photoelectric conversion efficiency and other performance of the solar cell.

[0022] First, the solar cell of the present embodiment utilizes a patterned doped silicon layer, reducing the amount of doped silicon layer required, thereby alleviating parasitic absorption issues caused by this material. In particular, when the second sublayer of the doped silicon layer is completely removed, the parasitic absorption is significantly improved due to the significant reduction in the area of ​​the doped silicon layer required.

[0023] Secondly, based on the provision of a patterned doped silicon layer to improve parasitic absorption, in order to simultaneously enhance the structure's resistance to thermal stress, the present embodiment improves the structural characteristics of the boundary between the first and second sublayers, transforming it from a straight line parallel to the length of the electrode to a non-sharp-angled boundary with raised and / or recessed units. This special boundary shape can effectively alleviate the effects of thermal stress in the solar cell manufacturing process and improve the ability to resist thermal stress.

[0024] Finally, the present application adopts a dividing line with raised units and / or recessed units in a direction different from the length direction of the electrode, which can better balance the setting area of ​​the first sublayer and the distance between the edge of the first sublayer (i.e., the dividing line) and the electrode. This helps to better balance the two effects of reducing parasitic absorption and reducing the probability of electrode slurry splashing into the area where the second sublayer is located. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0026] Figure 1 is a top view (partial schematic diagram) of a solar cell with a patterned doped silicon layer; Figure 2 This is a schematic structural diagram of a solar cell according to an embodiment of the present application; Figure 3 This is a schematic structural diagram of another solar cell according to an embodiment of the present application; Figure 4 yes Figure 3 A top view of a solar cell is shown (partially schematically); Figure 5 This is a deformed structure of the boundary line in the solar cell of the embodiment of the present application; Figure 6 Schematic diagram of the effect of adjusting the position of the dividing line on slurry splashing when the dividing line is a straight line; Figure 7 Schematic diagram of the effect of slurry splashing when the dividing line is in the shape of an embodiment of the present application; Figure 8 This is a schematic structural diagram of a dividing line in an embodiment of the present application; Figure 9 yes Figure 8 A magnified schematic diagram of the structure at center A; Figure 10 This is a structural diagram of another dividing line in an embodiment of the present application; Figure 11 This is a schematic structural diagram of another solar cell according to an embodiment of the present application; Figure 12 is a schematic structural diagram of a photovoltaic module according to an embodiment of the present application; Figure 13 This is a Zeta 3D microscope image of the solar cell in Example 1 of the present application (partial top view); Figure 14This is a Zeta 3D microscope image of the solar cell in Example 2 of the present application (partial top view).

[0027] Description of reference numerals: 1. Substrate; 2. Doped silicon layer; 21. First sublayer; 22. Second sublayer; 23. N-type doped silicon layer; 24. P-type doped silicon layer; 3. Passivation layer; 4. Electrode; 41. First electrode; 42. Second electrode; 43. Light-receiving surface electrode; 5. Dielectric layer; 6. Emitter; 7. Light-receiving surface functional layer; 71. Light-receiving surface passivation layer; 72. Light-receiving surface anti-reflection layer; 10, dividing line; 11, unit; 111, convex unit; 112, concave unit; 11A, curved segment; 11B, oblique line segment; 101, first dividing line; 102, second dividing line; 1011, first unit; 1012, second unit; 100. Solar cell; 200. Solder ribbon. DETAILED DESCRIPTION

[0028] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0029] In this application, terms such as "upper," "lower," "left," "right," "front," "back," "top," "bottom," "inner," "outer," "vertical," "horizontal," "transverse," and "longitudinal" indicate positions or locations based on the positions or locations shown in the accompanying drawings. These terms are primarily intended to better describe this application and its embodiments and are not intended to limit the devices, elements, or components indicated to having a specific orientation, or to being constructed or operated in a specific orientation.

[0030] Furthermore, some of the above terms may be used to express other meanings besides indicating a position or location. For example, the term "on" may also be used to indicate a dependency or connection in certain circumstances. Those skilled in the art will understand the specific meanings of these terms in this application based on the specific circumstances.

[0031] Furthermore, the terms "installed," "disposed," "provided with," "connected," and "connected" should be interpreted broadly. For example, they can refer to fixed connections, removable connections, or integral structures; mechanical connections or electrical connections; direct connections, indirect connections through an intermediary, or internal communication between two devices, elements, or components. Those skilled in the art will understand the specific meanings of these terms in this application based on the specific circumstances.

[0032] Furthermore, the terms "first," "second," and the like are primarily used to distinguish different devices, elements, or components (which may or may not be the same in type and configuration) and are not intended to indicate or imply the relative importance or quantity of the devices, elements, or components indicated. Unless otherwise specified, "plurality" means two or more.

[0033] In solar cells, doped silicon layers (such as doped polysilicon layers) experience parasitic absorption, which affects light absorption and utilization. While patterning the doped silicon layer to reduce its footprint can be used to improve solar cell efficiency by reducing parasitic absorption, this structural design actually introduces new problems, rendering parasitic absorption reduction ineffective in effectively improving solar cell efficiency.

[0034] This is because after the patterned doped silicon layer is provided, a step-like structure is formed on the surface of the solar cell, and the edge profile of the step-like structure is a straight line. However, this straight line edge profile has poor resistance to the thermal stress generated in the subsequent high-temperature process of the solar cell.

[0035] like Figure 1 The figure shows a top view (partial schematic diagram) of a solar cell with a patterned doped silicon layer. In this solar cell, the boundary 10 between the region with the doped silicon layer 2 and the region without it (i.e., the edge of the step-like structure) is a straight line parallel to the length of the electrode 4. After forming this patterned doped silicon layer 2, a series of high-temperature processes are required, such as preparing a passivation layer on top of the doped silicon layer 2 (at temperatures exceeding 500°C) and sintering the electrode (at temperatures exceeding 800°C). The high temperatures of these processes can generate thermal stress at the location of the step-like structure. The linear boundary 10 is less resistant to this thermal stress, leading to microcracks in the associated structures and passivation layer at the boundary 10, creating new recombination centers, deteriorating passivation performance, and reducing the solar cell's photoelectric conversion efficiency.

[0036] In addition, unlike setting a doped silicon layer 2 on the entire substrate, when a patterned doped silicon layer 2 is used, although the smaller the area of ​​the doped silicon layer 2, the less parasitic absorption, it also means that when the electrode 4 is made on the doped silicon layer 2 with a smaller area, the electrode slurry is more likely to splash onto other areas. Figure 1 In the solar cell shown, the electrode 4 is only located in the area where the doped silicon layer 2 is provided. The less doped silicon layer 2 there is, the more likely the electrode slurry used to form the electrode 4 will randomly splash onto areas where the doped silicon layer 2 is not provided, causing the passivation layer 3 in the splashed area to be burned through by the electrode slurry. This can also lead to poor passivation performance and reduced photoelectric conversion efficiency of the solar cell.

[0037] This shows that simply having a patterned doped silicon layer is not enough to effectively improve the photoelectric conversion efficiency of solar cells. Furthermore, it is necessary to further reduce the effects of thermal stress and undesirable splashing of the electrode paste. Only in this way can solar cells with patterned doped silicon layers achieve stable efficiency improvements.

[0038] Based on the above analysis, combined with Figure 2 and Figure 3 As shown, an embodiment of the present application provides a solar cell 100, which includes: a substrate 1, a patterned doped silicon layer 2, a passivation layer 3 and an electrode 4, wherein the patterned doped silicon layer 2 is arranged between the substrate 1 and the passivation layer 3, and the electrode 4 passes through the passivation layer 3 and contacts the doped silicon layer 2.

[0039] In which, the patterned doped silicon layer 2 is arranged on the surface of the substrate 1, and the doped silicon layer 2 includes a first sublayer 21 with a first thickness and a second sublayer 22 with a second thickness connected along a first direction, the first thickness is greater than the second thickness, and the second thickness is greater than or equal to 0 μm; the first direction is the planar direction of the substrate 1.

[0040] It is understood that patterning the doped silicon layer 2 refers to patterning the entire doped silicon layer 2, thinning or removing local areas of the doped silicon layer 2, so that the doped silicon layer 2 presents a film layer with certain pattern characteristics. In such a patterned doped silicon layer 2, whether the local areas are thinned or removed, it helps to reduce the parasitic absorption of the doped silicon layer 2 and also forms a step-like structure between the untreated areas and the patterned areas of the doped silicon layer 2.

[0041] In an alternative embodiment, see Figure 2As shown, the patterned doped silicon layer 2 includes a first sublayer 21 and a second sublayer 22 connected along a first direction, and the thickness of the first sublayer 21 is greater than the thickness of the second sublayer 22. In this embodiment, the patterned doped silicon layer 2 can be obtained by partially thinning the entire layer of doped silicon layer 2 in a local area, with the unthinned portion serving as the first sublayer 21 and the thinned portion serving as the second sublayer 22, thereby forming a doped silicon layer 2 having different thicknesses in the first direction (i.e., the planar direction of the substrate 1) and exhibiting patterned characteristics. In this embodiment, the second sublayer 22 is partially removed, which is beneficial to reducing the risk of burning through the passivation layer 3 due to undesirable splashing of the electrode slurry, and can also play a role in reducing parasitic absorption to a certain extent. In another optional embodiment, combined with Figure 3 As shown, the patterned doped silicon layer 2 includes only the first sublayer 21, and the second thickness of the second sublayer 22 is 0 μm, that is, the second sublayer 22 is completely removed. In this embodiment, since the second sublayer 22 is completely removed, the parasitic absorption is reduced more significantly.

[0042] Among them, further combining Figure 4 and Figure 5 As shown, Figure 4 yes Figure 3 The solar cell 100 is shown in a top view, and only a partial area is shown for the convenience of clearly illustrating the relevant structure. Figure 5 Some deformation structures of the boundary line 10 in the solar cell 100 of the embodiment of the present application are shown. Figure 5 (a) is a schematic diagram of the dividing lines 10 on both sides being arc-shaped protruding units 111. Figure 5 (b) is a schematic diagram showing that the dividing lines 10 on both sides are arc-shaped convex units 111 and arc-shaped concave units 112, Figure 5 (c) is a schematic diagram of the dividing lines 10 on both sides being arc-shaped protruding units 111, and Figure 5 (c) with Figure 5 The difference between (a) is Figure 5 The protrusion unit 111 of (c) is more protruding. Figure 5 (d) is a schematic diagram of the dividing lines 10 on both sides being trapezoidal protruding units 111. Figure 5(e) is a schematic diagram of a unit 11 with two dividing lines 10 on both sides having a special shape. The orthographic projection of the boundary between the first sublayer 21 and the second sublayer 22 on the substrate 1 is the dividing line 10. The dividing line 10 includes a plurality of connected units 11, and the unit 11 includes a raised unit 111 and / or a recessed unit 112. It can be seen that in the embodiment of the present application, the unit 11 can be formed by connecting a plurality of raised units 111, or by connecting a plurality of recessed units 112, or by connecting a plurality of raised units 111 and a plurality of recessed units 112. Preferably, the unit 11 includes only a plurality of raised units 111 or only a plurality of recessed units 112 to facilitate processing and reduce processing difficulty.

[0043] Among them, Figure 5 As shown in (a), when the boundary line 10 includes the protruding unit 111, the protruding direction of the protruding unit 111 is along the second direction, and the protruding shape of the protruding unit 111 is a non-pointed shape. Figure 4 As shown, when the boundary line 10 includes the concave unit 112 , the concave direction of the concave unit 112 is along the second direction, and the concave shape of the concave unit 112 is a non-pointed shape; the second direction is a direction intersecting with the length direction of the electrode 4 .

[0044] It can be understood that the orthographic projection of the boundary between the first sublayer 21 and the second sublayer 22 on the substrate 1 is the dividing line 10, and the dividing line 10 is also the orthographic projection of the edge of the first sublayer 21 on the substrate 1. The shape setting of the dividing line 10 can reflect the structural shape of the interface between the first sublayer 21 and the second sublayer 22. In addition, the second direction is a direction intersecting with the length direction of the electrode 4, that is, the second direction is not parallel to the length direction of the electrode 4. Preferably, the second direction is perpendicular to the length direction of the electrode 4. The convex direction of the convex unit 111 and the concave direction of the concave structure are set along the second direction, that is, the convex unit 111 and the concave unit 112 of the embodiment of the present application have a shape trend different from the length direction of the electrode 4. Such a shape trend helps to offset the thermal stress from different directions, which is beneficial to improve the thermal stress resistance of the junction between the first sublayer 21 and the second sublayer 22.

[0045] In the embodiment of the present application, a non-pointed shape refers to a shape in which the raised top or recessed bottom of the unit 11 is not a pointed shape. Taking the non-pointed shape of the raised unit 111 as an example, it means that the raised top of the raised unit 111 is a smooth arc shape or a straight line shape, etc., rather than a sharp-angled shape such as a sawtooth shape with obvious sharp points. It is understandable that in the embodiment of the present application, the connection between two adjacent units 11 can still be formed into a pointed shape, but because the raised shape or recessed shape of the unit 11 itself is a non-pointed shape, the number of pointed shapes that can exist in the dividing line 10 formed by connecting several units 11 is still relatively small, and there will be no situation where the dividing line 10 has a large number of sharp corners due to the unit 11 itself having a pointed shape such as a sawtooth shape. In the embodiment of the present application, the non-pointed-angle unit 11 can be formed by processes such as laser patterning. Compared with the pointed-angle unit 11, the non-pointed-angle unit 11 has lower difficulty in laser film opening and lower precision requirements for laser film opening, which is conducive to obtaining the corresponding dividing line 10 shape more accurately.

[0046] The passivation layer 3 is disposed on the surface of the substrate 1, and the doped silicon layer 2 is located between the substrate 1 and the passivation layer 3. That is, the passivation layer 3 is located on both the first sublayer 21 and the second sublayer 22 (when the thickness of the second sublayer 22 is 0 μm, this portion of the passivation layer 3 is located on the substrate 1). In other words, the passivation layer 3 covers the stepped structure formed by the patterned doped silicon layer 2. Optionally, the passivation layer 3 may include at least one of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, and an aluminum oxide layer. Preferably, the passivation layer 3 may include an aluminum oxide layer and a silicon nitride layer, providing both excellent passivation and anti-reflection properties.

[0047] The electrode 4 passes through the passivation layer 3 and contacts the first sublayer 21 in the doped silicon layer 2. Specifically, the electrode 4 forms an ohmic contact with the first sublayer 21 to achieve carrier transport. Optionally, the electrode 4 can be at least one of a silver electrode 4, a silver-aluminum electrode 4, a copper electrode 4, or a nickel electrode 4.

[0048] Through the above-mentioned setting, the solar cell 100 of the embodiment of the present application can reduce parasitic absorption while alleviating the micro-crack problem of the structure in the solar cell 100 and reducing the undesirable splashing of the electrode slurry, thereby achieving the purpose of stably improving the photoelectric conversion efficiency and other performance of the solar cell 100.

[0049] First, the solar cell 100 of the present embodiment utilizes a patterned doped silicon layer 2, reducing the amount of doped silicon layer 2 provided, thereby alleviating parasitic absorption issues caused by this material. In particular, when the second sublayer 22 of the doped silicon layer 2 is completely removed, the parasitic absorption is significantly improved due to the significant reduction in the area of ​​the doped silicon layer 2.

[0050] Secondly, based on the provision of a patterned doped silicon layer 2 to improve parasitic absorption, in order to simultaneously enhance the structure's resistance to thermal stress, the present embodiment improves the structural features of the boundary line 10 between the first sub-layer 21 and the second sub-layer 22, transforming it from a linear boundary line 10 parallel to the length of the electrode 4 to a boundary line 10 of the present invention having raised units 111 and / or recessed units 112 and a non-sharp angle. This special shape of the boundary line 10 can primarily alleviate the effects of thermal stress during the solar cell 100 manufacturing process and improve its resistance to thermal stress in the following ways: First, because the shape of the dividing line 10 includes several raised units 111 and / or recessed units 112 that are different from the length direction of the electrode 4, this shape can effectively reduce or offset the thermal stress in different directions at the junction of the first sub-layer 21 and the second sub-layer 22. At the same time, the shapes of the raised units 111 and recessed units 112 are non-sharp-angled, so that there will not be a large number of sharp-angle structures in the dividing line 10, which can avoid the high concentration of thermal stress, thereby reducing the damage caused by thermal stress to the structure at the junction of the first sub-layer 21 and the second sub-layer 22 and the subsequent production of the passivation layer 3, and reducing the cracking or delamination of the structure. Second, the use of the above-mentioned specific shape of the dividing line 10 can improve the heat dissipation capacity of the edge position of the first sub-layer 21, making it less likely to accumulate heat, thereby reducing the damage to the passivation film layer due to thermal stress.

[0051] Finally, the present application adopts a dividing line 10 having a protruding unit 111 and / or a recessed unit 112 in a length direction different from that of the electrode 4, which can better balance the setting area of ​​the first sub-layer 21 and the distance between the edge of the first sub-layer 21 (i.e., the dividing line 10) and the electrode 4. This helps to better balance the two effects of reducing parasitic absorption and reducing the probability of electrode slurry splashing into the area where the second sub-layer 22 is located.

[0052] It is understood that the manufacturing process of the electrode 4 can be as follows: printing the electrode paste on the passivation layer 3 corresponding to the area where the first sub-layer 21 is located, and sintering the electrode paste at a high temperature so that it corrodes the passivation layer 3 and forms an ohmic contact with the first sub-layer 21 below the passivation layer 3. During this process, a portion of the electrode paste may splash onto an area outside the first sub-layer 21, that is, the area where the passivation layer 3 corresponding to the second sub-layer 22 is located (this area is an undesirable splashing area for the electrode paste), causing the passivation layer 3 in this area to be damaged by the high-temperature paste.

[0053] In order to reduce the undesirable splashing of the electrode slurry, when the boundary line 10 between the first sub-layer 21 and the second sub-layer 22 is a straight line parallel to the length direction of the electrode 4, the only way to achieve this is to expand the area of ​​the first sub-layer 21, so that the first sub-layer 21 forms a regular rectangular strip film with a larger area, thereby leaving a larger safety distance for the splashing of the electrode slurry. Figure 6 As shown, Figure 6 Schematic diagram of the effect of adjusting the position of the dividing line 10 on the splashing of the slurry when the dividing line 10 is in a straight line shape. When the boundary line between the first sublayer 21 and the second sublayer 22 is a straight line parallel to the length direction of the electrode 4, the first sublayer 21 forms a regular rectangular strip film layer. Among them, M1 is the position of the dividing line 10 before adjustment, and M2 is the position of the dividing line 10 after adjustment. The area between M1 and M2 is the distribution area where the electrode slurry randomly splashes. The closer to the area M1, the greater the probability of the electrode slurry splashing and the more splashing. The closer to the area M2, the smaller the probability of the electrode slurry splashing and the less splashing. Although the probability of undesirable splashing of the electrode slurry can be reduced by expanding the area of ​​the first sub-layer 21 so that its edge reaches the position M2, the setting area of ​​the doped silicon layer 2 is also significantly increased, which in turn leads to increased parasitic absorption. The key is that a part of the rectangular strip of doped silicon layer 2 with an increased area will not have the electrode slurry splashed, that is, it is not necessary to prevent the undesirable splashing of the electrode slurry. Therefore, a part of the increased area of ​​the first sub-layer 21 is a redundant sacrificial area - it cannot prevent the undesirable splashing of the electrode slurry, but increases parasitic absorption.

[0054] However, in the embodiment of the present application, the shape of the boundary line 10 is adjusted to be different from the convex unit 111 and / or concave unit 112 in the length direction of the electrode 4, thereby reducing such redundant sacrificial area. Figure 7 As shown, Figure 7 This is a schematic diagram of the effect of the boundary line 10 on the splashing of the electrode slurry when the boundary line 10 is a shape formed by connecting the convex units 111 and / or the concave units 112 of the embodiment of the present application. Figure 7In the figure, the dotted line shows a straight dividing line 10 for easy comparison. When the dividing line 10 between the first sublayer 21 and the second sublayer 22 is set to the special shape of the embodiment of the present application, the area of ​​the first sublayer 21 can cover the main splashing area of ​​the electrode slurry. Although the coverage area of ​​the first sublayer 21 is reduced for areas with a low probability of electrode slurry splashing and a small amount of splashing, this also effectively reduces the increase in redundant area, avoiding the situation where the undesirable splashing of the electrode slurry is reduced at the expense of the parasitic absorption improvement effect. In particular, the redundant areas of the first sublayer 21 when a straight dividing line 10 is adopted are greatly reduced in the embodiment of the present application. Therefore, the special shape of the dividing line 10 in the embodiment of the present application can meet the following requirements: the first sublayer 21 can provide a certain area to reduce the probability of undesirable splashing of the electrode slurry, and can ensure that a large amount of redundant area is not added to affect the parasitic absorption.

[0055] The boundary line 10 at the junction of the first sub-layer 21 and the second sub-layer 22 will be further described below.

[0056] See back Figures 4 and 5 , and further references Figure 8 and Figure 9 As shown, in the embodiment of the present application, the shape of the unit 11 includes at least one of an arc, a trapezoid, a rectangle, or a special shape, wherein the special shape includes a connected curved segment 11A and an oblique line segment 11B. Compared to a rectangle, an arc, a trapezoid, or one of the above special shapes of the unit 11 is more conducive to dispersing and reducing thermal stress and heat, further reducing the impact of thermal stress on the edge structure of the first sub-layer 21 and the subsequent deposition of the passivation layer 3.

[0057] It can be understood that the above shapes can be either the convex shape of the convex unit 111 or the concave shape of the concave unit 112 .

[0058] The arc refers to a segment of any smooth curve, and the arc can be in various forms, including at least one of a circular arc, an elliptical arc, a parabolic arc, a spiral arc, or a parametric curve arc.

[0059] When unit 11 is in the shape of a trapezoid, although the short sides of the trapezoid have certain sharp corners, since the overall protruding top or recessed bottom of the trapezoid is a straight line rather than a sharp corner, the shape of this unit 11 also belongs to the non-sharp angle shape of the embodiment of the present application. The dividing line 10 formed by connecting multiple such trapezoids will only form sharp corners at the connection between adjacent trapezoids. Therefore, the number of sharp corners of the dividing line 10 as a whole is relatively small, and the non-sharp angle shape is still the main shape. The situation is similar when the unit 11 is in the shape of a rectangle, and will not be repeated here.

[0060] More preferably, see Figure 8 and Figure 9As shown, the shape of the unit 11 is a special shape formed by connecting the above-mentioned curved segment 11A and the oblique segment 11B. In the special shape, the angle between the oblique segment 11B and the length direction of the electrode 4 is α, 0°≤α≤45°. As the angle α increases, the setting area of ​​the first sublayer 21 will decrease. When the angle α is controlled within the above range, it is helpful to obtain a more suitable area of ​​the first sublayer 21, so that it can better balance the two aspects of reducing parasitic absorption and reducing the probability of undesirable splashing of the electrode slurry. Exemplarily, the angle α is 0°, 5°, 8°, 10°, 15°, 20°, 30°, 35° or 45°.

[0061] Further, see Figure 8 As shown, for any cell 11 on the boundary 10, the maximum distance between cell 11 and electrode 4 is L1, and the minimum distance between cell 11 and electrode 4 is L2, with 1 μm ≤ L1 - L2 ≤ 250 μm. Taking an electrode 4 and its doped silicon layer 2 as an example, L1 refers to the distance between the top of the raised cell 111 on the boundary 10 and the edge of the electrode 4, representing the maximum distance between the boundary 10 and the electrode 4. L2 refers to the distance between the bottom of the raised cell 111 on the boundary 10 and the edge of the electrode 4, representing the minimum distance between the boundary 10 and the electrode 4. The difference between L1 and L2 reflects the degree of unevenness of the boundary 10, which in turn affects the area of ​​the first sublayer 21 of the doped silicon layer 2 and its distance from the electrode 4. By controlling the difference between L1 and L2 within the above range, the area of ​​the first sublayer 21 on both sides of the electrode 4 and the distance between the edge of the first sublayer 21 and the electrode 4 can be better balanced. Thus, the effect of reducing parasitic absorption and the probability of reducing undesirable splashing of electrode slurry can be better balanced. Exemplarily, the difference between L1 and L2 is 1 μm, 5 μm, 10 μm, 20 μm, 30 μm, 50 μm, 80 μm, 100 μm, 150 μm, 200 μm or 250 μm.

[0062] Furthermore, 10 μm≤L1≤500 μm. L1 reflects the farthest distance between the dividing line 10 and the electrode 4, and is also the farthest distance between the edge of the first sublayer 21 and the electrode 4. The solar cell 100 usually has specified size specifications. If L1 is too large, it is easy to cause the number of electrodes 4 to be reduced, and if L1 is too small, it is easy to cause the number of electrodes 4 to be excessive. When L1 is controlled within the range of 10 μm~500 μm, it is beneficial to ensure that the number of electrodes 4 on the solar cell 100 is more appropriate, so that it can meet the carrier collection efficiency while avoiding adverse effects on light incidence. Exemplarily, L1 is 10 μm, 20 μm, 50 μm, 100 μm, 200 μm, 300 μm, 400 μm or 500 μm.

[0063] Further integration Figure 8 As shown, corresponding to any electrode 4, the dividing line 10 includes a first dividing line 101 and a second dividing line 102 located on both sides of the electrode 4. The first dividing line 101 and the second dividing line 102 can be arranged symmetrically or asymmetrically. Among them, the symmetrical arrangement means that the first dividing line 101 and the second dividing line 102 located on both sides of the electrode 4 are arranged in mirror symmetry with the electrode 4 as the center. The asymmetrical arrangement means that the first dividing line 101 and the second dividing line 102 located on both sides of the electrode 4 are arranged asymmetrically with the electrode 4 as the center, for example, there are differences in the distance from the electrode 4, the shape of the unit 11, the positional relationship, etc.

[0064] Preferably, the first dividing line 101 and the second dividing line 102 are arranged asymmetrically. The asymmetrical arrangement may mean that the first dividing line 101 and the second dividing line 102 have different overall shapes, that the distance from the first dividing line 101 to the electrode 4 is different from the distance from the second dividing line 102 to the electrode 4, or that the cells 11 of the first dividing line 101 and the cells 11 of the second dividing line 102 are staggered along the length direction perpendicular to the electrode 4. When the first dividing line 101 and the second dividing line 102 are arranged asymmetrically, especially when they are staggered, it is beneficial to better prevent the electrode slurry from splashing onto the corresponding area of ​​the second sublayer 22.

[0065] Combine Figure 8 As shown, taking the asymmetric arrangement formed by staggering the cells 11 of the first dividing line 101 and the cells 11 of the second dividing line 102 as an example, in this asymmetric arrangement, the point N1 at which the first cell 1011 of the first dividing line 101 has the shortest distance from the electrode 4, and the point N2 at which the second cell 1012 of the second dividing line 102 has the shortest distance from the electrode 4, are not on the same straight line (i.e., a straight line perpendicular to the length of the electrode 4). This arrangement is equivalent to increasing the distance and / or area between the edge of the first sublayer 21 and the electrode 4, thereby better preventing the electrode slurry from splashing onto the corresponding area of ​​the second sublayer 22. This allows the area of ​​the first sublayer 21 to better balance the three requirements of reducing parasitic absorption, reducing the impact of thermal stress, and reducing the probability of undesirable splashing of the electrode slurry. In this way, it is possible to improve light utilization efficiency while ensuring good passivation performance, so that the solar cell 100 can achieve more stable efficiency improvement.

[0066] Furthermore, when the first dividing line 101 and the second dividing line 102 are asymmetrically arranged, the unit 11 includes a first unit 1011 located at the first dividing line 101 and a second unit 1012 located at the second dividing line 102. Along the length direction of the electrode 4, the span between the two farthest points of the first unit 1011 is L3, 50 μm ≤ L3 ≤ 700 μm. Exemplarily, L3 is 50 μm, 80 μm, 100 μm, 200 μm, 300 μm, 500 μm, or 700 μm. Along the length direction of the electrode 4, the span between the two farthest points of the second unit 1012 is L4, 20 μm ≤ L4 ≤ 700 μm. Exemplarily, L4 is 20 μm, 50 μm, 80 μm, 100 μm, 200 μm, 300 μm, 500 μm, or 700 μm. Preferably, 100 μm≤L4≤500 μm.

[0067] By controlling the span of the first unit 1011 and the second unit 1012 within the above-mentioned range, it is possible to better adapt to the process conditions for graphically producing the doped silicon layer 2 on the basis of better preventing undesirable splashing of the electrode slurry, thereby reducing the difficulty of the laser process and improving the working efficiency of the laser process, making the dividing line 10 of the special structure of the embodiment of the present application more suitable for actual mass production applications.

[0068] Further integration Figure 10 As shown, Figure 10 This is a structural diagram of another asymmetrically set dividing line 10 in an embodiment of the present application. In this dividing line 10, L3>L4. For the second dividing line 102 with the same curvature and different length, the shorter L4 means the larger the distance L2 between the second dividing line 102 and the electrode 4, that is, the farther the edge of the first sublayer 21 is from the electrode 4. This setting can better balance the setting area of ​​the first sublayer 21 to better balance the effects on parasitic absorption and undesirable splashing of the electrode slurry, that is: controlling L4 to be smaller than L3 makes the edge of the first sublayer 21 farther from the electrode 4 to improve the effect of preventing the electrode slurry from splashing to the area where the second sublayer 22 is located, but the increased area of ​​the first sublayer 21 is not too large to increase the parasitic absorption more. In other optional embodiments, L3=L4, for example, refer to the back Figure 8 Setting method.

[0069] Furthermore, in the area corresponding to the first sub-layer 21, the surface of the substrate 1 has a first surface textured structure, and the first surface textured structure includes at least one of a pyramid structure, a pyramid base structure, and a prism structure; in the area corresponding to the second sub-layer 22, the surface of the substrate 1 has a second surface textured structure, and the second surface textured structure includes at least one of a pyramid structure, a pyramid base structure, and a prism structure.

[0070] See back Figure 2 and Figure 3 As shown, the solar cell 100 of the embodiment of the present application can be a passivated contact solar cell 100. In the solar cell 100, the doped silicon layer 2 is arranged on the backlight side of the substrate 1, and the doped silicon layer 2 is a doped polycrystalline silicon layer; the solar cell 100 also includes: a dielectric layer 5 arranged between the substrate 1 and the doped silicon layer 2. That is to say, on the backlight side, a patterned dielectric layer 5 and a patterned doped silicon layer 2 are sequentially arranged on the substrate 1, and the dielectric layer 5 and the doped silicon layer 2 form a passivated contact structure. It can be understood that in addition to the above-mentioned backlight structure, the solar cell 100 can also include a light-receiving surface structure. For example, an emitter 6 is arranged on the light-receiving surface of the substrate 1, and a light-receiving surface functional layer 7 and a light-receiving surface electrode 43 are arranged on the emitter 6. The light-receiving surface electrode 43 passes through the light-receiving surface functional layer 7 and is in ohmic contact with the emitter 6. Among them, the light-receiving surface functional layer 7 can include at least one of a light-receiving surface passivation layer 71 and a light-receiving surface anti-reflection layer 72. The light-receiving surface passivation layer 71 can be an aluminum oxide layer, and the light-receiving surface anti-reflection layer 72 can be one or more layers of a silicon oxide layer, a silicon nitride layer or a silicon oxynitride layer.

[0071] Among them, the dielectric layer 5 acts as a barrier for electrons and holes and can be combined with the polysilicon layer to prevent minority carriers from passing through. The dielectric layer 5 can also have a pinhole channel effect, allowing the carriers in the solar cell 100 to move freely, and selective passage of majority carriers is generated through heavily doped polysilicon, which is beneficial to reducing the recombination loss of minority carriers. In addition, the dielectric layer 5 can be used as a diffusion barrier to prevent the doping elements of the doped polysilicon layer from diffusing into the semiconductor substrate, and cooperate with the barrier layer to play a certain blocking role to ensure that only a small amount of doping elements reaches the substrate 1. The material of the dielectric layer 5 can include a variety of dielectric materials, such as at least one of silicon oxide, magnesium fluoride, amorphous silicon, polysilicon, silicon carbide, silicon nitride, silicon oxynitride, aluminum oxide or titanium oxide. Specifically, the dielectric layer 5 can be composed of a silicon oxide layer containing silicon oxide. This is because the silicon oxide layer has excellent passivation properties, can minimize the recombination loss of minority carriers on the surface of the semiconductor substrate, and is a thin film with excellent durability for subsequent high-temperature processes.

[0072] See further Figure 11As shown, the solar cell 100 of the embodiment of the present application can also be a back-contact solar cell 100. In this solar cell 100, the doped silicon layer 2 includes an N-type doped silicon layer 23 and a P-type doped silicon layer 24 disposed on the backlight side of the substrate 1, and the N-type doped silicon layer 23 and the P-type doped silicon layer 24 are separated by an isolation region. The electrode 4 includes a first electrode 41 and a second electrode 42. The first electrode 41 passes through the passivation layer 3 and contacts the N-type doped silicon layer 23, and the second electrode 42 passes through the passivation layer 3 and contacts the P-type doped silicon layer 24. The light-receiving surface of the solar cell 100 can also be provided with a light-receiving surface functional layer 7. The light-receiving surface functional layer can be a functional film layer such as an aluminum oxide layer or a silicon nitride layer.

[0073] The present application also provides a method for preparing a solar cell. It should be understood that this method is one method for obtaining the solar cell of the present application, but is not limited to the only method. That is, the solar cell of the present application can also be prepared by other methods, which are not limited by the present application. Therefore, the preparation method provided in the present application should not be construed as limiting the solar cell.

[0074] Taking the solar cell of the embodiment of the present application as a passivated contact solar cell as an example, the solar cell can be prepared by the following preparation method: The substrate is cleaned and subjected to microstructural morphology treatment; wherein the substrate may be a silicon substrate, and the microstructural morphology treatment may be an isotropic etching treatment or an anisotropic etching treatment, preferably an anisotropic etching treatment is performed on the substrate to form a suede structure on the surface of the substrate; A diffusion layer is formed on the light-receiving surface of the substrate, wherein the diffusion layer and the substrate have different conductivity types, thereby forming a PN junction; wherein the substrate is preferably an N-type silicon substrate and the diffusion layer is a boron diffusion layer; Cleaning and polishing the backlight surface of the substrate; A dielectric layer, a doped amorphous silicon layer, and a mask layer are sequentially prepared on the backlight side of the substrate; wherein the doped silicon layer has the same conductivity type as the substrate, and preferably, when the substrate is an N-type silicon substrate, the doped silicon layer is a phosphorus-doped amorphous silicon layer; Annealing and crystallization to convert the doped amorphous silicon layer into a doped polysilicon layer; Patterning: Laser is used to open the mask layer in some areas. These areas are used to form the second sub-layer. The remaining mask layer is used to protect the doped polysilicon layer and dielectric layer inside. These areas are used to form the first sub-layer. Wet etching and cleaning: etching and cleaning the partial area opened by the laser until a second sublayer having a second thickness is formed in the partial area, and removing the remaining mask layer to expose the first sublayer having a first thickness inside the mask layer; Prepare a passivation layer, prepare the light-receiving side passivation layer on the diffusion layer on the light-receiving side, and prepare the backlight side passivation layer on the patterned doped polysilicon layer on the backlight side; wherein the passivation layer can be a functional layer such as an aluminum oxide layer, a silicon nitride layer, a silicon oxynitride layer, or a silicon oxide layer. When the passivation layer includes both an aluminum oxide layer and a film layer such as silicon nitride, the aluminum oxide layer on the light-receiving side and the backlight side can be first prepared using an ALD process, and then one or more of the silicon nitride layer, the silicon oxynitride layer, and the silicon oxide layer can be further prepared on the aluminum oxide layer using a PECVD process; Electrode paste is printed on the passivation layer and sintered to obtain an electrode, and the electrode passes through the passivation layer to form an ohmic contact with the doped polysilicon layer.

[0075] In particular, the specified shape of the boundary line at the junction of the first sub-layer and the second sub-layer in the embodiment of the present application can be achieved through the above-mentioned steps of patterning and wet etching and cleaning. First, according to the specified shape of the boundary line in the embodiment of the present application, the pattern to be processed by the laser is set to the specified shape of the boundary line; then, in the patterning step, the laser film is opened according to the set pattern, so that the junction of the opened mask layer and the unopened mask layer forms the specified shape of the above-mentioned boundary line; finally, after wet etching and cleaning, the doped silicon layer forms a first sub-layer and a second sub-layer of different thicknesses, and the junction of the first sub-layer and the second sub-layer still maintains the specified shape of the above-mentioned boundary line.

[0076] The present application also provides a photovoltaic module, Figure 12 As shown, the photovoltaic module includes the aforementioned solar cells 100. Several solar cells 100 can be electrically connected via welding ribbons 200.

[0077] The embodiments of the present application are further described below in conjunction with more specific examples and tests.

[0078] Example 1 This embodiment provides a solar cell, comprising: An N-type silicon substrate comprising a light-receiving surface and a backlight surface disposed opposite to each other; On the light-receiving surface of the N-type silicon substrate, a 0.8 μm thick boron diffusion layer, a 4 nm thick aluminum oxide layer, and an 80 nm thick silicon nitride layer are sequentially provided. A 2 nm silicon oxide dielectric layer, a 100 nm phosphorus-doped polysilicon layer, a 4 nm back-lit aluminum oxide layer, and a 90 nm back-lit silicon nitride layer are sequentially disposed on the back-lit side of an N-type silicon substrate; wherein the silicon oxide dielectric layer and the phosphorus-doped polysilicon layer are patterned film layers; the back-lit aluminum oxide layer and the back-lit silicon nitride layer are integral film layers; the back-lit aluminum oxide layer is disposed on the patterned phosphorus-doped polysilicon layer and on the back-lit side not covered by the phosphorus-doped polysilicon layer; The silver electrode on the light-receiving surface is in ohmic contact with the boron diffusion layer through the silicon oxide layer and the aluminum oxide layer on the light-receiving surface; The backlight side silver electrode passes through the backlight side silicon nitride layer and the backlight side aluminum oxide layer to form ohmic contact with the phosphorus-doped polysilicon layer.

[0079] The patterned phosphorus-doped polysilicon layer comprises only a first sublayer, and the second sublayer has a second thickness of 0 μm. This means that in the solar cell of this embodiment, the phosphorus-doped polysilicon layer is disposed only in a localized region of the silicon substrate, while no phosphorus-doped polysilicon layer is disposed in other regions. Therefore, the orthographic projection of the boundary between the first and second sublayers on the substrate forms the dividing line, which is also the orthographic projection of the edge of the first sublayer on the substrate.

[0080] See also Figure 13 As shown, Figure 13 This is a Zeta 3D microscope image taken from a top-down perspective of the backlight side before making the light-receiving silver electrode and the backlight silver electrode. Figure 13 The first sub-layer 21, the substrate 1 and the boundary line 10 between the two can be seen in FIG, but the electrodes on the first sub-layer 21 are not shown. Figure 13 In the figure, the white dotted box shows a unit 11 of the dividing line 10. As can be seen from the figure, the dividing line 10 includes several connected units 11, each of which is a trapezoidal concave unit, and the concave direction of the concave unit is perpendicular to the length direction of the electrode (i.e. Figure 13 (The concave direction is horizontal.) After electrode fabrication, the maximum distance L1 between cells is 155 μm, and the minimum distance L2 is 105 μm. Along the length of the electrode, the span L3 between the two farthest points of the first cell on the left is 140 μm, and the span L4 between the two farthest points of the second cell on the right is 140 μm.

[0081] Example 2 This embodiment provides a solar cell. Compared with embodiment 1, this embodiment is different in the shape of the dividing line. Figure 14 As shown in the figure, after the light-receiving silver electrode and the backlight silver electrode were made, the Zeta 3D microscope image was taken from the top view of the backlight side. Figure 14 In FIG, the white dotted line box shows a unit 11 of the dividing line 10. Figure 9It can be seen that in this embodiment, the unit of the dividing line 10 is a special-shaped shape consisting of a connected curved segment 11A and an oblique line segment 11B. Among them, the angle α between the oblique line segment 11B and the length direction of the electrode 4 is 5°, the maximum distance L1 between the unit 11 and the electrode 4 is 135 μm, the minimum distance L2 between the unit 11 and the electrode 4 is 131 μm, along the length direction of the electrode 4, the span L3 between the two farthest points of the first unit on the left is 140 μm, and along the length direction of the electrode 4, the span L4 between the two farthest points of the second unit on the right is 140 μm. In addition, the dividing lines 10 on both sides of the electrode 4 are asymmetrically arranged, specifically, the lowest points of the dividing lines on both sides are not on the same straight line (the straight line refers to Figure 14 in the direction perpendicular to the length direction of the electrode).

[0082] Comparative Example This comparative example provides a solar cell. Compared with Example 1, this comparative example is different in the shape of the boundary line.

[0083] In this comparative example, the boundary line is a straight line parallel to the longitudinal direction of the electrode.

[0084] Structural Parameter Testing: L1, L2, L3, L4, and angle α for each embodiment and comparative example can be measured and calculated by photographing a top-down Zeta 3D microscope image of a solar cell of a specified area. Specifically, using the top view of the solar cell's boundary side as the photographic angle, select five 5.6 μm × 4.2 μm areas at different locations and measure and calculate the aforementioned parameters for the corresponding cells.

[0085] Performance test description: The solar cells from the above examples and comparative examples were tested for performance in terms of photoelectric conversion efficiency (Eta), open-circuit voltage (Voc), short-circuit current (Isc), and fill factor (FF) using a Halm test and sorting machine. The Halm machine simulates sunlight and is equipped with an electronic load, data acquisition, and computing equipment to test the electrical performance of photovoltaic devices (including solar cells). The control solar cells used in the tests were 210-inch silicon wafers, and the calibrated light intensity was 1000 ± 5 W / m². The test results are shown in Table 1.

[0086] Table 1: Performance test results of solar cells of Examples and Comparative Examples

[0087] As can be seen from Table 1, the solar cells of the present embodiment have improved to a certain extent in terms of open circuit voltage, short circuit current, and fill factor compared to the comparative example, with the improvement effect of Example 2 being particularly significant. It can be seen that in the solar cells of the present embodiment, the provision of a specially shaped dividing line on the backlight side based on the patterned doped silicon layer can reduce parasitic absorption while alleviating the micro-crack problem in the solar cell structure and reducing undesirable splashing of the electrode slurry, thereby achieving the goal of steadily improving the photoelectric conversion efficiency and other performance of the solar cell.

[0088] The above is a detailed introduction to the technical solutions disclosed in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core invention points of the embodiments of the present application. At the same time, for those skilled in the art, based on the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A solar cell, characterized in that: The solar cell comprises: substrate; a patterned doped silicon layer disposed on a surface of the substrate; wherein the doped silicon layer comprises a first sublayer having a first thickness and a second sublayer having a second thickness, the first thickness being greater than the second thickness, and the second thickness being greater than or equal to 0 μm; and the first direction being a plane direction of the substrate; A passivation layer is provided on the surface of the substrate, and the doped silicon layer is located between the substrate and the passivation layer; an electrode, wherein the electrode passes through the passivation layer and contacts the first sub-layer; In which, the orthographic projection of the boundary between the first sublayer and the second sublayer on the substrate is a dividing line, and the dividing line includes a plurality of connected units, and the units include convex units and / or concave units; when the dividing line includes the convex unit, the protruding direction of the convex unit is along the second direction, and the convex shape of the convex unit is a non-pointed shape; when the dividing line includes the concave unit, the concave direction of the concave unit is along the second direction, and the concave shape of the concave unit is a non-pointed shape; the second direction is a direction intersecting with the length direction of the electrode.

2. The solar cell according to claim 1, characterized in that The shape of the unit includes at least one of an arc, a trapezoid, a rectangle or a special shape, wherein the special shape includes connected curve segments and oblique line segments.

3. The solar cell according to claim 2, characterized in that The shape of the unit includes the special-shaped shape, in which the angle between the oblique line segment and the length direction of the electrode is α, and 0°≤α≤45°.

4. The solar cell according to claim 1, wherein For any unit of the boundary line, the maximum distance between the unit and the electrode is L1, the minimum distance between the unit and the electrode is L2, and 1 μm≤L1-L2≤250 μm.

5. The solar cell according to claim 4, characterized in that 10 μm≤L1≤500 μm.

6. The solar cell according to claim 1, wherein Corresponding to any of the electrodes, the dividing lines include a first dividing line and a second dividing line located on both sides of the electrode, and the first dividing line and the second dividing line are symmetrically or asymmetrically arranged; and / or, The dividing line includes a plurality of the units distributed in a periodic and regular manner or includes a plurality of the units distributed irregularly.

7. The solar cell according to claim 6, characterized in that Corresponding to any of the electrodes, the dividing lines include a first dividing line and a second dividing line located on both sides of the electrode, and the first dividing line and the second dividing line are asymmetrically arranged; the units include a first unit located on the first dividing line and a second unit located on the second dividing line; Along the length direction of the electrode, the span between the two farthest points of the first unit is L3, 50 μm≤L3≤700 μm; along the length direction of the electrode, the span between the two farthest points of the second unit is L4, 20 μm≤L4≤700 μm.

8. The solar cell according to claim 7, characterized in that L3 ≥ L4; and / or, 100 μm ≤ L4 ≤ 500 μm.

9. The solar cell according to any one of claims 1 to 8, characterized in that The second thickness is 0 μm; and / or, The unit is a convex unit or a concave unit; and / or, The second direction is perpendicular to the length direction of the electrode.

10. The solar cell according to any one of claims 1 to 8, characterized in that The surface of the substrate has a first surface textured structure corresponding to the area of ​​the first sub-layer, and the first surface textured structure includes at least one of a pyramid structure, a pyramid base structure, and a prism structure; The surface of the substrate has a second surface textured structure corresponding to the area of ​​the second sub-layer. The second surface textured structure includes at least one of a pyramid structure, a pyramid base structure, and a prism structure.

11. The solar cell according to any one of claims 1 to 8, characterized in that: The doped silicon layer is arranged on the backlight surface of the substrate, and the doped silicon layer is a doped polysilicon layer; the solar cell further comprises: a dielectric layer arranged between the substrate and the doped silicon layer; Alternatively, the doped silicon layer includes an N-type doped silicon layer and a P-type doped silicon layer arranged on the backlight surface of the substrate, and the N-type doped silicon layer and the P-type doped silicon layer are separated by an isolation region; the electrode includes a first electrode and a second electrode, the first electrode passes through the passivation layer and contacts the N-type doped silicon layer, and the second electrode passes through the passivation layer and contacts the P-type doped silicon layer.

12. A photovoltaic module, characterized in that: The photovoltaic module comprises the solar cell according to any one of claims 1 to 11.

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