Networking intelligent key dynamic key management system supporting multi-device binding
By dynamically reconstructing the key tree in the IoT access control system and using elliptic curve encryption and random transformation functions to process residual key fragments, the problem of weakened key hierarchy isolation is solved, and a zero-trust security architecture is implemented in multi-device binding scenarios.
Patent Information
- Application Number
- CN202511078484.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-01
- Publication Date
- 2025-09-12
AI Technical Summary
After the existing IoT access control system binds and unbinds multiple devices, the cryptographic isolation at the key level is weakened, forming an attack path that can be exploited maliciously and cannot meet security audit requirements.
It uses an instruction parsing module, a residue positioning module, a fragment obfuscation module, a pollution assessment module, and a path decision module to locate residual nodes through depth-first search, split or reorganize key fragments, generate obfuscated fragments using elliptic curve encryption and random transformation functions, and dynamically update the key tree to ensure key level isolation.
Effectively cut off the cryptographic association between residual keys and new key tree nodes, and through dynamic reconstruction of the key tree, realize the zero-trust security architecture in multi-device binding scenarios, improve the isolation of the key tree, and prevent cryptographic attacks.
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Figure CN120639295A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of Internet of Things security technology, and more specifically, to a networked smart key dynamic key management system that supports multi-device binding. Background Art
[0002] In the field of IoT access control systems, dynamic key management systems that support multi-device binding are the mainstream solution in the industry. Such systems usually use a hierarchical key tree structure to implement device access permission management, in which sub-keys derived from the master key node are distributed to each bound device. To meet security audit requirements, existing technologies generally retain historical key change records and execute key revocation and sub-node reorganization processes when the device is unbinding. This requires the key system to have the ability to revoke permissions and operation traceability.
[0003] The defect of the existing technology is that there is an irreconcilable contradiction between the cryptographic association of key tree nodes and security attenuation. When the system performs a device unbinding operation, since the key history information must be retained to meet compliance requirements, the key fragments corresponding to the unbound device still remain in the key hierarchy structure. These residual fragments are cross-associated with the newly generated key tree nodes, resulting in the system substantially weakening the cryptographic isolation of the hierarchical key after multiple device unbinding and binding operations, forming a cryptographic attack path that can be maliciously exploited. Summary of the Invention
[0004] In order to overcome the above-mentioned defects of the prior art, the present invention provides a networked smart key dynamic key management system that supports multi-device binding to solve the problems raised in the above-mentioned background technology.
[0005] To achieve the above object, the present invention provides the following technical solutions: A networked smart key dynamic key management system supporting multi-device binding, comprising: The instruction parsing module is used to receive the node release instruction and extract the device identification of the target device; A residual location module, configured to perform a depth-first search on the hierarchical key tree based on the device identification, locate all associated key child nodes and mark them as residual nodes; A fragment obfuscation module is used to split the key fragments of the residual node into fragments with non-geometric lengths, and apply a one-way transformation function based on elliptic curve cryptography to each fragment to generate obfuscated fragments; The pollution assessment module is used to calculate the mutual information value between the obfuscated fragments and the parent node key, and determine the hierarchical pollution coefficient based on the exponential decay curve of the parent node key entropy; a path decision module, configured to split the parent node key generation path when the mutual information value is greater than a first threshold and the hierarchical contamination coefficient is greater than a second threshold, or to reorganize the parent node key generation path when the mutual information value is greater than the first threshold and the hierarchical contamination coefficient is less than or equal to the second threshold; The key update module is used to build a new key tree based on the split or reorganized key generation path and distribute the updated subkeys to all bound devices.
[0006] Furthermore, receiving the node release instruction and extracting the device identification of the target device includes: Parse the data message encapsulated by the IoT communication protocol and identify the operation instruction field in the message header; When the value of the operation instruction field is equal to the pre-stored release identification code, it is determined to be a node release instruction; Extracting the target device identification segment byte stream in the data message payload; Performing a cyclic redundancy check calculation on the target device identification segment byte stream; When the cyclic redundancy check calculation result matches the preset check value, the device identification of the target device is output as a valid device identification.
[0007] Furthermore, a depth-first search is performed on the hierarchical key tree based on the device identification to locate all associated key child nodes and mark them as residual nodes, including: The hierarchical key tree node corresponding to the device identifier is used as the search starting point; Constructing an adjacency table between nodes of the hierarchical key tree; Initialize the stack data structure and push the search starting point onto the stack; The stack pop operation is executed cyclically until the stack is empty, and the address of the current hierarchical key tree node is obtained in each pop operation; Retrieve all child node addresses of the current hierarchical key tree node address in the adjacency table and push them into the stack; Add the current hierarchical key tree node address to the residual node list.
[0008] Furthermore, the key fragments of the residual nodes are divided into fragments of non-geometric lengths, and a one-way transformation function based on elliptic curve encryption is applied to each fragment to generate obfuscated fragments, including: Obtain the byte length of the key fragment of the residual node and generate a random sequence with non-uniform division; Insert the segmentation identifier at the corresponding position of the key fragment byte sequence according to the element value in the random sequence; Extract the byte segments between the segmentation identifiers as segmentation fragments; For each segment, select the base point coordinates on the elliptic curve; Encrypt the segmented byte streams through elliptic curve point multiplication operations; The horizontal coordinate value of the curve point after encryption conversion is extracted as the output of the one-way transformation function to generate obfuscated fragments.
[0009] Furthermore, a method for generating a random sequence with non-geometric segmentation is as follows: using the current timestamp as a random seed to initialize a pseudo-random number generator, outputting a non-geometric segmentation sequence with a specified number of elements, and the element differences in the segmentation sequence obey the Fibonacci sequence growth.
[0010] Furthermore, the operation of selecting the elliptic curve base point is: obtaining the temperature sensor reading at the moment when the fragment obfuscation operation is triggered, and dynamically selecting the preset base point coordinates on the elliptic curve secp256k1 or secp384r1 according to the parity of the last bit of the corresponding reading.
[0011] Furthermore, the mutual information value between the obfuscated fragment and the parent node key is calculated, and the hierarchical contamination coefficient is determined based on the exponential decay curve of the parent node key entropy, including: Get the discrete probability distribution of the obfuscated fragment byte value and the parent node key byte value; Calculate the joint probability distribution of the obfuscated fragment and the parent node key based on the discrete probability distribution; Solve the mutual information value through discrete probability distribution and joint probability distribution; Extract the initial entropy value and time decay parameter of the parent node key; Substitute the time decay parameter into the exponential decay function to calculate the parent node key entropy at the current moment; The ratio of the parent node key entropy at the current moment to the initial entropy value is used as the hierarchical pollution coefficient.
[0012] Further, when the mutual information value is greater than a first threshold and the hierarchical contamination coefficient is greater than a second threshold, the parent node key generation path is split, or when the mutual information value is greater than the first threshold and the hierarchical contamination coefficient is less than or equal to the second threshold, the parent node key generation path is reorganized, including: Locate the key splitting starting position in the parent node key generation path; Generate a 16-bit random interrupt identifier and insert it into the key split start position; Separate the key byte segments before and after the interrupt identifier into independent key generation path sub-segments; Rearrange the spatial storage order of key generation path sub-segments; or when the mutual information value is greater than a first threshold and the hierarchical contamination coefficient is less than or equal to a second threshold, extracting adjacent key generation path sub-segments; Merging adjacent key generation path sub-segments to form a continuous byte sequence; Serialize and remap the continuous byte sequence to generate a new parent node key generation path.
[0013] Furthermore, the spatial storage order adjustment is performed using a random permutation algorithm, and the algorithm initialization vector comes from the last three hexadecimal digits of the current network data packet transmission delay value to generate a random mapping table for each round of permutation operation.
[0014] Furthermore, a new key tree is constructed based on the split or reorganized key generation path, and the updated subkeys are distributed to all bound devices, including: Parsing the path signature bytes in the split or reassembled key generation path; Establish the parent node association matrix of the new key tree node according to the path characteristic bytes; Constructing a hierarchical key tree topology based on the parent node association matrix; Generate an updated subkey byte stream corresponding to a leaf node in a hierarchical key tree topology; Push the updated subkey byte stream to the bound device with online status in real time; Sending an incremental key fragment sequence to a bound device whose network status is offline during the next authentication operation; Receive the updated subkey byte stream fragment sequence verification result returned by the bound device.
[0015] Compared with the prior art, the present invention has the following beneficial effects: The fragment obfuscation module performs non-geometric sequence segmentation and elliptic curve one-way transformation on the residual key fragments, severing the cryptographic association between the residual key and the new key tree nodes. The taint assessment module quantifies cross-correlation risk based on mutual information and dynamically assesses the hierarchical contamination coefficient using an exponential decay model of key entropy to accurately identify high-risk residual structures. The path decision module adaptively selects a key path segmentation or reorganization strategy based on the contamination coefficient threshold, eliminating the potential security degradation between key hierarchies while maintaining audit traceability. This blocks attack paths at the root of cryptographic associations, enhancing the isolation of the key tree in multi-device binding scenarios to a provable level of security.
[0016] A hierarchical key tree topology dynamic reconstruction mechanism is employed, and the key update module enables real-time synchronization and incremental distribution of subkeys across bound devices. Online devices instantly obtain updated keys through encrypted channels, while offline devices receive minimized incremental fragments during authentication, ensuring key update coverage and timeliness. The random interrupt identifier insertion technology in the path decision module, combined with the nonlinear transformations of the fragment obfuscation module, creates a dual key residue removal barrier, resolving the cryptographic isolation failure issue caused by historical key residue in traditional systems. This ultimately achieves a zero-trust security architecture for dynamic key management in multi-device binding scenarios. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1This is a structural diagram of a networked smart key dynamic key management system that supports multi-device binding according to the present invention. DETAILED DESCRIPTION
[0018] The following will provide a clear and complete description of the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.
[0019] Example: Figure 1 The present invention provides a structural diagram of a networked smart key dynamic key management system that supports multi-device binding. The networked smart key dynamic key management system that supports multi-device binding includes the following modules: The instruction parsing module is used to receive the node release instruction and extract the device identification of the target device; A residual location module, configured to perform a depth-first search on the hierarchical key tree based on the device identification, locate all associated key child nodes and mark them as residual nodes; A fragment obfuscation module is used to split the key fragments of the residual node into fragments with non-geometric lengths, and apply a one-way transformation function based on elliptic curve cryptography to each fragment to generate obfuscated fragments; The pollution assessment module is used to calculate the mutual information value between the obfuscated fragments and the parent node key, and determine the hierarchical pollution coefficient based on the exponential decay curve of the parent node key entropy; a path decision module, configured to split the parent node key generation path when the mutual information value is greater than a first threshold and the hierarchical contamination coefficient is greater than a second threshold, or to reorganize the parent node key generation path when the mutual information value is greater than the first threshold and the hierarchical contamination coefficient is less than or equal to the second threshold; The key update module is used to build a new key tree based on the split or reorganized key generation path and distribute the updated subkeys to all bound devices.
[0020] The receiving node release command and the device identification of the target device are extracted. The specific implementation is as follows: Parsing data packets encapsulated by an IoT communication protocol requires determining the specific communication protocol type and message structure. This embodiment uses the LoRaWAN protocol as the IoT communication protocol. Its data packets consist of a preamble, MAC header, device address, frame control field, payload, and checksum. When identifying the operation instruction field in the message header, the specific process is as follows: locating the 32 bits after the MAC header as the operation instruction field, which occupies bytes 17 to 24. The operation instruction field value is obtained by extracting these 8 bits of binary data and converting them into a decimal value.
[0021] The process of determining whether the Operation Command field value is equal to the pre-stored Release Identification Code requires identifying the source of the Release Identification Code. The Release Identification Code is set by the system administrator through the configuration interface and stored in the FLASH memory in addresses 1024 to 1031. The determination process compares the currently parsed Operation Command field value with the corresponding address value in the memory bit by bit. A match is considered successful when the 8-bit values are completely identical. Subsequent processing is triggered only if a match is successful.
[0022] Extracting the target device identification byte stream from the data message payload requires specifying its location and length. In the LoRaWAN protocol, the target device identification byte stream is located from bytes 0 to 15 in the payload area and is fixed at 128 bits. The extraction process uses a memory copy method, completely copying the contents of the data area from bits 128 to 255 to the processing buffer.
[0023] The CRC-32 algorithm is used to perform a cyclic redundancy check on the target device identification segment byte stream. The specific parameters are: the IEEE 802.3 standard polynomial 0x04C11DB7 is used as the generator polynomial, with an initial value of 0xFFFFFFFF. The calculation process is as follows: the 128-bit device identification segment byte stream is divided into 16 8-byte blocks, and a shift-XOR operation is performed on each block in turn. During each operation, the data register is shifted left by one bit. If the shifted-out bit is 1, it is XORed with the generator polynomial. After all data is processed, the two's complement of the register value is taken as the calculation result.
[0024] The default checksum is set to 0x8A6F8C35. This value is derived from a hash operation on the device serial number during initialization. This value is determined by taking the first 4 bytes of the SHA-256 digest of the device's factory serial number as the default checksum. This value is automatically calculated and stored in a non-erasable storage area when the device is first activated.
[0025] When the cyclic redundancy check result matches the preset checksum, the target device's device identifier is output as a valid device identifier. The process involves comparing the calculated 32-bit CRC value with the 4-byte checksum stored at address 0x0A00. If a match is found, the 16-byte device identifier byte stream is marked as valid. This byte stream conforms to the IEEE EUI-64 identifier format and is directly output as a valid device identifier to subsequent processing units. The device identifier content and checksum results are recorded in the system log before output.
[0026] It's important to note the specific data structure within the target device identification byte stream: bytes 0 to 3 represent the device type code, bytes 4 to 11 are the device unique number, and bytes 12 to 15 are the region code. This structure ensures global uniqueness of the device identifier. The cyclic redundancy check calculation covers the entire 128-bit data.
[0027] The memory management mechanism during the parsing process must be clearly explained: a 256-byte temporary buffer is allocated during message parsing, and the operation instruction field is stored in bytes 17 to 24 of this buffer. A length marker must be established when the device identification segment is copied to the processing buffer to prevent out-of-bounds access. All memory operations must comply with MISRA-C secure coding standards.
[0028] The specific implementation of matching the instruction field value with the de-identification code utilizes hardware acceleration: the processor's SIMD instruction set performs an eight-bit parallel comparison, completing the match determination within four clock cycles. The processing cycle constraint of less than 0.8 microseconds meets the real-time response requirement. This technical specification was verified by sampling the interrupt response signal with a logic analyzer.
[0029] Perform a depth-first search on the hierarchical key tree based on the device identity to locate all associated key child nodes and mark them as residual nodes. The specific implementation is as follows: Using the hierarchical key tree node corresponding to the device identifier as the search starting point requires a clear mapping mechanism between the device identifier and the tree node. The hierarchical key tree nodes are stored in a specific area of non-volatile memory. Each node contains a 128-bit data block, of which bits 32 to 47 are the device identifier matching area. The process of determining the search starting point is to compare the hash value of the input device identifier (using the SHA-256 algorithm) with the matching area data of all nodes in the storage area segment by segment. When calculating the hash value, the device identifier is UTF-8 encoded and input into the hash function. When it is found that bits 32 to 47 of a node completely match bits 0 to 15 of the device identifier hash value, the node is determined as the search starting point. The physical address of the search starting point is recorded in the pointer register for subsequent operation calls.
[0030] Constructing an adjacency table between nodes in a hierarchical key tree requires defining the connection relationships between the nodes. Parent-child relationships in a hierarchical key tree are implemented using a doubly linked list. Each tree node structure contains an array of child node pointers and a parent node pointer. The adjacency table is constructed by traversing all hierarchical key tree nodes and creating an adjacency table entry for each node. The entry contains the current node address, an array of all child node addresses, and hierarchical depth information. The adjacency table is stored using dynamic memory allocation, with each entry occupying 64 bytes. A 32-bit pointer represents the current node address, and a 32-bit pointer array stores child node addresses. The upper limit on the number of child nodes is set to 8 based on the system configuration. When the number of child nodes exceeds 8, an extended entry is automatically created.
[0031] Initializing the stack data structure and pushing the search starting point onto the stack requires clear stack implementation specifications. The stack data structure is implemented using the LIFO principle, with memory allocated in the fixed address range 0x20000000-0x2000FFFF in RAM. The stack is initialized with the top pointer set to the starting address. The push operation consists of two phases: first, the 32-bit physical address of the search starting point is copied to the location pointed to by the stack top pointer, and then the top pointer is incremented by 4 bytes. The stack state after the push is written to the log buffer for error recovery. The log entry contains a timestamp and address value.
[0032] The stack pop operation is performed repeatedly until the stack is empty, and each pop operation obtains the address of the current hierarchical key tree node. The specific process of the pop operation is as follows: first, check whether the top pointer is lower than the stack base address. If it is, the pop operation is performed. During the pop operation, 32 bits of data are read from the stack location twice to form the complete address. The address must be confirmed by the address verification mechanism to be within the valid node address range (0x40000000-0x400FFFFF); otherwise, the system exception handling is triggered. The successfully obtained current hierarchical key tree node address is stored in a temporary register for subsequent use, and the status register flag is updated at the same time.
[0033] Retrieving all child node addresses of the current hierarchical key tree node address in the adjacency table and pushing them onto the stack requires access to the adjacency table. The adjacency table index is calculated based on the current node address: the address value is right-shifted 12 bits and then modulo the table length. After locating the adjacency table entry using the index, the array of child node addresses in that entry is read. Child node addresses are pushed onto the stack in batches: the entire address array is copied to the stack area via the DMA controller. Before copying, a check is made to ensure sufficient stack space to accommodate all child node addresses. After each child node address is pushed onto the stack, the stack height counter is updated. When the counter reaches the warning value (80% of the stack capacity), the overflow protection mechanism is activated.
[0034] Adding the current hierarchical key tree node address to the residual node list requires maintaining a specific data structure. The residual node list is stored in a linked structure starting at 0x30000000, with each node occupying 16 bytes. The addition operation involves first allocating space for a new list item and writing the current hierarchical key tree node address into the item's first field (bytes 0-3); then setting the timestamp field (bytes 4-7) to record the time of addition; and finally, linking the item to the end of the list. List management includes an automatic expansion mechanism that allocates a new memory block when the list usage exceeds 80%. After the addition is complete, the list status register is updated, including the current list length and the address of the latest entry.
[0035] The specific memory layout of the adjacency table requires detailed description: In each 64-byte entry, bytes 0-3 store the parent node tag, bytes 4-7 indicate the current node depth, bytes 8-11 store the current node address, and the subsequent 32 bytes store child node addresses in groups of 4 bytes. The entry index is calculated using a hash algorithm: the node address value is input into the FNV-1a hash function to obtain a 32-bit hash value, and the last 12 bits of the hash value are used as the index offset. Hash collision handling uses a quadratic probing method, triggering a table rebuild mechanism when the number of probing exceeds 16.
[0036] The overflow protection strategy for the residual node list is as follows: When the stack height counter exceeds 0x2000E000 (the warning level), the system automatically initiates a memory cleanup routine. This routine traverses the unprocessed hierarchical key tree node addresses in the stack, retaining those with a priority higher than the current threshold and temporarily writing the remaining addresses to the swap area. Normal operation resumes when the stack space is freed to 70% utilization. Priority is determined based on the node depth value; a higher depth value indicates a higher priority.
[0037] The error handling mechanism during the search process must include the following: When an invalid node address is popped, the system first restores the stack data state from the backup area, then writes the error address flag to the exception queue, and finally resumes the search from the last successful point. The backup area automatically restores the current stack state after every eight pop operations. The exception handling time constraint of no more than 1 millisecond is implemented through a hardware coprocessor.
[0038] Verification was implemented using a hierarchical key tree stress test: a 1024-level tree structure was constructed, with the target node located at the 256th branch of the 20th level. Actual testing demonstrated 100% accuracy in searching the path from the starting point to the target node, with a maximum stack depth of 17 levels monitored. In embedded platform testing, a complete traversal of 1024 nodes took less than 15 milliseconds, meeting real-time system requirements. Residual node list write rate testing demonstrated a maximum record speed of 8,000 entries per second, demonstrating memory management efficiency that meets industrial standards.
[0039] The atomicity of stack operations is guaranteed by hardware support: in the ARM Cortex-M7 architecture, atomic locks are implemented for pop operations using the LDREX / STREX instructions. Push operations are executed with interrupts disabled, ensuring data consistency in a multitasking environment. Stack access conflict monitoring circuitry detects pointer out-of-bounds violations in real time with 100 nanosecond accuracy.
[0040] The key fragments of the residual nodes are divided into fragments of non-geometric lengths, and a one-way transformation function based on elliptic curve encryption is applied to each fragment to generate obfuscated fragments. The specific implementation is as follows: Obtain the byte length of the key fragments of the remaining nodes for precise measurement. The key fragments of the remaining nodes are stored in a specific sector of non-volatile memory (address range 0x40000000-0x4000FFFF). The byte length is obtained by reading the length flag field of the sector control register. This field is a 32-bit unsigned integer and is automatically calculated and filled by the system when the key fragments are stored. Direct memory access is used to obtain this value during measurement, and the range is constrained to 64 to 1024 bytes. The measurement result is temporarily stored in the processor's data register for subsequent use, and the length flag bit of the system status register is simultaneously updated.
[0041] A deterministic algorithm is used to generate a random sequence with non-uniform partitioning. The current timestamp is derived from the second count of the real-time clock module (e.g., Unix timestamp). The pseudo-random number generator uses the MT19937 algorithm, initialized using the last 8 bits of the timestamp as the seed value. The number of output elements is proportional to the length of the key fragment: 3 elements for lengths between 64 and 256 bytes, 5 elements for lengths between 257 and 512 bytes, and 7 elements for lengths between 513 and 1024 bytes. The difference between each partitioned sequence element follows the Fibonacci sequence growth rule: the first element is fixed at 5, and the values of subsequent elements are equal to the sum of the previous two elements. For example, when the number of output elements is 3, the sequence [5, 8, 13] is generated, with the element differences being 3, 5, respectively.
[0042] Inserting the split identifier at the corresponding position in the key fragment byte sequence according to the element value in the random sequence requires precise positioning. The position is calculated by summing the random sequence elements to obtain an array of position offsets. Assuming the sequence is [5,8,13], the positions are 5 (5), 13 (5+8), and 26 (5+8+13), respectively. In the key fragment byte sequence, a single-byte split identifier 0xFE is inserted from the starting position offset. The insertion operation must follow the following specifications: the split identifier does not overwrite the existing data but adds a byte at the specified position. After the insertion, the total length of the key fragment byte sequence increases by the number of insertions * 1 byte. All insertion point positions are recorded in the operation log.
[0043] Byte segments between segment identifiers are extracted as segment fragments using a continuous truncation method. A position index table is established based on the position information of the inserted segment identifiers. The first segment fragment is taken from the starting position to the first segment identifier position minus 1. The middle segment fragment is taken from the Nth segment identifier position + 1 to the N+1th segment identifier position minus 1. The last segment fragment is taken from the last segment identifier position + 1 to the end of the sequence. The byte length of each segment fragment is calculated using interval calculation and stored in the segment length register. The extracted segment fragments are stored in a temporary buffer (contiguous space starting at address 0x50000000).
[0044] For each segment, the decision mechanism for selecting the base point coordinates on the elliptic curve is clear and specific. The temperature sensor uses a DS18B20 digital sensor, physically connected to GPIO port 3. When the fragment obfuscation operation is triggered, the current temperature value is read via the 1-Wire protocol with an accuracy of 0.1°C (e.g., 26.3°C). The least significant bit (decimal digit) of the binary temperature value is used for parity determination: 0 for even, 1 for odd. If the value is even, the standard base point coordinates for the secp256k1 curve (0279BE667EF9DCBBAC55A06295CE870B07029BFCDB2DCE28D959F2815B16F81798) are selected. If the value is odd, the base point coordinates for the secp384r1 curve (AA87CA22BE8B05378EB1C71EF320AD746E1D3B628BA79B9859F741E082542A385502F25DBF55296C3A545E3872760AB7) are selected. The base point coordinates are loaded into the cryptographic coprocessor registers.
[0045] The cryptographic conversion of a segmented byte stream using elliptic curve point multiplication requires a multi-step process. The segmented byte stream is first padded to the base field length defined by the elliptic curve according to the ISO / IEC 9797-1 standard (32-byte blocks for secp256k1 and 48-byte blocks for secp384r1). After padding, the stream is split into integer blocks, each of which is converted to a large integer K. A point multiplication is performed on the value K × G (where G is the base point) to obtain the coordinates of the curve point. This calculation is implemented using a double-add algorithm: the binary representation of K is bit-scanned, and doubling operations are performed on the intermediate results starting with the most significant bit set. Additional point additions are performed when the scanned bit is set. The entire process is executed in the cryptographic coprocessor.
[0046] The abscissa values of the encrypted curve points are extracted and processed as the output of the one-way transformation function, following strict specifications. The dot product operation outputs the curve points in affine coordinate form. The abscissa values are obtained by truncating the least significant byte: for the secp256k1 curve, the last 64 bits of the 256-bit abscissa are used, while for the secp384r1 curve, the last 128 bits of the 384-bit abscissa are used. The extracted bit segments are stored in big-endian format as a byte array. This byte array is output as the final obfuscated fragment to a dedicated storage area (address 0x60000000), along with the fragment's generation time and source information.
[0047] The implementation mechanism for controlling the difference in Fibonacci sequence growth requires detailed explanation: When outputting a random sequence, the maximum element value must be limited to no more than the key fragment's byte length minus 10 to prevent overruns. When the calculated value exceeds this limit, truncation is triggered, forcing the final element in the sequence to be equal to the current cumulative position value plus 5. After sequence generation, redundancy verification is performed: the difference ratio between adjacent elements must be between 1.2:1 and 5:1; otherwise, the sequence must be regenerated.
[0048] The temperature sensor reading conversion process includes precision processing: the reading of 26.3°C is stored as a 16-bit fixed-point number (8 bits for the integer portion and 8 bits for the fractional portion). Parity is determined by taking the least significant bit (0) of the binary encoding of the fractional portion 0.3 (00100110, 0 in decimal) as the 0th (0.3 ≈ 0.00100110), thus interpreting it as an even number. The abnormal reading handling mechanism includes a fixed selection of the secp256k1 basis point when the temperature exceeds the -55°C to +125°C range.
[0049] Fragment generation verification: 64-byte key fragmentation was performed on an embedded testbed. When generating the segmentation sequence [5,8,13], 0xFE was inserted at positions 5, 13, and 26. The extracted fragment lengths were 5, 8, and 11 bytes, respectively (verification accuracy was 100%). A temperature of 26.3°C resulted in the selection of the secp256k1 curve, with the 64-bit output captured on the horizontal axis. The measured obfuscated fragment generation rate reached 1200 fragments per second (at a 168MHz clock speed), with a stable memory usage of 1.2MB. During collision resistance testing, a single-bit change in the input resulted in an average change of 87.5 bits in the output obfuscated fragments (meeting design requirements).
[0050] Calculate the mutual information value between the obfuscated fragment and the parent node key, and determine the hierarchical contamination coefficient based on the exponential decay curve of the parent node key entropy. The specific implementation is as follows: Statistical analysis is used to obtain the discrete probability distribution of the obfuscated fragment byte values and the parent node key byte values. The obfuscated fragment bytes are stored starting at memory address 0x70000000, and the parent node key byte values are stored at 0x80000000. The discrete probability distribution calculation process involves traversing two 256-byte data segments (filling any missing bytes with zeros) and establishing a statistical array containing 256 buckets. The number of occurrences of each byte value in bits 0 through 255 in binary format is counted by adding 1 to the bucket count corresponding to the byte value. After the statistics are calculated, each bucket count is divided by the total number of bytes, 256, to determine the probability of occurrence of each byte value. The probability distribution data is stored in a dedicated floating-point register bank (addresses 0x90000000-0x900007FF), where register i stores the probability of occurrence of byte value i.
[0051] A two-dimensional probability model needs to be established to calculate the joint probability distribution of the obfuscated fragment and the parent node key based on the discrete probability distribution. The joint probability distribution represents the probability that a specific obfuscated fragment byte value and the parent node key byte value will appear at the same time. The calculation process definition is: for each byte value combination (i, j) between 0 and 255, the number of concurrent occurrences of the obfuscated fragment byte being i and the parent node key byte being j is counted. Concurrency detection uses a dual-pointer synchronous scanning mechanism. When the pointer position is X, the byte value a at the obfuscated fragment position X and the byte value b at the parent node key position X are read, and then 1 is added to the element at position (a, b) in the two-dimensional array
[256]
[256] . After completing 256 scans, the count value of each element is divided by 256 to obtain the joint probability value. The joint probability distribution data is stored in the matrix buffer (address 0xA0000000-0xA000FFFF).
[0052] The mutual information value is calculated using information theory formulas using discrete and joint probability distributions. The calculation involves taking P(x) and P(y) from the discrete probability distribution and P(x, y) from the joint probability distribution; for each combination (x, y), dividing the natural logarithm of P(x, y) by the natural logarithm of P(x) × P(y) and multiplying by P(x, y); and finally, summing the results of all combinations. This calculation is implemented using the coprocessor's vector arithmetic unit, performing parallel calculations on 256 sets of values and then summing them. The result is stored in a floating-point variable with a precision of 0.001.
[0053] Extracting the initial entropy value and time decay parameter of the parent node key requires access to the system configuration information. The initial entropy value comes from the entropy assessment report at the time of key generation, which is stored in bytes 24 to 31 of the key attribute record table (8-byte double-precision floating point number). The time decay parameter is defined as λ = ln(2) / T, where the half-life parameter T is determined by querying the historical operation log: the number of key destruction operations N on the target device in the past 720 hours is counted, and the double-precision floating point number T = 24 × square root N (hours). The historical log index area is located at storage address 0xB0000000, and each destruction operation adds a new 128-byte record. The initial entropy value and half-life parameter T are loaded from the non-volatile memory into the register for temporary storage.
[0054] Substitute the time decay parameter into the exponential decay function to calculate the execution process specification of the parent node key entropy at the current moment. The exponential decay function model is H(t)=H0× e (-λt), where H0 is the initial entropy value, λ is the time decay parameter, and t is the key lifetime (in hours). The current time is taken from the real-time clock counter. The key creation time is recorded in bytes 0 to 7 of the key attribute table (Unix timestamp format). The lifetime t is calculated as: the current timestamp minus the key creation timestamp, divided by 3600. The final current entropy value H(t) is calculated using the floating-point unit, with the result rounded to 3 decimal places.
[0055] The mechanism for handling the hierarchical contamination coefficient, using the ratio of the current parent node's key entropy to the initial entropy, is clear. The hierarchical contamination coefficient, K, is defined as K = H(t) / H0, where H(t) is the current entropy value and H0 is the initial entropy value. The calculation is performed using a floating-point divider, and the result is stored at address 0xC0000000. Key constraints: When K < 0.05, it is forced to 0 (to prevent undervalued values); when H0 = 0, K is set to 1 (to avoid division by zero errors). The proportional calculation result is truncated and stored in single-precision floating-point format.
[0056] Accuracy assurance mechanisms for probability statistics include: 32-bit counters are used in statistical arrays to prevent overflow. A normalization check is performed after joint probability calculations: the sum of all elements in the two-dimensional array must be equal to a tolerance of 1 ± 0.001. Logarithmic operations when calculating mutual information are approximated using Taylor series expansions (first 8 terms in the expansion).
[0057] Time decay model parameter verification method: At system startup, the system automatically checks whether the half-life parameter T is within the valid range of 1 to 720 hours. If not, it resets to the default value of 24 hours. The maximum survival time t is limited to 10,000 hours; if it exceeds this limit, it is still calculated as 10,000. Floating-point operations use round-to-nearest protection mode, and check for not-a-number (NaN) status after each calculation.
[0058] When the mutual information value is greater than the first threshold and the level pollution coefficient is greater than the second threshold, the parent node key generation path is split, or when the mutual information value is greater than the first threshold and the level pollution coefficient is less than or equal to the second threshold, the parent node key generation path is reorganized. The specific implementation is: A weighted distribution analysis method is used to locate the key splitting starting position in the parent node's key generation path. The parent node's key generation path is stored in contiguous memory starting at 0xD0000000. To determine the splitting starting position, a weight is first calculated for each byte position in the path. The weight is derived by weighting the operation frequency count corresponding to that position (obtained from historical access logs) and the neighborhood entropy value (calculated using the Shannon entropy formula for the surrounding 8 bytes). The weight formula is set as: Position weight = Access frequency × 0.6 + Neighborhood entropy × 0.4. Access frequency counts the number of times the position has been accessed in the past 168 hours, and neighborhood entropy calculates the probability distribution uncertainty of the surrounding 8 bytes. The location strategy selects the position with the largest weight as the splitting starting position. If multiple positions have the same weight, the position with the smallest address offset is selected.
[0059] A hardware entropy source is used to generate a 16-bit random interrupt identifier. This is accomplished using a physical true random number generator based on resistor thermal noise sampling technology. The specific process involves continuously acquiring 16 noise samples, each containing a random value between 0 and 255. The least significant bit of each sample is taken to form a 16-bit sequence. The parity bit of the sequence is calculated as the 17th redundant bit. Finally, the first 16 bits of the 17-bit data are truncated to form the interrupt identifier. Generation is completed within 100 microseconds, and the output range is 0x0000-0xFFFF. The interrupt identifier is physically stored in a tamper-proof register (address 0xE0000000).
[0060] The interrupt identifier is inserted into the key split start position, performing an in-place replacement. The insertion operation consists of three steps: creating a 2-byte gap at the split start position; copying the interrupt identifier's high and low bytes into the gap; and updating the path length metadata. Key requirement: Write-protect the 4 bytes before and after the interrupt identifier to ensure the insertion does not damage adjacent data. Post-insertion verification mechanism: Calculate the interrupt identifier's CRC-8 value (initial value 0x00, polynomial 0x07) and compare it to a preset pattern. If the verification fails, the operation is automatically rolled back and a new interrupt identifier is generated.
[0061] Address remapping technology is used to separate the key byte segments before and after the interrupt identifier into independent key generation path sub-segments. Using the interrupt identifier as the demarcation point, the byte range of the first segment is from the start address to the split start position minus 1, while the byte range of the second segment is from the split start position plus 2 to the end address. Separation operation: A separate memory control block (containing the start address, length marker, and access rights) is created for each byte segment. Control block management is implemented using a two-level page table, with the first segment page table indexed at 0x0000 and the second segment page table indexed at 0x8000. After separation, the key segment is automatically registered with the key segment manager (located at address 0xF0000000), which maintains the sub-segment relationship graph.
[0062] The spatial storage order of the key generation path sub-segments is rearranged and randomized. This spatial storage order adjustment is based on a random permutation algorithm: the initialization vector is the last three hexadecimal digits of the timestamp of the current ICMP echo request (e.g., 0x5C3); the vector is input into the RC4 algorithm to generate a permutation sequence (256 bytes); and the physical addresses of the sub-segments are remapped according to the permutation sequence. The permutation rule is: the i-th sub-segment is stored at the j-th position in the permutation sequence, where j = permutation sequence [i]. After the address is transformed, the data at the original location is cleared and the address mapping table is updated. After the permutation is complete, a continuity check is performed: the memory area is continuously scanned to detect holes.
[0063] When the mutual information value is greater than the first threshold and the hierarchical contamination coefficient is less than or equal to the second threshold, the reassembly operation first extracts adjacent key generation path sub-segments. Extraction range: The key segment manager searches for two sub-segments with consecutive addresses that meet the boundary condition of an address difference of less than 256 bytes. Extraction method: Read the control block information of the target sub-segment, lock the memory area, and release write protection. Adjacency determination criteria: The difference between the end address of the previous segment and the start address of the next segment is equal to the pointer length (4 bytes), with an offset tolerance of ±1 byte. After successful extraction, the sub-segment content is temporarily cached (address 0xF8000000).
[0064] Memory splicing technology is used to merge adjacent key generation path sub-segments to form a continuous byte sequence. The merge operation performs the following steps: remove the protection flag from the 4-byte isolation region between sub-segments; recalculate the start address and length of the merged region (from the start address of the previous segment to the end address of the next segment); and create a new memory control block to overwrite the atomic segment control block. Merging requirements: The data of the next segment's sub-segment is moved forward to fill the isolation region. This movement is performed using a DMA channel to avoid CPU interrupts. ECC checking is enabled during the splicing process, generating a 3-byte checksum for every 16 bytes and inserting it into the data area. The total length of the resulting continuous byte sequence is equal to the sum of the atomic segment lengths minus 4 bytes.
[0065] Serialization remapping is performed on a continuous byte sequence to generate a new parent node key generation path for space optimization. Remapping rules: Divide the continuous byte sequence into even 64-byte blocks; perform a congruence transformation on each block: new offset = (original offset × 31) mod 63; and rewrite the bytes within the block in the order of the new offsets. Serialization is performed using a dedicated hardware accelerator with a 16-byte granularity. After the new path is generated, the path descriptor is updated: the version number is set to the highest atomic fragment version + 1, and the initial access counter is reset to zero. The new path is ultimately stored starting at 0xD8000000.
[0066] Note: The random permutation algorithm used in spatial storage order adjustment is used to obtain the initialization vector. Network packet transmission latency is obtained by pinging the target gateway. The average round-trip latency of the last 10 packets (in milliseconds) is calculated. The algorithm for calculating the last three hexadecimal digits of the average value is to convert the average value to an integer and divide it by 256, taking the remainder (for example, 18.75ms is the integer 19, 19 % 256 = 19 = 0x13). If a network interruption is detected while using the initialization vector, the last three digits of the system boot timestamp are used as a backup source.
[0067] The mechanism for setting all decision thresholds requires clarification: The first threshold (mutual information) is set to 0.7 based on historical anomaly detection statistics. This is derived from the distribution of mutual information values for 1,000 normal and 1,000 attack samples (99% of normal samples are below 0.3, while 95% of attack samples are above 0.6). The second threshold (hierarchical contamination coefficient) is set to 0.6 based on a risk assessment model that considers factors such as key lifecycle (security risk increases when it exceeds 0.6) and the number of devices bound (the threshold is lowered by 0.1 when more than five devices are bound). The thresholds are stored in configuration register 0xFF000000.
[0068] Operational verification was completed on an embedded development platform. A split operation was triggered when the mutual information value was set to 0.75 > 0.7 and the level contamination coefficient was set to 0.7 > 0.6, testing a 512-byte key path. The maximum weight position (offset 128 bytes) was located and the identifier 0xA35C was inserted. The two sub-segments (128 bytes + 384 bytes) were successfully rearranged and stored. During the reassembly test, the mutual information value was set to 0.8 > 0.7 and the contamination coefficient was set to 0.55 < 0.6, successfully merging the two sub-segments (with a consecutive address difference of 4 bytes) into a 512-4 = 508-byte sequence. The remapped path passed all cryptographic verification tests, with processing latency below 500 microseconds, meeting real-time requirements. During a stress test, no memory leaks were observed during 10,000 consecutive operations.
[0069] A new key tree is constructed based on the split or reorganized key generation path, and the updated subkeys are distributed to all bound devices. The specific implementation is as follows: Parsing the path signature bytes in a segmented or reassembled key generation path requires clear feature extraction rules. Path signature bytes are defined as three specific bytes at byte positions 0, 32, and 64 in the path data (address offsets 0x00, 0x20, and 0x40). Parsing process: Read the binary value of these three bytes and treat them as the three components of a 32-bit integer (byte 0 is the low-order 8 bits, byte 32 is the middle-order 8 bits, and byte 64 is the high-order 8 bits). The parsed result is stored as a 32-bit signature identifier (address 0x50000000). When the path length is less than 64 bytes, the missing bytes are padded with 0xFF. After parsing, verify that the signature identifier's Hamming weight is between 60 and 100 (to prevent invalid signatures); otherwise, the path reconstruction process is triggered.
[0070] A matrix mapping algorithm is used to construct the parent node association matrix for new key tree nodes based on the path signature bytes. The parent node association matrix is defined as an 8×8 symmetric matrix (64-byte memory structure). Matrix element assignment rules: Take the i-th and j-th bits of the signature identifier (0≤i, j<32), calculate the logical exclusive OR of the result, and use it as the initial value of the matrix element M[i][j]. Element position mapping: Row i takes the values of bits 0-2 (0-7) of the signature identifier, and column j takes the values of bits 3-5 (0-7). The matrix is constructed in a continuous space starting at 0x51000000, with each element occupying 1 byte. After construction, normalization is performed: the sum of all matrix elements is adjusted to 256 (achieved by multiplying by a scaling factor).
[0071] Graph-theoretic transformations are performed to construct a hierarchical key tree topology based on the parent node association matrix. The hierarchical key tree topology construction process: The association matrix is treated as an adjacency matrix, and connections are established between nodes when the matrix element value is greater than 128. Node numbering rule: The kth node corresponds to the kth row of the matrix (k = 0 to 7). Topology construction steps: Initialize 8 empty nodes; scan the matrix, and establish a bidirectional connection between nodes i and j when M[i][j] > 128; calculate the degree (number of connections) of each node, and set the node with the highest degree as the root node; and construct the tree hierarchy from highest to lowest node degree. The final topology is stored as an adjacency table (address 0x52000000), where each entry contains the node number and a list of its child nodes.
[0072] A hierarchical derivation mechanism is used to generate updated subkey byte streams corresponding to leaf nodes in the hierarchical key tree topology. Leaf nodes are identified as terminal nodes in the topology without child nodes. Key derivation process: Depth-first traversal begins at the root node; an HMAC-SHA256 operation (key = parent node key, message = node path) is performed on each leaf node; the first 32 bytes of the digest value are taken as the subkey for that node. Derivation parameters: The root node key uses the system master key (a 128-bit AES key at 0x60000000); the HMAC operation is implemented using the RFC 4231 standard. The subkey byte streams for all leaf nodes are stored contiguously in the 0x53000000 area (fixed 32 bytes per node).
[0073] Pushing updated subkey byte streams to bound devices with an online status in real time requires a status detection mechanism. Network status detection: The response time of the heartbeat packet is judged (threshold is 300 milliseconds). Devices that have responded within the last 10 seconds are marked as online. The push protocol uses MQTT over TLS 1.2, and the topic name is " / key_update / device ID". Push content structure: 16-byte header (including timestamp and sequence number) + 32-byte subkey + 16-byte MAC check code. Real-time guarantee: Push tasks are added to the high-priority queue, and the network stack ensures that they are sent within 500 milliseconds. Failure retransmission mechanism: If the transmission fails three times in a row, the system switches to offline processing mode.
[0074] Differential synchronization technology is used to send incremental key fragment sequences to bound devices that are offline during the next authentication operation. Incremental key fragment sequence generation: Compare the old subkey stored locally on the device with the updated subkey byte stream and extract the difference byte segment (start position + length + new content). Sequence format: 8-byte start offset + 4-byte length + variable-length content. Sent: During the first authentication after the device reconnects to the network, the incremental sequence is appended to the authentication response message (TLS encrypted channel). Sequence management: The incremental sequence for each offline device is independently stored in the 0x54000000 area (maximum 256 bytes) and automatically cleared after 72 hours.
[0075] Receive the updated subkey byte stream fragment sequence checksum returned by the bound device and perform security verification. Verification result format: 16-byte hash value (the device calculates the SHA-256 digest of the received subkey). Verification process: The system calculates the expected digest value and compares it with the received value; it also verifies the timestamp freshness (the difference from the send time is less than 5 seconds). Result processing: If the verification is successful, the device status is updated to "Synchronized". If it fails, an alarm is triggered and the full key is pushed again. Verification logs are recorded in the security audit area (0x55000000), including fields such as device ID, timestamp, and checksum.
[0076] The fault-tolerance mechanism for path signature byte parsing requires explanation: When the path length exceeds 64 bytes, the signature byte position is located using a modulo operation (actual offset = specified offset modulo path length). If the Hamming weight check fails, a fallback parsing mode is automatically activated: the first and last 32 bytes of the path are taken to calculate an intermediate hash value (BLAKE2s), and the first 3 bytes of the hash value are used as the signature bytes.
[0077] Implementation of associativity matrix normalization: The scaling factor is calculated as 256 divided by the sum of the matrix elements (floating-point operation). After normalization, the matrix elements are rounded to the nearest integer. Matrix symmetry is ensured by performing the assignment M[i][j] = M[j][i] (where i ≠ j) after construction. The matrix is stored in row-major order (eight elements in row 0 are stored contiguously).
[0078] Optimized degree calculation for topology construction: Node degrees are quickly calculated by summing matrix rows (counting row values greater than 128). Root node selection strategy: When multiple nodes have the same degree, the node with the lowest node number is selected. Level assignment algorithm: The root node is level 0; its direct children are level 1; this algorithm is recursively defined until reaching leaf nodes.
[0079] Key derivation security enhancements: Each node's derivation operation incorporates a randomly perturbed salt value (8 bytes), obtained from the system entropy pool. Derivation is performed within the hardware security module, and the plaintext key never leaves the module. Leaf node key storage is encrypted (AES-GCM mode), and the ciphertext key is output to memory.
[0080] Incremental sequence difference detection algorithm: Uses the bsdiff binary difference algorithm (based on suffix arrays) with a window size of 16 bytes. Differences are compressed and stored (LZ77 algorithm compression ratio set to 6). Sequence verification mechanism: Upon receiving, the device returns a CRC32 checksum (polynomial 0x04C11DB7) of the sequence content.
[0081] The calculations involved in the embodiments are all dimensionless numerical calculations, and the preset parameters and thresholds in the calculations are set by those skilled in the art according to actual conditions.
[0082] The above embodiments may be implemented in whole or in part through software, hardware, firmware, or any other combination thereof. When implemented using software, the above embodiments may be implemented in whole or in part in the form of a computer program product.
[0083] Those skilled in the art will appreciate that the modules and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application of the technical solution and the invention constraints. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0084] In addition, each functional module in each embodiment of the present application may be integrated into one processing module, or each module may exist physically separately, or two or more modules may be integrated into one module.
[0085] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the modules is only a logical function division. In actual implementation, there may be other division methods, such as multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.
[0086] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.
[0087] Finally: The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.
Claims
1. A networked smart key dynamic key management system that supports multi-device binding, characterized in that: include: The instruction parsing module is used to receive the node release instruction and extract the device identification of the target device; A residual location module, configured to perform a depth-first search on the hierarchical key tree based on the device identification, locate all associated key child nodes and mark them as residual nodes; A fragment obfuscation module is used to split the key fragments of the residual node into fragments with non-geometric lengths, and apply a one-way transformation function based on elliptic curve cryptography to each fragment to generate obfuscated fragments; The pollution assessment module is used to calculate the mutual information value between the obfuscated fragments and the parent node key, and determine the hierarchical pollution coefficient based on the exponential decay curve of the parent node key entropy; a path decision module, configured to split the parent node key generation path when the mutual information value is greater than a first threshold and the hierarchical contamination coefficient is greater than a second threshold, or to reorganize the parent node key generation path when the mutual information value is greater than the first threshold and the hierarchical contamination coefficient is less than or equal to the second threshold; The key update module is used to build a new key tree based on the split or reorganized key generation path and distribute the updated subkeys to all bound devices.
2. A networked smart key dynamic key management system supporting multi-device binding according to claim 1, characterized in that: Receive the node release command and extract the device identification of the target device, including: Parse the data message encapsulated by the IoT communication protocol and identify the operation instruction field in the message header; When the value of the operation instruction field is equal to the pre-stored release identification code, it is determined to be a node release instruction; Extracting the target device identification segment byte stream in the data message payload; Performing a cyclic redundancy check calculation on the target device identification segment byte stream; When the cyclic redundancy check calculation result matches the preset check value, the device identification of the target device is output as a valid device identification.
3. A networked smart key dynamic key management system supporting multi-device binding according to claim 1, characterized in that: Perform a depth-first search on the hierarchical key tree based on the device identity, locate all associated key child nodes and mark them as residual nodes, including: The hierarchical key tree node corresponding to the device identifier is used as the search starting point; Constructing an adjacency table between nodes of the hierarchical key tree; Initialize the stack data structure and push the search starting point onto the stack; The stack pop operation is executed cyclically until the stack is empty, and the address of the current hierarchical key tree node is obtained in each pop operation; Retrieve all child node addresses of the current hierarchical key tree node address in the adjacency table and push them into the stack; Add the current hierarchical key tree node address to the residual node list.
4. A networked smart key dynamic key management system supporting multi-device binding according to claim 1, characterized in that: The key fragments of the residual nodes are divided into fragments of non-geometric lengths, and a one-way transformation function based on elliptic curve encryption is applied to each fragment to generate obfuscated fragments, including: Obtain the byte length of the key fragment of the residual node and generate a random sequence with non-uniform division; Insert the segmentation identifier at the corresponding position of the key fragment byte sequence according to the element value in the random sequence; Extract the byte segments between the segmentation identifiers as segmentation fragments; For each segment, select the base point coordinates on the elliptic curve; Encrypt the segmented byte streams through elliptic curve point multiplication operations; The horizontal coordinate value of the curve point after encryption conversion is extracted as the output of the one-way transformation function to generate obfuscated fragments.
5. A networked smart key dynamic key management system supporting multi-device binding according to claim 4, characterized in that: The method for generating a random sequence with non-geometric segmentation is as follows: use the current timestamp as the random seed to initialize the pseudo-random number generator, output a non-geometric segmentation sequence with a specified number of elements, and the difference between the elements in the segmentation sequence follows the Fibonacci sequence growth.
6. A networked smart key dynamic key management system supporting multi-device binding according to claim 4, characterized in that: The operation of selecting the elliptic curve base point is as follows: obtaining the temperature sensor reading at the time when the fragment obfuscation operation is triggered, and dynamically selecting the preset base point coordinates on the elliptic curve secp256k1 or secp384r1 according to the parity of the last bit of the corresponding reading.
7. A networked smart key dynamic key management system supporting multi-device binding according to claim 1, characterized in that: Calculate the mutual information value between the obfuscated fragment and the parent node key, and determine the hierarchical contamination coefficient based on the exponential decay curve of the parent node key entropy, including: Get the discrete probability distribution of the obfuscated fragment byte value and the parent node key byte value; Calculate the joint probability distribution of the obfuscated fragment and the parent node key based on the discrete probability distribution; Solve the mutual information value through discrete probability distribution and joint probability distribution; Extract the initial entropy value and time decay parameter of the parent node key; Substitute the time decay parameter into the exponential decay function to calculate the parent node key entropy at the current moment; The ratio of the parent node key entropy at the current moment to the initial entropy value is used as the hierarchical pollution coefficient.
8. The networked smart key dynamic key management system supporting multi-device binding according to claim 1, characterized in that: When the mutual information value is greater than a first threshold and the hierarchical contamination coefficient is greater than a second threshold, the parent node key generation path is split; or when the mutual information value is greater than the first threshold and the hierarchical contamination coefficient is less than or equal to the second threshold, the parent node key generation path is reorganized, including: Locate the key splitting starting position in the parent node key generation path; Generate a 16-bit random interrupt identifier and insert it into the key split start position; Separate the key byte segments before and after the interrupt identifier into independent key generation path sub-segments; Rearrange the spatial storage order of key generation path sub-segments; or when the mutual information value is greater than a first threshold and the hierarchical contamination coefficient is less than or equal to a second threshold, extracting adjacent key generation path sub-segments; Merging adjacent key generation path sub-segments to form a continuous byte sequence; Serialize and remap the continuous byte sequence to generate a new parent node key generation path.
9. A networked smart key dynamic key management system supporting multi-device binding according to claim 8, characterized in that: The spatial storage order adjustment is performed using a random permutation algorithm. The algorithm initialization vector comes from the last three hexadecimal digits of the current network data packet transmission delay value, generating a random mapping table for each round of permutation operation.
10. The networked smart key dynamic key management system supporting multi-device binding according to claim 1, characterized in that: Build a new key tree based on the split or reorganized key generation path and distribute the updated subkeys to all bound devices, including: Parsing the path signature bytes in the split or reassembled key generation path; Establish the parent node association matrix of the new key tree node according to the path characteristic bytes; Constructing a hierarchical key tree topology based on the parent node association matrix; Generate an updated subkey byte stream corresponding to a leaf node in a hierarchical key tree topology; Push the updated subkey byte stream to the bound device with online status in real time; Sending an incremental key fragment sequence to a bound device whose network status is offline during the next authentication operation; Receive the updated subkey byte stream fragment sequence verification result returned by the bound device.
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