Transverse JTE diode based on N-surface GaN / AlGaN heterojunction

Abstract

The invention discloses an N-surface GaN / AlGaN heterojunction transverse JTE diode, and belongs to the technical field of semiconductors, and the diode comprises an epitaxial structure which at least comprises an N-surface unintentionally doped GaN channel layer; the P-type JTE layer, the anode and the cathode are positioned on the surface of the N-surface unintentionally doped GaN channel layer; wherein the anode and the P-type JTE layer are located in an anode region, the P-type JTE layer comprises a first sub-part and a second sub-part which are arranged at an interval, the anode metal layer covers part of the first sub-part, part of the second sub-part and a channel region between the two sub-parts, and the orthographic projection of the cathode in the first direction is annular; the first direction is a direction perpendicular to a plane where the epitaxial structure is located; and the passivation layer covers the surface of the N-surface unintentionally doped GaN channel layer and part of the cathode. By introducing the P-type JTE layer, the equivalent Schottky barrier height of the anode is remarkably improved, and reverse electric leakage is effectively reduced.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to a lateral JTE diode based on an N-face GaN / AlGaN heterojunction. Background Art

[0002] Currently, most diode devices use silicon (Si), which results in low power density and difficulty miniaturizing them under high-power conditions. As power processing equipment continues to demand higher efficiency, power density, and volume, the performance of silicon-based devices is approaching the theoretical limits of their intrinsic material properties.

[0003] In contrast, gallium nitride (GaN) material exhibits superior electrical properties due to its wider bandgap, higher critical breakdown electric field, and higher electron saturation velocity. Furthermore, GaN far surpasses silicon in thermal conductivity, temperature stability, and corrosion resistance, enabling GaN devices to maintain greater stability in more complex operating environments. Due to their superior electrical performance and stability, GaN devices are widely considered suitable for demanding applications such as high frequency, high power, and strong radiation.

[0004] Currently, the design and manufacture of GaN-based diodes primarily focus on traditional Ga-polar heterojunction structures, while relatively little research has been conducted on N-polar GaN / AlGaN heterojunction devices. Due to its unique material properties and structural advantages, N-polar GaN / AlGaN heterojunctions have potential applications in high-power and high-frequency applications.

[0005] Therefore, those skilled in the art urgently need to provide a diode structure based on an N-face GaN / AlGaN heterojunction to improve the performance of the device in high-frequency, high-voltage and high-power applications. Summary of the Invention

[0006] In order to solve the above problems existing in the prior art, the present invention provides a lateral JTE diode based on an N-face GaN / AlGaN heterojunction. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0007] The present invention provides a lateral JTE diode based on an N-face GaN / AlGaN heterojunction, comprising:

[0008] An epitaxial structure comprising at least an N-face unintentionally doped GaN channel layer;

[0009] A P-type JTE layer, an anode, and a cathode located on the surface of the N-face unintentionally doped GaN channel layer; wherein the anode and the P-type JTE layer are located in the anode region, the P-type JTE layer includes a first sub-portion and a second sub-portion arranged at intervals, the anode metal layer covers a portion of the first sub-portion, a portion of the second sub-portion, and the channel region between the two sub-portions, and the positive projection of the cathode in a first direction is a ring; the first direction is a direction perpendicular to the plane of the epitaxial structure;

[0010] A passivation layer covers the surface of the N-side non-intentionally doped GaN channel layer and a portion of the cathode.

[0011] In one embodiment of the present invention, the material of the P-type JTE layer includes Mg-doped N-face P-GaN with a doping concentration of 4×10 16 ~2×10 19 cm -3 .

[0012] In one embodiment of the present invention, the passivation layer covers the sidewall and a portion of the upper surface of the first subsection away from the second subsection, and the sidewall and a portion of the upper surface of the second subsection away from the first subsection.

[0013] In one embodiment of the present invention, the material of the P-type JTE layer includes P-NiO, P-Cu2O or P-BN.

[0014] In one embodiment of the present invention, the first sub-portion and the second sub-portion are both stepped, wherein the stepped portion of the first sub-portion away from the second sub-portion partially covers the passivation layer, and the stepped portion of the second sub-portion away from the first sub-portion partially covers the passivation layer.

[0015] In one embodiment of the present invention, the epitaxial structure further comprises a substrate layer, an N-face unintentionally doped GaN buffer layer, a Si-doped N-face AlGaN barrier layer, and an N-face unintentionally doped AlGaN barrier layer stacked sequentially from bottom to top, and the N-face unintentionally doped GaN channel layer is located on the upper surface of the N-face unintentionally doped AlGaN barrier layer;

[0016] The lateral JTE diode further includes an isolation region located at the periphery of the active region and extending from the N-face unintentionally doped GaN channel layer to the N-face unintentionally doped GaN buffer layer in the first direction.

[0017] In one embodiment of the present invention, the thickness of the N-side unintentionally doped GaN buffer layer is 300-600 nm, the thickness of the Si-doped N-side AlGaN barrier layer is 20-50 nm, the thickness of the N-side unintentionally doped AlGaN barrier layer is 15-35 nm, and the thickness of the N-side unintentionally doped GaN channel layer is 10-90 nm.

[0018] In a second aspect, the present invention further provides a method for preparing a lateral JTE diode based on an N-face GaN / AlGaN heterojunction as described in the first aspect, comprising:

[0019] Providing a substrate layer, and sequentially growing an N-face unintentionally doped GaN buffer layer, a Si-doped N-face AlGaN barrier layer, an N-face unintentionally doped AlGaN barrier layer, and an N-face unintentionally doped GaN channel layer on the surface of the substrate layer to form an epitaxial structure;

[0020] Vapor depositing a cathode ohmic metal layer in a cathode region on a surface of the N-face unintentionally doped GaN channel layer to form a cathode, wherein the positive projection of the cathode in the first direction is a ring;

[0021] An isolation region is formed around the active region of the device by ion implantation;

[0022] Depositing a passivation layer on the surface of the device, opening holes in the passivation layer in the cathode region and the anode region, and then evaporating an anode metal layer in the anode region to form an anode;

[0023] The method further comprises:

[0024] Before the step of evaporating a cathode ohmic metal layer in the cathode region on the surface of the N-face unintentionally doped GaN channel layer to form a cathode, a P-type JTE layer is formed in the anode region on the surface of the N-face unintentionally doped GaN channel layer according to the material of the P-type JTE layer; or, before the step of evaporating an anode metal layer in the anode region to form an anode, a P-type JTE layer is formed in the anode region;

[0025] The P-type JTE layer includes a first sub-portion and a second sub-portion arranged at intervals, and the anode metal layer covers a portion of the first sub-portion, a portion of the second sub-portion, and a channel region between the two sub-portions.

[0026] In one embodiment of the present invention, when the material of the P-type JTE layer includes Mg-doped N-face P-GaN, before the step of evaporating a cathode ohmic metal layer in the cathode region on the surface of the N-face unintentionally doped GaN channel layer to form a cathode, a Mg-doped N-face P-GaN layer is grown on the surface of the N-face unintentionally doped GaN channel layer, and a P-type JTE layer is formed in the anode region by etching;

[0027] The first subsection and the second subsection are strip-shaped, and the passivation layer covers the sidewall and part of the upper surface of the first subsection away from the second subsection, and the sidewall and part of the upper surface of the second subsection away from the first subsection.

[0028] In one embodiment of the present invention, when the material of the P-type JTE layer includes P-NiO, P-Cu2O or P-BN, before the step of evaporating the anode metal layer in the anode region to form the anode, P-NiO, P-Cu2O or P-BN is sputtered in the anode region on the surface of the N-side unintentionally doped GaN channel layer to form the P-type JTE layer;

[0029] The first sub-portion and the second sub-portion are both stepped, the stepped portion of the first sub-portion away from the second sub-portion partially covers the passivation layer, and the stepped portion of the second sub-portion away from the first sub-portion partially covers the passivation layer.

[0030] Compared with the prior art, the present invention has the following beneficial effects:

[0031] The N-face GaN / AlGaN heterojunction lateral diode proposed by this invention significantly increases the equivalent Schottky barrier height of the anode by introducing a P-type JTE termination structure, or P-type JTE layer, in the anode region, effectively reducing reverse leakage. Furthermore, by modulating the fringing electric field, the channel depletion capability in the reverse state is enhanced, thereby improving the device's withstand voltage and significantly enhancing its performance in high-power, high-voltage, and high-frequency applications.

[0032] In addition, the present invention realizes the power integration of N-face GaN / AlGaN heterostructure, effectively reduces the volume of the power module, improves the processing efficiency and reliability of the device, and provides a practical solution for the widespread application of N-face GaN / AlGaN heterojunction devices.

[0033] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 This is a schematic structural diagram of a lateral JTE diode based on an N-face GaN / AlGaN heterojunction provided by an embodiment of the present invention;

[0035] Figure 2 1 is another structural schematic diagram of a lateral JTE diode based on an N-face GaN / AlGaN heterojunction provided by an embodiment of the present invention;

[0036] Figure 3 This is a flow chart of a method for preparing a lateral JTE diode based on an N-face GaN / AlGaN heterojunction provided by an embodiment of the present invention;

[0037] Figures 4a to 4k yes Figure 2 Schematic diagram of the fabrication process of a lateral JTE diode based on an N-face GaN / AlGaN heterojunction;

[0038] Figures 5a to 5f yes Figure 3 Schematic diagram of part of the preparation process of the lateral JTE diode based on the N-face GaN / AlGaN heterojunction. DETAILED DESCRIPTION

[0039] The present invention will be further described in detail below with reference to specific examples, but the embodiments of the present invention are not limited thereto.

[0040] Figures 1-2 This is a schematic diagram of the structure of a lateral JTE diode based on an N-face GaN / AlGaN heterojunction provided by an embodiment of the present invention. Figures 1-2 The embodiment of the present invention provides a lateral JTE diode based on an N-face GaN / AlGaN heterojunction, comprising:

[0041] Epitaxial structure 1, epitaxial structure 1 at least includes N-side unintentionally doped GaN channel layer 11;

[0042] A P-type JTE layer 2, an anode 3, and a cathode 4 are located on the surface of the N-face unintentionally doped GaN channel layer 11; wherein the anode 3 and the P-type JTE layer 2 are located in the anode region, the P-type JTE layer 2 includes a first sub-portion 21 and a second sub-portion 22 arranged at intervals, the metal layer of the anode 3 covers a portion of the first sub-portion 21, a portion of the second sub-portion 22, and the channel region between the two sub-portions, and the positive projection of the cathode 4 in a first direction is a ring; the first direction is a direction perpendicular to the plane of the epitaxial structure 1;

[0043] The passivation layer 5 covers the surface of the N-face unintentionally doped GaN channel layer 11 and a portion of the cathode 4 .

[0044] Specifically, the above-mentioned lateral JTE diode based on the N-face GaN / AlGaN heterojunction includes an epitaxial structure 1, which includes a substrate layer 12, an N-face unintentionally doped GaN buffer layer 13, a Si-doped N-face AlGaN barrier layer 14, an N-face unintentionally doped AlGaN barrier layer 15 and an N-face unintentionally doped GaN channel layer 11 stacked in sequence from bottom to top. For example, the substrate layer 12 is made of Al2O3, SiC, etc., the thickness of the N-face unintentionally doped GaN buffer layer 13 is 300-600nm, the thickness of the Si-doped N-face AlGaN barrier layer 14 is 20-50nm, and the Si doping concentration is 4×10 17 ~6×10 18 cm -3, the Al component is between 0.2 and 0.35, or the Al component is gradient; optionally, the thickness of the N-side unintentionally doped AlGaN barrier layer 15 is 15 to 35 nm, the Al component is between 0.2 and 0.35, and the thickness of the N-side unintentionally doped GaN channel layer 11 can be selected according to actual withstand voltage requirements, for example, the thickness is 10 to 90 nm.

[0045] The lateral JTE diode further includes an isolation region 6 located at the periphery of the active region and extending from the N-face unintentionally doped GaN channel layer 11 to the N-face unintentionally doped GaN buffer layer 13 in a direction perpendicular to the plane of the substrate layer 12 .

[0046] Furthermore, the lateral JTE diode provided in this embodiment further includes a P-type JTE layer 2, an anode 3 and a cathode 4 located on the surface of the N-side unintentionally doped GaN channel layer 11, as shown in FIG. Figures 1-2 As shown, the anode 3 and the P-type JTE layer 2 are both located in the anode region, including a first sub-portion 21 and a second sub-portion 22 separated therefrom. The anode 3 is located between the first sub-portion 21 and the second sub-portion 22, i.e., the anode 3 covers the channel region between the first sub-portion 21 and the second sub-portion 22, and in a first direction, the two ends of the orthographic projection of the anode 3 partially overlap with the orthographic projections of the first sub-portion 21 and the orthographic projections of the second sub-portion 22, respectively. In the cathode region, the cathode 4 is annular. Optionally, a passivation layer 5 covers the surface of the N-face unintentionally doped GaN channel layer 11 and a portion of the cathode 4.

[0047] This embodiment significantly increases the equivalent Schottky barrier height of anode 3 by introducing a P-type JTE (Junction Terminal Extension) layer in the anode region, effectively reducing reverse leakage. Simultaneously, by modulating the fringe electric field, the channel depletion capability in the reverse state is enhanced, thereby improving the device's withstand voltage performance and significantly enhancing its performance in high-power, high-voltage, and high-frequency applications.

[0048] It should be noted that there are multiple options for the material of the P-type JTE layer 2 , and different selected materials will also lead to differences in the structure of the P-type JTE layer 2 .

[0049] For details, please see Figure 1 The material of the P-type JTE layer 2 includes Mg-doped N-face P-GaN with a doping concentration of 4×10 16 ~2×10 19 cm -3 At this time, the first sub-section 21 and the second sub-section 22 are both strip-shaped, and the passivation layer 5 covers the side wall and part of the upper surface of the first sub-section 21 away from the second sub-section 22, as well as the side wall and part of the upper surface of the second sub-section 22 away from the first sub-section 21.

[0050] On the other hand, the material of the P-type JTE layer 2 includes P-NiO, P-Cu2O or P-BN, and the doping concentration depends on the specific material and process. For example, the doping concentration of P-NiO is 4×10 16 ~2×10 19 cm -3 Please continue to see Figure 2 At this time, the first sub-section 21 and the second sub-section 22 are both stepped, wherein the stepped portion of the first sub-section 21 away from the second sub-section 22 partially covers the passivation layer 5, and the stepped portion of the second sub-section 22 away from the first sub-section 21 partially covers the passivation layer 5.

[0051] Figure 3 This is a flow chart of a method for preparing a lateral JTE diode based on an N-face GaN / AlGaN heterojunction provided by an embodiment of the present invention. Figures 4a to 4k yes Figure 2 The figure shows the fabrication process of a lateral JTE diode based on an N-face GaN / AlGaN heterojunction. Figure 3 、 Figures 4a to 4k As shown, the present invention also provides a method for preparing a lateral JTE diode based on an N-face GaN / AlGaN heterojunction, comprising:

[0052] S1. Provide a substrate layer 12, and sequentially grow an N-face unintentionally doped GaN buffer layer 13, a Si-doped N-face AlGaN barrier layer 14, an N-face unintentionally doped AlGaN barrier layer 15, and an N-face unintentionally doped GaN channel layer 11 on the surface of the substrate layer 12 to form an epitaxial structure 1.

[0053] Specifically, if Figures 4a to 4c As shown, first, a substrate layer 12 is provided, and is sequentially cleaned with deionized water, an organic reagent (such as acetone and isopropyl alcohol), and an acid solution (such as HF, BOE, HCL, etc.). Next, ammonia (NH3) is selected as the N source gas, trimethylgallium (TMGa) is selected as the gallium source, and the growth temperature is between 1000°C and 1200°C. An N-face unintentionally doped GaN buffer layer 13 is grown on the surface of the substrate layer 12 using a MOCVD (Metal-organic Chemical Vapor Deposition) process. Ammonia (NH3) is selected as the N source gas, trimethylgallium (TMGa) is selected as the gallium source, trimethylaluminum (TMAl) is selected as the aluminum source, and silane (SiH4) is selected as the doped Si source. The growth temperature is between 1000°C and 1150°C. An Si-doped N-face AlGaN barrier layer 14 is grown on the surface of the N-face unintentionally doped GaN buffer layer 13 using a MOCVD process, wherein the Si doping concentration can be modulated by controlling the flow rate of silane.

[0054] Furthermore, if Figure 4d As shown, ammonia (NH3) is selected as the N source gas, trimethylgallium (TMGa) is selected as the gallium source, trimethylaluminum (TMAl) is selected as the aluminum source, the growth temperature is between 1000°C and 1180°C, and the unintentionally doped N-face AlGaN barrier layer 14 is grown on the surface of the Si-doped N-face AlGaN barrier layer 14 using the MOCVD process.

[0055] Finally, ammonia (NH3) is selected as the N source gas, trimethyl gallium (TMGa) is selected as the gallium source, dimethyl magnesium (DMg) is selected as the Mg source, and the growth temperature is between 1000℃ and 1100℃. The N-side unintentionally doped GaN channel layer 11 is grown on the surface of the unintentionally doped N-side AlGaN barrier layer 14 by MOCVD process to form Figure 4e The epitaxial structure 1 is shown.

[0056] It should be understood that the fabrication process for the lateral JTE diode varies depending on the material selected for the P-type JTE layer 2. Specifically, depending on the material of the P-type JTE layer 2, the P-type JTE layer 2 is formed in the anode region before the cathode 4 ohmic metal layer is evaporated in the cathode region on the surface of the N-face unintentionally doped GaN channel layer 11 to form the cathode 4; alternatively, the P-type JTE layer 2 is formed in the anode region before the anode 3 metal layer is evaporated in the anode region to form the anode 3; wherein the P-type JTE layer 2 includes a first sub-section 21 and a second sub-section 22 arranged at intervals, and the anode 3 metal layer covers a portion of the first sub-section 21, a portion of the second sub-section 22, and the channel region between the two sub-sections.

[0057] See Figures 4f to 4g For example, when the material of the P-type JTE layer 2 includes Mg-doped N-face P-GaN, it is necessary to prepare and form the P-type JTE layer 2 in the anode area on the surface of the N-face unintentionally doped GaN channel layer 11 before evaporating the cathode 4 ohmic metal layer in the cathode area on the surface of the N-face unintentionally doped GaN channel layer 11 to form the cathode 4. In this process, ammonia (NH3) is selected as the N source gas, trimethyl gallium (TMGa) is selected as the gallium source, dimethyl magnesium (DMg) is selected as the doped Mg source, the growth temperature is between 1000℃ and 1100℃, and the Mg-doped N-face P-GaN layer is grown on the surface of the epitaxial structure 1 using the MOCVD process. Then, the device is sequentially cleaned with deionized water, organic reagents and acid-washed. A mixed gas of Cl2 (7-12sccm) and BCl3 (15-30sccm) is used at a pressure of 4-15mTorr. The Mg-doped N-face P-GaN layer is subjected to Cl-based plasma etching through an ICP upper electrode of 30-70W and a lower electrode of 10-20W to form a P-type JTE layer 2. Figure 4gAs shown, the first sub-portion 21 and the second sub-portion 22 of the P-type JTE layer 2 are strip-shaped, and the passivation layer 5 covers the side wall and part of the upper surface of the first sub-portion 21 away from the second sub-portion 22, as well as the side wall and part of the upper surface of the second sub-portion 22 away from the first sub-portion 21.

[0058] S2. Vapor-depositing a cathode 4 ohmic metal layer in the cathode region on the surface of the N-face unintentionally doped GaN channel layer 11 to form a cathode 4 , wherein the orthographic projection of the cathode 4 in the first direction is a ring.

[0059] Specifically, see Figure 4h , a cathode 4 ohmic metal layer Ti / Al / Ni / Au is evaporated on the cathode area of ​​the surface of the N-side non-intentionally doped GaN channel layer 11, and the device is rapidly heated at a high temperature of 780°C and maintained for 30 seconds in a nitrogen atmosphere for annealing to form a cathode 4.

[0060] S3, such as Figure 4i As shown, an isolation region 6 is formed around the active region of the device by ion implantation.

[0061] S4, depositing a passivation layer 5 on the surface of the device, opening holes in the passivation layer 5 in the cathode region and the anode region, and then forming an anode 3 metal layer by evaporation in the anode region.

[0062] like Figure 4j As shown, in this embodiment, the passivation conditions are: SiH4 = 150 ~ 250sccm, NH3 = 2 ~ 8sccm, He = 100 ~ 300sccm, pressure = 300 ~ 700mttor, RF power = 15 ~ 30W, and the target thickness is 60nm ~ 120nm. Figure 4k As shown, the anode 3 and cathode 4 are opened, and the anode 3 metal layer is evaporated to form the anode 3, and the Figure 1 The lateral JTE diode shown in the figure. Here, F-based ICP etching is used to open the hole. The process parameters are a mixed gas of CF4 (15-30 sccm) and O2 (3-15 sccm), at a pressure of 3-15 mTorr, with a power of 40-90 W for the upper electrode and 8-15 W for the lower electrode.

[0063] In addition, it should be noted that when the material of the P-type JTE layer 2 includes P-NiO, P-Cu2O or P-BN, before the step of evaporating the anode 3 metal layer in the anode region to form the anode 3, P-NiO, P-Cu2O or P-BN is sputtered on the anode region of the surface of the N-face non-intentionally doped GaN channel layer 11 to form the P-type JTE layer 2; that is, before preparing Figure 2 In the process of the lateral JTE diode shown in FIG. 1 , after the epitaxial structure shown in FIG. 2 is formed, further steps are as follows: Figures 5a to 5fAs shown, a cathode ohmic metal layer is first evaporated in the cathode region to form a cathode 4, and an injection isolation is performed to form an isolation region 6; then, a passivation layer 5 is grown on the surface of the device, and holes are opened in the passivation layer 5 in the cathode region and the anode region, thereby preparing a P-type JTE layer 2 in the anode region. For example, a magnetron sputtering device is used to prepare a P-NiO material at room temperature to form a P-type JTE structure, wherein the first sub-section 21 and the second sub-section 22 are both stepped, and the stepped portion of the first sub-section 21 away from the second sub-section 22 side covers a portion of the passivation layer 5, and the stepped portion of the second sub-section 22 away from the first sub-section 21 side covers a portion of the passivation layer 5. Finally, an anode metal layer is evaporated in the anode region to form an anode 3, and finally a P-type JTE structure is obtained. Figure 2 The lateral JTE diode shown.

[0064] It can be seen from the above embodiments that the beneficial effects of the present invention are:

[0065] The N-face GaN / AlGaN heterojunction lateral diode proposed by this invention significantly increases the equivalent Schottky barrier height of the anode by introducing a P-type JTE termination structure, or P-type JTE layer, in the anode region, effectively reducing reverse leakage. Furthermore, by modulating the fringing electric field, the channel depletion capability in the reverse state is enhanced, thereby improving the device's withstand voltage and significantly enhancing its performance in high-power, high-voltage, and high-frequency applications.

[0066] In addition, the present invention realizes the power integration of N-face GaN / AlGaN heterostructure, effectively reduces the volume of the power module, improves the processing efficiency and reliability of the device, and provides a practical solution for the widespread application of N-face GaN / AlGaN heterojunction devices.

[0067] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like to indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0068] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature identified as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined.

[0069] Descriptions with reference to the terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" mean that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any suitable manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification.

[0070] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art of the present invention, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be considered to fall within the scope of protection of the present invention.

Claims

1. A lateral JTE diode based on an N-face GaN / AlGaN heterojunction, characterized in that: include: An epitaxial structure comprising at least an N-face unintentionally doped GaN channel layer; A P-type JTE layer, an anode, and a cathode located on the surface of the N-face unintentionally doped GaN channel layer; wherein the anode and the P-type JTE layer are located in the anode region, the P-type JTE layer includes a first sub-portion and a second sub-portion arranged at intervals, the anode metal layer covers a portion of the first sub-portion, a portion of the second sub-portion, and the channel region between the two sub-portions, and the positive projection of the cathode in a first direction is a ring; the first direction is a direction perpendicular to the plane of the epitaxial structure; A passivation layer covers the surface of the N-side non-intentionally doped GaN channel layer and a portion of the cathode.

2. The lateral JTE diode based on the N-face GaN / AlGaN heterojunction according to claim 1, characterized in that: The material of the P-type JTE layer includes Mg-doped N-face P-GaN with a doping concentration of 4×10 16 ~2×10 19 cm -3 .

3. The lateral JTE diode based on the N-face GaN / AlGaN heterojunction according to claim 2, characterized in that: The passivation layer covers the sidewall and a portion of the upper surface of the first subsection on a side away from the second subsection, and the sidewall and a portion of the upper surface of the second subsection on a side away from the first subsection.

4. The lateral JTE diode based on the N-face GaN / AlGaN heterojunction according to claim 1, characterized in that: The material of the P-type JTE layer includes P-NiO, P-Cu2O or P-BN.

5. The lateral JTE diode based on the N-face GaN / AlGaN heterojunction according to claim 4, characterized in that: The first sub-portion and the second sub-portion are both stepped, wherein the stepped portion of the first sub-portion away from the second sub-portion partially covers the passivation layer, and the stepped portion of the second sub-portion away from the first sub-portion partially covers the passivation layer.

6. The lateral JTE diode based on the N-face GaN / AlGaN heterojunction according to claim 1, characterized in that: The epitaxial structure further comprises a substrate layer, an N-face unintentionally doped GaN buffer layer, a Si-doped N-face AlGaN barrier layer and an N-face unintentionally doped AlGaN barrier layer stacked sequentially from bottom to top, wherein the N-face unintentionally doped GaN channel layer is located on the upper surface of the N-face unintentionally doped AlGaN barrier layer; The lateral JTE diode further includes an isolation region located at the periphery of the active region and extending from the N-face unintentionally doped GaN channel layer to the N-face unintentionally doped GaN buffer layer in the first direction.

7. The lateral JTE diode based on the N-face GaN / AlGaN heterojunction according to claim 6, characterized in that: The thickness of the N-side unintentionally doped GaN buffer layer is 300-600 nm, the thickness of the Si-doped N-side AlGaN barrier layer is 20-50 nm, the thickness of the N-side unintentionally doped AlGaN barrier layer is 15-35 nm, and the thickness of the N-side unintentionally doped GaN channel layer is 10-90 nm.

8. A method for preparing a lateral JTE diode based on an N-face GaN / AlGaN heterojunction according to any one of claims 1 to 7, characterized in that: include: Providing a substrate layer, and sequentially growing an N-face unintentionally doped GaN buffer layer, a Si-doped N-face AlGaN barrier layer, an N-face unintentionally doped AlGaN barrier layer, and an N-face unintentionally doped GaN channel layer on the surface of the substrate layer to form an epitaxial structure; Vapor depositing a cathode ohmic metal layer in a cathode region on a surface of the N-face unintentionally doped GaN channel layer to form a cathode, wherein the positive projection of the cathode in the first direction is a ring; An isolation region is formed around the active region of the device by ion implantation; Depositing a passivation layer on the surface of the device, opening holes in the passivation layer in the cathode region and the anode region, and then evaporating an anode metal layer in the anode region to form an anode; The method further comprises: Before the step of evaporating a cathode ohmic metal layer in the cathode region on the surface of the N-face unintentionally doped GaN channel layer to form a cathode, a P-type JTE layer is formed in the anode region on the surface of the N-face unintentionally doped GaN channel layer according to the material of the P-type JTE layer; or, before the step of evaporating an anode metal layer in the anode region to form an anode, a P-type JTE layer is formed in the anode region; The P-type JTE layer includes a first sub-portion and a second sub-portion arranged at intervals, and the anode metal layer covers a portion of the first sub-portion, a portion of the second sub-portion, and a channel region between the two sub-portions.

9. The method for preparing a lateral JTE diode based on an N-face GaN / AlGaN heterojunction according to claim 8, characterized in that: When the material of the P-type JTE layer includes Mg-doped N-face P-GaN, before the step of evaporating a cathode ohmic metal layer in the cathode region on the surface of the N-face unintentionally doped GaN channel layer to form a cathode, a Mg-doped N-face P-GaN layer is grown on the surface of the N-face unintentionally doped GaN channel layer, and a P-type JTE layer is formed in the anode region by etching; The first subsection and the second subsection are strip-shaped, and the passivation layer covers the sidewall and part of the upper surface of the first subsection away from the second subsection, and the sidewall and part of the upper surface of the second subsection away from the first subsection.

10. The method for preparing a lateral JTE diode based on an N-face GaN / AlGaN heterojunction according to claim 8, characterized in that: When the material of the P-type JTE layer includes P-NiO, P-Cu2O or P-BN, before the step of evaporating the anode metal layer in the anode region to form the anode, P-NiO, P-Cu2O or P-BN is sputtered in the anode region on the surface of the N-face unintentionally doped GaN channel layer to form the P-type JTE layer; The first sub-portion and the second sub-portion are both stepped, the stepped portion of the first sub-portion away from the second sub-portion partially covers the passivation layer, and the stepped portion of the second sub-portion away from the first sub-portion partially covers the passivation layer.

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