ATE embedded wafer defect detection method and device based on PSO-SVM

Abstract

The embodiment of the specification provides an ATE embedded wafer defect detection method and device based on PSO-SVM, wherein the method comprises the following steps: acquiring historical data, marking the historical data to determine marked historical data, and establishing a benchmark defect detection model; integrating the marked historical data to determine an original data set, and performing feature engineering and data normalization on the original data set to determine target data; performing PSO-SVM joint optimization training based on the target data and the benchmark defect detection model to determine an SVM defect detection model; acquiring real-time test data, performing defect detection based on the real-time test data and the SVM defect detection model, and determining a defect detection result. By constructing a high-dimensional feature vector based on dynamic electrical parameters generated in a CP test process, and performing efficient classification by using a PSO-SVM model, early and intelligent identification of wafer defects is realized.

Description

TECHNICAL FIELD

[0001] Embodiments of the present specification relate to the chip technical field, and particularly relate to an ATE-embedded wafer defect detection method based on PSO-SVM. BACKGROUND

[0002] In the integrated circuit industry, wafer-level testing is a key line of defense to ensure product quality and reliability. Among them, the wafer probe test (CP Test) as the core electrical performance verification link before packaging, its effectiveness directly affects the yield and cost of the final product. This testing technology relies on a highly automated precision system: the automatic test equipment (ATE) as the control core, through the precise positioning of the probe station and the physical contact of the probe card, the electrical signal excitation and response of each independent chip unit (Die) are collected. ATE makes a preliminary judgment of "qualified" or "unqualified" for Die according to the preset specification parameters, aiming to screen out failed units early and avoid them entering the expensive subsequent process.

[0003] In order to extract deeper insights from massive test data, the industry has introduced deep learning technology, especially for analyzing the wafer map generated after CP test. Convolutional neural network (CNN) and other models can realize the automatic classification of macro defect types by learning the specific spatial distribution patterns (such as center, ring, scratch, etc.) of failed Die on the wafer map. This "post-diagnosis" method provides engineers with analysis basis for the root cause of yield loss, thereby guiding the improvement of upstream processes.

[0004] Although the existing wafer test and defect analysis technology framework is mature, its inherent defects become increasingly apparent in the face of increasingly stringent manufacturing challenges. First, the existing analysis method has significant time lag. Whether it is a traditional threshold judgment or a wafer map (Wafer Map) analysis based on convolutional neural network (CNN), it belongs to the "post-diagnosis" mode, which cannot provide real-time early warning for potential or evolving defects during the test process, missing the opportunity for early intervention and dynamic adjustment of test strategy. Secondly, the intrinsic value of massive dynamic test data has not been fully utilized. The automatic test equipment (ATE) generates rich parameter time series when testing each Die, which contains the evolution trajectory of the chip health status, but traditional methods mostly ignore the deep mining of the overall dynamic behavior and complex interaction of these sequences, resulting in insufficient recognition ability of early defect signs.

[0005] In addition, the selected analysis model is mismatched with the data characteristics, and there is a performance optimization problem in the application. For example, CNN is good at processing spatial features of images, but its structure is difficult to effectively capture the temporal dynamic clues that are crucial to reveal early functional decline or process drift. For machine learning models such as support vector machine (SVM) that are more suitable for processing high-dimensional classification tasks, their performance is highly dependent on the selection of hyperparameters. In complex test data scenarios, relying on inefficient manual parameter tuning or grid search, it is difficult to quickly find the optimal parameter combination, which greatly limits its practical application potential in the pursuit of efficient and accurate industrial production environment.

[0006] Therefore, a better solution is needed. SUMMARY

[0007] Therefore, the ATE embedded wafer defect detection method based on PSO-SVM is provided in the embodiments of the present specification. One or more embodiments of the present specification also relate to an ATE embedded wafer defect detection device based on PSO-SVM, a computing device, a computer readable storage medium, and a computer program to solve the technical defects in the prior art.

[0008] According to a first aspect of the embodiments of the present specification, an ATE embedded wafer defect detection method based on PSO-SVM is provided, comprising:

[0009] acquiring historical data and labeling to determine labeled historical data, and establishing a benchmark defect detection model;

[0010] integrating based on the labeled historical data to determine an original data set, and performing feature engineering and data normalization on the original data set to determine a target data;

[0011] performing PSO-SVM joint optimization training based on the target data and the benchmark defect detection model to determine an SVM defect detection model;

[0012] acquiring real-time test data, performing defect detection based on the real-time test data and the SVM defect detection model to determine a defect detection result.

[0013] In one possible implementation, acquiring historical data and labeling to determine labeled historical data comprises:

[0014] acquiring historical data; wherein the historical data comprises historical CP test data;

[0015] assigning a true label to the historical CP test data of each Die; wherein the confidence of the true label is within a set confidence interval.

[0016] In one possible implementation, integrating based on the labeled historical data to determine an original data set comprises:

[0017] Based on the analysis of the labeled historical data, a set of multi-dimensional electrical parameters is determined, wherein the set of multi-dimensional electrical parameters is related to the defect mode;

[0018] The original data set is determined by integrating the set of multi-dimensional electrical parameters and the metadata.

[0019] In a possible implementation, the feature engineering and data normalization are performed on the original data set to determine the target data, including:

[0020] The high-dimensional feature vector is determined by performing feature calculation on the original data set;

[0021] The cleaning data is determined by performing data cleaning based on the high-dimensional feature vector;

[0022] The target data is determined by standardizing or normalizing the cleaning data.

[0023] In a possible implementation, the SVM defect detection model is determined by performing PSO-SVM joint optimization training based on the target data and the benchmark defect detection model, including:

[0024] The training data set, the verification data set and the test data set are constructed based on the target data;

[0025] The population containing a set number of particles is initialized based on the training data set;

[0026] The fitness of each particle in the population is evaluated to determine the fitness;

[0027] The updated position is determined by comparing the fitness with the historical fitness;

[0028] Based on the updated position and the update formula, the velocity and position of each particle are updated by combining the inertia weight, the individual learning factor and the group learning factor, and introducing a random number;

[0029] The training process is stopped based on the iteration condition, and the optimal parameter is obtained based on the position;

[0030] The SVM defect detection model is determined by retraining based on the optimal parameter and the training data set.

[0031] In a possible implementation, it further includes:

[0032] The performance index is determined by comparing the verification result with the defect detection result within a set period;

[0033] When the labeled update data reaches a preset number or the model performance is determined to be decreased based on the performance index, the SVM defect detection model is retrained by the labeled update data and the labeled historical data.

[0034] In a possible implementation, the defect detection result includes at least one of parameter drift, early breakdown, poor contact, and logic function failure.

[0035] According to a second aspect of the embodiments of the present specification, an ATE-embedded wafer defect detection device based on PSO-SVM is provided, comprising:

[0036] a data acquisition module configured to acquire historical data, determine labeled historical data, and establish a benchmark defect detection model;

[0037] a data construction module configured to integrate original data sets based on the labeled historical data, and perform feature engineering and data normalization on the original data sets to determine target data;

[0038] a model training module configured to perform PSO-SVM joint optimization training based on the target data and the benchmark defect detection model to determine an SVM defect detection model;

[0039] a defect detection module configured to acquire real-time test data, perform defect detection based on the real-time test data and the SVM defect detection model, and determine a defect detection result.

[0040] According to a third aspect of the embodiments of the present specification, a computing device is provided, comprising:

[0041] a memory and a processor;

[0042] The memory is configured to store computer executable instructions, and the processor is configured to execute the computer executable instructions, and the computer executable instructions, when executed by the processor, implement the steps of the ATE-embedded wafer defect detection method based on PSO-SVM.

[0043] According to a fourth aspect of the embodiments of the present specification, a computer readable storage medium is provided, which stores computer executable instructions, and the instructions, when executed by a processor, implement the steps of the ATE-embedded wafer defect detection method based on PSO-SVM.

[0044] According to a fifth aspect of the embodiments of the present specification, a computer program is provided, wherein when the computer program is executed in a computer, the computer program causes the computer to execute the steps of the ATE-embedded wafer defect detection method based on PSO-SVM.

[0045] The embodiment of the present specification provides an ATE embedded wafer defect detection method and device based on PSO-SVM, wherein the method comprises: acquiring historical data and marking to determine marked historical data, and establishing a benchmark defect detection model; based on the marked historical data, the original data set is determined by integration, and the target data is determined by feature engineering and data normalization on the original data set; based on the target data and the benchmark defect detection model, the PSO-SVM joint optimization training is performed to determine the SVM defect detection model; real-time test data is acquired, and the defect detection is performed based on the real-time test data and the SVM defect detection model to determine the defect detection result. By constructing a high-dimensional feature vector based on the dynamic electrical parameters generated in the CP test process, and using the PSO-SVM model for efficient classification, early and intelligent identification of wafer defects is realized. BRIEF DESCRIPTION OF DRAWINGS

[0046] Figure 1 is a flowchart of an ATE embedded wafer defect detection method based on PSO-SVM provided by an embodiment of the present specification;

[0047] Figure 2 is a principle diagram of an ATE embedded wafer defect detection method based on PSO-SVM provided by an embodiment of the present specification;

[0048] Figure 3 is a model training process schematic diagram of an ATE embedded wafer defect detection method based on PSO-SVM provided by an embodiment of the present specification;

[0049] Figure 4 is an online defect identification and decision schematic diagram of an ATE embedded wafer defect detection method based on PSO-SVM provided by an embodiment of the present specification;

[0050] Figure 5 is a structure schematic diagram of an ATE embedded wafer defect detection device based on PSO-SVM provided by an embodiment of the present specification;

[0051] Figure 6 is a structure block diagram of a computing device provided by an embodiment of the present specification. DETAILED DESCRIPTION

[0052] In the following description, many specific details are set forth in order to provide a thorough understanding of the present specification. However, the present specification can be practiced in many different ways beyond the specific embodiments described herein, and it is understood that persons having ordinary skill in the art can make similar modifications without departing from the scope of the present specification.

[0053] The terminology used in this disclosure of one or more embodiments is for the purpose of describing particular embodiments only and is not intended to be limiting of one or more embodiments of the disclosure. As used in this disclosure and the appended claims, the singular forms "a," "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0054] It is to be understood that, although the terms first, second, etc. can be used herein to describe various information, these terms are not intended to denote a temporal or chronological order. Rather, these terms are used solely to distinguish one from another only. For example, a first entity discussed below could later be discussed as a second entity, and similarly, a second entity discussed below could later be discussed as a first entity without departing from the scope of one or more embodiments. As used herein, the term "if' can be interpreted to mean "when" or "upon" or "in response to determining" taking into account the context in which the term is used.

[0055] In the present specification, a PSO-SVM-based ATE embedded wafer defect detection method is provided, and the present specification also relates to a PSO-SVM-based ATE embedded wafer defect detection device, a computing device, and a computer-readable storage medium, which are described in detail one by one in the following embodiments.

[0056] Referring to Figure 1 , Figure 1 A flowchart of a PSO-SVM-based ATE embedded wafer defect detection method according to one embodiment of the present specification is shown, which specifically includes the following steps.

[0057] Step 101: Obtain historical data and perform labeling to determine labeled historical data, and establish a baseline defect detection model.

[0058] In actual application, the preparation and baseline establishment stage provides a basis for the establishment of the entire intelligent detection system, including data preparation, environment configuration, and determination of performance baseline.

[0059] In one possible implementation, obtaining historical data and performing labeling to determine labeled historical data includes: obtaining historical data; wherein the historical data includes historical CP test data; and assigning a true label to the historical CP test data of each Die; wherein the confidence of the true label is within a set confidence interval.

[0060] In practical applications, a large amount of representative historical CP test data is collected. The key is to label these data with high quality, that is, to assign a high-confidence true label ("normal Die" or "defective Die") to each Die's test data. Configure the necessary computing environment on the ATE system or its collaborative server, including Python, related machine learning libraries (such as Scikit-learn), and optimization algorithm libraries. At the same time, a baseline defect detection model is established.

[0061] Step 102: Based on the labeled historical data, determine the original data set, and perform feature engineering and data normalization on the original data set to determine the target data.

[0062] In practical applications, real-time construction and fine processing of high-dimensional electrical characteristic vectors. This step aims to extract rich and reliable original electrical parameters from the ATE test flow and convert them into a purified static high-dimensional feature vector that can fully represent the health status of a single Die.

[0063] In one possible implementation, based on the labeled historical data, the original data set is determined by integrating, including: based on the labeled historical data, analyzing and determining a set of multi-dimensional electrical parameters; wherein the set of multi-dimensional electrical parameters is related to a defect mode; based on the set of multi-dimensional electrical parameters and the metadata, the original data set is determined by integration.

[0064] In practical applications, based on in-depth analysis of semiconductor device physics, failure mechanisms, and historical defect data, a set of multi-dimensional electrical parameters highly related to various key defect modes (such as parameter drift, early breakdown, poor contact, and weak logic function failure) is defined; see Figure 2 After the ATE completes the entire CP test flow for a single Die, the system needs to automatically trigger the data integration program. This program integrates all the values measured by the Die in all related test steps within the aforementioned parameter space, along with its metadata (X-Y coordinates, test time, probe card information, etc.), into a complete single Die original data set.

[0065] In one possible implementation, the original data set is subjected to feature engineering and data normalization to determine the target data, including: performing feature calculation on the original data set to determine a high-dimensional feature vector; based on the high-dimensional feature vector, performing data cleaning to determine cleaned data; and performing standardization or normalization on the cleaned data to determine the target data.

[0066] In practical applications, the original data set of each Die is subjected to feature engineering, K key parameter values are taken as basic features, and statistical quantities (mean, standard deviation, etc.) or derived features are calculated, and finally a fixed-dimension high-dimensional feature vector is condensed; the constructed feature vector is subjected to robust data cleaning. For example, missing values caused by test skipping or measurement errors are filled by using a K-nearest neighbor (KNN) algorithm or multiple imputation method, which is more accurate than simple mean filling; in order to eliminate the influence of the dimension and numerical range difference between different features on the SVM model (especially when the RBF kernel is used), all dimensions of the feature vector must be normalized or standardized.

[0067] Step 103: performing PSO-SVM joint optimization training based on the target data and the benchmark defect detection model to determine the SVM defect detection model.

[0068] In practical applications, the PSO-SVM defect detection model is offline trained and globally optimized, and this step is the core algorithm link of the present application. By using historical labeled data, the particle swarm optimization (PSO) algorithm is used to automatically and efficiently search for the optimal hyperparameter combination of the support vector machine (SVM), and a high-performance defect classifier is trained.

[0069] In one possible implementation, the PSO-SVM joint optimization training based on the target data and the benchmark defect detection model is performed to determine the SVM defect detection model, including: constructing a training data set, a verification data set and a test data set based on the target data; initializing a population containing a set number of particles based on the training data set; performing fitness evaluation on each particle in the population to determine the fitness; comparing the fitness with the historical fitness to determine the updated position; updating the speed and position of each particle based on the updated position and the update formula, combining the inertia weight, the individual learning factor and the group learning factor, and introducing a random number; stopping the training process based on an iteration condition, and obtaining the optimal parameters based on the position; retraining based on the optimal parameters and the training data set to determine the SVM defect detection model.

[0070] In practical applications, the training, verification and test data sets are constructed. The historical labeled data set prepared in the above step is randomly divided into a training set, a verification set and an independent test set according to standard machine learning practices.

[0071] Further, referring to Figure 3 , the PSO-SVM joint optimization training is performed, and a population containing N particles is initialized. The position vector of each particle is In a predetermined reasonable search range (for example, C is in [0.1, 1000], and g is in [0.1, 10]), the position vector of each particle is randomly initialized within the search range. are randomly generated within the logarithmic space of [0.001, 10]. The velocity vector of each particle is also randomly initialized. The iteration is terminated when a preset maximum number of iterations is reached or the fitness value does not improve significantly for a number of consecutive generations. In each iteration: 1. Fitness evaluation: for each particle i in the particle swarm, its current position represents a parameter pair, a temporary SVM model is trained on the training set. Then, the model is used to make predictions on the validation set, and its fitness value is calculated. 2. Individual and global optimum update: the fitness value of the particle is compared with its own historical optimal fitness value . If it is better, the historical optimal position of the particle is updated . At the same time, the fitness value of the particle is compared with the global optimal fitness value of the entire particle swarm . If it is better, the global optimal position is updated . 3. Velocity and position update: the velocity and position of each particle are updated according to the standard PSO velocity and position update formula, combined with the inertia weight, individual learning factor and group learning factor, and introducing random numbers. This process simulates the approach of the particle to its own historical optimal position and the group historical optimal position, while maintaining a certain exploration ability. When the iteration loop is terminated, the global optimal position corresponding to the hyperparameter combination is the optimal solution found by this optimization search. Using this optimal parameter, the final, performance-optimized SVM defect detection model is retrained on the complete training set, and is persistently saved for deployment.

[0072] Step 104: Obtain real-time test data, perform defect detection based on the real-time test data and the SVM defect detection model, and determine the defect detection result.

[0073] In actual application, model deployment and online real-time inference, this step describes deploying the trained model to the actual ATE production environment, and deeply integrating with the test process to realize real-time, automatic defect recognition for each die under test.

[0074] Specifically, refer to Figure 4The SVM model with optimal hyperparameters trained and validated in the above steps is deployed. The model and its related pre-processing parameters (e.g. normalization parameters) are encapsulated into a callable service or library; upon completion of the full test flow for a new Die, the system automatically triggers an online inference procedure. The procedure first collects and processes the electrical parameters of the Die in real time, constructing its high-dimensional feature vector, according to the method described in the above steps. The constructed feature vector is input into the deployed PSO-SVM model, and the final output of the defect detection result includes at least one of the following: parameter drift, early breakdown, poor contact, and logic function failure.

[0075] In a possible implementation, the method further includes: comparing the validation result with the defect detection result within a set period to determine a performance indicator; and retraining the SVM defect detection model by using the labeled update data and the labeled historical data when the labeled update data reaches a preset quantity or the performance of the model is determined to be degraded based on the performance indicator.

[0076] In actual applications, the model performance monitoring and the continuous self-evolution closed loop, the step ensures the long-term effectiveness and adaptability of the model in the dynamic and evolving production environment, and realizes the continuous learning and self-improvement of the system.

[0077] Specifically, an automated data pipeline is established to regularly compare the subsequent more reliable validation results (e.g. pass / fail results of final test FT or conclusions of physical failure analysis FA) of the Die predicted by the PSO-SVM model with the original prediction of the model. The system should continuously calculate and monitor the online performance indicators of the model, such as accuracy, precision, recall, F1 score and confusion matrix, etc.; a threshold value of performance monitoring is set. When a sufficient number of new labeled data with high value (especially those "difficult example" samples that the model previously predicted incorrectly) are accumulated, or the online performance indicators of the model are monitored to have a significant and continuous decline (which may indicate that a process drift has occurred or a new type of defect pattern that the model has never seen before has appeared), the system should be able to automatically or semi-automatically trigger the re-optimization process of the model; once the re-optimization is triggered, the system returns to the training step and uses the updated and more comprehensive historical data set (which already contains new feedback data) to perform a new round of PSO-SVM training. This will obtain a new version of the model with better performance and better adaptability. After rigorous offline validation, the new model can be redeployed to the production environment to replace the old model, thereby completing a complete, data-driven self-evolution iteration.

[0078] The present application realizes the strategic shift from traditional hard threshold decision or complex sequence modeling to efficient optimization classification method. The basis is that through systematic feature engineering, the massive, multi-dimensional dynamic electrical parameters generated by ATE in the process of testing a single Die are condensed into a static high-dimensional feature vector that can fully represent the health status of the Die, laying a rich and effective data foundation for subsequent advanced machine learning applications.

[0079] The core highlight of the present application is to overcome the performance optimization bottleneck of support vector machine (SVM) in industrial applications. By creatively coupling particle swarm optimization algorithm (PSO) and SVM classifier, an automatic optimization framework is constructed. The framework takes the classification performance of SVM as the fitness function, and uses the swarm intelligence of PSO to efficiently search for the optimal combination of penalty factor C and kernel function parameter gamma in the multi-dimensional parameter space, thereby ensuring that the classification model has the best performance for specific data sets.

[0080] Further, through comprehensive learning and feature construction of multi-parameter dynamic behavior, the present application significantly expands the dimension of defect representation. This enables the model to effectively identify complex, marginal and evolving defect patterns that are caused by the synergistic action of multiple parameters and each within the tolerance range. These defects are blind spots that traditional methods cannot detect, so the present application greatly improves the sensitivity and robustness of the detection.

[0081] The innovation of the present application also lies in its complete systematic design. The scheme not only includes an offline optimal model construction process, but also designs a set of online real-time reasoning, adaptive decision-making and continuous optimization application scheme. This enables the trained model to be seamlessly integrated into the ATE system for real-time intelligent diagnosis of each Die, and to perform differentiated operations (such as intelligent Bin) according to the confidence of the prediction results, and ultimately to realize continuous self-evolution of the system through data backflow and model retraining, to adapt to the continuous evolution of manufacturing processes.

[0082] The implementation of the present application, by deeply integrating the global search ability of particle swarm optimization with the powerful classification performance of support vector machine, and embedding it in the ATE test process, is expected to produce a series of significant technical results and application value.

[0083] First, in terms of detection accuracy and sensitivity, it will achieve a qualitative leap. With the help of PSO algorithm for automatic global optimization of SVM hyperparameters, the classifier constructed by this method can establish a more accurate and robust decision boundary. This enables it to effectively identify complex and marginal defects composed of multiple parameter micro-collaborative shifts that are difficult to capture by traditional hard threshold methods, thereby fundamentally improving defect detection rate and reducing the risk of misjudgment and omission.

[0084] Secondly, the efficiency of model development and deployment will be greatly improved. The introduction of PSO will transform the originally tedious, time-consuming and expert experience-dependent SVM parameter optimization process into an efficient and automated optimization process. This not only greatly shortens the development and iteration cycle of high-performance detection models, but also reduces the dependence on specific field expert skills, making the large-scale industrial application of advanced machine learning methods possible.

[0085] Furthermore, the present application can drive significant optimization of test efficiency and manufacturing cost. Early and high-confidence identification of potential failure dies enables the ATE system to perform intelligent adaptive test strategies. For example, simplified confirmation tests can be performed on high-risk dies, or additional diagnostic tests can be performed on dies in the "borderline" state, thereby optimizing the allocation of test time. At the same time, more accurate rejection of all defective dies before packaging directly avoids the waste of costs caused by the flow of defective dies into subsequent expensive processes, and reduces the huge business risk caused by potential market returns.

[0086] In addition, the present application will become a powerful tool for accelerating process control (APC) and yield ramping. By continuously monitoring the defect patterns, proportions and distribution trends of the wafer identified by the PSO-SVM model, the system can provide fast and quantitative data feedback for small fluctuations or equipment state changes in upstream manufacturing processes (such as lithography, etching, etc.). This efficient feedback loop helps process engineers quickly diagnose the root cause of the problem, verify the effectiveness of improvement measures, and thus accelerate the optimization iteration of the process and the stable improvement of the overall production yield.

[0087] Finally, the present application will significantly improve the intelligence level and decision-making ability of the ATE system. It not only provides a binary "qualified / unqualified" judgment, but also can output a classification result with confidence information. This information can be used to guide a more detailed and risk-forecasting intelligent Bin strategy, thereby realizing the paradigm shift from "deterministic judgment" to "probabilistic risk management" in test decision-making, and injecting new vitality into semiconductor intelligent manufacturing.

[0088] Corresponding to the above method embodiments, the present specification also provides PSO-SVM ATE embedded wafer defect detection device embodiments, Figure 5 A structure diagram of a PSO-SVM ATE embedded wafer defect detection device provided by an embodiment of the present specification is shown. As shown in Figure 5 The device comprises:

[0089] The data acquisition module 501 is configured to acquire historical data, determine labeled historical data, and establish a benchmark defect detection model.

[0090] The data construction module 502 is configured to determine an original data set based on the labeled historical data, and perform feature engineering and data normalization on the original data set to determine target data.

[0091] The model training module 503 is configured to perform PSO-SVM joint optimization training based on the target data and a benchmark defect detection model to determine an SVM defect detection model.

[0092] The defect detection module 504 is configured to acquire real-time test data, perform defect detection based on the real-time test data and the SVM defect detection model, and determine a defect detection result.

[0093] In a possible implementation, the historical data is acquired and labeled to determine labeled historical data, which includes:

[0094] The historical data is acquired, wherein the historical data includes historical CP test data.

[0095] A true label is assigned to the historical CP test data of each Die, wherein the confidence of the true label is within a set confidence interval.

[0096] In a possible implementation, the original data set is determined based on the labeled historical data, which includes:

[0097] The labeled historical data is analyzed to determine a multi-dimensional electrical parameter set, wherein the multi-dimensional electrical parameter set is related to a defect mode.

[0098] The original data set is determined based on the multi-dimensional electrical parameter set and metadata.

[0099] In a possible implementation, the target data is determined by performing feature engineering and data normalization on the original data set, which includes:

[0100] The original data set is subjected to feature calculation to determine a high-dimensional feature vector.

[0101] The high-dimensional feature vector is subjected to data cleaning to determine cleaned data.

[0102] The cleaned data is subjected to standardization or normalization to determine the target data.

[0103] In a possible implementation, the SVM defect detection model is determined based on the target data and the benchmark defect detection model by performing PSO-SVM joint optimization training, which includes:

[0104] The target data is used to construct a training data set, a verification data set, and a test data set.

[0105] A population containing a set number of particles is initialized based on the training data set.

[0106] performing fitness evaluation on each particle in the population to determine the fitness;

[0107] performing comparison between the fitness and the historical fitness to determine the update position;

[0108] updating the speed and position of each particle based on the update position and the update formula, combining the inertia weight, the individual learning factor and the group learning factor, and introducing the random number;

[0109] stopping the training process based on the iteration condition, and obtaining the optimal parameter based on the position;

[0110] retraining based on the optimal parameter and the training data set to determine the SVM defect detection model.

[0111] In a possible implementation, the method further includes:

[0112] performing comparison between the verification result and the defect detection result within a set period to determine the performance index;

[0113] when the labeled update data reaches a preset quantity or the model performance is determined to be degraded based on the performance index, retraining the SVM defect detection model by using the labeled update data and the labeled historical data.

[0114] In a possible implementation, the defect detection result includes at least one of parameter drift, early breakdown, poor contact and logic function failure.

[0115] The above is a schematic scheme of the PSO-SVM ATE embedded wafer defect detection device of the embodiment. It should be noted that the technical scheme of the PSO-SVM ATE embedded wafer defect detection device belongs to the same concept as the technical scheme of the PSO-SVM ATE embedded wafer defect detection method described above, and the technical scheme of the PSO-SVM ATE embedded wafer defect detection device that is not described in detail can be referred to the description of the technical scheme of the PSO-SVM ATE embedded wafer defect detection method.

[0116] Figure 6 A structural block diagram of a computing device 600 is shown according to one embodiment of the present specification. The components of the computing device 600 include but are not limited to a memory 610 and a processor 620. The processor 620 is connected to the memory 610 through a bus 630, and a database 650 is used to save data.

[0117] The computing device 600 also includes an access device 640 that enables the computing device 600 to communicate via one or more networks 660. Examples of such networks include a public switched telephone network (PSTN), a local area network (LAN), a wide area network (WAN), a personal area network (PAN), or combinations of such networks, such as the Internet. The access device 640 can include one or more of any type of network interface (for example, a network interface card (NIC)) such as a wired or wireless network interface, such as an IEEE 802.11 wireless local area network (WLAN) wireless interface, a Worldwide Interoperability for Microwave Access (Wi-MAX) interface, an Ethernet interface, a Universal Serial Bus (USB) interface, a cellular network interface, a Bluetooth interface, a Near Field Communication (NFC).

[0118] In one embodiment of the present specification, the above-described components of the computing device 600 and other components not shown in the Figure 6 may be connected to each other, such as through a bus. It should be understood that Figure 6 The computing device structure diagram shown is for the purpose of example only, and is not a limitation on the scope of the present specification. Other components can be added or replaced as needed by those skilled in the art.

[0119] The computing device 600 can be any type of stationary or mobile computing device, including a mobile computer or mobile computing device (for example, a tablet computer, a personal digital assistant, a laptop computer, a notebook computer, a netbook, and the like), a mobile phone (for example, a smartphone), a wearable computing device (for example, a smartwatch, smart glasses, and the like), or other types of mobile devices, or a stationary computing device such as a desktop computer or a personal computer (PC). The computing device 600 can also be a mobile or stationary server.

[0120] The processor 620 is configured to execute computer-executable instructions, which, when executed by the processor, implement the steps of the PSO-SVM-based ATE embedded wafer defect detection method described above. The above is a schematic solution of the computing device of the embodiment. It should be noted that the technical solution of the computing device and the technical solution of the PSO-SVM-based ATE embedded wafer defect detection method described above belong to the same concept, and the details of the technical solution of the computing device that are not described in detail can be referred to the description of the technical solution of the PSO-SVM-based ATE embedded wafer defect detection method.

[0121] An embodiment of the present specification also provides a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the steps of the PSO-SVM-based ATE embedded wafer defect detection method described above.

[0122] The above is a schematic solution of the computer-readable storage medium of the embodiment. It should be noted that the technical solution of the storage medium and the technical solution of the PSO-SVM-based ATE embedded wafer defect detection method described above belong to the same concept, and the details of the technical solution of the storage medium that are not described in detail can be referred to the description of the technical solution of the PSO-SVM-based ATE embedded wafer defect detection method.

[0123] An embodiment of the present specification also provides a computer program, which, when executed in a computer, causes the computer to perform the steps of the PSO-SVM-based ATE embedded wafer defect detection method described above.

[0124] The above is a schematic solution of the computer program of the embodiment. It should be noted that the technical solution of the computer program and the technical solution of the PSO-SVM-based ATE embedded wafer defect detection method described above belong to the same concept, and the details of the technical solution of the computer program that are not described in detail can be referred to the description of the technical solution of the PSO-SVM-based ATE embedded wafer defect detection method.

[0125] The specific embodiments of the present specification are described above. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims can be performed in a different order and still achieve desirable results. Additionally, the process depicted in the figures does not necessarily require the particular order shown, or sequential order to achieve desirable results. In certain implementations, multitasking and parallel processing can be advantageous.

[0126] The computer readable medium can include any entity or apparatus capable of carrying the computer program code, recording medium, U disk, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal, software distribution medium, etc. It should be noted that the computer readable medium can include appropriate additions or subtractions according to the requirements of legislation and patent practice in the jurisdiction, for example, in some jurisdictions, according to legislation and patent practice, the computer readable medium does not include electrical carrier signals and telecommunication signals.

[0127] It should be noted that for the foregoing method embodiments, the descriptions are expressed as a combination of a series of actions for the sake of simplicity and brevity, but those skilled in the art should appreciate that the embodiments of the present specification are not limited by the order of the described actions, because according to the embodiments of the present specification, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should appreciate that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily essential to the embodiments of the present specification.

[0128] In the above embodiments, the description of each embodiment has its own focus, and the parts not described in detail in a certain embodiment can be referred to the related description of other embodiments.

[0129] The preferred embodiments of the present specification disclosed above are only used to help explain the present specification. The alternative embodiments do not describe all the details and limit the invention to the specific embodiments described. Obviously, according to the content of the embodiments of the present specification, many modifications and changes can be made. The present specification selects and describes these embodiments in order to better explain the principles and practical applications of the embodiments of the present specification, so that those skilled in the art can well understand and use the present specification. The present specification is limited by the claims and their full scope and equivalents.

Claims

1. A PSO-SVM-based ATE embedded wafer defect detection method, characterized in that, The method comprises the following steps: acquiring historical data and labeling the historical data to determine labeled historical data, and establishing a benchmark defect detection model; integrating the labeled historical data to determine an original data set, and performing feature engineering and data normalization on the original data set to determine target data; performing PSO-SVM joint optimization training based on the target data and the benchmark defect detection model to determine an SVM defect detection model; acquiring real-time test data, and performing defect detection based on the real-time test data and the SVM defect detection model to determine a defect detection result; the step of integrating the labeled historical data to determine an original data set comprises: analyzing the labeled historical data to determine a set of multi-dimensional electrical parameters; wherein the set of multi-dimensional electrical parameters is related to a defect mode, the defect mode is a mode determined based on a defect category of the wafer, and the defect mode includes parameter drift, early breakdown, poor contact, and weak logic function failure; integrating the set of multi-dimensional electrical parameters and metadata to determine an original data set; wherein the metadata includes coordinates, test time, and probe card information; the step of performing feature engineering and data normalization on the original data set to determine target data comprises: performing feature calculation on the original data set to determine a high-dimensional feature vector; performing data cleaning based on the high-dimensional feature vector to determine cleaned data; performing standardization or normalization on the cleaned data to determine target data.

2. The method of claim 1, wherein, the step of acquiring historical data and labeling the historical data to determine labeled historical data comprises: acquiring historical data; wherein the historical data includes historical CP test data; assigning a true label to the historical CP test data of each Die; wherein the true label is pre-set with a confidence level, and the confidence level is within a set confidence level interval.

3. The method of claim 1, wherein, the step of performing PSO-SVM joint optimization training based on the target data and the benchmark defect detection model to determine an SVM defect detection model comprises: constructing a training data set, a validation data set, and a test data set based on the target data; initializing a population based on the training data set; wherein the population contains a set number of particles; performing fitness evaluation on each particle in the population to determine fitness; wherein the fitness evaluation is used to determine the fitness of the particle; comparing the fitness with a historical fitness to determine an updated position; updating the speed and position of each particle based on the updated position and an update formula, combining the inertia weight, individual learning factor, and group learning factor of PSO, and introducing a random number; stopping the training process based on an iteration condition, and obtaining optimal parameters based on the position; retraining based on the optimal parameters and the training data set to determine an SVM defect detection model.

4. The method of claim 1, wherein, further comprising: comparing the validation result with the defect detection result to determine a performance indicator within a set period. When the labeled update data reaches a preset number or the model performance is determined to be degraded based on the performance indicators, the SVM defect detection model is retrained by using the labeled update data and the labeled historical data, wherein the labeled update data is data obtained by labeling the real-time test data in a period of time.

5. The method according to any one of claims 1 to 4, characterized in that, The defect detection result includes at least one of parameter drift, early breakdown, poor contact and logic function failure.

6. A PSO-SVM ATE in-line wafer defect detection apparatus, comprising: Steps for implementing the ATE embedded wafer defect detection method based on PSO-SVM according to any one of claims 1 to 5, comprising: The data acquisition module is configured to acquire historical data, label the historical data to determine labeled historical data, and establish a benchmark defect detection model. The data construction module is configured to integrate the labeled historical data to determine an original data set, and perform feature engineering and data standardization on the original data set to determine a target data. The model training module is configured to perform PSO-SVM joint optimization training based on the target data and the benchmark defect detection model to determine an SVM defect detection model. The defect detection module is configured to acquire real-time test data, perform defect detection based on the real-time test data and the SVM defect detection model, and determine a defect detection result.

7. A computing device, comprising: Comprising: A memory and a processor; The memory is used to store computer executable instructions, and the processor is used to execute the computer executable instructions, which realize the steps of the ATE embedded wafer defect detection method based on PSO-SVM according to any one of claims 1 to 5 when executed by the processor.

8. A computer readable storage medium storing computer executable instructions, which realize the steps of the ATE embedded wafer defect detection method based on PSO-SVM according to any one of claims 1 to 5 when executed by the processor.

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