CLAHE image enhancement optimization method and system based on FPGA and medium

Abstract

The invention provides a CLAHE image enhancement optimization method and system based on an FPGA and a medium. The method comprises the steps that firstly, an input image is divided into a plurality of histogram sub-regions; on the basis of histogram statistics of each sub-region, the histograms of the sub-regions are cut, pixels exceeding a threshold value are redistributed according to a given algorithm, and the histograms are corrected; mapping is carried out through CDF operation to obtain an equalized gray level, and then gray stretching is carried out to generate a new gray mapping result; and finally, reading the mapping gray level stored in the previous frame, processing the gray value of the pixel point through combined operation of bilinear interpolation, completing block effect elimination between the sub-regions, and outputting an image after local contrast enhancement. According to the method provided by the invention, the controllability of the overall brightness level of the image can be ensured on the basis of ensuring the enhancement effect of the video image. And meanwhile, the method is realized on an FPGA platform, so that the processing speed of image enhancement is ensured, and the dual requirements on the processing speed and quality can be met.

Description

Technical Field

[0001] The present invention relates to the field of image processing technology, and in particular to a CLAHE image enhancement optimization method, system and medium based on FPGA. Background Art

[0002] Image contrast enhancement is a fundamental and widely used key technology in image processing. It can be categorized into two types: global image contrast enhancement and local image contrast enhancement. Global image contrast enhancement algorithms process the image holistically, are simple to implement, and can quickly improve overall contrast, but struggle to balance local detail and noise suppression. Local image contrast enhancement algorithms, on the other hand, employ refined local processing strategies, excelling in noise suppression and enriching image detail.

[0003] Among local contrast enhancement algorithms, the classic contrast-limited adaptive histogram equalization (CLAHE) algorithm is widely used due to its excellent local contrast enhancement capabilities. However, the traditional CLAHE algorithm is computationally complex and poses significant challenges to hardware processing speed. Typical conventional approaches in the existing technology employ multiple digital signal processors (DSPs) for collaborative processing, construct a DSP array for parallel processing, or employ an architecture combining a central processing unit (CPU) and a field-programmable gate array (FPGA). However, parallel processing on a full-platform FPGA still has many imperfections, making real-time video processing difficult.

[0004] In addition, the traditional CLAHE algorithm has deficiencies in its control over target area enhancement, especially when faced with specific scenes that are locally too bright or locally too dark. It is prone to over-enhancement, which affects the visual quality and limits the robustness and applicability of the algorithm. Summary of the Invention

[0005] In view of the above problems, how to ensure the video image enhancement effect while fully considering the feasibility of hardware implementation, and ensure the enhancement effect in special scenarios, and meet the higher requirements for image enhancement processing in practical applications, is particularly critical. To this end, the present invention aims to propose an FPGA-based CLAHE image enhancement optimization method. On the basis of the traditional CLAHE algorithm, it can further realize the regulation of the degree of local contrast enhancement of the image, enhance the detail information of the target area, and improve the recognizability. At the same time, it can also avoid over-enhancement of specific local over-bright or local over-dark scenes, and ensure the global brightness effect of the image; and the entire algorithm process is implemented on the FPGA platform, which ensures the processing speed of image enhancement and can meet the dual requirements of processing speed and image processing quality in practical application scenarios.

[0006] According to a first aspect of the present invention, a CLAHE image enhancement optimization method based on FPGA is proposed, comprising the following steps:

[0007] S1. Image sub-region division: Divide the input current frame image into multiple histogram sub-regions according to the pre-set window size;

[0008] S2, histogram statistics and storage: Perform histogram statistics on each divided sub-region, count the number of pixels corresponding to each gray level, and store the statistical results in the random access memory RAM1 in an orderly manner;

[0009] S3. Histogram cropping and correction: The statistically obtained histogram is cropped according to a pre-set histogram cropping threshold for each sub-region. For the number of pixels exceeding the cropping threshold, the redistribution interval is dynamically adjusted based on the dark area compensation coefficient and the bright area expansion coefficient to redistribute the number of pixels exceeding the threshold within the grayscale range of the original image, thereby obtaining a corrected histogram.

[0010] S4, grayscale equalization and stretching: performing cumulative probability distribution function statistical operations, mapping the corrected histogram through the cumulative probability distribution function to obtain equalized grayscale levels, performing grayscale stretching processing on the grayscale levels, and storing the newly generated grayscale mapping results in the random access memory RAM2; and

[0011] S5. Interpolation processing and image output: Using the bilinear interpolation algorithm, combined with the grayscale information of the previous frame stored in the RAM2 memory and the current pixel position, the grayscale value of the pixel point of the current frame image is reconstructed, and finally the contrast-enhanced image is output.

[0012] According to a second aspect of the present invention, a computer system is provided, comprising:

[0013] one or more processors; and

[0014] Memory, which stores instructions that can be operated;

[0015] When the instruction is executed by one or more processors, the one or more processors are caused to perform operations, including the process of executing the aforementioned FPGA-based CLAHE image enhancement optimization method.

[0016] According to a third aspect of the present invention, a computer-readable storage medium is provided for storing one or more programs, wherein the one or more programs include instructions or instruction sets that can be executed by one or more processors;

[0017] Wherein, when the instructions or instruction sets are executed by one or more processors, the process of the aforementioned FPGA-based CLAHE image enhancement optimization method is executed.

[0018] The FPGA-based CLAHE image enhancement optimization method proposed in this invention enhances local image contrast, ensuring not only the enhanced video quality but also the controllable overall image brightness level. Furthermore, the CLAHE optimization algorithm, implemented on an FPGA platform, ensures high image enhancement processing speed, meeting the dual requirements of processing speed and image processing quality in practical applications.

[0019] Compared with the existing technology, the FPGA-based CLAHE image enhancement optimization method proposed in this invention has the following significant advantages:

[0020] 1) Adjustable local image contrast intensity: It can be flexibly adjusted according to actual needs to highlight image details and improve target recognizability. In particular, the number of histogram subregions can be flexibly adjusted according to application requirements of different image resolutions. Increasing the number of subregions can achieve more refined local processing, while reducing the number of subregions can reduce hardware processing resources, ensuring that the algorithm can balance enhancement effects and resource consumption at various resolutions. At the same time, when redistributing pixels that exceed the clipping threshold, the allocation range is limited to a certain grayscale range, and this grayscale range can be flexibly controlled according to actual conditions. This mechanism effectively avoids image distortion caused by over-enhancement.

[0021] 2) Global image brightness can be adjusted: While enhancing local contrast and controllable intensity, it can ensure that the overall brightness intensity of the image is controllable, avoiding local overbrightness or overdarkness, and making the enhanced image have the same brightness level as the original image;

[0022] 3) By stretching the equalized grayscale obtained by mapping the cumulative probability distribution function (CDF), the image enhancement effect can be controlled. Users can adjust the stretching parameters according to specific needs to meet the needs of different application scenarios;

[0023] 4) Implementation on a full FPGA hardware platform: The algorithm can be efficiently implemented on an FPGA hardware platform, fully leveraging the parallel processing capabilities and flexibility of the FPGA to ensure the processing speed of image enhancement and meet application scenarios with high real-time requirements.

[0024] It should be understood that all combinations of the foregoing concepts and the additional concepts described in more detail below, as long as such concepts are not mutually inconsistent, can be considered part of the inventive subject matter of this disclosure. In addition, all combinations of the claimed subject matter are considered part of the inventive subject matter of this disclosure.

[0025] The foregoing and other aspects, embodiments, and features of the present invention will be more fully understood from the following description in conjunction with the accompanying drawings. Other additional aspects of the present invention, such as features and / or beneficial effects of the exemplary embodiments, will become apparent from the following description or through practice of specific embodiments according to the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The accompanying drawings are not intended to be drawn to scale. In the accompanying drawings, each identical or nearly identical component shown in various figures may be represented by the same reference numeral. For clarity, not every component is labeled in every figure. Embodiments of various aspects of the present invention will now be described by way of example and with reference to the accompanying drawings.

[0027] Figure 1 This is a processing flow chart of the CLAHE image enhancement optimization algorithm based on FPGA in an embodiment of the present invention.

[0028] Figure 2 Schematic diagram of histogram clipping and correction in an embodiment of the present invention.

[0029] Figure 3 Schematic diagram of grayscale stretching in an embodiment of the present invention.

[0030] Figure 4 is the original image input according to the embodiment of the present invention.

[0031] Figure 5 The traditional CLAHE algorithm is used to Figure 4 Schematic diagram of the enhancement effect of the input original image.

[0032] Figure 6 The method of the embodiment of the present invention is used to Figure 4 Schematic diagram of the enhancement effect of the input original image. DETAILED DESCRIPTION

[0033] In order to better understand the technical content of the present invention, specific embodiments are given and described below with reference to the accompanying drawings.

[0034] Various aspects of the present invention are described in this disclosure with reference to the accompanying drawings, in which a number of illustrative embodiments are shown. The embodiments of the present disclosure are not necessarily intended to include all aspects of the present invention. It should be understood that the various concepts and embodiments introduced above, as well as those described in more detail below, can be implemented in any of many ways, because the concepts and embodiments disclosed herein are not limited to any embodiment. In addition, some aspects of the present disclosure may be used alone or in any appropriate combination with other aspects disclosed herein.

[0035] {Example 1}

[0036] Combined with attachment Figure 1 As shown, the CLAHE image enhancement optimization method based on FPGA according to an embodiment of the present invention includes the following steps running in the FPGA:

[0037] S1. Image sub-region division: Divide the input current frame image into multiple histogram sub-regions according to the pre-set window size;

[0038] S2, histogram statistics and storage: Perform histogram statistics on each divided sub-region, count the number of pixels corresponding to each gray level, and store the statistical results in the random access memory RAM1 in an orderly manner;

[0039] S3. Histogram cropping and correction: The statistically obtained histogram is cropped and corrected according to a pre-set histogram cropping threshold for each sub-region. For the number of pixels exceeding the cropping threshold, the redistribution interval is dynamically adjusted based on the dark area compensation coefficient and the bright area expansion coefficient to redistribute the number of pixels exceeding the cropping threshold within the grayscale range of the original image, thereby obtaining a corrected histogram.

[0040] S4, grayscale equalization and stretching: performing cumulative probability distribution function statistical operations, mapping the corrected histogram through the cumulative probability distribution function to obtain equalized grayscale levels, performing grayscale stretching processing on the grayscale levels, and storing the newly generated grayscale mapping results in the random access memory RAM2; and

[0041] S5. Interpolation processing and image output: Using a bilinear interpolation algorithm, the grayscale information of the previous frame stored in the random access memory RAM2 is combined with the current pixel position to reconstruct the pixel grayscale value of the current frame image, and finally output a contrast-enhanced image.

[0042] As an optional embodiment, in step 2, before the arrival of valid data of each frame of video, the random access memory RAM1 used to store histogram statistical information in each sub-region is cleared to ensure that the initial state of the statistical data of each sub-region is zero.

[0043] As an optional embodiment, in step 2, row and column counting is performed according to the frame valid signal FrameValid and the line valid signal LineValid to determine the sub-region sequence where the current pixel point is located, and to clarify to which sub-region the current pixel point specifically belongs in the entire image division;

[0044] In each sub-area, RAM1 read and write operations are used. According to the grayscale level of the current pixel, the data in the corresponding RAM1 address in the sub-area to which the pixel belongs is accumulated, and finally the statistical number of pixels of each grayscale level in the sub-area is obtained.

[0045] As an optional embodiment, in step S3, a clipping threshold ClipLimit of the histogram of each sub-region is calculated according to a preset target threshold of the image and the sum of the number of pixels in each sub-region;

[0046] Then, a histogram clipping operation is performed on each sub-region based on the histogram clipping threshold ClipLimit, and the sum of the pixel points exceeding the histogram clipping threshold ClipLimit in each sub-region is counted (PixnumOverClip).

[0047] As an optional embodiment, in step S3, dynamically adjusting the redistribution interval based on the dark area compensation coefficient and the bright area expansion coefficient for the number of pixels exceeding the clipping threshold to redistribute the number of pixels exceeding the clipping threshold within the grayscale range of the original image to obtain a corrected histogram includes:

[0048] For each sub-region, first calculate the minimum grayscale value g min and the maximum value g max ;

[0049] Then, the updated grayscale minimum value g′ is calculated based on the dark area compensation coefficient and the bright area expansion coefficient min and the maximum value g′ max , dynamically adjust the reallocation interval;

[0050] Finally, the sum of the pixels exceeding the histogram clipping threshold is redistributed to g′ min and g′ max For each gray level between the two, obtain the number of pixels ExPixNum added to each gray level after redistribution:

[0051]

[0052] Thus, in each sub-region, the number of pixels exceeding the histogram clipping threshold ClipLimit is still distributed within the grayscale range of the original image, and the contrast intensity and overall image brightness are controlled;

[0053] Among them, in [g′ min , g′ max ] and linearly or nonlinearly distribute the number of pixels exceeding the clipping threshold within the grayscale range of .

[0054] As an optional embodiment, in step S3, the reallocation interval is dynamically adjusted based on the dark area compensation coefficient and the bright area expansion coefficient, and the updated minimum value g′ is determined. min and the maximum value g′ max ,include:

[0055] Calculate the new grayscale minimum value g' based on the dark area compensation coefficient k1 and the bright area expansion coefficient k2 min and the maximum value g′ max , and obtain the dynamically adjusted redistribution interval [g′ min , g′ max ]:

[0056] g′ min =min(0,g min *(1-k1))

[0057] g′ max =max(255,g max *(1+k2))

[0058] Among them, by adjusting the dark area compensation coefficient k1 and the bright area expansion coefficient k2, the pixels of each gray level are dynamically allocated to dynamically control the overall brightness of the image; and based on g′ max -g′ min The value of is used to dynamically control the intensity of image enhancement contrast.

[0059] As an optional embodiment, the grayscale equalization and stretching processing in step S4 specifically includes the following process:

[0060] First, by traversing the grayscale levels step by step, the statistical number of pixels in front of each grayscale level is added to obtain the cumulative distribution histogram F(g_vec) of the restricted contrast, where g_vec is the vector of the number of grayscale pixels in the sub-region;

[0061] Then, the cumulative distribution histogram F(g vec ) is equalized, and the grayscale distribution value of each sub-region is calculated to obtain the corresponding new grayscale SubGray. For an 8-bit grayscale video image, the calculation formula is:

[0062] SubGray=255*F(g vec ) / max(F(g vec ));

[0063] In the formula, the denominator takes the maximum value of the cumulative distribution value of the current sub-region to achieve the normalized stretching of the local histogram;

[0064] Subsequently, the calculation results are written into the continuous address space of the random access memory RAM2 in grayscale order to form a sub-region grayscale mapping table;

[0065] Finally, the gray level L corresponding to the equalization is stretched to obtain the updated gray mapping result SubGray′:

[0066]

[0067] As an optional embodiment, the FPGA-based CLAHE image enhancement optimization method according to claim 1 is characterized in that, in step S5, the bilinear interpolation algorithm is used to combine the grayscale information of the previous frame stored in the random access memory RAM2 and the current pixel position to reconstruct the grayscale value of the pixel point of the current frame image, and finally output the contrast-enhanced image, including:

[0068] For the input image, the grayscale value of the current pixel is indexed according to the mapped grayscale level stored in the adjacent sub-region of the previous frame. Combined with the position of the pixel, the grayscale value of the pixel in the current frame image is reconstructed through the bilinear interpolation algorithm to eliminate the blocking effect between the sub-regions of the histogram equalization. The corresponding pixel value on each sub-region in the input image is mapped to the new grayscale level, and the contrast-enhanced image is output accordingly.

[0069] {Example 2}

[0070] In this embodiment, we combine the Figure 1 as well as Figures 2-4 As shown, the specific implementation of the CLAHE image enhancement optimization method based on FPGA of the present invention is described in more detail.

[0071] As an optional embodiment, in step S1, the input image is divided into sub-regions, and the input current frame image is divided into M*N sub-regions.

[0072] The number of histogram sub-regions can be flexibly adjusted according to application requirements of different resolutions.

[0073] To achieve more refined local processing, increase the number of sub-regions; to reduce hardware processing resources, reduce the number of sub-regions. Adjust the number of sub-regions based on actual needs to balance enhancement effect and resource consumption.

[0074] As an optional embodiment, in step S2, parallel histogram statistics are processed and stored for each sub-region. Within the FPGA, row and column counting is performed based on the frame valid signal FrameValid and the line valid signal LineValid to determine the sub-region sequence in which the current pixel is located, and to clarify which sub-region the current pixel belongs to within the entire image partition. Before the arrival of valid video data for each frame, the RAM1 used to store histogram statistics in each sub-region needs to be cleared to ensure that the initial state of each statistical data is zero.

[0075] Within the valid data range of each sub-region, RAM1 read and write logic is used for calculation. According to the current pixel grayscale level, the data in the corresponding RAM1 address in the sub-region to which the pixel belongs is accumulated, and finally the number of pixels of each grayscale level in the sub-region is obtained.

[0076] Through step 2, the statistical information of the histogram of each sub-region of the current frame is calculated, and the statistical results are stored in RAM1 for the next step of histogram clipping and correction when the valid signal of the frame ends.

[0077] As an optional embodiment, in step S3, the sub-region histogram clipping threshold is calculated based on the preset target threshold of the image, and then the histogram clipping and correction operation is performed. The clipping threshold ClipLimit of each sub-region histogram is calculated based on the target threshold and the sum of the number of pixels in each sub-region. After the histogram statistics of all regions in the current frame are completed, the sum of the number of pixels in each sub-region that exceeds the ClipLimit threshold is calculated, and the histogram statistics exceeding the clipping threshold are processed and corrected.

[0078] like Figure 2 (a) shows a schematic diagram of traditional histogram clipping. In each sub-region, statistical points that exceed the clipping threshold (ClipLimit) are clipped, thus achieving the effect of histogram limiting. Inside the FPGA, each grayscale level is sequentially traversed, and the number of pixels at each grayscale level is determined to see whether it exceeds the histogram clipping threshold. If it does, the number of statistical points exceeding the threshold is accumulated to obtain the sum of the number of points exceeding the threshold (PixnumOverClip). After that, the PixnumOverClip of each sub-region needs to be reallocated to other parts of the corresponding sub-region histogram.

[0079] like Figure 2 As shown in (b), the traditional CLAHE algorithm uses the method of evenly distributing PixnumOverClip to each grayscale level. This example takes an 8-bit grayscale video image as an example. 8= 256 gray levels, so the number of reallocated pixels for each gray level can be calculated using the following formula:

[0080] ExPixNum=PixnumOverClip / 256.

[0081] However, the traditional CLAHE algorithm's strategy of evenly distributing the number of pixels exceeding the clipping threshold can introduce unnatural contrast enhancement at certain grayscale levels. This is particularly true when the image histogram exhibits a non-uniform distribution, where this distribution strategy can easily cause contrast distortion in local areas. Furthermore, the even distribution strategy can alter the overall brightness of the image, a particularly significant effect when the clipping threshold is large.

[0082] To this end, in an embodiment of the present invention, by improving and optimizing the cropped pixel correction algorithm, comprehensive dynamic control of the local contrast enhancement intensity and the overall image brightness is achieved, the grayscale range boundary is retained, and the contrast distortion and brightness offset problems caused by the averaging strategy are suppressed. While achieving a refined contrast enhancement effect, the global brightness intensity of the image is ensured to be controllable, avoiding local overbrightness or overdarkness, so that the enhanced image can present a brightness level consistent with the original image as a whole.

[0083] Combined with attachment Figure 2 (c) shows the histogram clipping and correction according to an embodiment of the present invention. In the embodiment of the present invention, for each sub-region, the minimum grayscale value g is first calculated. min and the maximum value g max ;

[0084] Then, the updated grayscale minimum value g′ is calculated based on the dark area compensation coefficient and the bright area expansion coefficient min and the maximum value g′ max , dynamically adjust the reallocation interval;

[0085] Finally, the sum of the pixels exceeding the histogram clipping threshold is redistributed to g′ min and g′ max For each gray level between the two, obtain the number of pixels ExPixNum added to each gray level after redistribution:

[0086]

[0087] Thus, in each sub-region, the number of pixels exceeding the histogram clipping threshold ClipLimit is still distributed within the grayscale range of the original image, and the control of contrast intensity and overall image brightness is achieved.

[0088] Therefore, the number of pixels exceeding the cropping threshold is still distributed within the grayscale range of the original image, so the brightness of the original image can be effectively maintained.

[0089] Furthermore, in order to fine-tune the enhancement effect, the dark area compensation coefficient k1 and the bright area expansion coefficient k2 are introduced. The redistribution interval is dynamically adjusted based on the dark area compensation coefficient and the bright area expansion coefficient, and the updated grayscale minimum value g′ is determined. min and the maximum value g′ max ,include:

[0090] Calculate the new grayscale minimum value g' based on the dark area compensation coefficient k1 and the bright area expansion coefficient k2 min and the maximum value g′ max , and obtain the dynamically adjusted redistribution interval [g′ min , g′ max ]:

[0091] g′ min =min(0,g min *(1-k1))

[0092] g′ max =max(255,g max *(1+k2))

[0093] Among them, by adjusting the dark area compensation coefficient k1 and the bright area expansion coefficient k2, the pixels of each gray level are dynamically allocated to dynamically control the overall brightness of the image; and based on g′ max -g′ min The value of is used to dynamically control the intensity of image enhancement contrast.

[0094] When the FPGA platform is implemented, in the process of traversing each gray value to obtain PixnumOverClip in the previous step, the minimum value g of each sub-region can be obtained synchronously inside the FPGA. min and the maximum value g max .

[0095] When k2 increases, more reallocated pixels will be compensated to a higher grayscale level, making the image brighter; when k1 increases, more reallocated pixels will be compensated to a lower grayscale level, making the image brighter. max -g′ min The larger the value, the more obvious the effect of image contrast enhancement.

[0096] As an optional embodiment, in [g′ min , g′ max ] and linearly or nonlinearly distribute the number of pixels exceeding the clipping threshold within the grayscale range of .

[0097] Thus, in step S3, the statistical histograms within each subregion are clipped, and the number of pixels exceeding the threshold is redistributed within the grayscale range of the original image, resulting in a corrected histogram. By preserving the grayscale range boundaries, the contrast distortion and brightness shift caused by the average distribution strategy are suppressed. Simultaneously, by dynamically updating the redistributed intervals based on the dark area compensation coefficient and the bright area expansion coefficient, both image contrast enhancement and overall image brightness are controllable, achieving controllable contrast intensity and overall image brightness while effectively maintaining the original image brightness.

[0098] As an optional embodiment, in the next step S4, cumulative probability distribution function statistics are performed on the corrected histogram, and mapped to obtain a balanced grayscale level.

[0099] Based on the histogram cropping and correction calculation completion signal, RAM2 within the subregion is used to calculate and save the cumulative distribution histogram. During the accumulation state counter time, the grayscale levels are traversed step by step, and the statistical count of the pixels preceding each grayscale level is added to obtain the contrast-constrained cumulative distribution histogram F(g_vec), where g_vec is the grayscale pixel count vector within the subregion.

[0100] Then, the cumulative distribution histogram F(g vec ) is equalized, and the grayscale distribution value of each sub-region is calculated to obtain the corresponding new grayscale level SubGray. For example, for an 8-bit grayscale video image, the calculation formula is:

[0101] SubGray=255*F(g vec ) / max(F(g vec ));

[0102] In the formula, the denominator takes the maximum value of the cumulative distribution of the current sub-region to achieve the normalized stretching of the local histogram.

[0103] Finally, the calculation results are written into the continuous address space of RAM2 in grayscale order to form a sub-region grayscale mapping table.

[0104] Furthermore, the gray level L corresponding to the equalization is stretched to obtain the updated gray level SubGray′:

[0105]

[0106] Combined with attachment Figure 3 As shown, Figure 3 (a) shows the grayscale level after the histogram correction. Figure 3(b) shows the grayscale mapping after stretching the equalized grayscale levels. By stretching, the new grayscale image can be restored to the brightness level of the original image, avoiding large changes in brightness in local areas of the enhanced image.

[0107] Thus, through step S4, each sub-region obtains its own new mapped grayscale value through histogram statistical information calculation and stores it in the independent storage space of its own RAM2. In the subsequent interpolation calculation stage, the address decoding logic can be used to quickly and synchronously read the grayscale value mapped in RAM2 of the adjacent sub-region to which the pixel belongs.

[0108] As an optional embodiment, in step S5, for the input image, the mapped grayscale level stored in the adjacent sub-region of the previous frame is indexed according to the grayscale value of the current pixel point, and combined with the position of the pixel point, the corresponding pixel value on each sub-region in the input image is mapped to the new grayscale level through an interpolation algorithm.

[0109] In this embodiment, bilinear interpolation is used to reconstruct the grayscale values ​​of the pixels in the current frame image to eliminate the blocking artifacts between the sub-regions of the histogram equalization. Specifically, based on the coordinates of the pixel in the image, the weights of the grayscales of the four corresponding neighborhood histogram maps are calculated. Then, bilinear interpolation is performed on the grayscales of the four neighborhood histogram maps to obtain the enhanced pixel grayscale. The interpolation calculation formula is as follows:

[0110] Gray out =Subgray (i-1,j-1) *p*m+Subgray (i-1,j) *p*n+Subgray (i,j-1) *q*m+Subgray (i,j) *q*n

[0111] Among them, p, q, m, and n represent the distance weights of the pixel point in the sub-region to the left, right, upper, and lower boundaries of the segmented sub-regions, respectively. (i-1,j-1) , Subgray (i-1,j) , Subgray (i,j-1) , Subgray (i,j) are the grayscale mapping functions of the four neighboring sub-regions of the sub-region where the pixel is located, Gray out is the gray value of the pixel after interpolation.

[0112] In the FPGA, each sub-region stores its own grayscale mapping function in its corresponding RAM2. Based on the current pixel's position, the indices of the four adjacent sub-regions can be calculated. The current pixel's grayscale value is then used as the RAM2 call address to retrieve the grayscale mapping values ​​of the four adjacent sub-regions simultaneously. The four interpolation distance weights (p, q, m, and n) are calculated based on the size of the image segmentation region and the current region's position.

[0113] Assume that the number of pixels per row in a subregion is bw, and the number of pixels per column is bh. As the horizontal coordinate position i of a pixel moves from the midpoint of the left subregion to the midpoint of the right subregion, the value of q will continue to increase. As the vertical coordinate position j of a pixel moves from the midpoint of the upper subregion to the midpoint of the lower subregion, the value of n will continue to increase. The specific calculation method is as follows:

[0114]

[0115] After that, calculate the values ​​of q and n:

[0116]

[0117] The four values ​​of p, q, m, and n are synchronized with the beat, and then interpolated according to the interpolation formula. The interpolated image will eliminate the blocking effect and the transition between sub-regions will be smoother.

[0118] Combined with attachment Figure 4-6 As shown, Figure 4 is the original input image, Figure 5 This is the result of traditional CLAHE algorithm processing. It can be seen that due to the lack of control over cropping distribution and grayscale mapping stretching, the brightness of the wall on the right side is very bright in the original image, but becomes very dark after processing, and the local brightness level changes significantly. Figure 6 This is the processing effect of the algorithm proposed by the present invention, which ensures the brightness of the wall on the right while enhancing the internal details of the fire hydrant on the left.

[0119] Thus, the FPGA-based CLAHE image enhancement optimization method of the present invention restricts the allocation of cropped pixels to correct the histogram, effectively resolving the over-enhancement problem of traditional methods in strong or low-light environments. This method achieves controllable image detail enhancement and, while enhancing local contrast, ensures controllable global image brightness intensity, avoiding local overbrightness or overdarkness. This ensures that the enhanced image exhibits a brightness level consistent with the overall original image. Furthermore, in the histogram equalization process, a method for controlling grayscale stretching is used to adjust the histogram correction strategy, achieving global brightness control while ensuring detail recognition.

[0120] {Example 3}

[0121] In conjunction with the implementation of the FPGA-based CLAHE image enhancement optimization method in the above embodiment, this embodiment further provides a computer system, including:

[0122] one or more processors; and

[0123] Memory stores instructions that can be operated.

[0124] When the instruction is executed by one or more processors, the one or more processors are caused to perform operations, including the process of executing the FPGA-based CLAHE image enhancement optimization method of the aforementioned embodiment.

[0125] {Example 4}

[0126] In combination with the implementation of the FPGA-based CLAHE image enhancement optimization method of the above embodiment, according to this embodiment, a computer-readable storage medium is also proposed for storing one or more programs, wherein the one or more programs include instructions or instruction sets that can be executed by one or more processors.

[0127] When the instructions or instruction sets are executed by one or more processors, the process of the FPGA-based CLAHE image enhancement optimization method of the aforementioned embodiment is performed.

[0128] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Although the present invention has been disclosed as above in the form of a preferred embodiment, this does not mean a limitation of the present invention. Any person familiar with the professional and technical field can make appropriate changes or modifications to the technical content disclosed above without departing from the core scope of the technical solution of the present invention to form an equivalent embodiment of equivalent changes. However, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical principles of the present invention that do not depart from the essential content of the technical solution of the present invention should be covered within the scope of protection of the technical solution of the present invention.

Claims

1. A CLAHE image enhancement optimization method based on FPGA, characterized in that: The following steps are executed in the FPGA: S1. Image sub-region division: Divide the input current frame image into multiple histogram sub-regions according to the pre-set window size; S2, histogram statistics and storage: Perform histogram statistics on each divided sub-region, count the number of pixels corresponding to each gray level, and store the statistical results in the random access memory RAM1 in an orderly manner; S3. Histogram cropping and correction: The statistically obtained histogram is cropped and corrected according to a pre-set histogram cropping threshold for each sub-region. For the number of pixels exceeding the cropping threshold, the redistribution interval is dynamically adjusted based on the dark area compensation coefficient and the bright area expansion coefficient to redistribute the number of pixels exceeding the cropping threshold within the grayscale range of the original image, thereby obtaining a corrected histogram. S4, grayscale equalization and stretching: Execute cumulative probability distribution function statistical operation, map the corrected histogram through the cumulative probability distribution function, thereby obtaining equalized grayscale levels, perform grayscale stretching processing on the grayscale levels, and store the newly generated grayscale mapping results in random access memory RAM2; as well as S5. Interpolation processing and image output: Using a bilinear interpolation algorithm, the grayscale information of the previous frame stored in the random access memory RAM2 is combined with the current pixel position to reconstruct the pixel grayscale value of the current frame image, and finally output a contrast-enhanced image.

2. The CLAHE image enhancement optimization method based on FPGA according to claim 1, characterized in that: In step 2, before the arrival of valid data of each frame of video, the random access memory RAM1 for storing histogram statistical information in each sub-region is cleared to ensure that the initial state of the statistical data of each sub-region is zero.

3. The CLAHE image enhancement optimization method based on FPGA according to claim 1, characterized in that: In step 2, row and column counting is performed according to the frame valid signal FrameValid and the line valid signal LineValid to determine the sub-region sequence where the current pixel point is located, and to clarify to which sub-region the current pixel point specifically belongs in the entire image division; In each sub-area, RAM1 read and write operations are used. According to the grayscale level of the current pixel, the data in the corresponding RAM1 address in the sub-area to which the pixel belongs is accumulated, and finally the statistical number of pixels of each grayscale level in the sub-area is obtained.

4. The CLAHE image enhancement optimization method based on FPGA according to claim 1, characterized in that: In step S3, a clipping threshold ClipLimit of the histogram of each sub-region is calculated based on a preset target threshold of the image and the sum of the number of pixels in each sub-region; Then, a histogram clipping operation is performed on each sub-region based on the histogram clipping threshold ClipLimit, and the sum of the pixel points exceeding the histogram clipping threshold ClipLimit in each sub-region is counted (PixnumOverClip).

5. The CLAHE image enhancement optimization method based on FPGA according to claim 1, characterized in that: In step S3, the number of pixels exceeding the clipping threshold is redistributed by dynamically adjusting the redistribution interval based on the dark area compensation coefficient and the bright area expansion coefficient, so that the number of pixels exceeding the clipping threshold is redistributed within the grayscale range of the original image to obtain a corrected histogram, including: For each sub-region, first calculate the minimum grayscale value g min and the maximum value g max ; Then, the updated grayscale minimum value g′ is calculated based on the dark area compensation coefficient and the bright area expansion coefficient min and the maximum value g′ max , dynamically adjust the reallocation interval; Finally, the sum of the pixels exceeding the histogram clipping threshold is redistributed to g′ min and g′ max For each gray level between the two, obtain the number of pixels ExPixNum added to each gray level after redistribution: Thus, in each sub-region, the number of pixels exceeding the histogram clipping threshold ClipLimit is still distributed within the grayscale range of the original image, and the contrast intensity and overall image brightness are controlled; Among them, in [g′ min , g′ max ] and linearly or nonlinearly distribute the number of pixels exceeding the clipping threshold within the grayscale range of .

6. The CLAHE image enhancement optimization method based on FPGA according to claim 5, characterized in that: In step S3, the reallocation interval is dynamically adjusted based on the dark area compensation coefficient and the bright area expansion coefficient, and the updated minimum value g' is determined. min and the maximum value g′ max ,include: Calculate the new grayscale minimum value g' based on the dark area compensation coefficient k1 and the bright area expansion coefficient k2 min and the maximum value g′ max , and obtain the dynamically adjusted redistribution interval [g′ min , g′ max ]: g′ min =min(0,g min *(1-k1)) g′ max =max(255,g max *(1+k2)) Among them, by adjusting the dark area compensation coefficient k1 and the bright area expansion coefficient k2, the pixels of each gray level are dynamically allocated to dynamically control the overall brightness of the image; and based on g′ max -g′ min The value of is used to dynamically control the intensity of image enhancement contrast.

7. The CLAHE image enhancement optimization method based on FPGA according to claim 1, characterized in that: In step S4, the grayscale equalization and stretching process is as follows: The following processes are included: First, by traversing the grayscale levels step by step, the statistical number of pixels in front of each grayscale level is added to obtain the cumulative distribution histogram F(g_vec) of the restricted contrast, where g_vec is the vector of the number of grayscale pixels in the sub-region; Then, the cumulative distribution histogram F(g vec ) is equalized, and the grayscale distribution value of each sub-region is calculated to obtain the corresponding new grayscale SubGray. For an 8-bit grayscale video image, the calculation formula is: SubGray=255*F(g vec ) / max(F(g vec )); In the formula, the denominator takes the maximum value of the cumulative distribution value of the current sub-region to achieve the normalized stretching of the local histogram; Subsequently, the calculation results are written into the continuous address space of the random access memory RAM2 in grayscale order to form a sub-region grayscale mapping table; Finally, the gray level L corresponding to the equalization is stretched to obtain the updated gray mapping result SubGray′:

8. The CLAHE image enhancement optimization method based on FPGA according to claim 1, characterized in that: In step S5, the bilinear interpolation algorithm is used to reconstruct the grayscale values ​​of the pixels of the current frame image by combining the grayscale information of the previous frame stored in the random access memory RAM2 and the current pixel position, and finally outputting the contrast-enhanced image, including: For the input image, the grayscale value of the current pixel is indexed according to the mapped grayscale level stored in the adjacent sub-region of the previous frame. Combined with the position of the pixel, the grayscale value of the pixel in the current frame image is reconstructed through the bilinear interpolation algorithm to eliminate the blocking effect between the sub-regions of the histogram equalization. The corresponding pixel value on each sub-region in the input image is mapped to the new grayscale level, and the contrast-enhanced image is output accordingly.

9. A computer system, characterized in that: include: one or more processors; as well as Memory, which stores instructions that can be operated; Wherein, when the instruction is executed by one or more processors, the one or more processors are caused to perform an operation, and the operation includes the process of executing the FPGA-based CLAHE image enhancement optimization method described in any one of the preceding claims 1-8.

10. A computer-readable storage medium for storing one or more programs, wherein the one or more programs include instructions or instruction sets that can be executed by one or more processors, characterized in that: When the instruction or instruction set is executed by one or more processors, the process of the FPGA-based CLAHE image enhancement optimization method described in any one of claims 1 to 8 is performed.

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