Driving backboard and display device

Abstract

The invention relates to a driving backboard and a display device. The driving backboard comprises a plurality of pixel driving circuits, a plurality of data lines and a plurality of selection modules; the plurality of selection modules are in one-to-one correspondence with the plurality of data lines, the output ends of the selection modules are connected with the corresponding data lines, the first input ends of the selection modules receive first data signals, the second input ends of the selection modules receive second data signals, and the control ends of the selection modules are used for receiving control signals; the control signal is a first level signal, the selection module outputs a first data signal, the first data signal is used for driving a sub-pixel array in a first row mode, and sub-pixels with different colors are alternately arranged in a first arrangement mode; the control signal is a second level signal, the selection module outputs a second data signal, the second data signal is used for driving a sub-pixel array in a second arrangement mode, and sub-pixels with different colors are arranged in different regions in the second arrangement mode; and the method can be matched with various different silicon-based Micro LED full-color technologies.

Description

Technical Field

[0001] The present application relates to the field of display driving technology, and in particular to a driving backplane and a display device. Background Art

[0002] Silicon-based Micro LED (Micro-Light Emitting Diode), by combining silicon-based technology with micron-sized LEDs, can meet the performance requirements of a series of AR (Augmented Reality) head-mounted display devices, such as high pixel density, high brightness, and low power consumption. It can also be combined with optical waveguide solutions to achieve lightweight equipment. It is currently considered to be the most suitable display technology for AR.

[0003] Silicon-based Micro LED full-color technology is complex, and full-color Micro LED mass production is difficult and costly, resulting in a limited number of applicable products. Currently, silicon-based Micro LED full-color technologies are primarily categorized into three categories: quantum dot technology, monolithic stacking technology, and color combination technology. However, different silicon-based Micro LED full-color technologies require only different driver backplanes, resulting in high costs. Summary of the Invention

[0004] Based on this, it is necessary to provide a driving backplane and display device that can match a variety of different silicon-based Micro LED full-color technologies.

[0005] In a first aspect, the present application provides a driving backplane, comprising a silicon substrate and a plurality of pixel driving circuits, a plurality of data lines, and a plurality of selection modules located on the silicon substrate;

[0006] The plurality of pixel driving circuits are arranged in an array along a first direction and a second direction, wherein the first direction intersects the second direction;

[0007] The data lines extend along the first direction, and the plurality of data lines are sequentially arranged along the second direction, and each of the data lines is connected to a pixel driving circuit column in the first direction;

[0008] The plurality of selection modules correspond to the plurality of data lines one by one, the output end of the selection module is connected to the corresponding data line, the first input end of the selection module is used to receive a first data signal, the second input end of the selection module is used to receive a second data signal, and the control end of the selection module is used to receive a control signal;

[0009] For the sub-pixel array in the first arrangement, the control signal is a first level signal, the output end of the selection module outputs the first data signal, and the first data signal is used to drive the sub-pixel array in the first arrangement, in which sub-pixels of different colors are arranged alternately;

[0010] For the sub-pixel array in the second arrangement mode, the control signal is a second level signal, the output end of the selection module outputs the second data signal, and the second data signal is used to drive the sub-pixel array in the second arrangement mode. Sub-pixels of different colors are arranged in partitions in the second arrangement mode.

[0011] In one embodiment, the invention further includes a first current source module to a ninth current source module; the plurality of pixel driving circuits are divided into a first pixel driving circuit area, a second pixel driving circuit area and a third pixel driving circuit area;

[0012] Each first pixel driving circuit column in the first pixel driving circuit area is connected to a first current source module;

[0013] Each second pixel driving circuit column in the first pixel driving circuit area is connected to a second current source module;

[0014] Each third pixel driving circuit column in the first pixel driving circuit area is connected to a third current source module;

[0015] Each fourth pixel driving circuit column in the second pixel driving circuit area is connected to a fourth current source module;

[0016] Each fifth pixel driving circuit column in the second pixel driving circuit area is connected to a fifth current source module;

[0017] Each sixth pixel driving circuit column in the second pixel driving circuit area is connected to a sixth current source module;

[0018] Each seventh pixel driving circuit column in the third pixel driving circuit area is connected to a seventh current source module;

[0019] Each eighth pixel driving circuit column in the third pixel driving circuit area is connected to an eighth current source module;

[0020] Each ninth pixel driving circuit column in the third pixel driving circuit area is connected to a ninth current source module;

[0021] Wherein, the first pixel driving circuit column, the second pixel driving circuit column and the third pixel driving circuit column are alternately arranged in sequence in the second direction;

[0022] The fourth pixel driving circuit column, the fifth pixel driving circuit column and the sixth pixel driving circuit column are alternately arranged in sequence in the second direction;

[0023] The seventh pixel driving circuit column, the eighth pixel driving circuit column, and the ninth pixel driving circuit column are alternately arranged in sequence in the second direction.

[0024] In one embodiment, for the sub-pixel array in the first arrangement:

[0025] Each of the first pixel driving circuit columns, each of the fourth pixel driving circuit columns, and each of the seventh pixel driving circuit columns is configured to perform white balance adjustment on a sub-pixel of a first color according to a current signal provided by a connected current source module;

[0026] Each of the second pixel driving circuit columns, each of the fifth pixel driving circuit columns, and each of the eighth pixel driving circuit columns is configured to perform white balance adjustment on the sub-pixels of the second color according to the current signal provided by the connected current source module;

[0027] Each of the third pixel driving circuit columns, each of the sixth pixel driving circuit columns, and each of the ninth pixel driving circuit columns is configured to perform white balance adjustment on the sub-pixels of the third color according to current signals provided by the connected current source modules.

[0028] In one embodiment, for the sub-pixel array in the second arrangement:

[0029] Each of the first pixel driving circuit columns, each of the second pixel driving circuit columns, and each of the third pixel driving circuit columns is configured to perform white balance adjustment on a sub-pixel of a first color according to a current signal provided by a connected current source module;

[0030] Each of the fourth pixel driving circuit columns, each of the fifth pixel driving circuit columns, and each of the sixth pixel driving circuit columns is configured to perform white balance adjustment on the sub-pixels of the second color according to the current signal provided by the connected current source module;

[0031] Each of the seventh pixel driving circuit columns, each of the eighth pixel driving circuit columns, and each of the ninth pixel driving circuit columns is configured to perform white balance adjustment on the sub-pixels of the third color according to current signals provided by the connected current source modules.

[0032] In one embodiment, the current source module includes a regulating unit and a plurality of transistor units;

[0033] The first input terminal of the transistor unit is connected to the power signal line;

[0034] The second input terminal of the transistor unit is connected to the output terminal of the regulating unit, and the regulating unit is used to provide a current signal;

[0035] The output end of the transistor unit is connected to a corresponding pixel driving circuit column through an initialization signal line, and the transistor unit is used to perform white balance adjustment on the corresponding sub-pixel according to the current signal.

[0036] In one embodiment, the regulating unit includes a current source device and a first transistor; a first terminal of the first transistor is connected to the current source device, a second terminal of the first transistor is grounded, and a control terminal of the first transistor is connected to the first terminal of the first transistor;

[0037] The transistor unit includes a second transistor and a third transistor; the first end of the second transistor is connected to the power signal line, the second end of the second transistor is connected to the first end of the third transistor, the control end of the second transistor is connected to a corresponding pixel driving circuit column through the initialization signal line, the second end of the third transistor is grounded, and the control end of the third transistor is connected to the control end of the first transistor.

[0038] In one embodiment, the pixel driving circuit includes an initialization transistor;

[0039] The first end of the initialization transistor is connected to the initialization signal line, the second end of the initialization transistor is used to connect to the anode of the sub-pixel, and the control end of the initialization transistor is used to connect to the scan line.

[0040] In one embodiment, the selection module is a two-input multiplexer;

[0041] The output end of the multiplexer is connected to the corresponding data line, the first input end of the multiplexer is used to receive the first data signal, the second input end of the multiplexer is used to receive the second data signal, and the control end of the multiplexer is used to receive the control signal.

[0042] In one embodiment, in the first arrangement, the sub-pixels of the first color, the sub-pixels of the second color, and the sub-pixels of the third color are arranged in sequence in the second direction; or, in the first arrangement, the sub-pixels of the first color, the sub-pixels of the second color, and the sub-pixels of the third color are stacked in sequence in a direction perpendicular to the silicon substrate;

[0043] In the second arrangement mode, the sub-pixels of the first color are arranged in an array within the first display area, the sub-pixels of the second color are arranged in an array within the second display area, and the sub-pixels of the third color are arranged in an array within the third display area, wherein the first display area, the second display area and the third display area are arranged sequentially in the second direction.

[0044] In a second aspect, based on the same inventive concept, the present application provides a display device, comprising a driving backplane as provided in the first aspect above.

[0045] The above-mentioned driving backplane and display device are equipped with multiple selection modules. When the control end of the selection module receives different control signals, the selection module inputs different data signals to the connected data line. The different data signals are respectively suitable for sub-pixel arrays with different arrangements, so that the driving backplane can match a variety of different silicon-based Micro LED full-color technologies; for example, when the selection module inputs the first data signal to the connected data line, the driving backplane can match the driving quantum dot technology full-color micro display or the single-chip stacking technology full-color micro display, and when the selection module inputs the second data signal to the connected data line, the driving backplane can match the driving optical waveguide color combination technology full-color micro display; in this way, the cost of the driving backplane is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the conventional technology, the following briefly introduces the drawings required for use in the embodiments or the conventional technology descriptions. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0047] Figure 1 FIG1 is a schematic diagram of a driving backplane according to an embodiment;

[0048] Figure 1B for Figure 1 Black and white picture;

[0049] Figure 2 A schematic diagram of a sub-pixel array using quantum dot technology according to an embodiment;

[0050] Figure 3 A schematic diagram of a sub-pixel array using a monolithic stacking technology according to an embodiment;

[0051] Figure 4 This is a second schematic diagram of a driving backplane according to an embodiment;

[0052] Figure 4B for Figure 4 Black and white picture;

[0053] Figure 5 A schematic diagram of a sub-pixel array using a light waveguide color combining technology according to an embodiment;

[0054] Figure 6 This is one of the structural diagrams of the selection module according to one embodiment;

[0055] Figure 7FIG1 is a schematic diagram of providing a current source for a driving backplane according to an embodiment;

[0056] Figure 7B for Figure 7 Black and white picture;

[0057] Figure 8 The second schematic diagram of a current source provided on a driving backplane according to an embodiment;

[0058] Figure 8B for Figure 8 Black and white picture;

[0059] Figure 9 The third schematic diagram of a current source provided on a driving backplane according to an embodiment;

[0060] Figure 9B for Figure 9 Black and white picture;

[0061] Figure 10 A fourth schematic diagram of a current source provided on a driving backplane according to an embodiment;

[0062] Figure 10B for Figure 10 Black and white picture;

[0063] Figure 11 A fifth schematic diagram of a current source provided on a driving backplane according to an embodiment;

[0064] Figure 11B for Figure 11 Black and white picture;

[0065] Figure 12 A sixth schematic diagram of a current source provided on a driving backplane according to an embodiment;

[0066] Figure 12B for Figure 12 Black and white picture;

[0067] Figure 13 This is the second structural diagram of the selection module according to an embodiment. DETAILED DESCRIPTION

[0068] To facilitate understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The accompanying drawings provide embodiments of the present application. However, the present application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0069] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application pertains. The terms used herein in the specification of this application are for the purpose of describing specific embodiments only and are not intended to limit this application.

[0070] It will be understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor without departing from the scope of this application. The first resistor and the second resistor are both resistors, but they are not the same resistor.

[0071] It can be understood that the “connection” in the following embodiments should be understood as “electrical connection”, “communication connection”, etc. if there is transmission of electrical signals or data between the connected circuits, modules, units, etc.

[0072] It is understood that “at least one” refers to one or more, “a plurality” refers to two or more, and “at least a portion of an element” refers to a portion or all of an element.

[0073] As used herein, the singular forms "a," "an," and "the" may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include," "comprising," "having," and the like specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. Furthermore, the term "and / or" as used in this specification includes any and all combinations of the relevant listed items.

[0074] In an exemplary embodiment, in combination Figures 1 to 6 , provides a driving backplane that can support full-color silicon-based micro-display driving, the driving backplane includes a silicon substrate and multiple pixel driving circuits 10, multiple data lines 20 and multiple selection modules 40 located on the silicon substrate.

[0075] Multiple pixel driving circuits 10 are arranged in an array along a first direction and a second direction, where the first direction intersects the second direction. The first direction is, for example, a column direction, and the second direction is, for example, a row direction. The pixel driving circuit 10 may be composed of components such as capacitors and multiple transistors. For example, the pixel driving circuit 10 may include a 7T1C driving circuit. The pixel driving circuit 10 is configured to drive the connected sub-pixels to achieve luminescence.

[0076] The data line 20 extends along a first direction, and multiple data lines 20 are arranged in sequence along a second direction, with each data line 20 connected to a pixel driving circuit column in the first direction. A pixel driving circuit column can be understood as a column of pixel driving circuits 10 in a plurality of pixel driving circuits arranged in an array, and a pixel driving circuit row can be understood as a row of pixel driving circuits 10 in a plurality of pixel driving circuits arranged in an array. One data line 20 can be connected to a column of pixel driving circuits 10. For example, when the pixel driving circuit 10 is a 7T1C driving circuit, one data line 20 can be connected to the input terminal of the data write transistor of each pixel driving circuit 10 in a column of pixel driving circuits 10. The input terminal of the data write transistor is, for example, the source of the data write transistor.

[0077] The plurality of selection modules 40 correspond to the plurality of data lines 20 one by one, refer to Figure 6 The output terminal d of the selection module 40 is connected to the corresponding data line 20, the first input terminal a of the selection module 40 is used to receive the first data signal, the second input terminal b of the selection module 40 is used to receive the second data signal, and the control terminal c of the selection module 40 is used to receive the control signal.

[0078] Among them, the selection module 40 can be a selection circuit with a two-choice function. The selection module 40 selects to output the signals received by its different input terminals according to different control signals of the control terminal. Specifically, for the sub-pixel array in the first arrangement mode, the control signal is a first level signal, and the output terminal d of the selection module 40 outputs a first data signal, and the first data signal is used to drive the sub-pixel array in the first arrangement mode; for the sub-pixel array in the second arrangement mode, the control signal is a second level signal, and the output terminal d of the selection module 40 outputs a second data signal, and the second data signal is used to drive the sub-pixel array in the second arrangement mode. Among them, the first level signal is different from the second level signal; illustratively, the first level signal is 1 and the second level signal is 0. Of course, in other embodiments, the first level signal can be 0 and the second level signal can be 1, and this is not limited. The first data signal is different from the second data signal, and it can be understood that the first data signal and the second data signal are respectively applicable to sub-pixel arrays with different arrangements.

[0079] In the first arrangement mode, sub-pixels of different colors are arranged alternately, which can be understood as follows: sub-pixels of multiple colors (such as red R, green G, blue B, white W, etc.) are arranged in a periodically repeated "adjacent different colors" pattern. Along the first direction or the second direction, the colors of any adjacent sub-pixels are different, forming a dense and uniform mixed color distribution. For example, combined with Figure 1 and Figure 2, the sub-pixels are quantum dot sub-pixels, the first color, the second color and the third color are red R, green G and white W respectively, and in the first arrangement mode, the sub-pixels of the first color, the sub-pixels of the second color and the sub-pixels of the third color are arranged in sequence in the second direction. Or, for example, in combination Figure 1 and Figure 3 , using monolithic stacking technology, the first color, second color and third color are red R, green G and blue B respectively. In the first arrangement mode, sub-pixels of the first color, sub-pixels of the second color and sub-pixels of the third color are stacked in sequence in a direction perpendicular to the silicon substrate, and a stacked sub-pixel of the first color, a sub-pixel of the second color and a sub-pixel of the third color constitute a pixel. In the first direction or the second direction, multiple pixels are arranged in sequence.

[0080] The second arrangement mode of sub-pixels of different colors can be understood as: dividing the display area into several independent "color block areas", each area contains only sub-pixels of a single color (or sub-pixels of the same color are concentrated), different areas are responsible for displaying a color, and full color is presented by combining the colors between areas, for example, by combining light waveguides to achieve full color display. Figure 4 and Figure 5 , applying optical waveguide color combination technology, the first color, second color and third color are red R, green G and blue B respectively. Under the second arrangement mode, the sub-pixels of the first color are arranged in an array in the first display area, the sub-pixels of the second color are arranged in an array in the second display area, and the sub-pixels of the third color are arranged in an array in the third display area, wherein the first display area, the second display area and the third display area are arranged sequentially in the second direction.

[0081] To summarize, in the embodiment of the present application, by setting up multiple selection modules 40, when the control end c of the selection module 40 receives different control signals, the selection module 40 inputs different data signals to the connected data line 20, and the different data signals are respectively suitable for sub-pixel arrays with different arrangements, so that the driving backplane can match a variety of different silicon-based Micro LED full-color technologies; for example, when the selection module 40 inputs a first data signal to the connected data line 20, the driving backplane can match driving quantum dot technology full-color micro display or single-chip stacking technology full-color micro display, and when the selection module 40 inputs a second data signal to the connected data line 20, the driving backplane can match driving optical waveguide color combination technology full-color micro display; in this way, the cost of the driving backplane is reduced.

[0082] In an exemplary embodiment, in combination Figures 7 to 12The driving backplane further includes a first current source module to a ninth current source module, and the plurality of pixel driving circuits 10 are divided into a first pixel driving circuit area 110 , a second pixel driving circuit area 120 and a third pixel driving circuit area 130 .

[0083] Each first pixel driving circuit column 101 in the first pixel driving circuit area 110 is connected to the first current source module, each second pixel driving circuit column 102 in the first pixel driving circuit area 110 is connected to the second current source module, and each third pixel driving circuit column 103 in the first pixel driving circuit area 110 is connected to the third current source module. The first pixel driving circuit columns 101, the second pixel driving circuit columns 102, and the third pixel driving circuit columns 103 are alternately arranged in sequence in the second direction.

[0084] Each fourth pixel driving circuit column 104 in the second pixel driving circuit area 120 is connected to the fourth current source module, each fifth pixel driving circuit column 105 in the second pixel driving circuit area 120 is connected to the fifth current source module, and each sixth pixel driving circuit column 106 in the second pixel driving circuit area 120 is connected to the sixth current source module. The fourth pixel driving circuit columns 104, the fifth pixel driving circuit columns 105, and the sixth pixel driving circuit columns 106 are alternately arranged in sequence in the second direction.

[0085] Each seventh pixel driving circuit column 107 in the third pixel driving circuit area 130 is connected to the seventh current source module, each eighth pixel driving circuit column 108 in the third pixel driving circuit area 130 is connected to the eighth current source module, and each ninth pixel driving circuit column 109 in the third pixel driving circuit area 130 is connected to the ninth current source module. The seventh pixel driving circuit columns 107, the eighth pixel driving circuit columns 108, and the ninth pixel driving circuit columns 109 are alternately arranged in sequence in the second direction.

[0086] In this embodiment, based on the above connection relationship, white balance adjustment of full-color display under different silicon-based Micro LED full-color technologies can be achieved.

[0087] Optional, combined Figures 7 to 9For the sub-pixel array in the first arrangement mode, the control signal is a first level signal, the data line 20 receives the first data signal, and the sub-pixels of different colors are arranged alternately in the first arrangement mode. Accordingly, each first pixel driving circuit column 101, each fourth pixel driving circuit column 104, and each seventh pixel driving circuit column 107 is used to adjust the white balance of the sub-pixels of the first color according to the current signal Iref provided by the connected current source module; each second pixel driving circuit column 102, each fifth pixel driving circuit column 105, and each eighth pixel driving circuit column 108 is used to adjust the white balance of the sub-pixels of the second color according to the current signal Iref provided by the connected current source module; each third pixel driving circuit column 103, each sixth pixel driving circuit column 106, and each ninth pixel driving circuit column 109 is used to adjust the white balance of the sub-pixels of the third color according to the current signal Iref provided by the connected current source module.

[0088] Optional, combined Figures 10 to 12 For the sub-pixel array in the second arrangement mode, the control signal is a second level signal, the data line 20 receives the second data signal, and the sub-pixels of different colors are arranged in zones in the second arrangement mode. Accordingly, each first pixel driving circuit column 101, each second pixel driving circuit column 102, and each third pixel driving circuit column 103 is used to perform white balance adjustment on the sub-pixels of the first color according to the current signal Iref provided by the connected current source module; each fourth pixel driving circuit column 104, each fifth pixel driving circuit column 105, and each sixth pixel driving circuit column 106 is used to perform white balance adjustment on the sub-pixels of the second color according to the current signal Iref provided by the connected current source module; each seventh pixel driving circuit column 107, each eighth pixel driving circuit column 108, and each ninth pixel driving circuit column 109 is used to perform white balance adjustment on the sub-pixels of the third color according to the current signal Iref provided by the connected current source module.

[0089] In an exemplary embodiment, in combination Figures 7 to 12 The current source module includes an adjustment unit and multiple transistor units. The adjustment unit is used to provide a current signal, and the transistor unit is used to adjust the white balance of the corresponding sub-pixel according to the current signal; the first input end of the transistor unit is connected to the power signal line VDD; the second input end of the transistor unit is connected to the output end of the adjustment unit; the output end of the transistor unit is connected to a corresponding pixel driving circuit column through the initialization signal line Vref.

[0090] In an exemplary embodiment, in combination Figures 7 to 12The regulation unit includes a current source device and a first transistor T6; a first terminal of the first transistor T6 is connected to the current source device, a second terminal of the first transistor T6 is grounded, and a control terminal of the first transistor T6 is connected to the first terminal of the first transistor T6. The transistor unit includes a second transistor T4 and a third transistor T5; a first terminal of the second transistor T4 is connected to a power signal line VDD, a second terminal of the second transistor T4 is connected to a first terminal of the third transistor T5, a control terminal of the second transistor T4 is connected to a corresponding pixel driving circuit column via an initialization signal line Vref, a second terminal of the third transistor T5 is grounded, and a control terminal of the third transistor T5 is connected to the control terminal of the first transistor T6.

[0091] Exemplarily, the current source device is a current-steering DAC (current-steering digital-to-analog converter), a digital-to-analog conversion circuit that converts digital signals into analog current signals by controlling the on / off state of a current source array. The current source device can be linked to a control signal input to control terminal c of the selection module 40 via a register. When control terminal c of the selection module 40 receives a first-level signal, the current source device operates to achieve white balance adjustment in a first arrangement. When control terminal c of the selection module 40 receives a second-level signal, the current source device operates to achieve white balance adjustment in a second arrangement.

[0092] Among them, DAC_R, DAC_G, and DAC_B are DACs adapted for white balance adjustment of red sub-pixels, green sub-pixels, and blue sub-pixels respectively. Iref_R, Iref_G, and Iref_B are current signals adapted for white balance adjustment of red sub-pixels, green sub-pixels, and blue sub-pixels respectively. Vref0, Vref1, Vref2, Vref3, etc. are initialization signal lines connecting different pixel drive columns respectively, and Vref0, Vref0', and Vref0'' are initialization signal lines adapted for white balance adjustment of red sub-pixels, green sub-pixels, and blue sub-pixels respectively. Register R, register G, and register B are registers adapted for white balance adjustment of red sub-pixels, green sub-pixels, and blue sub-pixels respectively. T4, T4', and T4'' are second transistors adapted for white balance adjustment of different sub-pixels respectively, T5, T5', and T5'' are third transistors adapted for white balance adjustment of different sub-pixels respectively, and T6, T6', and T6'' are first transistors adapted for white balance adjustment of different sub-pixels respectively. The driving backplane may further include scan lines 30 extending along the second direction and arranged along the first direction. One scan line 30 may be connected to one pixel driving circuit row.

[0093] In one exemplary embodiment, using a 7T1C driver circuit as an example, the pixel driver circuit includes an initialization transistor; a first terminal of the initialization transistor is connected to an initialization signal line Vref, a second terminal of the initialization transistor is connected to the anode of a subpixel, and a control terminal of the initialization transistor is connected to a scan line. This facilitates achieving the white balance adjustment required for full-color display. Exemplarily, the first terminal of the initialization transistor is the source of the initialization transistor, and the second terminal of the initialization transistor is the drain of the initialization transistor.

[0094] In an exemplary embodiment, referring to Figure 13 The selection module 40 is a two-input multiplexer (MUX); the output end of the multiplexer is connected to the corresponding data line 20, the first input end of the multiplexer is used to receive the first data signal, the second input end of the multiplexer is used to receive the second data signal, and the control end of the multiplexer is used to receive the control signal; in this way, the structure of the selection module 40 is simple, easy to implement, and low in cost.

[0095] In an exemplary embodiment, a display device is provided. The display device may be a silicon-based microdisplay device, such as but not limited to a wearable display device such as AR, and the display device includes a driving backplane provided in any of the above embodiments.

[0096] The display device and driving backplane provided in the embodiments of the present application belong to the same inventive concept, can solve the same technical problems, and thus achieve the same technical effects, and the repeated contents will not be repeated here.

[0097] In the description of this specification, reference to the terms "some embodiments" or "other embodiments" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0098] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0099] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be determined by the appended claims.

Claims

1. A driving backplane, characterized in that: It includes a silicon substrate and a plurality of pixel driving circuits, a plurality of data lines and a plurality of selection modules located on the silicon substrate; The plurality of pixel driving circuits are arranged in an array along a first direction and a second direction, wherein the first direction intersects the second direction; The data lines extend along the first direction, and the plurality of data lines are sequentially arranged along the second direction, and each of the data lines is connected to a pixel driving circuit column in the first direction; The plurality of selection modules correspond to the plurality of data lines one by one, the output end of the selection module is connected to the corresponding data line, the first input end of the selection module is used to receive a first data signal, the second input end of the selection module is used to receive a second data signal, and the control end of the selection module is used to receive a control signal; For the sub-pixel array in the first arrangement, the control signal is a first level signal, the output end of the selection module outputs the first data signal, and the first data signal is used to drive the sub-pixel array in the first arrangement, in which sub-pixels of different colors are arranged alternately; For the sub-pixel array in the second arrangement mode, the control signal is a second level signal, the output end of the selection module outputs the second data signal, and the second data signal is used to drive the sub-pixel array in the second arrangement mode. Sub-pixels of different colors are arranged in partitions in the second arrangement mode.

2. The driving backplane according to claim 1, characterized in that: It also includes a first current source module to a ninth current source module; the plurality of pixel driving circuits are divided into a first pixel driving circuit area, a second pixel driving circuit area and a third pixel driving circuit area; Each first pixel driving circuit column in the first pixel driving circuit area is connected to a first current source module; Each second pixel driving circuit column in the first pixel driving circuit area is connected to a second current source module; Each third pixel driving circuit column in the first pixel driving circuit area is connected to a third current source module; Each fourth pixel driving circuit column in the second pixel driving circuit area is connected to a fourth current source module; Each fifth pixel driving circuit column in the second pixel driving circuit area is connected to a fifth current source module; Each sixth pixel driving circuit column in the second pixel driving circuit area is connected to a sixth current source module; Each seventh pixel driving circuit column in the third pixel driving circuit area is connected to a seventh current source module; Each eighth pixel driving circuit column in the third pixel driving circuit area is connected to an eighth current source module; Each ninth pixel driving circuit column in the third pixel driving circuit area is connected to a ninth current source module; Wherein, the first pixel driving circuit column, the second pixel driving circuit column and the third pixel driving circuit column are alternately arranged in sequence in the second direction; The fourth pixel driving circuit column, the fifth pixel driving circuit column and the sixth pixel driving circuit column are alternately arranged in sequence in the second direction; The seventh pixel driving circuit column, the eighth pixel driving circuit column, and the ninth pixel driving circuit column are alternately arranged in sequence in the second direction.

3. The driving backplane according to claim 2, characterized in that: For the sub-pixel array under the first arrangement: Each of the first pixel driving circuit columns, each of the fourth pixel driving circuit columns, and each of the seventh pixel driving circuit columns is configured to perform white balance adjustment on a sub-pixel of a first color according to a current signal provided by a connected current source module; Each of the second pixel driving circuit columns, each of the fifth pixel driving circuit columns, and each of the eighth pixel driving circuit columns is configured to perform white balance adjustment on the sub-pixels of the second color according to the current signal provided by the connected current source module; Each of the third pixel driving circuit columns, each of the sixth pixel driving circuit columns, and each of the ninth pixel driving circuit columns is configured to perform white balance adjustment on the sub-pixels of the third color according to current signals provided by the connected current source modules.

4. The driving backplane according to claim 2, characterized in that: For the sub-pixel array under the second arrangement: Each of the first pixel driving circuit columns, each of the second pixel driving circuit columns, and each of the third pixel driving circuit columns is configured to perform white balance adjustment on a sub-pixel of a first color according to a current signal provided by a connected current source module; Each of the fourth pixel driving circuit columns, each of the fifth pixel driving circuit columns, and each of the sixth pixel driving circuit columns is configured to perform white balance adjustment on the sub-pixels of the second color according to the current signal provided by the connected current source module; Each of the seventh pixel driving circuit columns, each of the eighth pixel driving circuit columns, and each of the ninth pixel driving circuit columns is configured to perform white balance adjustment on the sub-pixels of the third color according to current signals provided by the connected current source modules.

5. The driving backplane according to claim 2, characterized in that: The current source module includes a regulating unit and a plurality of transistor units; The first input terminal of the transistor unit is connected to the power signal line; The second input terminal of the transistor unit is connected to the output terminal of the regulating unit, and the regulating unit is used to provide a current signal; The output end of the transistor unit is connected to a corresponding pixel driving circuit column through an initialization signal line, and the transistor unit is used to perform white balance adjustment on the corresponding sub-pixel according to the current signal.

6. The driving backplane according to claim 5, characterized in that: The regulating unit includes a current source device and a first transistor; a first terminal of the first transistor is connected to the current source device, a second terminal of the first transistor is grounded, and a control terminal of the first transistor is connected to the first terminal of the first transistor; The transistor unit includes a second transistor and a third transistor; the first end of the second transistor is connected to the power signal line, the second end of the second transistor is connected to the first end of the third transistor, the control end of the second transistor is connected to a corresponding pixel driving circuit column through the initialization signal line, the second end of the third transistor is grounded, and the control end of the third transistor is connected to the control end of the first transistor.

7. The driving backplane according to claim 5, characterized in that: The pixel driving circuit includes an initialization transistor; The first end of the initialization transistor is connected to the initialization signal line, the second end of the initialization transistor is used to connect to the anode of the sub-pixel, and the control end of the initialization transistor is used to connect to the scan line.

8. The driving backplane according to claim 1, characterized in that: The selection module is a two-input multiplexer; The output end of the multiplexer is connected to the corresponding data line, the first input end of the multiplexer is used to receive the first data signal, the second input end of the multiplexer is used to receive the second data signal, and the control end of the multiplexer is used to receive the control signal.

9. The driving backplane according to claim 1, characterized in that: In the first arrangement, the sub-pixels of the first color, the sub-pixels of the second color, and the sub-pixels of the third color are arranged in sequence in the second direction; or, in the first arrangement, the sub-pixels of the first color, the sub-pixels of the second color, and the sub-pixels of the third color are stacked in sequence in a direction perpendicular to the silicon substrate; In the second arrangement mode, the sub-pixels of the first color are arranged in an array within the first display area, the sub-pixels of the second color are arranged in an array within the second display area, and the sub-pixels of the third color are arranged in an array within the third display area, wherein the first display area, the second display area and the third display area are arranged sequentially in the second direction.

10. A display device, characterized in that: Comprising the drive backplane according to any one of claims 1-9.

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