Gate driving unit, gate driving circuit, compensation method and display panel

Abstract

The invention belongs to the technical field of display driving, and particularly relates to a gate driving unit, a gate driving circuit, a compensation method and a display panel, and the gate driving unit comprises a detection module which is used for detecting actual electrical parameters on a driving control node in a detection stage, the external control device outputs a compensation signal according to a comparison result of the actual electrical parameter and a preset reference range; or / and a compensation module which is configured to be connected with the external control device, the output end of the pre-charging module and the driving control node, and is used for responding to a compensation signal output by the external control device, compensating the pre-charging voltage output by the pre-charging module and then outputting the pre-charging voltage to the driving control node; through real-time comprehensive detection and dynamic cooperative compensation, the influence of threshold voltage drift of the pre-charge transistor and the output transistor on the driving control node is actively counteracted, and the output stability of the gate driving unit is improved.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of display driving, and particularly relates to a gate driving unit, a gate driving circuit, a compensation method and a display panel. BACKGROUND

[0002] GOA (Gate Driver on Array) is a key circuit for TFT-LCD (Thin-Film Transistor Liquid Crystal Display) to realize line-by-line scanning; the GOA circuit includes a pre-charge module for pre-charging a driving control node (commonly known as a Q point) and an output module for outputting a scanning signal.

[0003] However, in long-term work or high-temperature environments, the threshold voltages of the pre-charge transistor in the pre-charge module and the output transistor in the output module will drift to different degrees, causing Q point voltage fluctuations, affecting display uniformity and driving stability.

[0004] Therefore, how to cooperatively compensate for the threshold voltage drift of the pre-charge transistor and the output transistor is a problem to be solved at present. SUMMARY

[0005] The embodiments of the application provide a gate driving unit, a gate driving circuit, a compensation method and a display panel, and the application actively offsets the influence of the threshold voltage drift of the pre-charge transistor and the output transistor on the driving control node through real-time comprehensive detection and dynamic cooperative compensation, thereby improving the output stability of the gate driving unit.

[0006] In a first aspect, the application provides a gate driving unit, including a pre-charge module, a driving control node and an output module connected to the driving control node, the gate driving unit further comprising: a detection module connected to an external control device, an output end of the pre-charge module and the driving control node, configured to detect an actual electrical parameter on the driving control node in a detection stage, so that the external control device outputs a compensation signal according to the comparison result of the actual electrical parameter and a preset reference range; wherein the change of the actual electrical parameter reflects the threshold voltage drift of a pre-charge transistor in the pre-charge module or / and the threshold voltage drift of an output transistor in the output module; or / and a compensation module connected to the external control device, the output end of the pre-charge module and the driving control node, configured to output the pre-charge voltage output by the pre-charge module to the driving control node after compensation in response to the compensation signal output by the external control device.

[0007] In a second aspect, the present application provides a gate drive circuit, which comprises N cascaded gate drive units, wherein at least one of the gate drive units comprises the above-mentioned gate drive unit.

[0008] In a third aspect, the present application provides a gate drive circuit, which comprises N cascaded gate drive units, and a target stage gate drive unit comprises a pre-charge module, a drive control node, an output module, a detection module and a compensation module; the detection module is connected with an external control device, an output end of the pre-charge module and the drive control node, and is configured to detect an actual electrical parameter on the drive control node in a detection stage, so that the external control device outputs a compensation signal according to a comparison result of the actual electrical parameter and a preset reference range; wherein the actual electrical parameter comprises threshold voltage drift of a prediction transistor in the pre-charge module and threshold voltage drift of an output transistor in the output module; the compensation module is connected with the external control device, the output end of the pre-charge module and the drive control node, and is configured to output a pre-charge voltage output by the pre-charge module to the drive control node after compensation in response to the compensation signal output by the external control device; wherein the target stage gate drive unit is a gate drive unit close to the external control device. The other stage gate drive unit comprises a pre-charge module, a drive control node, an output module connected with the control node and a compensation module; the compensation module is connected with the external control device, the output end of the pre-charge module and the drive control node, and is configured to output a pre-charge voltage output by the pre-charge module to the drive control node after compensation in response to the compensation signal output by the external control device.

[0009] In a fourth aspect, the present application provides a compensation method applied to a gate drive circuit, which comprises: in a detection stage, acquiring an actual electrical parameter on a drive control node of a target stage gate drive unit through a detection module; wherein the target stage gate drive unit comprises the detection module, and the actual electrical parameter is used for enabling an external control device to output a compensation signal according to a comparison result of the actual electrical parameter and a preset reference range; a compensation module in each stage gate drive unit receives and responds to the compensation signal, and outputs a pre-charge voltage output by a pre-charge module to the drive control node after compensation.

[0010] In a fifth aspect, the present application provides a display panel, which comprises a display area and a non-display area; the display area comprises a plurality of scanning lines; the non-display area comprises a gate drive circuit, and a drive output end in the gate drive circuit is electrically connected with at least one scanning line.

[0011] The technical scheme provided by the embodiments of the present application has at least the following beneficial effects: The application acquires actual electrical parameters reflecting the comprehensive state of threshold voltage drift of the pre-charging transistor and the output transistor in real time through a detection module, so that the external control device can output a dynamic compensation signal according to the comparison result of the parameters and a preset reference range; then the driving control node can be directly or indirectly compensated through the compensation signal, so that the potential of the driving control node is dynamically corrected and stabilized in the expected range. Through real-time comprehensive detection and dynamic cooperative compensation, the application actively offsets the influence of the threshold voltage drift of the pre-charging transistor and the output transistor on the driving control node, so as to maintain the potential of the driving control node and the final output signal waveform in the stable state required by the design at all times, improve the output waveform distortion and timing mismatch problem caused by the threshold voltage drift of the two types of transistors, and improve the output stability of the gate drive unit under high temperature and long-term work. BRIEF DESCRIPTION OF DRAWINGS

[0012] The accompanying drawings, which are incorporated into and form a part of the specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the disclosure. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and other drawings can be obtained from these drawings without creative labor for those skilled in the art.

[0013] Figure 1 The first gate drive unit provided by the embodiment of the application is shown in the structural schematic diagram.

[0014] Figure 2 The second gate drive unit provided by the embodiment of the application is shown in the structural schematic diagram.

[0015] Figure 3 The third gate drive unit provided by the embodiment of the application is shown in the structural schematic diagram.

[0016] Figure 4 The first gate drive unit provided by the embodiment of the application is shown in the circuit schematic diagram.

[0017] Figure 5 The driving timing diagram provided by the embodiment of the application is shown.

[0018] Figure 6 The second gate drive unit provided by the embodiment of the application is shown in the circuit schematic diagram.

[0019] Figure 7 Another driving timing diagram provided by the embodiment of the application is shown.

[0020] Figure 8 The third gate drive unit provided by the embodiment of the application is shown in the circuit schematic diagram.

[0021] Figure 9 The diagram shown is another driving timing diagram provided in an embodiment of this application.

[0022] Figure 10 The diagram shown is a flowchart of a compensation method provided in an embodiment of this application.

[0023] Explanation of reference numerals in the attached figures: 100. Gate driving unit; 110. Precharge module; 120. Output module; 130. Detection module; 140. Compensation module; 200. External control device; M1, precharge transistor; M2, first output transistor; M3, second output transistor; C0, bootstrap capacitor; T1, first transistor; T2, second transistor; T3, third transistor; T4, fourth transistor; T5, fifth transistor; T6, sixth transistor; T7, seventh transistor; T8, eighth transistor; C1, first capacitor; C2, second capacitor; Q, drive control node; S, detection node; Vs, trigger terminal; Gs, detection terminal; CVGH, compensation terminal; FK, precharge signal terminal; CK, clock signal terminal; TK, detection timing terminal; MK, compensation timing terminal; VSS, low level terminal; VDD, power supply terminal; Gout, drive output terminal; Fout, stage transmission output terminal. Detailed Implementation

[0024] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided to make this application more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art.

[0025] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a thorough understanding of embodiments of this application. However, those skilled in the art will recognize that the technical solutions of this application can be practiced without one or more of the specific details, or other methods, components, apparatuses, steps, etc., can be employed. In other instances, well-known methods, apparatuses, implementations, or operations are not shown or described in detail to avoid obscuring various aspects of this application.

[0026] The present application will now be described in further detail with reference to the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present application, and should not be construed as limiting the present application.

[0027] In a first aspect, this application provides a gate driving unit, specifically including the following embodiments: Figure 1 The diagram shows a schematic of the structure of a first gate driving unit 100 provided in this embodiment. The gate driving unit 100 of this embodiment is applied to a gate driving circuit, which includes N cascaded gate driving units 100. The gate driving unit 100 of this embodiment includes a pre-charge module 110, a drive control node Q, and an output module 120. Specifically, the pre-charge module 110 is connected to the pre-charge signal terminal FK and is used to provide a pre-charge voltage to the drive control node Q under the action of the pre-charge signal output from the pre-charge signal terminal FK. The output module 120 is connected to the drive control node Q and the clock signal terminal CK, and is used to be in an open state under the action of a high potential on the drive control node Q, outputting the clock signal output from the clock signal terminal CK as a gate driving signal through the drive output terminal Gout, and can also output the clock signal as a cascade signal through the cascade output terminal Fout. The pre-charge module 110 of this embodiment includes at least one pre-charge transistor M1, and the output module 120 includes at least one output transistor.

[0028] like Figure 1 As shown, the gate drive unit 100 further includes a detection module 130, which is configured to be connected to the output terminal of the external control device 200, the precharge module 110 and the drive control node Q, for detecting the actual electrical parameters on the drive control node Q during the detection phase, so that the external control device 200 outputs a compensation signal based on the comparison result of the actual electrical parameters and the preset reference range.

[0029] It should be noted that the detection phase in this embodiment is during the vertical blanking period of each frame, thus not affecting the normal display scanning. The actual electrical parameters refer to the electrical quantities directly measured or indirectly derived on the drive control node Q by the detection module 130 during the detection phase, such as the actual voltage value or the actual current value. In addition, the changes in the actual electrical parameters in this embodiment reflect the threshold voltage drift of the precharge transistor M1 in the precharge module 110 and / or the threshold voltage drift of the output transistor in the output module 120. That is to say, the changes in the values ​​of the actual electrical parameters can comprehensively reflect or correlate the threshold voltage (Vth) drift of both the precharge transistor M1 and the output transistor. Therefore, the combined effect of the threshold voltage drift of the two transistors on the circuit can be evaluated by obtaining the parameters from a single detection, avoiding the complexity of separate detection and the problem of asynchronous compensation.

[0030] In this embodiment, the external control device 200 is an environmental feature of the gate driving unit 100. It can be a timing controller in the display panel or an additional processor. It stores a preset reference range, which represents the normal value range of the electrical parameters of the driving control node Q in the initial or ideal state of the circuit. The external control device 200 calculates the difference between the actual electrical parameters reported by the detection module 130 and the reference range (e.g., calculates the difference), and generates a compensation signal based on the difference. The compensation signal can directly compensate the precharge module 110 to indirectly compensate the driving control node Q, or it can directly compensate the driving control node Q.

[0031] Therefore, this application uses the detection module 130 to acquire in real time the actual electrical parameters reflecting the combined state of the threshold voltage drift of the precharge transistor M1 and the output transistor. This allows the external control device 200 to output a dynamic compensation signal based on the comparison of these parameters with a preset reference range. This compensation signal can then be used to directly or indirectly compensate the drive control node Q, dynamically correcting and stabilizing its potential within the expected range. Through real-time integrated detection and dynamic collaborative compensation, this application actively counteracts the impact of threshold voltage drift of the precharge transistor M1 and the output transistor on the drive control node Q. This ensures that the potential of the drive control node Q and the final output signal waveform are always maintained in the stable state required by the design, improving the output waveform distortion and timing mismatch problems caused by threshold voltage drift of the two types of transistors. This significantly improves the output stability and display uniformity of the gate drive unit 100 under high temperature and long-term operation.

[0032] Figure 2 The diagram shown is a structural schematic of the second type of gate driving unit 100 provided in an embodiment of this application; Figure 2 The illustrated embodiments and Figure 1 The difference is: Figure 1 The gate drive unit 100 shown only includes the detection module 130, while Figure 2 The gate drive unit 100 shown only includes the compensation module 140; specifically as follows: Figure 2 As shown, the gate drive unit 100 also includes a compensation module 140, which is configured to be connected to the output terminal of the external control device 200, the precharge module 110 and the drive control node Q. It is used to respond to the compensation signal output by the external control device 200, compensate the precharge voltage output by the precharge module 110 and output it to the drive control node Q.

[0033] It should be noted that the detection module 130 in this embodiment may be included in any one of the N cascaded gate driving units 100. According to the principle of equivalent transistor drift, the compensation signal obtained by the gate driving unit 100 containing the detection module 130 can be applied to other gate driving units 100 at the same time to achieve the purpose of single detection but unified compensation.

[0034] In this embodiment, the compensation module 140 responds to the dynamic compensation signal generated by the detection result, adjusts the original voltage provided by the pre-charge module 110 in real time, and applies the compensated voltage to the drive control node Q, thereby directly raising and stabilizing the potential of the node. The dynamic compensation function of the compensation module 140 directly cancels the voltage decay of the drive control node Q caused by the threshold voltage drift of the pre-charge transistor M1 and the output transistor. This ensures that the drive control node Q can reach the target potential required by the design in each working cycle, thereby ensuring the stability of the gate-source voltage of the output transistor. Ultimately, it ensures that the output gate drive signal maintains the initial design state in terms of amplitude, rise time, and waveform consistency. Therefore, this application achieves real-time, active, and precise cancellation of the impact of threshold voltage drift through the compensation module 140, improves the instability problem caused by the threshold voltage drift of the pre-charge transistor M1 and the output transistor, and significantly improves the reliability, consistency, and display quality of the gate drive circuit under high temperature and long-term working conditions.

[0035] Figure 3 The diagram shown is a structural schematic of the third type of gate driving unit 100 provided in this application embodiment; Figure 3 The gate driving unit 100 shown is Figure 2 and Figure 1 The difference shown is: Figure 3 The gate driving unit 100 includes both a detection module 130 and a compensation module 140; specifically as follows: Figure 3 As shown, the gate drive unit 100 further includes a detection module 130 and a compensation module 140. The detection module 130 is configured to be connected to the output of the external control device 200, the precharge module 110, and the drive control node Q. It is used to detect the actual electrical parameters on the drive control node Q during the detection phase, so that the external control device 200 outputs a compensation signal based on the comparison result between the actual electrical parameters and a preset reference range. The change in the actual electrical parameters reflects the threshold voltage drift of the precharge transistor M1 in the precharge module 110 and / or the threshold voltage drift of the output transistor in the output module 120. The compensation module 140 is configured to be connected to the output of the external control device 200, the precharge module 110, and the drive control node Q. It is used to compensate the precharge voltage output by the precharge module 110 in response to the compensation signal output by the external control device 200 and then output it to the drive control node Q.

[0036] In this embodiment, the detection module 130 acquires the actual electrical parameters reflecting the combined state of the threshold voltage drift of the pre-charge transistor M1 and the output transistor in real time, and feeds these parameters back to the external control device 200 for analysis and decision-making. The external control device 200 generates a corresponding dynamic compensation signal based on the range and trend of the parameter deviation from the reference and sends it to the compensation module 140. The compensation module 140 responds to the compensation signal, precisely adjusts the pre-charge voltage, and outputs it to the drive control node Q, thereby dynamically correcting and stabilizing the potential of the node. Therefore, this embodiment achieves real-time monitoring and immediate compensation of the threshold voltage drift through the synergistic effect of the detection module 130 and the compensation module 140, ensuring that the compensation amount always matches the actual drift degree. This not only offsets the influence of unilateral drift but also effectively balances the combined effect caused by the inconsistency of the pre-charge transistor M1 and the output transistor due to drift. It achieves synergistic compensation for the threshold voltage drift of the pre-charge transistor M1 and the output transistor, significantly improving the reliability of the gate drive unit 100 under conditions such as high temperature and long-term operation, thereby ensuring the uniformity and stability of the display screen.

[0037] Figure 4 The diagram shown is a circuit schematic of the first gate driving unit 100 provided in an embodiment of this application; as follows: Figure 4 As shown, the precharge module 110 in this embodiment includes a precharge transistor M1. The control terminal of the precharge transistor M1 is connected to the precharge signal terminal FK. The first terminal of the precharge transistor M1 is connected to the power supply terminal VDD, and the second terminal of the precharge transistor M1 is connected to the drive control node Q. For the nth stage gate drive unit 100, the precharge signal terminal FK can be the stage output terminal Fout or the drive output terminal Gout of the nith stage gate drive unit 100.

[0038] The output module 120 of this embodiment includes a first output transistor M2, a second output transistor M3, and a bootstrap capacitor C0. The control terminal of the first output transistor M2 is connected to the drive control node Q, the first terminal of the first output transistor M2 is connected to the clock signal terminal CK, and the second terminal of the first output transistor M2 serves as the stage transmission output terminal Fout. The control terminal of the second output transistor M3 is connected to the drive control node Q, the first terminal of the second output transistor M3 is connected to the clock signal terminal CK, and the second terminal of the second output transistor M3 serves as the drive output terminal Gout. The first terminal of the bootstrap capacitor C0 is connected to the drive control node Q, and the second terminal of the bootstrap capacitor C0 is connected to the second terminal of the second output transistor M3. For the nth stage gate drive unit 100, the clock signal terminal CK represents the clock signal line corresponding to the nth stage gate drive unit 100.

[0039] In this embodiment, the detection module 130 includes a first transistor T1, a first capacitor C1, a second transistor T2, and a third transistor T3. Specifically, the control terminal of the first transistor T1 is connected to the trigger terminal Vs of the external control device 200, the first terminal of the first transistor T1 is connected to the power supply terminal VDD, and the second terminal of the first transistor T1 is connected to the detection node S. The first terminal of the first capacitor C1 is connected to the detection node S, and the second terminal of the first capacitor C1 is connected to the low-level terminal VSS. The control terminal of the second transistor T2 is connected to the detection node S, the first terminal of the second transistor T2 is connected to the detection timing terminal TK, and the second terminal of the second transistor T2 serves as the output terminal of the detection module 130. The control terminal of the third transistor T3 is connected to the detection node S, the first terminal of the third transistor T3 is connected to the control terminal of the third transistor T3, and the second terminal of the third transistor T3 is connected to the drive control node Q.

[0040] It should be noted that in this embodiment, the first transistor T1 has the same device parameters as the precharge transistor M1 of the precharge module 110, and the second transistor T2 has the same device parameters as the output transistor of the output module 120. Device parameters include the transistor's size, aspect ratio, manufacturing process, and material, etc. In other words, the first transistor T1 simulates the threshold voltage drift of the precharge transistor M1, and the second transistor T2 simulates the threshold voltage drift of the output transistor. This is combined with... Figure 5 The timing diagram shown below illustrates the working principle of the detection module 130 in this embodiment: (1) Pre-charging stage of detection node S (i.e., detection triggering stage): The external control device 200 first outputs a valid detection enable signal to the control terminal of the first transistor T1 through the trigger terminal Vs, so that the first transistor T1 is turned on; at this time, the voltage of the power supply terminal VDD charges the detection node S through the turned-on first transistor T1 and stores it in the first capacitor C1; this charging process simulates the charging behavior of the pre-charging module 110 of the normal display stage to the drive control node Q; therefore, the voltage reached by the detection node S after charging is directly affected by the threshold voltage of the first transistor T1 itself. If the threshold voltage of the first transistor T1 drifts positively (increases), its conduction capability weakens, and the final pre-charging position of the detection node S will decrease; in this stage, the detection module 130 first captures the threshold voltage state of the simulated pre-charging transistor M1.

[0041] (2) Detection signal generation stage: After pre-charging is completed, the detection enable signal is turned off, and the first transistor T1 is turned off. Subsequently, the detection timing terminal TK provides an effective detection clock signal to the first terminal of the second transistor T2. At this time, whether the second transistor T2 is turned on and the magnitude of its conduction current are controlled by the voltage of its control electrode, i.e., the voltage of the detection node S. Since the second transistor T2 and the output transistor of the output module 120 have the same device parameters (such as size, channel type, etc.), the conduction characteristics of the second transistor T2 can simulate the state of the output transistor. Finally, the current or voltage amplitude of the detection signal output from the second terminal of the second transistor T2 is determined by the voltage of the detection node S and the threshold voltage of the second transistor T2 itself, thereby integrating the threshold voltage drift information of the pre-charge transistor M1 and the output transistor.

[0042] (3) Isolation and protection stage: The control terminal and the first terminal of the third transistor T3 are both connected to the detection node S, forming a diode connection structure. Its second terminal is connected to the drive control node Q, which mainly plays the role of isolation and clamping. During the detection stage, the third transistor T3 is in the conducting state, and the detection node S and the drive control node Q are electrically connected. Detecting the detection node S is equivalent to detecting the drive control node Q. During the non-detection stage, especially when the drive control node Q has a large voltage swing due to normal scanning output, the third transistor T3 is turned off to prevent high voltage from being reverse coupled from the drive control node Q to the detection node S, thereby protecting the voltage of the detection node S from interference and ensuring that the detection node S can start pre-charging in the initial state at the beginning of the next detection cycle, thus ensuring the stability and repeatability of the detection signal.

[0043] In summary, under the timing control of the external control device 200, the detection module 130 of this embodiment periodically executes the above three steps, integrating the detection of the threshold voltage drift of the pre-charge transistor M1 and the output transistor into the same detection node S and the same output signal. By reading and analyzing the change of the signal received at the detection end relative to a preset reference, the external control device 200 can obtain comprehensive information on the threshold voltage drift of the pre-charge transistor M1 and the output transistor, providing a direct basis for generating a cooperative compensation signal.

[0044] In one embodiment, such as Figure 4 As shown, the gate driving unit 100 in this embodiment further includes a reset module, a noise reduction module, and a pull-down module; wherein, the reset module is used to reset the potential on the drive control node Q; the pull-down module is used to pull down the potentials of the drive control node Q, the drive output terminal Gout, and the stage transmission output terminal Fout to a low level; and the noise reduction module is used to perform noise reduction processing on the potentials of the drive control node Q, the drive output terminal Gout, and the stage transmission output terminal Fout during the noise reduction period.

[0045] Figure 6 The diagram shown is a circuit schematic of the second type of gate driving unit 100 provided in an embodiment of this application. Figure 6 As shown, the compensation module 140 includes a second capacitor C2, a fourth transistor T4, and a fifth transistor T5. Specifically, the first terminal of the second capacitor C2 is connected to the output terminal of the precharge module 110; the control terminal of the fourth transistor T4 is connected to the compensation timing terminal MK, the first terminal of the fourth transistor T4 is connected to the compensation terminal CVGH of the external control device 200, and the second terminal of the fourth transistor T4 is connected to the second terminal of the second capacitor C2; the control terminal of the fifth transistor T5 is connected to the first pull-down terminal, the first terminal of the fifth transistor T5 is connected to the second terminal of the second capacitor C2, and the second terminal of the fifth transistor T5 is connected to the low-level terminal VSS.

[0046] It should be noted that, for the nth stage gate driving unit 100, the compensation timing terminal MK can be the stage output terminal Fout (i.e., Fn-1) of the (n-1)th stage gate driving unit 100, and the first pull-down terminal can be the stage output terminal Fout (i.e., Fn+2) of the (n+2)th stage gate driving unit 100; here, combined with Figure 7 The timing diagram shown below illustrates the working principle of the compensation module 140 in this embodiment: (1) Compensation voltage writing stage: When the compensation timing terminal MK (i.e., Fn-1) signal is valid, the fourth transistor T4 is turned on. At this time, the compensation voltage V_COMP generated by the external control device 200 based on the detection result is applied to the second terminal (referred to as node A) of the second capacitor C2 through the turned-on fourth transistor T4. Since the first terminal of the second capacitor C2 is directly connected to the drive control node Q, according to the coupling principle of capacitors, the potential of the drive control node Q will also be affected by the voltage change of node A. By setting an appropriate compensation voltage V_COMP, the potential of the drive control node Q can be actively adjusted to shift it towards the target compensation potential.

[0047] (2) Compensation network reset stage: When the first pull-down terminal (i.e. Fn+2) signal is valid, the fifth transistor T5 is turned on. The turned-on fifth transistor T5 pulls the potential of node A down to the low level terminal VSS, thereby releasing the charge stored in the second capacitor C2, resetting the compensation network, and preparing for the writing of the compensation voltage in the next working cycle.

[0048] (3) Compensation effect realization mechanism: The output terminal of the precharge module 110 directly provides the precharge voltage to the drive control node Q. When the threshold voltage of the precharge transistor M1 drifts, its output voltage will decrease, resulting in insufficient charging at point Q. In this embodiment, the second capacitor C2 is connected between the drive control node Q and node A. During the compensation writing stage, by actively changing the compensation voltage V_COMP of node A, the potential of the drive control node Q can be dynamically raised by utilizing the capacitive coupling effect. In this way, even if the performance of the precharge transistor M1 degrades, the potential at its output terminal can be corrected under the action of the compensation module 140, thereby ensuring that the precharge voltage of the drive control node Q is maintained at the required stable value, offsetting the effect of threshold voltage drift, and keeping the output signal waveform stable.

[0049] Furthermore, in this embodiment, the first end of the bootstrap capacitor C0 in the output module 120 is connected to the second end of the second capacitor C2, and the second end of the bootstrap capacitor C0 is connected to the drive output terminal Gout.

[0050] In one embodiment, such as Figure 6 As shown, the compensation module 140 in this embodiment further includes a sixth transistor T6, a seventh transistor T7, and an eighth transistor T8. Specifically, the control terminal of the sixth transistor T6 is connected to the second pull-down terminal, and the first terminal of the sixth transistor T6 is connected to the low-level terminal VSS. The control terminal of the seventh transistor T7 is connected to the third pull-down terminal, the first terminal of the seventh transistor T7 is connected to the power supply terminal VDD, and the second terminal of the seventh transistor T7 is connected to the second terminal of the sixth transistor T6. The control terminal of the eighth transistor T8 is connected to the second terminal of the seventh transistor T7, the first terminal of the eighth transistor T8 is connected to the low-level terminal VSS, and the second terminal of the eighth transistor T8 is connected to the first terminal of the fifth transistor T5.

[0051] It should be noted that, for the nth gate drive unit 100, the second pull-down terminal can be the stage transmission output terminal (i.e., Fn-1) of the (n-1)th gate drive unit 100, and the third pull-down terminal can be the stage transmission output terminal (i.e., Fn-2) of the (n-2)th gate drive unit 100; here, the second terminal of the second capacitor C2 is taken as node A, and the control terminal of the eighth transistor T8 is taken as node B.

[0052] In the compensation module 140 of this embodiment, the newly added sixth transistor T6, seventh transistor T7, and eighth transistor T8 together constitute an auxiliary pull-down network. Its core purpose is to isolate node A during the output phase (when Gout is active), preventing the voltage swing of the drive control node Q from interfering with the stable state of the compensation network through capacitive coupling, thereby ensuring the accuracy of the compensation and the precision of the output signal. The specific working principle is as follows: (1) In the initial stage of pre-charge, when the third pull-down terminal (such as Fn-2) signal is valid, the seventh transistor T7 turns on, transmitting the power supply voltage VDD to node B, pulling the potential of node B high, and causing the eighth transistor T8 to turn on; the turned-on eighth transistor T8 pulls the potential of node A low. At this time, since the control terminal signal of the fifth transistor T5 is not yet valid, the fifth transistor T5 is in the off state. Therefore, the turn-on of the eighth transistor T8 provides a pull-down path for node A.

[0053] (2) When the second pull-down terminal (such as Fn-1) signal is valid, the sixth transistor T6 is turned on, pulling the potential of node B down to a low level, turning off the eighth transistor T8, and cutting off the pull-down path of node A. At this time, node A of the compensation module 140 returns to a high impedance state, preparing for the fourth transistor T4 to adjust the potential of node A according to the new compensation voltage V_COMP in the next working cycle.

[0054] In summary, this embodiment ensures the stability of the compensation voltage storage node (node ​​A) during the output scan by using the sixth transistor T6, the seventh transistor T7, and the eighth transistor T8, thereby improving the reliability and accuracy of threshold voltage compensation.

[0055] Figure 8 The diagram shown is a circuit schematic of the third gate driving unit 100 provided in an embodiment of this application. Figure 8 As shown, in this embodiment, the compensation module 140 includes a fourth transistor T4, a second capacitor C2, a fifth transistor T5, and a sixth transistor T6. Specifically, the control terminal of the fourth transistor T4 is connected to the output terminal of the precharge module 110, the first terminal of the fourth transistor T4 is connected to the control terminal of the fourth transistor T4, and the second terminal of the fourth transistor T4 is connected to the drive control node Q. The first terminal of the second capacitor C2 is connected to the first terminal of the fourth transistor T4. The control terminal of the fifth transistor T5 is connected to the compensation timing terminal MK, the first terminal of the fifth transistor T5 is connected to the second terminal of the second capacitor C2, and the second terminal of the fifth transistor T5 is connected to the compensation terminal CVGH of the external control device 200. The control terminal of the sixth transistor T6 is connected to the output terminal of the output module 120, the first terminal of the sixth transistor T6 is connected to the second terminal of the second capacitor C2, and the second terminal of the sixth transistor T6 is connected to the low-level terminal VSS.

[0056] It should be noted that, for the nth stage gate driving unit 100, the compensation timing terminal MK can be the stage transmission output terminal of the (n-1)th stage gate driving unit 100; here, in conjunction with Figure 9 The timing diagram shown below illustrates the working principle of the compensation module 140 in this embodiment: (1) Compensation voltage writing and storage: When the compensation timing signal (Fn-1) output by the compensation timing terminal MK is valid, the fifth transistor T5 is turned on. At this time, the dynamic compensation voltage V_COMP generated by the external control device 200 according to the detection result is stored in the second capacitor C2 through the turned-on fifth transistor T5.

[0057] (2) Dynamic boosting and compensation of drive node voltage: The fourth transistor T4 is connected to the drive control node Q using a diode connection. When the precharge module 110 is working and charging the drive control node Q, the fourth transistor T4 is turned on and acts as a source follower or voltage buffer, transferring the high potential of node A (which already includes the compensation component) to the drive control node Q. Therefore, the final voltage obtained by the drive control node Q is no longer just the original precharge voltage, but the voltage dynamically boosted by node A. The amount of boost is determined by the compensation voltage stored in the second capacitor C2, thereby directly and actively compensating for the insufficient charging of the drive control node Q caused by the threshold voltage drift of the precharge transistor M1 and the output transistor.

[0058] (3) Compensation network reset: When the stage output terminal Fout of the output module 120 becomes a valid high level (i.e., in the normal output stage of the current stage), this high level signal acts on the control terminal of the sixth transistor T6, causing the sixth transistor T6 to conduct, thereby quickly releasing the charge stored on the second capacitor C2, resetting the entire compensation network to an initial low potential state, ensuring that the next working cycle can start from a consistent starting point, and preventing the accumulation of compensation voltage or crosstalk.

[0059] Therefore, the compensation module 140 in this embodiment constitutes a periodic dynamic compensation loop of writing, activation, and reset. The fifth transistor T5 and the second capacitor C2 together form the writing and storage unit of the compensation voltage; the fourth transistor T4 acts as the execution and transmission unit of the compensation voltage, directly acting on the drive control node Q; the sixth transistor T6 acts as the reset unit, ensuring the periodicity of the loop. By dynamically adjusting the compensation voltage according to the comprehensive detection results through the external control device 200, this module can accurately control the amount of compensation written and stored in the second capacitor C2 each time, and then adjust the potential of the drive control node Q through the fourth transistor T4, effectively offsetting the combined effect of the threshold voltage drift of the precharge transistor M1 and the output transistor, thereby maintaining the stability of the output waveform.

[0060] It is worth noting that, Figure 4 The detection modules shown are respectively with Figure 6 The compensation module shown and Figure 8 The compensation modules shown can be combined and integrated into the same gate drive unit, which will not be described in detail here.

[0061] In one embodiment, this application provides a gate driving circuit, which includes N cascaded gate driving units, at least one of which includes the gate driving unit shown in the above embodiment; that is, each gate driving unit may include the gate driving unit of this embodiment, or only one or more gate driving units may include the gate driving unit of this embodiment.

[0062] In another embodiment, this application provides a gate driving circuit, which includes N cascaded gate driving units. A target-level gate driving unit includes a pre-charge module, a drive control node, an output module, a detection module, and a compensation module. The detection module is configured to be connected to an external control device, the output of the pre-charge module, and the drive control node. It is used to detect actual electrical parameters on the drive control node during the detection phase, so that the external control device outputs a compensation signal based on a comparison of the actual electrical parameters with a preset reference range. The actual electrical parameters include the threshold voltage drift of the predictive transistor in the pre-charge module and the threshold voltage drift of the output transistor in the output module. The compensation module is configured to be connected to the external control device, the output of the pre-charge module, and the drive control node. It is used to compensate the pre-charge voltage output by the pre-charge module in response to the compensation signal output by the external control device and then output it to the drive control node. The target-level gate driving unit is a gate driving unit located close to the external control device. Furthermore, other gate drive units include: a precharge module, a drive control node, an output module connected to the control node, and a compensation module; the compensation module is configured to be connected to an external control device, the output terminal of the precharge module, and the drive control node, and is used to respond to the compensation signal output by the external control device, compensate the precharge voltage output by the precharge module, and then output it to the drive control node.

[0063] It should be noted that in this embodiment, there is only one specific target-level gate driving unit that includes the pre-charge module, drive control node, output module, detection module, and compensation module defined in the above embodiments; however, other-level gate driving units only include the pre-charge module, drive control node, output module, and compensation module defined in the above embodiments.

[0064] The working principle of the gate drive circuit in this embodiment is as follows: (1) The target-level gate drive unit is selected as the module closest to the external control device, that is, the first-level gate drive unit on the source side (which can be a normal drive module or a dummy drive module). This will ensure the shortest detection path, the smallest trace voltage drop, and the highest sampling accuracy.

[0065] (2) The goal of this embodiment is to construct a master-slave compensation architecture: the target level gate drive unit is used as the master unit, and its internal detection module is responsible for real-time detection of the actual electrical parameters on its own drive control node. The actual electrical parameters are sent to the external control device; all other level gate drive units (including the remaining Dummy GDL and Normal GDL) are used as slave units. The gate drive units in these slave units only contain a precharge module, drive control node, output module and compensation module, and no longer contain a detection module.

[0066] (3) The master unit controls all slave units through the compensation control line, ensuring that the compensation signal calculated by the external control device based on the electrical parameters of point Q detected by the master unit can be transmitted to all compensation modules simultaneously through this single compensation control line.

[0067] Therefore, this embodiment can achieve global and unified compensation for hundreds or thousands of gate drive units with only one detection module and one shared compensation control line, which greatly saves wiring space and pin resources of external control devices, and is the key to realizing narrow bezel design. In addition, setting the detection point close to the first stage of the external control device shortens the detection path to the maximum extent, reduces the impact of wiring load on the accuracy of sampling voltage, and improves the reliability of voltage compensation.

[0068] Figure 10 The diagram shown is a flowchart illustrating a compensation method provided in an embodiment of this application; as follows: Figure 10 As shown, the compensation method of this embodiment is applied to the gate drive circuit shown in the above embodiment, and specifically includes the following steps: Step S100: During the detection phase, the actual electrical parameters on the drive control node of the target-level gate drive unit are obtained through the detection module, so that the external control device outputs a compensation signal based on the comparison result between the actual electrical parameters and the preset reference range.

[0069] It should be noted that the target-level gate drive unit includes a detection module. The actual electrical parameters are used by the external control device to compare them with a preset reference range, and output a dynamic compensation signal based on the comparison result. Specifically, the detection module located in the target-level gate drive unit (i.e., the source-side first-stage dummy GDL) acquires the actual voltage or current of the drive control node of this module in real time. The target-level gate drive unit is the module closest to the external control device, ensuring the shortest detection path and the highest sampling accuracy. These actual electrical parameters, as a representative sample of the aging state of the entire gate drive circuit, are transmitted to the external control device.

[0070] In step S200, the compensation module in each gate drive unit receives and responds to the compensation signal, compensates the precharge voltage output by the precharge module, and then outputs it to the drive control node.

[0071] It should be noted that after receiving the actual electrical parameters, the external control device compares them with the preset reference range stored internally. Based on the comparison result (voltage difference ΔP or current difference ΔI), the external control device dynamically generates the corresponding compensation signal through the built-in control algorithm. Its control logic is as follows: when ΔP increases (indicating a decrease in voltage at point Q), the voltage level of the compensation signal is increased accordingly; conversely, it is decreased accordingly, thus realizing dynamic adjustment of the signal.

[0072] Furthermore, the compensation signal is simultaneously provided to the compensation modules in all stages of the gate drive unit (including the target stage and all other stages) through a single compensation control line; each compensation module synchronously receives and responds to the same compensation signal, compensates the precharge voltage output by its respective precharge module, and outputs it to its respective drive control node, so that the voltage on each drive control node is maintained within the preset reference range required by the design.

[0073] In one embodiment, when the detection module includes a first transistor, a first capacitor, a second transistor, and a third transistor, during the detection phase, the detection module acquires the actual electrical parameters on the drive control node of the target-level gate drive unit, including: during the detection trigger phase, the first transistor is turned on in response to a detection enable signal output by an external control device, so that the power supply voltage output by the power supply terminal charges the detection node through the turned-on first transistor and stores it in the first capacitor, while controlling the second transistor and the third transistor to be in the on state; during the detection signal generation phase, the second transistor, in response to a detection clock signal output by the detection timing terminal, collects and outputs the actual electrical parameters on the drive control node to the external control device.

[0074] It should be noted that the working principle of this embodiment is the same as... Figure 4 The detection modules shown work on the same principle, so they will not be described again here.

[0075] In one embodiment, this application provides a display panel including a display area and a non-display area. The display area includes multiple scan lines; the non-display area includes the gate driving circuit described in the above embodiment, and the drive output terminal of the gate driving circuit is electrically connected to at least one scan line.

[0076] Furthermore, the terms "first," "second," and "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0077] In the description of this specification, references to terms such as "some embodiments," "exemplarily," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. The illustrative expressions of the above terms in this specification do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0078] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application. Therefore, any changes or modifications made in accordance with the claims and description of this application should fall within the scope of this patent application.

Claims

1. A gate drive unit comprising a pre-charge module, a drive control node, and an output module connected to the drive control node, characterized in that, The gate drive unit further comprises: a detection module connected with an external control device, an output end of the pre-charge module and the drive control node, for detecting an actual electrical parameter on the drive control node in a detection stage, so that the external control device outputs a compensation signal according to a comparison result of the actual electrical parameter and a preset reference range; wherein a change of the actual electrical parameter reflects a threshold voltage drift of a pre-charge transistor in the pre-charge module or / and a threshold voltage drift of an output transistor in the output module; or / and, a compensation module connected with the external control device, the output end of the pre-charge module and the drive control node, for outputting the pre-charge voltage outputted by the pre-charge module to the drive control node after compensation in response to the compensation signal outputted by the external control device.

2. The gate drive unit of claim 1, wherein, When the gate drive unit comprises the detection module, the detection module comprises: a first transistor, a control end of the first transistor being connected with a trigger end of the external control device, a first end of the first transistor being connected with a power supply end, and a second end of the first transistor being connected with a detection node; a first capacitor, a first end of the first capacitor being connected with the detection node, and a second end of the first capacitor being connected with a low-level end; a second transistor, a control end of the second transistor being connected with the detection node, a first end of the second transistor being connected with a detection timing end, and a second end of the second transistor being connected with a detection end of the external control device; a third transistor, a control end of the third transistor being connected with the detection node, a first end of the third transistor being connected with the control end of the third transistor, and a second end of the third transistor being connected with the drive control node; wherein the first transistor has the same device parameters as a pre-charge transistor of the pre-charge module, and the second transistor has the same device parameters as an output transistor of the output module.

3. The gate drive unit of claim 1, wherein, When the gate drive unit comprises the compensation module, the compensation module comprises: a second capacitor, a first end of the second capacitor being connected with the output end of the pre-charge module; a fourth transistor, a control end of the fourth transistor being connected with a compensation timing end, a first end of the fourth transistor being connected with a compensation end of the external control device, and a second end of the fourth transistor being connected with a second end of the second capacitor; a fifth transistor, a control end of the fifth transistor being connected with a first pull-down end, a first end of the fifth transistor being connected with the second end of the second capacitor, and a second end of the fifth transistor being connected with a low-level end.

4. The gate drive unit of claim 3, wherein, The compensation module further comprises: a sixth transistor, a control end of the sixth transistor being connected with a second pull-down end, a first end of the sixth transistor being connected with a low-level end; a seventh transistor, a control end of the seventh transistor being connected with a third pull-down end, a first end of the seventh transistor being connected with a power supply end, and a second end of the seventh transistor being connected with the second end of the sixth transistor. An eighth transistor, a control end of the eighth transistor being connected with a second end of the seventh transistor, a first end of the eighth transistor being connected with the low level end, and a second end of the eighth transistor being connected with a first end of the fifth transistor.

5. The gate drive unit of claim 1, wherein, When the gate drive unit comprises the compensation module, the compensation module comprises: A fourth transistor, a control end of the fourth transistor being connected with an output end of the pre-charge module, a first end of the fourth transistor being connected with the control end of the fourth transistor, and a second end of the fourth transistor being connected with the drive control node; A second capacitor, a first end of the second capacitor being connected with the first end of the fourth transistor; A fifth transistor, a control end of the fifth transistor being connected with a compensation timing end, a first end of the fifth transistor being connected with a second end of the second capacitor, and a second end of the fifth transistor being connected with a compensation end of the external control device; A sixth transistor, a control end of the sixth transistor being connected with an output end of the output module, a first end of the sixth transistor being connected with the second end of the second capacitor, and a second end of the sixth transistor being connected with the low level end.

6. A gate drive circuit characterized by comprising: The gate drive circuit comprises N cascaded gate drive units, at least one of which comprises the gate drive unit of any one of claims 1-5.

7. A gate drive circuit comprising N cascaded gate drive units, characterized by The target stage gate drive unit comprises a pre-charge module, a drive control node, an output module, a detection module, and a compensation module; the detection module is connected with an external control device, an output end of the pre-charge module, and the drive control node, and is configured to detect an actual electrical parameter on the drive control node in a detection stage, so that the external control device outputs a compensation signal according to a comparison result of the actual electrical parameter and a preset reference range; the actual electrical parameter comprises threshold voltage drift of a prediction transistor in the pre-charge module and threshold voltage drift of an output transistor in the output module; the compensation module is connected with the external control device, the output end of the pre-charge module, and the drive control node, and is configured to output a pre-charge voltage output by the pre-charge module to the drive control node after compensation in response to the compensation signal output by the external control device; and the target stage gate drive unit is a gate drive unit close to the external control device. The other stage gate drive unit comprises a pre-charge module, a drive control node, an output module connected with the control node, and a compensation module; the compensation module is connected with the external control device, an output end of the pre-charge module, and the drive control node, and is configured to output a pre-charge voltage output by the pre-charge module to the drive control node after compensation in response to the compensation signal output by the external control device.

8. A compensation method characterized by, The compensation method is applied to the gate drive circuit of claim 6 or 7, and the compensation method comprises: In the detection stage, the actual electrical parameter on the driving control node of the target stage gate drive unit is acquired by the detection module; wherein the target stage gate drive unit comprises the detection module, and the actual electrical parameter is used for enabling the external control device to output a compensation signal according to the comparison result of the actual electrical parameter and a preset reference range; The compensation module in each stage gate drive unit receives and responds to the compensation signal, and outputs the pre-charging voltage output by the pre-charging module to the driving control node after compensation.

9. The compensation method according to claim 8, characterized in that, When the detection module comprises a first transistor, a first capacitor, and a second transistor and a third transistor, in the detection stage, the actual electrical parameter on the driving control node of the target stage gate drive unit is acquired by the detection module, comprising: In the detection trigger stage, the first transistor is turned on in response to the detection enable signal output by the external control device, so that the power supply voltage output by the power supply end charges the detection node through the turned-on first transistor and is stored in the first capacitor, while the second transistor and the third transistor are in the turned-on state; In the detection signal generation stage, the second transistor responds to the detection clock signal output by the detection timing end, acquires and outputs the actual electrical parameter on the driving control node to the external control device.

10. A display panel comprising a display area and a non-display area, the display area comprising a plurality of scan lines; characterized in that, The non-display area comprises the gate drive circuit of claim 6 or 7, and the driving output end in the gate drive circuit is electrically connected with at least one scanning line.

Images